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ARM: OMAP5: Add silicon id support for ES2.0 revision.

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Adding the CPU detection suport for OMAP5430 and
OMAP5432 ES2.0 SOCs.

Signed-off-by: R Sricharan <r.sricharan@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Nishanth Menon <nm@ti.com>
This commit is contained in:
SRICHARAN R
2013-02-12 01:33:41 +00:00
committed by Tom Rini
parent ef1697e99f
commit eed7c0f727
4 changed files with 21 additions and 11 deletions
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27
arch/arm/cpu/armv7/omap5/hwinit.c
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@@ -204,17 +204,22 @@ void init_omap_revision(void)
*/
unsigned int rev = cortex_rev();
switch (rev) {
case MIDR_CORTEX_A15_R0P0:
switch (readl(CONTROL_ID_CODE)) {
case OMAP5430_CONTROL_ID_CODE_ES1_0:
*omap_si_rev = OMAP5430_ES1_0;
break;
case OMAP5432_CONTROL_ID_CODE_ES1_0:
default:
*omap_si_rev = OMAP5432_ES1_0;
break;
}
switch (readl(CONTROL_ID_CODE)) {
case OMAP5430_CONTROL_ID_CODE_ES1_0:
*omap_si_rev = OMAP5430_ES1_0;
if (rev == MIDR_CORTEX_A15_R2P2)
*omap_si_rev = OMAP5430_ES2_0;
break;
case OMAP5432_CONTROL_ID_CODE_ES1_0:
*omap_si_rev = OMAP5432_ES1_0;
if (rev == MIDR_CORTEX_A15_R2P2)
*omap_si_rev = OMAP5432_ES2_0;
break;
case OMAP5430_CONTROL_ID_CODE_ES2_0:
*omap_si_rev = OMAP5430_ES2_0;
break;
case OMAP5432_CONTROL_ID_CODE_ES2_0:
*omap_si_rev = OMAP5432_ES2_0;
break;
default:
*omap_si_rev = OMAP5430_SILICON_ID_INVALID;