eaw/u-boot
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

powerpc: mpc8xx: Change CONFIG_8xx to CONFIG_MPC8xx

Browse Source 
CONFIG_8xx doesn't mean much outside of arch/powerpc/
This patch renames it CONFIG_MPC8xx just like CONFIG_MPC85xx etc ...
It also renames 8xx_immap.h to immap_8xx.h to be consistent with
other file names.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
This commit is contained in:
Christophe Leroy
2018-03-16 17:20:41 +01:00
committed by Tom Rini
parent 0ebb5388b4
commit ee1e600c13
19 changed files with 24 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
include/asm-generic/u-boot.h
View File

@@ -37,7 +37,7 @@ typedef struct bd_info {
unsigned long bi_dsp_freq; /* dsp core frequency */
unsigned long bi_ddr_freq; /* ddr frequency */
#endif
#if defined(CONFIG_8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
unsigned long bi_immr_base; /* base of IMMR register */
#endif
#if defined(CONFIG_M68K)

2
include/commproc.h
View File

@@ -16,7 +16,7 @@
#ifndef __CPM_8XX__
#define __CPM_8XX__
#include <asm/8xx_immap.h>
#include <asm/immap_8xx.h>
/* CPM Command register.
*/

4
include/mpc8xx.h
View File

@@ -81,7 +81,7 @@
#define TBSCR_TBIRQ2 0x0400 /* Time Base Interrupt Request 2 */
#define TBSCR_TBIRQ1 0x0200 /* Time Base Interrupt Request 1 */
#define TBSCR_TBIRQ0 0x0100 /* Time Base Interrupt Request 0 */
#if 0 /* already in asm/8xx_immap.h */
#if 0 /* already in asm/immap_8xx.h */
#define TBSCR_REFA 0x0080 /* Reference Interrupt Status A */
#define TBSCR_REFB 0x0040 /* Reference Interrupt Status B */
#define TBSCR_REFAE 0x0008 /* Second Interrupt Enable A */
@@ -95,7 +95,7 @@
*/
#undef PISCR_PIRQ /* TBD */
#define PISCR_PITF 0x0002 /* Periodic Interrupt Timer Freeze */
#if 0 /* already in asm/8xx_immap.h */
#if 0 /* already in asm/immap_8xx.h */
#define PISCR_PS 0x0080 /* Periodic interrupt Status */
#define PISCR_PIE 0x0004 /* Periodic Interrupt Enable */
#define PISCR_PTE 0x0001 /* Periodic Timer Enable */

6
include/ppc_asm.tmpl
View File

@@ -81,7 +81,7 @@
#define r30 30
#define r31 31
#if defined(CONFIG_8xx)
#if defined(CONFIG_MPC8xx)
/* Some special registers */
@@ -93,10 +93,10 @@
#define LCTRL2 157 /* Load/Store Support (37-41) */
#define ICTRL 158
#endif /* CONFIG_8xx */
#endif /* CONFIG_MPC8xx */
#if defined(CONFIG_8xx)
#if defined(CONFIG_MPC8xx)
/* Registers in the processor's internal memory map that we use.
*/

2
include/watchdog.h
View File

@@ -73,7 +73,7 @@ int init_func_watchdog_reset(void);
*/
/* MPC 8xx */
#if defined(CONFIG_8xx) && !defined(__ASSEMBLY__)
#if defined(CONFIG_MPC8xx) && !defined(__ASSEMBLY__)
void reset_8xx_watchdog(immap_t __iomem *immr);
#endif