Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
This commit is contained in:
@@ -433,6 +433,7 @@ extern unsigned long get_sdram_size(void);
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#define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_BOOTDELAY 10 /* -1 disable auto-boot */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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@@ -675,6 +675,7 @@ combinations. this should be removed later
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#define CONFIG_UBOOTPATH "u-boot.bin"
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_BOOTDELAY 10 /* -1 disable auto-boot */
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#ifdef CONFIG_SDCARD
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#define CONFIG_DEF_HWCONFIG "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0"
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@@ -581,4 +581,6 @@
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#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
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#include <asm/fsl_secure_boot.h>
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#endif /* __CONFIG_H */
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@@ -35,7 +35,10 @@
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_DEEP_SLEEP
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#if defined(CONFIG_DEEP_SLEEP)
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#define CONFIG_SILENT_CONSOLE
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#define CONFIG_BOARD_EARLY_INIT_F
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#endif
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#ifdef CONFIG_RAMBOOT_PBL
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#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg
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@@ -36,7 +36,10 @@
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/* support deep sleep */
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#define CONFIG_DEEP_SLEEP
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#if defined(CONFIG_DEEP_SLEEP)
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#define CONFIG_SILENT_CONSOLE
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#define CONFIG_BOARD_EARLY_INIT_F
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#endif
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#ifdef CONFIG_RAMBOOT_PBL
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#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg
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@@ -51,7 +54,7 @@
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#define CONFIG_SPL_I2C_SUPPORT
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#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
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#define CONFIG_FSL_LAW /* Use common FSL init code */
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#define CONFIG_SYS_TEXT_BASE 0x00201000
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#define CONFIG_SYS_TEXT_BASE 0x30001000
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#define CONFIG_SPL_TEXT_BASE 0xFFFD8000
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#define CONFIG_SPL_PAD_TO 0x40000
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#define CONFIG_SPL_MAX_SIZE 0x28000
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@@ -67,21 +70,21 @@
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#ifdef CONFIG_NAND
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#define CONFIG_SPL_NAND_SUPPORT
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#define CONFIG_SYS_NAND_U_BOOT_SIZE (768 << 10)
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#define CONFIG_SYS_NAND_U_BOOT_DST 0x00200000
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#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
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#define CONFIG_SYS_NAND_U_BOOT_DST 0x30000000
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#define CONFIG_SYS_NAND_U_BOOT_START 0x30000000
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#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10)
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#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
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#define CONFIG_SPL_NAND_BOOT
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#endif
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#ifdef CONFIG_SPIFLASH
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#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
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#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC
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#define CONFIG_SPL_SPI_SUPPORT
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#define CONFIG_SPL_SPI_FLASH_SUPPORT
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#define CONFIG_SPL_SPI_FLASH_MINIMAL
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#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10)
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#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000)
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#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x00200000)
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#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000)
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#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x30000000)
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#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (256 << 10)
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#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
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#ifndef CONFIG_SPL_BUILD
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@@ -91,12 +94,12 @@
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#endif
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#ifdef CONFIG_SDCARD
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#define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC
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#define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC
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#define CONFIG_SPL_MMC_SUPPORT
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#define CONFIG_SPL_MMC_MINIMAL
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#define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10)
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#define CONFIG_SYS_MMC_U_BOOT_DST (0x00200000)
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#define CONFIG_SYS_MMC_U_BOOT_START (0x00200000)
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#define CONFIG_SYS_MMC_U_BOOT_DST (0x30000000)
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#define CONFIG_SYS_MMC_U_BOOT_START (0x30000000)
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#define CONFIG_SYS_MMC_U_BOOT_OFFS (260 << 10)
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#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds"
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#ifndef CONFIG_SPL_BUILD
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@@ -759,8 +762,10 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_FMAN_ENET
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#define CONFIG_PHYLIB_10G
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#define CONFIG_PHY_REALTEK
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#define CONFIG_PHY_AQUANTIA
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#define RGMII_PHY1_ADDR 0x2
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#define RGMII_PHY2_ADDR 0x6
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#define SGMII_PHY1_ADDR 0x2
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#define FM1_10GEC1_PHY_ADDR 0x1
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#endif
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@@ -47,7 +47,10 @@
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/* support deep sleep */
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#define CONFIG_DEEP_SLEEP
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#if defined(CONFIG_DEEP_SLEEP)
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#define CONFIG_SILENT_CONSOLE
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#define CONFIG_BOARD_EARLY_INIT_F
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#endif
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#ifndef CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_TEXT_BASE 0xeff40000
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@@ -689,6 +692,12 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
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#endif
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/* Enable VSC9953 L2 Switch driver */
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#define CONFIG_VSC9953
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#define CONFIG_VSC9953_CMD
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#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x14
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#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x18
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/*
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* Dynamic MTD Partition support with mtdparts
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*/
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@@ -726,6 +726,14 @@
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#define CONFIG_SYS_RGMII1_PHY_ADDR 0x01
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#define CONFIG_SYS_RGMII2_PHY_ADDR 0x02
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/* Enable VSC9953 L2 Switch driver on T1040 SoC */
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#ifdef CONFIG_T1040RDB
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#define CONFIG_VSC9953
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#define CONFIG_VSC9953_CMD
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#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR 0x04
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#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x08
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#endif
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#define CONFIG_MII /* MII PHY management */
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#define CONFIG_ETHPRIME "FM1@DTSEC4"
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#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
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