mpc8308rdb: add support for Spansion SPI flash on header J8
The SPI pins are routed to header J8 for testing SPI functionality. A Spansion flash has been wired up and tested on this header. This patch breaks support for the second TSEC interface, since the GPIO pin used as a chip select is pinmuxed with some of the TSEC pins. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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committed by
Kim Phillips
parent
f138ca1373
commit
ea1ea54e35
@@ -340,6 +340,19 @@
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#define CONFIG_SYS_I2C_OFFSET 0x3000
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#define CONFIG_SYS_I2C2_OFFSET 0x3100
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/*
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* SPI on header J8
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*
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* WARNING: enabling this will break TSEC2 (connected to the Vitesse switch)
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* due to a pinmux conflict between GPIO9 (SPI chip select )and the TSEC2 pins.
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*/
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#ifdef CONFIG_MPC8XXX_SPI
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#define CONFIG_CMD_SPI
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#define CONFIG_USE_SPIFLASH
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_SPANSION
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#define CONFIG_CMD_SF
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#endif
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/*
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* Board info - revision and where boot from
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