mpc8308rdb: add support for Spansion SPI flash on header J8

The SPI pins are routed to header J8 for testing SPI functionality. A
Spansion flash has been wired up and tested on this header.

This patch breaks support for the second TSEC interface, since the GPIO
pin used as a chip select is pinmuxed with some of the TSEC pins.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This commit is contained in:
Ira W. Snyder
2012-09-12 14:17:32 -07:00
committed by Kim Phillips
parent f138ca1373
commit ea1ea54e35
2 changed files with 62 additions and 0 deletions

View File

@@ -340,6 +340,19 @@
#define CONFIG_SYS_I2C_OFFSET 0x3000
#define CONFIG_SYS_I2C2_OFFSET 0x3100
/*
* SPI on header J8
*
* WARNING: enabling this will break TSEC2 (connected to the Vitesse switch)
* due to a pinmux conflict between GPIO9 (SPI chip select )and the TSEC2 pins.
*/
#ifdef CONFIG_MPC8XXX_SPI
#define CONFIG_CMD_SPI
#define CONFIG_USE_SPIFLASH
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_CMD_SF
#endif
/*
* Board info - revision and where boot from