eaw/u-boot
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'master' of git://git.denx.de/u-boot-arm

Browse Source
This commit is contained in:
Tom Rini
2014-10-10 20:59:28 -04:00
parent ed8271d11c 3d420cbd35
commit e89d623f09
111 changed files with 5364 additions and 1007 deletions
Download Patch File Download Diff File Expand all files Collapse all files

195
include/configs/arndale.h
View File

@@ -9,109 +9,19 @@
#ifndef __CONFIG_ARNDALE_H
#define __CONFIG_ARNDALE_H
/* High Level Configuration Options */
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
#define CONFIG_S5P /* S5P Family */
#define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */
#define CONFIG_EXYNOS5250
#include <asm/arch/cpu.h> /* get chip and board defs */
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
/* Allow tracing to be enabled */
#define CONFIG_TRACE
#define CONFIG_CMD_TRACE
#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
#define CONFIG_TRACE_EARLY
#define CONFIG_TRACE_EARLY_ADDR 0x50000000
/* Keep L2 Cache Disabled */
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_TEXT_BASE 0x43E00000
/* input clock of PLL: SMDK5250 has 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
/* Power Down Modes */
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000
#define S5P_CHECK_LPA 0xABAD0000
/* Offset for inform registers */
#define INFORM0_OFFSET 0x800
#define INFORM1_OFFSET 0x804
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
/* select serial console configuration */
#define CONFIG_BAUDRATE 115200
#define EXYNOS5_DEFAULT_UART_OFFSET 0x010000
#define CONFIG_SILENT_CONSOLE
/* Console configuration */
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define EXYNOS_DEVICE_SETTINGS \
"stdin=serial\0" \
"stdout=serial\0" \
"stderr=serial\0"
#define CONFIG_EXTRA_ENV_SETTINGS \
EXYNOS_DEVICE_SETTINGS
#include "exynos5250-common.h"
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
#define CONFIG_DWMMC
#define CONFIG_EXYNOS_DWMMC
#define CONFIG_SUPPORT_EMMC_BOOT
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SKIP_LOWLEVEL_INIT
/* PWM */
#define CONFIG_PWM
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
/* Command definition*/
#include <config_cmd_default.h>
#define CONFIG_CMD_PING
#define CONFIG_CMD_ELF
#define CONFIG_CMD_MMC
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_NET
#define CONFIG_CMD_HASH
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* USB */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_EXYNOS
#define CONFIG_USB_STORAGE
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
@@ -119,106 +29,23 @@
/* MMC SPL */
#define CONFIG_EXYNOS_SPL
#define COPY_BL2_FNPTR_ADDR 0x02020030
#define CONFIG_SPL_LIBCOMMON_SUPPORT
/* specific .lds file */
#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x02023400
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
#define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000"
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT "ARNDALE # "
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
#define CONFIG_RD_LVL
#define CONFIG_NR_DRAM_BANKS 8
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
#define CONFIG_SYS_MONITOR_BASE 0x00000000
/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_IDENT_STRING " for ARNDALE"
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SECURE_BL1_ONLY
/* Secure FW size configuration */
#ifdef CONFIG_SECURE_BL1_ONLY
#define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */
#else
#define CONFIG_SEC_FW_SIZE 0
#endif
/* Configuration of BL1, BL2, ENV Blocks on mmc */
#define CONFIG_RES_BLOCK_SIZE (512)
#define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
#define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */
#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
#define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
#define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
/* U-boot copy size from boot Media to DRAM.*/
#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512)
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#define CONFIG_CMD_PART
#define CONFIG_PARTITION_UUIDS
#define CONFIG_IRAM_STACK 0x02050000
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK
/* I2C */
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* 100 Kbps */
#define CONFIG_SYS_I2C_S3C24X0
#define CONFIG_MAX_I2C_NUM 8
#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x0
#define CONFIG_I2C_EDID
/* PMIC */
#define CONFIG_PMIC
#define CONFIG_POWER_I2C
@@ -227,26 +54,6 @@
#define CONFIG_PREBOOT
/* Ethernet Controllor Driver */
#ifdef CONFIG_CMD_NET
#define CONFIG_SMC911X
#define CONFIG_SMC911X_BASE 0x5000000
#define CONFIG_SMC911X_16_BIT
#define CONFIG_ENV_SROM_BANK 1
#endif /*CONFIG_CMD_NET*/
/* Enable PXE Support */
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_PXE
#define CONFIG_MENU
#endif
/* Enable devicetree support */
#define CONFIG_OF_LIBFDT
/* Enable Time Command */
#define CONFIG_CMD_TIME
#define CONFIG_S5P_PA_SYSRAM 0x02020000
#define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM

2
include/configs/at91sam9263ek.h
View File

@@ -48,6 +48,8 @@
#define CONFIG_CMD_BOOTZ
#define CONFIG_OF_LIBFDT
#define CONFIG_SYS_GENERIC_BOARD
/*
* Hardware drivers
*/

1
include/configs/cm_fx6.h
View File

@@ -222,7 +222,6 @@
#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC0"
#define CONFIG_ARP_TIMEOUT 200UL
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_NET_RETRY_COUNT 5
/* USB */

2
include/configs/corvus.h
View File

@@ -18,6 +18,8 @@
#define MACH_TYPE_CORVUS 2066
#define CONFIG_SYS_GENERIC_BOARD
/*
* Warning: changing CONFIG_SYS_TEXT_BASE requires
* adapting the initial boot program.

118
include/configs/exynos4-dt.h → include/configs/exynos-common.h
View File

@@ -1,109 +1,78 @@
/*
* Copyright (C) 2014 Samsung Electronics
* Copyright (C) 2013 Samsung Electronics
*
* Configuration settings for the SAMSUNG EXYNOS5 board.
* Common configuration settings for the SAMSUNG EXYNOS boards.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#ifndef __EXYNOS_COMMON_H
#define __EXYNOS_COMMON_H
/* High Level Configuration Options */
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
#define CONFIG_S5P /* S5P Family */
#define CONFIG_EXYNOS4 /* which is in a Exynos4 Family */
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <linux/sizes.h>
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_COMMON
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_CACHELINE_SIZE 32
/* Enable fdt support */
#define CONFIG_OF_LIBFDT
/* input clock of PLL: EXYNOS4 boards have 24MHz input clock */
/* Keep L2 Cache Disabled */
#define CONFIG_CMD_CACHE
/* input clock of PLL: 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
#define CONFIG_ENV_OVERWRITE
#include <linux/sizes.h>
/* Size of malloc() pool before and after relocation */
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
/* select serial console configuration */
#define CONFIG_BAUDRATE 115200
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_S5P_SDHCI
#define CONFIG_SDHCI
#define CONFIG_MMC_SDMA
#define CONFIG_DWMMC
#define CONFIG_EXYNOS_DWMMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_MMC_DEFAULT_DEV 0
/* PWM */
#define CONFIG_PWM
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SKIP_LOWLEVEL_INIT
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
/* Command definition*/
#include <config_cmd_default.h>
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_XIMG
#undef CONFIG_CMD_CACHE
#undef CONFIG_CMD_ONENAND
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_MMC
#define CONFIG_CMD_DFU
#define CONFIG_CMD_GPT
#define CONFIG_CMD_PMIC
#define CONFIG_CMD_SETEXPR
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* FAT */
/* PWM */
#define CONFIG_PWM
/* Command definition*/
#include <config_cmd_default.h>
#define CONFIG_CMD_MMC
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FAT
#define CONFIG_FAT_WRITE
/* EXT4 */
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
/* USB Composite download gadget - g_dnl */
#define CONFIG_USBDOWNLOAD_GADGET
/* TIZEN THOR downloader support */
#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_THOR_FUNCTION
#define CONFIG_DFU_FUNCTION
#define CONFIG_DFU_MMC
#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* USB Samsung's IDs */
#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
#define CONFIG_G_DNL_MANUFACTURER "Samsung"
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#define CONFIG_CMD_PART
#define CONFIG_PARTITION_UUIDS
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
@@ -111,6 +80,7 @@
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
@@ -118,22 +88,4 @@
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#define CONFIG_CMD_PART
#define CONFIG_PARTITION_UUIDS
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE
/* Enable devicetree support */
#define CONFIG_OF_LIBFDT
#endif /* __CONFIG_H */

68
include/configs/exynos4-common.h Normal file
View File

@@ -0,0 +1,68 @@
/*
* Copyright (C) 2014 Samsung Electronics
*
* Configuration settings for the SAMSUNG EXYNOS5 board.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_EXYNOS4_COMMON_H
#define __CONFIG_EXYNOS4_COMMON_H
#define CONFIG_EXYNOS4 /* Exynos4 Family */
#include "exynos-common.h"
#define CONFIG_BOARD_COMMON
#define CONFIG_SYS_CACHELINE_SIZE 32
#define CONFIG_REVISION_TAG
/* SD/MMC configuration */
#define CONFIG_MMC_SDMA
#define CONFIG_MMC_DEFAULT_DEV 0
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_MISC
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_XIMG
#undef CONFIG_CMD_ONENAND
#undef CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_DFU
#define CONFIG_CMD_GPT
#define CONFIG_CMD_PMIC
#define CONFIG_CMD_SETEXPR
/* USB Composite download gadget - g_dnl */
#define CONFIG_USBDOWNLOAD_GADGET
/* TIZEN THOR downloader support */
#define CONFIG_CMD_THOR_DOWNLOAD
#define CONFIG_THOR_FUNCTION
#define CONFIG_DFU_FUNCTION
#define CONFIG_DFU_MMC
#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
#define DFU_DEFAULT_POLL_TIMEOUT 300
/* USB Samsung's IDs */
#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
#define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
#define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
#define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
#define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
#define CONFIG_G_DNL_MANUFACTURER "Samsung"
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
#define CONFIG_USB_GADGET
#define CONFIG_USB_GADGET_S3C_UDC_OTG
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE
#endif /* __CONFIG_EXYNOS4_COMMON_H */

120
include/configs/exynos5-dt.h → include/configs/exynos5-common.h
View File

@@ -6,22 +6,14 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#ifndef __CONFIG_EXYNOS5_COMMON_H
#define __CONFIG_EXYNOS5_COMMON_H
/* High Level Configuration Options */
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
#define CONFIG_S5P /* S5P Family */
#define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */
#define CONFIG_EXYNOS5 /* Exynos5 Family */
#include <asm/arch/cpu.h> /* get chip and board defs */
#include "exynos-common.h"
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_COMMON
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_EXYNOS_SPL
/* Allow tracing to be enabled */
@@ -32,22 +24,11 @@
#define CONFIG_TRACE_EARLY
#define CONFIG_TRACE_EARLY_ADDR 0x50000000
/* Keep L2 Cache Disabled */
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_CACHELINE_SIZE 64
/* Enable ACE acceleration for SHA1 and SHA256 */
#define CONFIG_EXYNOS_ACE_SHA
#define CONFIG_SHA_HW_ACCEL
/* input clock of PLL: SMDK5250 has 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
/* Power Down Modes */
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000
@@ -59,66 +40,26 @@
#define INFORM2_OFFSET 0x808
#define INFORM3_OFFSET 0x80c
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
/* select serial console configuration */
#define CONFIG_BAUDRATE 115200
#define EXYNOS5_DEFAULT_UART_OFFSET 0x010000
#define CONFIG_SILENT_CONSOLE
/* Enable keyboard */
#define CONFIG_CROS_EC /* CROS_EC protocol */
#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
#define CONFIG_CROS_EC_KEYB /* CROS_EC keyboard input */
#define CONFIG_CMD_CROS_EC
#define CONFIG_KEYBOARD
/* Console configuration */
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_CONSOLE_MUX
#define EXYNOS_DEVICE_SETTINGS \
"stdin=serial,cros-ec-keyb\0" \
"stdout=serial,lcd\0" \
"stderr=serial,lcd\0"
"stdin=serial\0" \
"stdout=serial\0" \
"stderr=serial\0"
#define CONFIG_EXTRA_ENV_SETTINGS \
EXYNOS_DEVICE_SETTINGS
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
#define CONFIG_DWMMC
#define CONFIG_EXYNOS_DWMMC
#define CONFIG_SUPPORT_EMMC_BOOT
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SKIP_LOWLEVEL_INIT
/* PWM */
#define CONFIG_PWM
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
/* Command definition*/
#include <config_cmd_default.h>
#define CONFIG_CMD_PING
#define CONFIG_CMD_ELF
#define CONFIG_CMD_MMC
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_NET
#define CONFIG_CMD_HASH
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* Thermal Management Unit */
#define CONFIG_EXYNOS_TMU
#define CONFIG_CMD_DTT
@@ -133,6 +74,7 @@
/* MMC SPL */
#define COPY_BL2_FNPTR_ADDR 0x02020030
#define CONFIG_SUPPORT_EMMC_BOOT
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT
@@ -140,15 +82,7 @@
/* specific .lds file */
#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
@@ -175,10 +109,6 @@
#define CONFIG_SYS_MONITOR_BASE 0x00000000
/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SECURE_BL1_ONLY
@@ -199,23 +129,13 @@
#define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
/* Store environment at the end of a 4 MB SPI flash */
#define FLASH_SIZE (0x4 << 20)
#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
/* U-boot copy size from boot Media to DRAM.*/
#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512)
#define CONFIG_SPI_BOOTING
#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058
#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#define CONFIG_CMD_PART
#define CONFIG_PARTITION_UUIDS
/* I2C */
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C
@@ -227,10 +147,6 @@
#define CONFIG_I2C_EDID
/* SPI */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SPI_FLASH
#define CONFIG_ENV_SPI_BASE 0x12D30000
#ifdef CONFIG_SPI_FLASH
#define CONFIG_EXYNOS_SPI
#define CONFIG_CMD_SF
@@ -250,11 +166,6 @@
#define CONFIG_ENV_SPI_MAX_HZ 50000000
#endif
/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_TPS65090
/* Ethernet Controllor Driver */
#ifdef CONFIG_CMD_NET
#define CONFIG_SMC911X
@@ -269,9 +180,6 @@
#define CONFIG_MENU
#endif
/* Enable devicetree support */
#define CONFIG_OF_LIBFDT
/* SHA hashing */
#define CONFIG_CMD_HASH
#define CONFIG_HASH_VERIFY
@@ -291,4 +199,8 @@
#define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002
#define EXYNOS_IRAM_SECONDARY_BASE 0x02020018
#endif /* __CONFIG_H */
/* Enable FIT support and comparison */
#define CONFIG_FIT
#define CONFIG_FIT_BEST_MATCH
#endif /* __CONFIG_EXYNOS5_COMMON_H */

35
include/configs/exynos5-dt-common.h Normal file
View File

@@ -0,0 +1,35 @@
/*
* Copyright (C) 2014 Google, Inc
*
* Configuration settings for generic Exynos 5 board
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_EXYNOS5_DT_COMMON_H
#define __CONFIG_EXYNOS5_DT_COMMON_H
#include "exynos5-common.h"
/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_TPS65090
/* Enable keyboard */
#define CONFIG_CROS_EC /* CROS_EC protocol */
#define CONFIG_CROS_EC_KEYB /* CROS_EC keyboard input */
#define CONFIG_CMD_CROS_EC
#define CONFIG_KEYBOARD
/* Console configuration */
#undef EXYNOS_DEVICE_SETTINGS
#define EXYNOS_DEVICE_SETTINGS \
"stdin=serial,cros-ec-keyb\0" \
"stdout=serial,lcd\0" \
"stderr=serial,lcd\0"
#define CONFIG_EXTRA_ENV_SETTINGS \
EXYNOS_DEVICE_SETTINGS
#endif

7
include/configs/exynos5250-dt.h → include/configs/exynos5250-common.h
View File

@@ -10,7 +10,7 @@
#ifndef __CONFIG_5250_H
#define __CONFIG_5250_H
#include <configs/exynos5-dt.h>
#include <configs/exynos5-common.h>
#define CONFIG_EXYNOS5250
#define CONFIG_SYS_SDRAM_BASE 0x40000000
@@ -24,8 +24,6 @@
/* USB */
#define CONFIG_CMD_USB
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE
@@ -33,9 +31,6 @@
#define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000"
#define CONFIG_SYS_PROMPT "SMDK5250 # "
#define CONFIG_IDENT_STRING " for SMDK5250"
#define CONFIG_IRAM_STACK 0x02050000
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK

22
include/configs/exynos5420.h → include/configs/exynos5420-common.h
View File

@@ -9,7 +9,18 @@
#ifndef __CONFIG_EXYNOS5420_H
#define __CONFIG_EXYNOS5420_H
#define CONFIG_EXYNOS5420 /* which is in a Exynos5 Family */
#define CONFIG_EXYNOS5420
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SPI_FLASH
#define CONFIG_ENV_SPI_BASE 0x12D30000
#define FLASH_SIZE (0x4 << 20)
#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
#define CONFIG_SPI_BOOTING
#include <configs/exynos5-common.h>
#define CONFIG_ARCH_EARLY_INIT_R
#define MACH_TYPE_SMDK5420 8002
#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420
@@ -31,14 +42,12 @@
#define CONFIG_MAX_I2C_NUM 11
/* Enable FIT support and comparison */
#define CONFIG_FIT
#define CONFIG_FIT_BEST_MATCH
#define CONFIG_BOARD_REV_GPIO_COUNT 2
#define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000"
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
/*
* Put the initial stack pointer 1KB below this to allow room for the
* SPL marker. This value is arbitrary, but gd_t is placed starting here.
@@ -49,4 +58,7 @@
#define CONFIG_NR_DRAM_BANKS 7
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
/* Miscellaneous configurable options */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
#endif /* __CONFIG_EXYNOS5420_H */

1
include/configs/koelsch.h
View File

@@ -89,6 +89,7 @@
/* SCIF */
#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF0
#define CONFIG_SCIF_USE_EXT_CLK
#undef CONFIG_SYS_CONSOLE_INFO_QUIET
#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE

3
include/configs/lager.h
View File

@@ -90,6 +90,7 @@
/* SCIF */
#define CONFIG_SCIF_CONSOLE
#define CONFIG_CONS_SCIF0
#define CONFIG_SCIF_USE_EXT_CLK
#undef CONFIG_SYS_CONSOLE_INFO_QUIET
#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
@@ -167,7 +168,7 @@
#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_MP_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */
#define CONFIG_SYS_TMU_CLK_DIV 4

13
include/configs/m28evk.h
View File

@@ -32,6 +32,7 @@
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FAT
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_I2C
@@ -236,7 +237,7 @@
"addargs=run addcons addmtd addmisc\0" \
"mmcload=" \
"mmc rescan ; " \
"ext4load mmc 0:2 ${kernel_addr_r} ${bootfile}\0" \
"load mmc 0:2 ${kernel_addr_r} ${bootfile}\0" \
"ubiload=" \
"ubi part UBI ; ubifsmount ubi0:rootfs ; " \
"ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
@@ -279,10 +280,12 @@
"bootm ${kernel_addr_r}\0" \
"try_bootscript=" \
"mmc rescan;" \
"if ext4load mmc 0:2 ${kernel_addr_r} ${bootscript};" \
"then;" \
"\techo Running bootscript...;" \
"\tsource ${kernel_addr_r};" \
"if test -e mmc 0:2 ${bootscript} ; then " \
"if load mmc 0:2 ${kernel_addr_r} ${bootscript};" \
"then ; " \
"echo Running bootscript... ; " \
"source ${kernel_addr_r} ; " \
"fi ; " \
"fi\0"
/* The rest of the configuration is shared */

13
include/configs/m53evk.h
View File

@@ -38,6 +38,7 @@
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FAT
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
@@ -305,7 +306,7 @@
"addargs=run addcons addmtd addmisc\0" \
"mmcload=" \
"mmc rescan ; " \
"ext4load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
"load mmc 0:1 ${kernel_addr_r} ${bootfile}\0" \
"ubiload=" \
"ubi part UBI ; ubifsmount ubi0:rootfs ; " \
"ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
@@ -348,10 +349,12 @@
"bootm ${kernel_addr_r}\0" \
"try_bootscript=" \
"mmc rescan;" \
"if ext4load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
"then;" \
"\techo Running bootscript...;" \
"\tsource ${kernel_addr_r};" \
"if test -e mmc 0:1 ${bootscript} ; then " \
"if load mmc 0:1 ${kernel_addr_r} ${bootscript};" \
"then ; " \
"echo Running bootscript... ; " \
"source ${kernel_addr_r} ; " \
"fi ; " \
"fi\0"
#endif /* __M53EVK_CONFIG_H__ */

3
include/configs/mx25pdk.h
View File

@@ -14,6 +14,7 @@
#define CONFIG_MX25
#define CONFIG_SYS_TEXT_BASE 0x81200000
#define CONFIG_MXC_GPIO
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SYS_TIMER_RATE 32768
#define CONFIG_SYS_TIMER_COUNTER \
@@ -100,7 +101,7 @@
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_ADDR IMX_MMC_SDHC1_BASE
#define CONFIG_SYS_FSL_ESDHC_NUM 1
/* PMIC Configs */

3
include/configs/mx51evk.h
View File

@@ -26,6 +26,7 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_OF_LIBFDT
@@ -69,7 +70,7 @@
* MMC Configs
* */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
#define CONFIG_SYS_FSL_ESDHC_NUM 2
#define CONFIG_MMC

49
include/configs/mx6qarm2.h
View File

@@ -10,7 +10,6 @@
#define __CONFIG_H
#define CONFIG_MX6
#define CONFIG_MX6Q
#include "mx6_common.h"
@@ -37,7 +36,7 @@
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_MMC
@@ -69,18 +68,22 @@
#define CONFIG_BOOTDELAY 3
#define CONFIG_LOADADDR 0x10800000
#define CONFIG_LOADADDR 0x12000000
#define CONFIG_SYS_TEXT_BASE 0x17800000
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
"image=zImage\0" \
"console=ttymxc3\0" \
"fdt_file=imx6q-arm2.dtb\0" \
"fdt_addr=0x18000000\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=1\0" \
"mmcpart=2\0" \
"mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
"root=${mmcroot}\0" \
"loadbootscript=" \
@@ -88,15 +91,46 @@
"bootscript=echo Running bootscript from mmc ...; " \
"source\0" \
"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"bootz\0" \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if run loadfdt; then " \
"bootz ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootz; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootz; " \
"fi;\0" \
"netargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/nfs " \
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
"netboot=echo Booting from net ...; " \
"run netargs; " \
"dhcp ${image}; bootz\0" \
"if test ${ip_dyn} = yes; then " \
"setenv get_cmd dhcp; " \
"else " \
"setenv get_cmd tftp; " \
"fi; " \
"${get_cmd} ${image}; " \
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
"bootz ${loadaddr} - ${fdt_addr}; " \
"else " \
"if test ${boot_fdt} = try; then " \
"bootz; " \
"else " \
"echo WARN: Cannot load the DT; " \
"fi; " \
"fi; " \
"else " \
"bootz; " \
"fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev};" \
@@ -134,7 +168,6 @@
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR

2
include/configs/mx6slevk.h
View File

@@ -40,7 +40,7 @@
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
#define CONFIG_MMC
#define CONFIG_CMD_MMC

6
include/configs/mx6sxsabresd.h
View File

@@ -159,7 +159,7 @@
/* MMC Configuration */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
#define CONFIG_MMC
#define CONFIG_CMD_MMC
@@ -204,8 +204,8 @@
#define CONFIG_PCI_PNP
#define CONFIG_PCI_SCAN_SHOW
#define CONFIG_PCIE_IMX
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 1)
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 0)
#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
#endif
/* FLASH and environment organization */

113
include/configs/nitrogen6x.h
View File

@@ -32,6 +32,7 @@
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_GPIO
#define CONFIG_CMD_GPIO
#define CONFIG_CI_UDC
#define CONFIG_USBD_HS
#define CONFIG_USB_GADGET_DUALSPEED
@@ -63,6 +64,7 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_EDID
/* MMC Configs */
#define CONFIG_FSL_ESDHC
@@ -75,6 +77,8 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION
@@ -122,6 +126,8 @@
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_USB_KEYBOARD
#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
/* Miscellaneous commands */
#define CONFIG_CMD_BMODE
@@ -137,7 +143,6 @@
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 260000000
#define CONFIG_CMD_HDMIDETECT
#define CONFIG_CONSOLE_MUX
@@ -173,7 +178,14 @@
#define CONFIG_DRIVE_MMC
#endif
#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC
#ifdef CONFIG_USB_STORAGE
#define CONFIG_DRIVE_USB "usb "
#else
#define CONFIG_DRIVE_USB
#endif
#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB
#define CONFIG_UMSDEVS CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC
#if defined(CONFIG_SABRELITE)
#define CONFIG_EXTRA_ENV_SETTINGS \
@@ -186,7 +198,7 @@
"fdt_addr=0x18000000\0" \
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"mmcdev=0\0" \
"mmcdevs=0 1\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
"mmcargs=setenv bootargs console=${console},${baudrate} " \
@@ -238,47 +250,71 @@
"fi;\0"
#define CONFIG_BOOTCOMMAND \
"mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loaduimage; then " \
"run mmcboot; " \
"else run netboot; " \
"fi; " \
"fi; " \
"else run netboot; fi"
"for mmcdev in ${mmcdevs}; do " \
"mmc dev ${mmcdev}; " \
"if mmc rescan; then " \
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
"if run loaduimage; then " \
"run mmcboot; " \
"fi; " \
"fi; " \
"fi; " \
"done; " \
"run netboot; "
#else
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootdevs=" CONFIG_DRIVE_TYPES "\0" \
"umsdevs=" CONFIG_UMSDEVS "\0" \
"console=ttymxc1\0" \
"clearenv=if sf probe || sf probe || sf probe 1 ; then " \
"sf erase 0xc0000 0x2000 && " \
"echo restored environment to factory default ; fi\0" \
"bootcmd=for dtype in " CONFIG_DRIVE_TYPES \
"bootcmd=for dtype in ${bootdevs}" \
"; do " \
"if itest.s \"xusb\" == \"x${dtype}\" ; then " \
"usb start ;" \
"fi; " \
"for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
"for fs in fat ext2 ; do " \
"${fs}load " \
"${dtype} ${disk}:1 " \
"10008000 " \
"/6x_bootscript" \
"&& source 10008000 ; " \
"done ; " \
"load " \
"${dtype} ${disk}:1 " \
"10008000 " \
"/6x_bootscript" \
"&& source 10008000 ; " \
"done ; " \
"done; " \
"setenv stdout serial,vga ; " \
"echo ; echo 6x_bootscript not found ; " \
"echo ; echo serial console at 115200, 8N1 ; echo ; " \
"echo details at http://boundarydevices.com/6q_bootscript ; " \
"setenv stdout serial\0" \
"upgradeu=for dtype in " CONFIG_DRIVE_TYPES \
"setenv stdout serial;" \
"setenv stdin serial,usbkbd;" \
"for dtype in ${umsdevs} ; do " \
"if itest.s sata == ${dtype}; then " \
"initcmd='sata init' ;" \
"else " \
"initcmd='mmc rescan' ;" \
"fi; " \
"for disk in 0 1 ; do " \
"if $initcmd && $dtype dev $disk ; then " \
"setenv stdout serial,vga; " \
"echo expose ${dtype} ${disk} " \
"over USB; " \
"ums 0 $dtype $disk ;" \
"fi; " \
" done; " \
"done ;" \
"setenv stdout serial,vga; " \
"echo no block devices found;" \
"\0" \
"initrd_high=0xffffffff\0" \
"upgradeu=for dtype in ${bootdevs}" \
"; do " \
"for disk in 0 1 ; do ${dtype} dev ${disk} ;" \
"for fs in fat ext2 ; do " \
"${fs}load ${dtype} ${disk}:1 10008000 " \
"/6x_upgrade " \
"&& source 10008000 ; " \
"done ; " \
"load ${dtype} ${disk}:1 10008000 " \
"/6x_upgrade " \
"&& source 10008000 ; " \
"done ; " \
"done\0" \
@@ -292,7 +328,7 @@
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_MAXARGS 48
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_MEMTEST_START 0x10000000
@@ -349,6 +385,7 @@
#define CONFIG_CMD_BMP
#define CONFIG_CMD_TIME
#define CONFIG_CMD_MEMTEST
#define CONFIG_SYS_ALT_MEMTEST
#define CONFIG_CMD_BOOTZ
@@ -365,4 +402,22 @@
#define CONFIG_PCIE_IMX
#endif
#define CONFIG_CMD_ELF
#define CONFIG_USB_GADGET
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE
#define CONFIG_USBDOWNLOAD_GADGET
#define CONFIG_USB_GADGET_VBUS_DRAW 2
/* Netchip IDs */
#define CONFIG_G_DNL_VENDOR_NUM 0x0525
#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
#define CONFIG_G_DNL_MANUFACTURER "Boundary"
#define CONFIG_CMD_FASTBOOT
#define CONFIG_ANDROID_BOOT_IMAGE
#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000
#endif /* __CONFIG_H */

4
include/configs/odroid.h
View File

@@ -12,7 +12,7 @@
#ifndef __CONFIG_ODROID_U3_H
#define __CONFIG_ODROID_U3_H
#include <configs/exynos4-dt.h>
#include <configs/exynos4-common.h>
#define CONFIG_SYS_PROMPT "Odroid # " /* Monitor Command Prompt */
@@ -37,8 +37,6 @@
#define CONFIG_SYS_TEXT_BASE 0x43e00000
#include <linux/sizes.h>
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
/* select serial console configuration */
#define CONFIG_SERIAL1

5
include/configs/origen.h
View File

@@ -9,7 +9,7 @@
#ifndef __CONFIG_ORIGEN_H
#define __CONFIG_ORIGEN_H
#include <configs/exynos4-dt.h>
#include <configs/exynos4-common.h>
#define CONFIG_SYS_PROMPT "ORIGEN # "
@@ -35,9 +35,6 @@
#define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
/* select serial console configuration */
#define CONFIG_SERIAL2
#define CONFIG_BAUDRATE 115200

197
include/configs/ot1200.h Normal file
View File

@@ -0,0 +1,197 @@
/*
* Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
* Copyright (C) 2014 Bachmann electronic GmbH
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include "mx6_common.h"
#define CONFIG_MX6
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_GENERIC_BOARD
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_GPIO
/* FUSE Configs */
#define CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
/* UART Configs */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
/* SF Configs */
#define CONFIG_CMD_SF
#define CONFIG_SPI
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_SPI_FLASH_MACRONIX
#define CONFIG_SPI_FLASH_SST
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS 2
#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(1, 3)<<8))
#define CONFIG_SF_DEFAULT_SPEED 25000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
/* IO expander */
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20
#define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x20, 16} }
#define CONFIG_CMD_PCA953X
#define CONFIG_CMD_PCA953X_INFO
/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
/* OCOTP Configs */
#define CONFIG_CMD_IMXOTP
#define CONFIG_IMX_OTP
#define IMX_OTP_BASE OCOTP_BASE_ADDR
#define IMX_OTP_ADDR_MAX 0x7F
#define IMX_OTP_DATA_ERROR_VAL 0xBADABADA
#define IMX_OTPWRITE_ENABLED
/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#ifdef CONFIG_MX6Q
#define CONFIG_CMD_SATA
#endif
/*
* SATA Configs
*/
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_DWC_AHSATA_PORT_ID 0
#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#define CONFIG_LIBATA
#endif
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE MII100
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0x5
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
/* Miscellaneous commands */
#define CONFIG_CMD_BMODE
#define CONFIG_CMD_SETEXPR
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
/* Command definition */
#include <config_cmd_default.h>
#undef CONFIG_CMD_IMLS
#define CONFIG_BOOTDELAY 2
#define CONFIG_PREBOOT ""
#define CONFIG_LOADADDR 0x12000000
#define CONFIG_SYS_TEXT_BASE 0x17800000
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_CBSIZE 1024
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
#define CONFIG_CMDLINE_EDITING
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_SIZE (64 * 1024) /* 64 kb */
#define CONFIG_ENV_OFFSET (1024 * 1024)
/* M25P16 has an erase size of 64 KiB */
#define CONFIG_ENV_SECT_SIZE (64 * 1024)
#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#ifndef CONFIG_SYS_DCACHE_OFF
#define CONFIG_CMD_CACHE
#endif
#define CONFIG_CMD_BOOTZ
#define CONFIG_SUPPORT_RAW_INITRD
/* FS Configs */
#define CONFIG_CMD_EXT3
#define CONFIG_CMD_EXT4
#define CONFIG_DOS_PARTITION
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_BOOTP_SERVERIP
#define CONFIG_BOOTP_BOOTFILE
#endif /* __CONFIG_H */

16
include/configs/peach-pit.h
View File

@@ -9,10 +9,16 @@
#ifndef __CONFIG_PEACH_PIT_H
#define __CONFIG_PEACH_PIT_H
#include <configs/exynos5-dt.h>
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SPI_FLASH
#define CONFIG_ENV_SPI_BASE 0x12D30000
#define FLASH_SIZE (0x4 << 20)
#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
#include <configs/exynos5420.h>
#include <configs/exynos5420-common.h>
#include <configs/exynos5-dt-common.h>
#define CONFIG_BOARD_COMMON
/* select serial console configuration */
#define CONFIG_SERIAL3 /* use SERIAL 3 */
@@ -30,4 +36,10 @@
#define LCD_BPP LCD_COLOR16
#endif
#define CONFIG_POWER_TPS65090_EC
#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
#endif /* __CONFIG_PEACH_PIT_H */

9
include/configs/s5p_goni.h
View File

@@ -39,8 +39,9 @@
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
/* Size of malloc() pool.*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 80 * SZ_1M)
/* Size of malloc() pool before and after relocation */
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))
/*
* select serial console configuration
@@ -53,6 +54,7 @@
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
#define SDHCI_MAX_HOSTS 4
/* PWM */
#define CONFIG_PWM 1
@@ -106,7 +108,6 @@
",12m(modem)"\
",60m(qboot)\0"
#define CONFIG_BOOTDELAY 1
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* partitions definitions */
@@ -283,4 +284,6 @@
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE
#define CONFIG_OF_LIBFDT
#endif /* __CONFIG_H */

5
include/configs/s5pc210_universal.h
View File

@@ -10,7 +10,7 @@
#ifndef __CONFIG_UNIVERSAL_H
#define __CONFIG_UNIVERSAL_H
#include <configs/exynos4-dt.h>
#include <configs/exynos4-common.h>
#define CONFIG_SYS_PROMPT "Universal # " /* Monitor Command Prompt */
@@ -27,9 +27,6 @@
#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
/* select serial console configuration */
#define CONFIG_SERIAL2
#define CONFIG_BAUDRATE 115200

23
include/configs/smdk5250.h
View File

@@ -9,11 +9,26 @@
#ifndef __CONFIG_SMDK_H
#define __CONFIG_SMDK_H
#include <configs/exynos5250-dt.h>
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SPI_FLASH
#define CONFIG_ENV_SPI_BASE 0x12D30000
#define FLASH_SIZE (0x4 << 20)
#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
#define CONFIG_SPI_BOOTING
#include <configs/exynos5250-common.h>
/* Enable FIT support and comparison */
#define CONFIG_FIT
#define CONFIG_FIT_BEST_MATCH
#define CONFIG_BOARD_COMMON
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
#define CONFIG_SYS_PROMPT "SMDK5250 # "
#define CONFIG_IDENT_STRING " for SMDK5250"
/* Miscellaneous configurable options */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
#endif /* __CONFIG_SMDK_H */

5
include/configs/smdk5420.h
View File

@@ -9,9 +9,9 @@
#ifndef __CONFIG_SMDK5420_H
#define __CONFIG_SMDK5420_H
#include <configs/exynos5-dt.h>
#include <configs/exynos5420-common.h>
#include <configs/exynos5420.h>
#define CONFIG_BOARD_COMMON
#define CONFIG_SMDK5420 /* which is in a SMDK5420 */
@@ -21,5 +21,6 @@
#define CONFIG_SYS_PROMPT "SMDK5420 # "
#define CONFIG_IDENT_STRING " for SMDK5420"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
#endif /* __CONFIG_SMDK5420_H */

6
include/configs/smdkc100.h
View File

@@ -47,6 +47,10 @@
* 1MB = 0x100000, 0x100000 = 1024 * 1024
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
/* Small malloc pool before relocation */
#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
/*
* select serial console configuration
*/
@@ -217,4 +221,6 @@
#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/
#endif /* CONFIG_CMD_NET */
#define CONFIG_OF_LIBFDT
#endif /* __CONFIG_H */

61
include/configs/smdkv310.h
View File

@@ -9,71 +9,42 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#include "exynos4-common.h"
#undef CONFIG_BOARD_COMMON
#undef CONFIG_USB_GADGET
#undef CONFIG_USB_GADGET_S3C_UDC_OTG
#undef CONFIG_CMD_USB_MASS_STORAGE
#undef CONFIG_REVISION_TAG
#undef CONFIG_CMD_THOR_DOWNLOAD
#undef CONFIG_CMD_DFU
/* High Level Configuration Options */
#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
#define CONFIG_S5P 1 /* S5P Family */
#define CONFIG_EXYNOS4 /* EXYNOS4 Family */
#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
#include <asm/arch/cpu.h> /* get chip and board defs */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_BOARD_EARLY_INIT_F
/* Mach Type */
#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_TEXT_BASE 0x43E00000
/* input clock of PLL: SMDKV310 has 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
/* Handling Sleep Mode*/
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000
#define S5P_CHECK_LPA 0xABAD0000
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
/* select serial console configuration */
#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
#define CONFIG_BAUDRATE 115200
#define EXYNOS4_DEFAULT_UART_OFFSET 0x010000
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
/* PWM */
#define CONFIG_PWM 1
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
/* Command definition*/
#include <config_cmd_default.h>
#define CONFIG_CMD_PING
#define CONFIG_CMD_ELF
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NET
#define CONFIG_CMD_FAT
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* MMC SPL */
#define CONFIG_SKIP_LOWLEVEL_INIT
@@ -84,15 +55,8 @@
#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT "SMDKV310 # "
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
@@ -111,8 +75,6 @@
#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH 1
#undef CONFIG_CMD_IMLS
#define CONFIG_IDENT_STRING " for SMDKC210/V310"
#define CONFIG_CLK_1000_400_200
@@ -126,7 +88,6 @@
#define RESERVE_BLOCK_SIZE (512)
#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
@@ -146,6 +107,4 @@
#define CONFIG_ENV_SROM_BANK 1
#endif /*CONFIG_CMD_NET*/
/* Enable devicetree support */
#define CONFIG_OF_LIBFDT
#endif /* __CONFIG_H */

25
include/configs/snow.h
View File

@@ -9,11 +9,28 @@
#ifndef __CONFIG_SNOW_H
#define __CONFIG_SNOW_H
#include <configs/exynos5250-dt.h>
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SPI_FLASH
#define CONFIG_ENV_SPI_BASE 0x12D30000
#define FLASH_SIZE (0x4 << 20)
#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
#define CONFIG_SPI_BOOTING
#include <configs/exynos5250-common.h>
#include <configs/exynos5-dt-common.h>
/* Enable FIT support and comparison */
#define CONFIG_FIT
#define CONFIG_FIT_BEST_MATCH
#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
#define CONFIG_POWER_TPS65090_I2C
#define CONFIG_BOARD_COMMON
#define CONFIG_ARCH_EARLY_INIT_R
#define CONFIG_USB_XHCI
#define CONFIG_USB_XHCI_EXYNOS
#define CONFIG_SYS_PROMPT "snow # "
#define CONFIG_IDENT_STRING " for snow"
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
#endif /* __CONFIG_SNOW_H */

2
include/configs/socfpga_cyclone5.h
View File

@@ -53,7 +53,7 @@
/* Ethernet on SoC (EMAC) */
#if defined(CONFIG_CMD_NET)
#define CONFIG_EMAC_BASE SOCFPGA_EMAC0_ADDRESS
#define CONFIG_EMAC_BASE SOCFPGA_EMAC1_ADDRESS
#define CONFIG_PHY_INTERFACE_MODE PHY_INTERFACE_MODE_RGMII
#define CONFIG_EPHY0_PHY_ADDR 0

2
include/configs/taurus.h
View File

@@ -24,6 +24,8 @@
#define MACH_TYPE_TAURUS 2067
#define MACH_TYPE_AXM 2068
#define CONFIG_SYS_GENERIC_BOARD
/*
* Warning: changing CONFIG_SYS_TEXT_BASE requires
* adapting the initial boot program.

6
include/configs/trats.h
View File

@@ -10,7 +10,7 @@
#ifndef __CONFIG_TRATS_H
#define __CONFIG_TRATS_H
#include <configs/exynos4-dt.h>
#include <configs/exynos4-common.h>
#define CONFIG_SYS_PROMPT "Trats # " /* Monitor Command Prompt */
@@ -39,10 +39,6 @@
#define CONFIG_SYS_TEXT_BASE 0x63300000
#include <linux/sizes.h>
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
/* select serial console configuration */
#define CONFIG_SERIAL2
#define CONFIG_BAUDRATE 115200

6
include/configs/trats2.h
View File

@@ -11,7 +11,7 @@
#ifndef __CONFIG_TRATS2_H
#define __CONFIG_TRATS2_H
#include <configs/exynos4-dt.h>
#include <configs/exynos4-common.h>
#define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
@@ -36,10 +36,6 @@
#define CONFIG_SYS_TEXT_BASE 0x43e00000
#include <linux/sizes.h>
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
/* select serial console configuration */
#define CONFIG_SERIAL2
#define CONFIG_BAUDRATE 115200

46
include/configs/vf610twr.h
View File

@@ -14,6 +14,7 @@
#define CONFIG_VF610
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
@@ -44,6 +45,41 @@
#undef CONFIG_CMD_IMLS
/* NAND support */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_VF610_NFC
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_USE_ARCH_MEMCPY
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
/* UBI */
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
#define CONFIG_RBTREE
#define CONFIG_LZO
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
/* Dynamic MTD partition support */
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define MTDIDS_DEFAULT "nand0=fsl_nfc"
#define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \
"128k(vf-bcb)ro," \
"1408k(u-boot)ro," \
"512k(u-boot-env)," \
"4m(kernel)," \
"512k(fdt)," \
"-(rootfs)"
#endif
#define CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
@@ -218,11 +254,19 @@
/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH
#ifdef CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_SIZE (8 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0
#endif
#ifdef CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE (64 * 2048)
#define CONFIG_ENV_SECT_SIZE (64 * 2048)
#define CONFIG_ENV_RANGE (512 * 1024)
#define CONFIG_ENV_OFFSET 0x180000
#endif
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ

5
include/configs/wandboard.h
View File

@@ -110,6 +110,11 @@
#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP
#define CONFIG_CMD_FUSE
#ifdef CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
#endif
#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S)
#define CONFIG_DEFAULT_FDT_FILE "imx6dl-wandboard.dtb"
#elif defined(CONFIG_MX6Q)