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sandbox: cros-ec: Add tests for the Chromium OS EC PWM driver

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This patch adds a limited pulse-width modulator to sandbox's Chromium OS
Embedded Controller emulation. The emulated PWM device supports multiple
channels but can only set a duty cycle for each, as the actual EC
doesn't expose any functionality or information other than that. Though
the EC supports specifying the PWM channel by its type (e.g. display
backlight, keyboard backlight), this is not implemented in the emulation
as nothing in U-Boot uses this type specification.

This emulated PWM device is then used to test the Chromium OS PWM driver
in sandbox. Adding the required device node to the sandbox test
device-tree unfortunately makes it the first PWM device, so this also
touches some other tests to make sure they still use the sandbox PWM.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Alper Nebi Yasak
2021-05-19 19:33:31 +03:00
committed by Simon Glass
parent 98c14ff019
commit e712245d08
13 changed files with 164 additions and 5 deletions
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32
test/cmd/pwm.c
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@@ -18,16 +18,20 @@ static int dm_test_pwm_cmd(struct unit_test_state *uts)
{
struct udevice *dev;
/* cros-ec-pwm */
ut_assertok(uclass_get_device(UCLASS_PWM, 0, &dev));
ut_assertnonnull(dev);
ut_assertok(console_record_reset_enable());
/* pwm <invert> <pwm_dev_num> <channel> <polarity> */
ut_assertok(run_command("pwm invert 0 0 1", 0));
/* cros-ec-pwm doesn't support invert */
ut_asserteq(1, run_command("pwm invert 0 0 1", 0));
ut_assert_nextline("error(-38)")
ut_assert_console_end();
ut_assertok(run_command("pwm invert 0 0 0", 0));
ut_asserteq(1, run_command("pwm invert 0 0 0", 0));
ut_assert_nextline("error(-38)")
ut_assert_console_end();
/* pwm <config> <pwm_dev_num> <channel> <period_ns> <duty_ns> */
@@ -41,6 +45,30 @@ static int dm_test_pwm_cmd(struct unit_test_state *uts)
ut_assertok(run_command("pwm disable 0 0", 0));
ut_assert_console_end();
/* sandbox-pwm */
ut_assertok(uclass_get_device(UCLASS_PWM, 1, &dev));
ut_assertnonnull(dev);
ut_assertok(console_record_reset_enable());
/* pwm <invert> <pwm_dev_num> <channel> <polarity> */
ut_assertok(run_command("pwm invert 1 0 1", 0));
ut_assert_console_end();
ut_assertok(run_command("pwm invert 1 0 0", 0));
ut_assert_console_end();
/* pwm <config> <pwm_dev_num> <channel> <period_ns> <duty_ns> */
ut_assertok(run_command("pwm config 1 0 10 50", 0));
ut_assert_console_end();
/* pwm <enable/disable> <pwm_dev_num> <channel> */
ut_assertok(run_command("pwm enable 1 0", 0));
ut_assert_console_end();
ut_assertok(run_command("pwm disable 1 0", 0));
ut_assert_console_end();
return 0;
}

1
test/dm/Makefile
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@@ -30,6 +30,7 @@ obj-$(CONFIG_DM_BOOTCOUNT) += bootcount.o
obj-$(CONFIG_CLK) += clk.o clk_ccf.o
obj-$(CONFIG_CPU) += cpu.o
obj-$(CONFIG_CROS_EC) += cros_ec.o
obj-$(CONFIG_PWM_CROS_EC) += cros_ec_pwm.o
obj-$(CONFIG_DEVRES) += devres.o
obj-$(CONFIG_DMA) += dma.o
obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi_host.o

60
test/dm/cros_ec_pwm.c Normal file
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@@ -0,0 +1,60 @@
// SPDX-License-Identifier: GPL-2.0+
#include <common.h>
#include <cros_ec.h>
#include <dm.h>
#include <pwm.h>
#include <asm/test.h>
#include <dm/test.h>
#include <test/test.h>
#include <test/ut.h>
static int dm_test_cros_ec_pwm(struct unit_test_state *uts)
{
struct udevice *pwm;
struct udevice *ec;
uint duty;
ut_assertok(uclass_get_device_by_name(UCLASS_PWM, "cros-ec-pwm", &pwm));
ut_assertnonnull(pwm);
ec = dev_get_parent(pwm);
ut_assertnonnull(ec);
ut_assertok(pwm_set_config(pwm, 0, 100, 50));
ut_assertok(pwm_set_enable(pwm, 0, true));
ut_assertok(sandbox_cros_ec_get_pwm_duty(ec, 0, &duty));
ut_asserteq(50 * EC_PWM_MAX_DUTY / 100, duty);
ut_assertok(pwm_set_config(pwm, 0, 15721, 2719));
ut_assertok(pwm_set_enable(pwm, 0, true));
ut_assertok(sandbox_cros_ec_get_pwm_duty(ec, 0, &duty));
ut_asserteq(2719 * EC_PWM_MAX_DUTY / 15721, duty);
ut_assertok(pwm_set_enable(pwm, 0, false));
ut_assertok(sandbox_cros_ec_get_pwm_duty(ec, 0, &duty));
ut_asserteq(0, duty);
ut_assertok(pwm_set_enable(pwm, 0, true));
ut_assertok(sandbox_cros_ec_get_pwm_duty(ec, 0, &duty));
ut_asserteq(2719 * EC_PWM_MAX_DUTY / 15721, duty);
ut_assertok(pwm_set_config(pwm, 1, 1000, 0));
ut_assertok(pwm_set_enable(pwm, 1, true));
ut_assertok(sandbox_cros_ec_get_pwm_duty(ec, 1, &duty));
ut_asserteq(0, duty);
ut_assertok(pwm_set_config(pwm, 2, 1000, 1024));
ut_assertok(pwm_set_enable(pwm, 2, true));
ut_assertok(sandbox_cros_ec_get_pwm_duty(ec, 2, &duty));
ut_asserteq(EC_PWM_MAX_DUTY, duty);
ut_assertok(pwm_set_config(pwm, 3, EC_PWM_MAX_DUTY, 0xABCD));
ut_assertok(pwm_set_enable(pwm, 3, true));
ut_assertok(sandbox_cros_ec_get_pwm_duty(ec, 3, &duty));
ut_asserteq(0xABCD, duty);
ut_asserteq(-EINVAL, pwm_set_enable(pwm, 4, true));
return 0;
}
DM_TEST(dm_test_cros_ec_pwm, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);

2
test/dm/panel.c
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@@ -28,7 +28,7 @@ static int dm_test_panel(struct unit_test_state *uts)
bool polarity;
ut_assertok(uclass_first_device_err(UCLASS_PANEL, &dev));
ut_assertok(uclass_first_device_err(UCLASS_PWM, &pwm));
ut_assertok(uclass_get_device_by_name(UCLASS_PWM, "pwm", &pwm));
ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio));
ut_assertok(regulator_get_by_platname("VDD_EMMC_1.8V", &reg));
ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns,

6
test/dm/pwm.c
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@@ -20,7 +20,7 @@ static int dm_test_pwm_base(struct unit_test_state *uts)
bool enable;
bool polarity;
ut_assertok(uclass_get_device(UCLASS_PWM, 0, &dev));
ut_assertok(uclass_get_device_by_name(UCLASS_PWM, "pwm", &dev));
ut_assertnonnull(dev);
ut_assertok(pwm_set_config(dev, 0, 100, 50));
ut_assertok(pwm_set_enable(dev, 0, true));
@@ -35,8 +35,10 @@ static int dm_test_pwm_base(struct unit_test_state *uts)
ut_asserteq(period_ns, 4096);
ut_asserteq(duty_ns, 50 * 4096 / 100);
ut_assertok(uclass_get_device(UCLASS_PWM, 0, &dev));
ut_assertok(uclass_get_device(UCLASS_PWM, 1, &dev));
ut_asserteq(-ENODEV, uclass_get_device(UCLASS_PWM, 2, &dev));
ut_assertok(uclass_get_device(UCLASS_PWM, 2, &dev));
ut_asserteq(-ENODEV, uclass_get_device(UCLASS_PWM, 3, &dev));
return 0;
}