Merge branch 'master' of /home/wd/git/u-boot/work

2007-11-02 15:09:22 +01:00
parent d78791ae91 f0516920f6
commit e60adeac2d
36 changed files with 180 additions and 116 deletions
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -49,7 +49,7 @@
   cannot access physical memory directly from core */
 #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
 #else	/* !CONFIG_AU1X00 */
-#define UNCACHED_SDRAM(a) PHYSADDR(a)
+#define UNCACHED_SDRAM(a) KSEG1ADDR(a)
 #endif	/* CONFIG_AU1X00 */
 #endif	/* __ASSEMBLY__ */
 /*
--- a/include/configs/M5253EVBE.h
+++ b/include/configs/M5253EVBE.h
@@ -146,7 +146,7 @@
 * Please note that CFG_SDRAM_BASE _must_ start at 0
 */
 #define CFG_SDRAM_BASE		0x00000000
-#define CFG_SDRAM_SIZE		16	/* SDRAM size in MB */
+#define CFG_SDRAM_SIZE		8	/* SDRAM size in MB */

 #ifdef CONFIG_MONITOR_IS_IN_RAM
 #define CFG_MONITOR_BASE	0x20000
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -163,7 +163,7 @@
 * Please note that CFG_SDRAM_BASE _must_ start at 0
 */
 #define CFG_SDRAM_BASE		0x00000000
-#define	CFG_SDRAM_SIZE		8	/* SDRAM size in MB */
+#define	CFG_SDRAM_SIZE		16	/* SDRAM size in MB */
 #define CFG_FLASH_BASE		0xffe00000
 #define	CFG_INT_FLASH_BASE	0xf0000000
 #define CFG_INT_FLASH_ENABLE	0x21
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -175,7 +175,7 @@
 * Please note that CFG_SDRAM_BASE _must_ start at 0
 */
 #define CFG_SDRAM_BASE		0x40000000
-#define CFG_SDRAM_SIZE		16	/* SDRAM size in MB */
+#define CFG_SDRAM_SIZE		32	/* SDRAM size in MB */
 #define CFG_SDRAM_CFG1		0x53722730
 #define CFG_SDRAM_CFG2		0x56670000
 #define CFG_SDRAM_CTRL		0xE1092000
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -27,8 +27,8 @@
 * board/config.h - configuration options, board specific
 */

-#ifndef _JAMICA54455_H
-#define _JAMICA54455_H
+#ifndef _M54455EVB_H
+#define _M54455EVB_H

 /*
 * High Level Configuration Options
@@ -75,7 +75,7 @@
 #define CONFIG_CMD_MISC
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
-#define CONFIG_CMD_PCI
+#undef CONFIG_CMD_PCI
 #define CONFIG_CMD_PING
 #define CONFIG_CMD_REGINFO

@@ -129,8 +129,8 @@
 	"u-boot=u-boot.bin\0"			\
 	"load=tftp ${loadaddr) ${u-boot}\0"	\
 	"upd=run load; run prog\0"		\
-	"prog=prot off 0 2ffff;"		\
-	"era 0 2ffff;"				\
+	"prog=prot off 4000000 402ffff;"		\
+	"era 4000000 402ffff;"				\
 	"cp.b ${loadaddr} 0 ${filesize};"	\
 	"save\0"				\
 	""
@@ -174,6 +174,7 @@
 #define CFG_IMMR		CFG_MBAR

 /* PCI */
+#ifdef CONFIG_CMD_PCI
 #define CONFIG_PCI		1

 #define CFG_PCI_MEM_BUS		0xA0000000
@@ -187,6 +188,7 @@
 #define CFG_PCI_CFG_BUS		0xB0000000
 #define CFG_PCI_CFG_PHYS	CFG_PCI_CFG_BUS
 #define CFG_PCI_CFG_SIZE	0x01000000
+#endif

 /* FPGA - Spartan 2 */
 /* experiment
@@ -268,8 +270,6 @@
 /* Configuration for environment
 * Environment is embedded in u-boot in the second sector of the flash
 */
-#define CFG_ENV_OFFSET		0x4000
-#define CFG_ENV_SECT_SIZE	0x2000
 #define CFG_ENV_IS_IN_FLASH	1
 #define CONFIG_ENV_OVERWRITE	1
 #undef CFG_ENV_IS_EMBEDDED
@@ -278,13 +278,17 @@
 * FLASH organization
 */
 #ifdef CFG_ATMEL_BOOT
-#	define CFG_FLASH_BASE		0
+#	define CFG_FLASH_BASE		CFG_CS0_BASE	
 #	define CFG_FLASH0_BASE		CFG_CS0_BASE
 #	define CFG_FLASH1_BASE		CFG_CS1_BASE
+#	define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x4000)
+#	define CFG_ENV_SECT_SIZE	0x2000
 #else
 #	define CFG_FLASH_BASE		CFG_FLASH0_BASE
 #	define CFG_FLASH0_BASE		CFG_CS1_BASE
 #	define CFG_FLASH1_BASE		CFG_CS0_BASE
+#	define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x60000)
+#	define CFG_ENV_SECT_SIZE	0x20000
 #endif

 /* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system
@@ -328,9 +332,9 @@
 * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
 */
 #ifdef CFG_ATMEL_BOOT
-#	define CONFIG_JFFS2_DEV		"nor0"
+#	define CONFIG_JFFS2_DEV		"nor1"
 #	define CONFIG_JFFS2_PART_SIZE	0x01000000
-#	define CONFIG_JFFS2_PART_OFFSET	CFG_FLASH1_BASE
+#	define CONFIG_JFFS2_PART_OFFSET	(CFG_FLASH1_BASE + 0x500000)
 #else
 #	define CONFIG_JFFS2_DEV		"nor0"
 #	define CONFIG_JFFS2_PART_SIZE	(0x01000000 - 0x500000)
@@ -356,20 +360,20 @@

 #ifdef CFG_ATMEL_BOOT
 /* Atmel Flash */
-#define CFG_CS0_BASE		0
+#define CFG_CS0_BASE		0x04000000
 #define CFG_CS0_MASK		0x00070001
 #define CFG_CS0_CTRL		0x00001140
 /* Intel Flash */
-#define CFG_CS1_BASE		0x04000000
+#define CFG_CS1_BASE		0x00000000
 #define CFG_CS1_MASK		0x01FF0001
-#define CFG_CS1_CTRL		0x003F3D60
+#define CFG_CS1_CTRL		0x00000D60

 #define CFG_ATMEL_BASE		CFG_CS0_BASE
 #else
 /* Intel Flash */
-#define CFG_CS0_BASE		0
+#define CFG_CS0_BASE		0x00000000
 #define CFG_CS0_MASK		0x01FF0001
-#define CFG_CS0_CTRL		0x003F3D60
+#define CFG_CS0_CTRL		0x00000D60
 /* Atmel Flash */
 #define CFG_CS1_BASE		0x04000000
 #define CFG_CS1_MASK		0x00070001
@@ -388,4 +392,4 @@
 #define CFG_CS3_MASK		0x00070001
 #define CFG_CS3_CTRL		0x00000020

-#endif				/* _JAMICA54455_H */
+#endif				/* _M54455EVB_H */
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void);
 #define OF_SOC			"soc8541@e0000000"
 #define OF_TBCLK		(bd->bi_busfreq / 8)
 #define OF_STDOUT_PATH		"/soc8541@e0000000/serial@4600"
+#define OF_PCI			"pci@e0008000"

 /*
 * I2C
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -340,6 +340,7 @@ extern unsigned long get_clock_freq(void);
 #define OF_SOC			"soc8548@e0000000"
 #define OF_TBCLK		(bd->bi_busfreq / 8)
 #define OF_STDOUT_PATH		"/soc8548@e0000000/serial@4600"
+#define OF_PCI			"pci@e0008000"

 /*
 * I2C
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void);
 #define OF_SOC			"soc8555@e0000000"
 #define OF_TBCLK		(bd->bi_busfreq / 8)
 #define OF_STDOUT_PATH		"/soc8555@e0000000/serial@4600"
+#define OF_PCI			"pci@e0008000"

 /*
 * I2C
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -297,7 +297,7 @@ extern unsigned long get_clock_freq(void);
 #define OF_SOC			"soc8568@e0000000"
 #define OF_QE			"qe@e0080000"
 #define OF_TBCLK		(bd->bi_busfreq / 8)
-#define OF_STDOUT_PATH		"/soc8568@e0000000/serial@4600"
+#define OF_STDOUT_PATH		"/soc8568@e0000000/serial@4500"

 /*
 * I2C
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -114,15 +114,10 @@
 #define CONFIG_AUTOBOOT_STOP_STR	" "

 /*
- * These are "locally administered ethernet addresses" generated by
- * ./tools/gen_eth_addr
- *
- * After booting the board for the first time, new addresses should be
- * generated and assigned to the environment variables "ethaddr" and
- * "eth1addr".
+ * After booting the board for the first time, new ethernet addresses
+ * should be generated and assigned to the environment variables
+ * "ethaddr" and "eth1addr". This is normally done during production.
 */
-#define CONFIG_ETHADDR			6a:87:71:14:cd:cb
-#define CONFIG_ETH1ADDR			ca:f8:15:e6:3e:e6
 #define CONFIG_OVERWRITE_ETHADDR_ONCE	1
 #define CONFIG_NET_MULTI		1