armv7: rename cache related CONFIG flags

Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:

CONFIG_L2_OFF	     -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF

Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
 * Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
 * Changed all three flags to the final names suggested as above
   and accordingly changed the commit message
This commit is contained in:
Aneesh V
2011-06-16 23:30:48 +00:00
committed by Albert ARIBAUD
parent 2c451f7831
commit e47f2db537
36 changed files with 42 additions and 45 deletions

View File

@@ -512,10 +512,10 @@ fiq:
.align 5
.global arm1136_cache_flush
arm1136_cache_flush:
#if !defined(CONFIG_SYS_NO_ICACHE)
#if !defined(CONFIG_SYS_ICACHE_OFF)
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
#endif
#if !defined(CONFIG_SYS_NO_DCACHE)
#if !defined(CONFIG_SYS_DCACHE_OFF)
mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
#endif
mov pc, lr @ back to caller

View File

@@ -35,9 +35,6 @@
#include <command.h>
#include <asm/system.h>
#include <asm/cache.h>
#ifndef CONFIG_L2_OFF
#include <asm/arch/sys_proto.h>
#endif
static void cache_flush(void);

View File

@@ -70,7 +70,7 @@ typedef struct global_data {
unsigned long irq_sp; /* irq stack pointer */
unsigned long start_addr_sp; /* start_addr_stackpointer */
unsigned long reloc_off;
#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
unsigned long tlb_addr;
#endif
void **jt; /* jump table */

View File

@@ -39,9 +39,7 @@ GLCOBJS += div0.o
COBJS-y += board.o
COBJS-y += bootm.o
COBJS-y += cache.o
ifndef CONFIG_SYS_NO_CP15_CACHE
COBJS-y += cache-cp15.o
endif
COBJS-y += interrupts.o
COBJS-y += reset.o
SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o

View File

@@ -326,7 +326,7 @@ void board_init_f (ulong bootflag)
debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
#endif /* CONFIG_PRAM */
#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
/* reserve TLB table */
addr -= (4096 * 4);

View File

@@ -24,7 +24,7 @@
#include <common.h>
#include <asm/system.h>
#if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE))
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
#define CACHE_SETUP 0x1a
@@ -118,7 +118,7 @@ static void cache_disable(uint32_t cache_bit)
}
#endif
#ifdef CONFIG_SYS_NO_ICACHE
#ifdef CONFIG_SYS_ICACHE_OFF
void icache_enable (void)
{
return;
@@ -150,7 +150,7 @@ int icache_status(void)
}
#endif
#ifdef CONFIG_SYS_NO_DCACHE
#ifdef CONFIG_SYS_DCACHE_OFF
void dcache_enable (void)
{
return;