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configs: Resync with savedefconfig

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Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2021-09-14 18:48:05 -04:00
parent 1ac7580a22
commit e3e2c6430b
27 changed files with 5 additions and 48 deletions
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17
scripts/config_whitelist.txt
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@@ -92,7 +92,6 @@ CONFIG_BL2_OFFSET
CONFIG_BL2_SIZE
CONFIG_BOARDDIR
CONFIG_BOARDNAME
CONFIG_BOARDNAME_LOCAL
CONFIG_BOARD_COMMON
CONFIG_BOARD_ECC_SUPPORT
CONFIG_BOARD_IS_OPENRD_BASE
@@ -231,7 +230,6 @@ CONFIG_DDR_CLK_FREQ
CONFIG_DDR_DEFAULT_CL
CONFIG_DDR_ECC
CONFIG_DDR_ECC_CMD
CONFIG_DDR_ECC_ENABLE
CONFIG_DDR_ECC_INIT_VIA_DMA
CONFIG_DDR_FIXED_SIZE
CONFIG_DDR_II
@@ -372,8 +370,6 @@ CONFIG_ESDHC_DETECT_QUIRK
CONFIG_ESDHC_HC_BLK_ADDR
CONFIG_ESPRESSO7420
CONFIG_ET1100_BASE
CONFIG_ETH1ADDR
CONFIG_ETH2ADDR
CONFIG_ETHADDR
CONFIG_ETHBASE
CONFIG_ETHER_INDEX
@@ -471,7 +467,6 @@ CONFIG_FSL_ISBC_KEY_EXT
CONFIG_FSL_LBC
CONFIG_FSL_MEMAC
CONFIG_FSL_NGPIXIS
CONFIG_FSL_PCI_INIT
CONFIG_FSL_PMIC_BITLEN
CONFIG_FSL_PMIC_BUS
CONFIG_FSL_PMIC_CLK
@@ -746,8 +741,6 @@ CONFIG_IOMUX_SHARE_CONF_REG
CONFIG_IOS
CONFIG_IO_TRACE
CONFIG_IPADDR
CONFIG_IPADDR1
CONFIG_IPADDR2
CONFIG_IPROC
CONFIG_IRAM_BASE
CONFIG_IRAM_END
@@ -1177,7 +1170,6 @@ CONFIG_QUOTA
CONFIG_RAMBOOTCOMMAND
CONFIG_RAMBOOT_NAND
CONFIG_RAMBOOT_PBL
CONFIG_RAMBOOT_SDCARD
CONFIG_RAMBOOT_SPIFLASH
CONFIG_RAMBOOT_TEXT_BASE
CONFIG_RAMDISKFILE
@@ -2317,7 +2309,6 @@ CONFIG_SYS_I2C_EXPANDER_ADDR
CONFIG_SYS_I2C_FPGA_ADDR
CONFIG_SYS_I2C_FRAM
CONFIG_SYS_I2C_G762_ADDR
CONFIG_SYS_I2C_IDT6V49205B
CONFIG_SYS_I2C_IFDR_DIV
CONFIG_SYS_I2C_IHS_CH0
CONFIG_SYS_I2C_IHS_CH1
@@ -2352,7 +2343,6 @@ CONFIG_SYS_I2C_MAC2_BUS
CONFIG_SYS_I2C_MAC2_CHIP_ADDR
CONFIG_SYS_I2C_MAC2_DATA_ADDR
CONFIG_SYS_I2C_MAX_HOPS
CONFIG_SYS_I2C_NCT72_ADDR
CONFIG_SYS_I2C_NOPROBES
CONFIG_SYS_I2C_OFFSET
CONFIG_SYS_I2C_PCA953X_ADDR
@@ -2839,12 +2829,10 @@ CONFIG_SYS_PCIE1_BASE
CONFIG_SYS_PCIE1_CFG_BASE
CONFIG_SYS_PCIE1_CFG_SIZE
CONFIG_SYS_PCIE1_IO_BASE
CONFIG_SYS_PCIE1_IO_BUS
CONFIG_SYS_PCIE1_IO_PHYS
CONFIG_SYS_PCIE1_IO_SIZE
CONFIG_SYS_PCIE1_IO_VIRT
CONFIG_SYS_PCIE1_MEM_BASE
CONFIG_SYS_PCIE1_MEM_BUS
CONFIG_SYS_PCIE1_MEM_PHYS
CONFIG_SYS_PCIE1_MEM_SIZE
CONFIG_SYS_PCIE1_MEM_VIRT
@@ -2858,12 +2846,10 @@ CONFIG_SYS_PCIE2_BASE
CONFIG_SYS_PCIE2_CFG_BASE
CONFIG_SYS_PCIE2_CFG_SIZE
CONFIG_SYS_PCIE2_IO_BASE
CONFIG_SYS_PCIE2_IO_BUS
CONFIG_SYS_PCIE2_IO_PHYS
CONFIG_SYS_PCIE2_IO_SIZE
CONFIG_SYS_PCIE2_IO_VIRT
CONFIG_SYS_PCIE2_MEM_BASE
CONFIG_SYS_PCIE2_MEM_BUS
CONFIG_SYS_PCIE2_MEM_PHYS
CONFIG_SYS_PCIE2_MEM_SIZE
CONFIG_SYS_PCIE2_MEM_VIRT
@@ -3188,7 +3174,6 @@ CONFIG_SYS_STATUS_OK
CONFIG_SYS_SXCNFG_VAL
CONFIG_SYS_TBIPA_VALUE
CONFIG_SYS_TCLK
CONFIG_SYS_TEXT_BASE_NOR
CONFIG_SYS_TIMERBASE
CONFIG_SYS_TIMER_BASE
CONFIG_SYS_TIMER_COUNTER
@@ -3343,8 +3328,6 @@ CONFIG_UBOOTPATH
CONFIG_UBOOT_ENABLE_PADS_ALL
CONFIG_UBOOT_SECTOR_COUNT
CONFIG_UBOOT_SECTOR_START
CONFIG_UCP1020
CONFIG_UCP1020_REV_1_3
CONFIG_UDP_CHECKSUM
CONFIG_UEC_ETH
CONFIG_UEC_ETH1