eaw/u-boot
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

arm: add initial support for the Phytium Durian Board

Browse Source 
This adds platform code and the device tree for the Phytium Durian Board.
The initial support comprises the UART and the PCIE.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>

Signed-off-by: Steven Hao <liuhao@phytium.com.cn>
This commit is contained in:
liu hao
2019-10-31 07:51:08 +00:00
committed by Tom Rini
parent 672c57057f
commit e3aafef4cf
15 changed files with 556 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/Kconfig
View File

@@ -1631,6 +1631,13 @@ config ARCH_ASPEED
select OF_CONTROL
imply CMD_DM
config TARGET_DURIAN
bool "Support Phytium Durian Platform"
select ARM64
help
Support for durian platform.
It has 2GB Sdram, uart and pcie.
endchoice
config ARCH_SUPPORT_TFABOOT
@@ -1830,6 +1837,7 @@ source "board/woodburn/Kconfig"
source "board/xilinx/Kconfig"
source "board/xilinx/zynq/Kconfig"
source "board/xilinx/zynqmp/Kconfig"
source "board/phytium/durian/Kconfig"
source "arch/arm/Kconfig.debug"

2
arch/arm/dts/Makefile
View File

@@ -834,6 +834,8 @@ dtb-$(CONFIG_TARGET_VEXPRESS_CA5X2) += vexpress-v2p-ca5s.dtb
dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb
dtb-$(CONFIG_TARGET_VEXPRESS_CA15_TC2) += vexpress-v2p-ca15_a7.dtb
dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb
targets += $(dtb-y)
# Add any required device tree compiler flags here

33
arch/arm/dts/phytium-durian.dts Normal file
View File

@@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2019, Phytium Ltd.
* shuyiqi <shuyiqi@phytium.com.cn>
*/
/dts-v1/;
/ {
model = "Phytium Durian";
compatible = "phytium,durian";
#address-cells = <2>;
#size-cells = <2>;
pcie-controller@40000000 {
compatible = "phytium,pcie-host-1.0";
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
reg = <0x0 0x40000000 0x0 0x10000000>;
bus-range = <0x0 0xff>;
ranges = <0x1000000 0x0 0x0 0x0 0x50000000 0x0 0xF00000>,
<0x2000000 0x0 0x58000000 0x0 0x58000000 0x0 0x28000000>,
<0x43000000 0x10 0x00000000 0x10 0x00000000 0x10 0x00000000>;
};
uart@28001000 {
compatible = "arm,pl011";
reg = <0x0 0x28001000 0x0 0x1000>;
clock = <48000000>;
};
};