Add TI816X support
Signed-off-by: Antoine Tenart <atenart@adeneo-embedded.com> [trini: Fix warnings about vtp things in emif4.c, adapt AM43XX] Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
@@ -13,6 +13,10 @@
|
||||
|
||||
#include <asm/arch/clocks_am33xx.h>
|
||||
|
||||
#ifdef CONFIG_TI81XX
|
||||
#include <asm/arch/clock_ti81xx.h>
|
||||
#endif
|
||||
|
||||
#define LDELAY 1000000
|
||||
|
||||
/*CM_<clock_domain>__CLKCTRL */
|
||||
|
||||
142
arch/arm/include/asm/arch-am33xx/clock_ti81xx.h
Normal file
142
arch/arm/include/asm/arch-am33xx/clock_ti81xx.h
Normal file
@@ -0,0 +1,142 @@
|
||||
/*
|
||||
* ti81xx.h
|
||||
*
|
||||
* Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
|
||||
* Antoine Tenart, <atenart@adeneo-embedded.com>
|
||||
*
|
||||
* This file is released under the terms of GPL v2 and any later version.
|
||||
* See the file COPYING in the root directory of the source tree for details.
|
||||
*/
|
||||
|
||||
#ifndef _CLOCK_TI81XX_H_
|
||||
#define _CLOCK_TI81XX_H_
|
||||
|
||||
#define PRCM_MOD_EN 0x2
|
||||
|
||||
#define CM_DEFAULT_BASE (PRCM_BASE + 0x0500)
|
||||
#define CM_ALWON_BASE (PRCM_BASE + 0x1400)
|
||||
|
||||
struct cm_def {
|
||||
unsigned int resv0[2];
|
||||
unsigned int l3fastclkstctrl;
|
||||
unsigned int resv1[1];
|
||||
unsigned int pciclkstctrl;
|
||||
unsigned int resv2[1];
|
||||
unsigned int ducaticlkstctrl;
|
||||
unsigned int resv3[1];
|
||||
unsigned int emif0clkctrl;
|
||||
unsigned int emif1clkctrl;
|
||||
unsigned int dmmclkctrl;
|
||||
unsigned int fwclkctrl;
|
||||
unsigned int resv4[10];
|
||||
unsigned int usbclkctrl;
|
||||
unsigned int resv5[1];
|
||||
unsigned int sataclkctrl;
|
||||
unsigned int resv6[4];
|
||||
unsigned int ducaticlkctrl;
|
||||
unsigned int pciclkctrl;
|
||||
};
|
||||
|
||||
struct cm_alwon {
|
||||
unsigned int l3slowclkstctrl;
|
||||
unsigned int ethclkstctrl;
|
||||
unsigned int l3medclkstctrl;
|
||||
unsigned int mmu_clkstctrl;
|
||||
unsigned int mmucfg_clkstctrl;
|
||||
unsigned int ocmc0clkstctrl;
|
||||
#if defined(CONFIG_TI814X)
|
||||
unsigned int vcpclkstctrl;
|
||||
#elif defined(CONFIG_TI816X)
|
||||
unsigned int ocmc1clkstctrl;
|
||||
#endif
|
||||
unsigned int mpuclkstctrl;
|
||||
unsigned int sysclk4clkstctrl;
|
||||
unsigned int sysclk5clkstctrl;
|
||||
unsigned int sysclk6clkstctrl;
|
||||
unsigned int rtcclkstctrl;
|
||||
unsigned int l3fastclkstctrl;
|
||||
unsigned int resv0[67];
|
||||
unsigned int mcasp0clkctrl;
|
||||
unsigned int mcasp1clkctrl;
|
||||
unsigned int mcasp2clkctrl;
|
||||
unsigned int mcbspclkctrl;
|
||||
unsigned int uart0clkctrl;
|
||||
unsigned int uart1clkctrl;
|
||||
unsigned int uart2clkctrl;
|
||||
unsigned int gpio0clkctrl;
|
||||
unsigned int gpio1clkctrl;
|
||||
unsigned int i2c0clkctrl;
|
||||
unsigned int i2c1clkctrl;
|
||||
#if defined(CONFIG_TI814X)
|
||||
unsigned int mcasp345clkctrl;
|
||||
unsigned int atlclkctrl;
|
||||
unsigned int mlbclkctrl;
|
||||
unsigned int pataclkctrl;
|
||||
unsigned int resv1[1];
|
||||
unsigned int uart3clkctrl;
|
||||
unsigned int uart4clkctrl;
|
||||
unsigned int uart5clkctrl;
|
||||
#elif defined(CONFIG_TI816X)
|
||||
unsigned int resv1[1];
|
||||
unsigned int timer1clkctrl;
|
||||
unsigned int timer2clkctrl;
|
||||
unsigned int timer3clkctrl;
|
||||
unsigned int timer4clkctrl;
|
||||
unsigned int timer5clkctrl;
|
||||
unsigned int timer6clkctrl;
|
||||
unsigned int timer7clkctrl;
|
||||
#endif
|
||||
unsigned int wdtimerclkctrl;
|
||||
unsigned int spiclkctrl;
|
||||
unsigned int mailboxclkctrl;
|
||||
unsigned int spinboxclkctrl;
|
||||
unsigned int mmudataclkctrl;
|
||||
unsigned int resv2[2];
|
||||
unsigned int mmucfgclkctrl;
|
||||
#if defined(CONFIG_TI814X)
|
||||
unsigned int resv3[2];
|
||||
#elif defined(CONFIG_TI816X)
|
||||
unsigned int resv3[1];
|
||||
unsigned int sdioclkctrl;
|
||||
#endif
|
||||
unsigned int ocmc0clkctrl;
|
||||
#if defined(CONFIG_TI814X)
|
||||
unsigned int vcpclkctrl;
|
||||
#elif defined(CONFIG_TI816X)
|
||||
unsigned int ocmc1clkctrl;
|
||||
#endif
|
||||
unsigned int resv4[2];
|
||||
unsigned int controlclkctrl;
|
||||
unsigned int resv5[2];
|
||||
unsigned int gpmcclkctrl;
|
||||
unsigned int ethernet0clkctrl;
|
||||
unsigned int ethernet1clkctrl;
|
||||
unsigned int mpuclkctrl;
|
||||
#if defined(CONFIG_TI814X)
|
||||
unsigned int debugssclkctrl;
|
||||
#elif defined(CONFIG_TI816X)
|
||||
unsigned int resv6[1];
|
||||
#endif
|
||||
unsigned int l3clkctrl;
|
||||
unsigned int l4hsclkctrl;
|
||||
unsigned int l4lsclkctrl;
|
||||
unsigned int rtcclkctrl;
|
||||
unsigned int tpccclkctrl;
|
||||
unsigned int tptc0clkctrl;
|
||||
unsigned int tptc1clkctrl;
|
||||
unsigned int tptc2clkctrl;
|
||||
unsigned int tptc3clkctrl;
|
||||
#if defined(CONFIG_TI814X)
|
||||
unsigned int resv6[4];
|
||||
unsigned int dcan01clkctrl;
|
||||
unsigned int mmchs0clkctrl;
|
||||
unsigned int mmchs1clkctrl;
|
||||
unsigned int mmchs2clkctrl;
|
||||
unsigned int custefuseclkctrl;
|
||||
#elif defined(CONFIG_TI816X)
|
||||
unsigned int sr0clkctrl;
|
||||
unsigned int sr1clkctrl;
|
||||
#endif
|
||||
};
|
||||
|
||||
#endif /* _CLOCK_TI81XX_H_ */
|
||||
@@ -192,37 +192,46 @@ struct ddr_data_regs {
|
||||
* correspond to DATA1 registers defined here.
|
||||
*/
|
||||
struct ddr_regs {
|
||||
unsigned int resv0[7];
|
||||
unsigned int cm0csratio; /* offset 0x01C */
|
||||
unsigned int resv0[3];
|
||||
unsigned int cm0config; /* offset 0x00C */
|
||||
unsigned int cm0configclk; /* offset 0x010 */
|
||||
unsigned int resv1[2];
|
||||
unsigned int cm0csratio; /* offset 0x01C */
|
||||
unsigned int resv2[2];
|
||||
unsigned int cm0dldiff; /* offset 0x028 */
|
||||
unsigned int cm0iclkout; /* offset 0x02C */
|
||||
unsigned int resv2[8];
|
||||
unsigned int resv3[4];
|
||||
unsigned int cm1config; /* offset 0x040 */
|
||||
unsigned int cm1configclk; /* offset 0x044 */
|
||||
unsigned int resv4[2];
|
||||
unsigned int cm1csratio; /* offset 0x050 */
|
||||
unsigned int resv3[2];
|
||||
unsigned int resv5[2];
|
||||
unsigned int cm1dldiff; /* offset 0x05C */
|
||||
unsigned int cm1iclkout; /* offset 0x060 */
|
||||
unsigned int resv4[8];
|
||||
unsigned int resv6[4];
|
||||
unsigned int cm2config; /* offset 0x074 */
|
||||
unsigned int cm2configclk; /* offset 0x078 */
|
||||
unsigned int resv7[2];
|
||||
unsigned int cm2csratio; /* offset 0x084 */
|
||||
unsigned int resv5[2];
|
||||
unsigned int resv8[2];
|
||||
unsigned int cm2dldiff; /* offset 0x090 */
|
||||
unsigned int cm2iclkout; /* offset 0x094 */
|
||||
unsigned int resv6[12];
|
||||
unsigned int resv9[12];
|
||||
unsigned int dt0rdsratio0; /* offset 0x0C8 */
|
||||
unsigned int resv7[4];
|
||||
unsigned int resv10[4];
|
||||
unsigned int dt0wdsratio0; /* offset 0x0DC */
|
||||
unsigned int resv8[4];
|
||||
unsigned int resv11[4];
|
||||
unsigned int dt0wiratio0; /* offset 0x0F0 */
|
||||
unsigned int resv9;
|
||||
unsigned int resv12;
|
||||
unsigned int dt0wimode0; /* offset 0x0F8 */
|
||||
unsigned int dt0giratio0; /* offset 0x0FC */
|
||||
unsigned int resv10;
|
||||
unsigned int resv13;
|
||||
unsigned int dt0gimode0; /* offset 0x104 */
|
||||
unsigned int dt0fwsratio0; /* offset 0x108 */
|
||||
unsigned int resv11[4];
|
||||
unsigned int resv14[4];
|
||||
unsigned int dt0dqoffset; /* offset 0x11C */
|
||||
unsigned int dt0wrsratio0; /* offset 0x120 */
|
||||
unsigned int resv12[4];
|
||||
unsigned int resv15[4];
|
||||
unsigned int dt0rdelays0; /* offset 0x134 */
|
||||
unsigned int dt0dldiff0; /* offset 0x138 */
|
||||
};
|
||||
|
||||
@@ -15,6 +15,8 @@
|
||||
#include <asm/arch/omap.h>
|
||||
#ifdef CONFIG_AM33XX
|
||||
#include <asm/arch/hardware_am33xx.h>
|
||||
#elif defined(CONFIG_TI816X)
|
||||
#include <asm/arch/hardware_ti816x.h>
|
||||
#elif defined(CONFIG_TI814X)
|
||||
#include <asm/arch/hardware_ti814x.h>
|
||||
#elif defined(CONFIG_AM43XX)
|
||||
@@ -53,21 +55,13 @@
|
||||
#define CM_CEFUSE 0x44E00A00
|
||||
#define PRM_DEVICE 0x44E00F00
|
||||
|
||||
/* VTP Base address */
|
||||
#define VTP1_CTRL_ADDR 0x48140E10
|
||||
|
||||
/* DDR Base address */
|
||||
#define DDR_CTRL_ADDR 0x44E10E04
|
||||
#define DDR_CONTROL_BASE_ADDR 0x44E11404
|
||||
#define DDR_PHY_CMD_ADDR2 0x47C0C800
|
||||
#define DDR_PHY_DATA_ADDR2 0x47C0C8C8
|
||||
|
||||
/* UART */
|
||||
#define DEFAULT_UART_BASE UART0_BASE
|
||||
|
||||
#define DDRPHY_0_CONFIG_BASE (CTRL_BASE + 0x1400)
|
||||
#define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE
|
||||
|
||||
/* GPMC Base address */
|
||||
#define GPMC_BASE 0x50000000
|
||||
|
||||
|
||||
@@ -36,12 +36,18 @@
|
||||
|
||||
/* VTP Base address */
|
||||
#define VTP0_CTRL_ADDR 0x44E10E0C
|
||||
#define VTP1_CTRL_ADDR 0x48140E10
|
||||
|
||||
/* DDR Base address */
|
||||
#define DDR_PHY_CMD_ADDR 0x44E12000
|
||||
#define DDR_PHY_DATA_ADDR 0x44E120C8
|
||||
#define DDR_PHY_CMD_ADDR2 0x47C0C800
|
||||
#define DDR_PHY_DATA_ADDR2 0x47C0C8C8
|
||||
#define DDR_DATA_REGS_NR 2
|
||||
|
||||
#define DDRPHY_0_CONFIG_BASE (CTRL_BASE + 0x1400)
|
||||
#define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE
|
||||
|
||||
/* CPSW Config space */
|
||||
#define CPSW_MDIO_BASE 0x4A101000
|
||||
|
||||
|
||||
@@ -36,10 +36,13 @@
|
||||
|
||||
/* VTP Base address */
|
||||
#define VTP0_CTRL_ADDR 0x44E10E0C
|
||||
#define VTP1_CTRL_ADDR 0x48140E10
|
||||
|
||||
/* DDR Base address */
|
||||
#define DDR_PHY_CMD_ADDR 0x44E12000
|
||||
#define DDR_PHY_DATA_ADDR 0x44E120C8
|
||||
#define DDR_PHY_CMD_ADDR2 0x47C0C800
|
||||
#define DDR_PHY_DATA_ADDR2 0x47C0C8C8
|
||||
#define DDR_DATA_REGS_NR 2
|
||||
|
||||
/* CPSW Config space */
|
||||
|
||||
@@ -36,12 +36,18 @@
|
||||
|
||||
/* VTP Base address */
|
||||
#define VTP0_CTRL_ADDR 0x48140E0C
|
||||
#define VTP1_CTRL_ADDR 0x48140E10
|
||||
|
||||
/* DDR Base address */
|
||||
#define DDR_PHY_CMD_ADDR 0x47C0C400
|
||||
#define DDR_PHY_DATA_ADDR 0x47C0C4C8
|
||||
#define DDR_PHY_CMD_ADDR2 0x47C0C800
|
||||
#define DDR_PHY_DATA_ADDR2 0x47C0C8C8
|
||||
#define DDR_DATA_REGS_NR 4
|
||||
|
||||
#define DDRPHY_0_CONFIG_BASE (CTRL_BASE + 0x1400)
|
||||
#define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE
|
||||
|
||||
/* CPSW Config space */
|
||||
#define CPSW_MDIO_BASE 0x4A100800
|
||||
|
||||
|
||||
61
arch/arm/include/asm/arch-am33xx/hardware_ti816x.h
Normal file
61
arch/arm/include/asm/arch-am33xx/hardware_ti816x.h
Normal file
@@ -0,0 +1,61 @@
|
||||
/*
|
||||
* hardware_ti816x.h
|
||||
*
|
||||
* TI816x hardware specific header
|
||||
*
|
||||
* Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
|
||||
* Antoine Tenart, <atenart@adeneo-embedded.com>
|
||||
* Based on TI-PSP-04.00.02.14
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __AM33XX_HARDWARE_TI816X_H
|
||||
#define __AM33XX_HARDWARE_TI816X_H
|
||||
|
||||
/* UART */
|
||||
#define UART0_BASE 0x48020000
|
||||
#define UART1_BASE 0x48022000
|
||||
#define UART2_BASE 0x48024000
|
||||
|
||||
/* Watchdog Timer */
|
||||
#define WDT_BASE 0x480C2000
|
||||
|
||||
/* Control Module Base Address */
|
||||
#define CTRL_BASE 0x48140000
|
||||
|
||||
/* PRCM Base Address */
|
||||
#define PRCM_BASE 0x48180000
|
||||
|
||||
#define PRM_RSTCTRL (PRCM_BASE + 0x00A0)
|
||||
#define PRM_RSTST (PRM_RSTCTRL + 8)
|
||||
|
||||
/* VTP Base address */
|
||||
#define VTP0_CTRL_ADDR 0x48198358
|
||||
#define VTP1_CTRL_ADDR 0x4819A358
|
||||
|
||||
/* DDR Base address */
|
||||
#define DDR_PHY_CMD_ADDR 0x48198000
|
||||
#define DDR_PHY_DATA_ADDR 0x481980C8
|
||||
#define DDR_PHY_CMD_ADDR2 0x4819A000
|
||||
#define DDR_PHY_DATA_ADDR2 0x4819A0C8
|
||||
#define DDR_DATA_REGS_NR 4
|
||||
|
||||
|
||||
#define DDRPHY_0_CONFIG_BASE 0x48198000
|
||||
#define DDRPHY_1_CONFIG_BASE 0x4819A000
|
||||
#define DDRPHY_CONFIG_BASE ((emif == 0) ? \
|
||||
DDRPHY_0_CONFIG_BASE : DDRPHY_1_CONFIG_BASE)
|
||||
|
||||
/* RTC base address */
|
||||
#define RTC_BASE 0x480C0000
|
||||
|
||||
#endif /* __AM33XX_HARDWARE_TI816X_H */
|
||||
@@ -27,6 +27,9 @@
|
||||
#if defined(CONFIG_TI814X)
|
||||
#undef MMC_CLOCK_REFERENCE
|
||||
#define MMC_CLOCK_REFERENCE 192 /* MHz */
|
||||
#elif defined(CONFIG_TI816X)
|
||||
#undef MMC_CLOCK_REFERENCE
|
||||
#define MMC_CLOCK_REFERENCE 48 /* MHz */
|
||||
#endif
|
||||
|
||||
#endif /* MMC_HOST_DEF_H */
|
||||
|
||||
@@ -23,6 +23,8 @@
|
||||
#include <asm/arch/mux_am33xx.h>
|
||||
#elif defined(CONFIG_TI814X)
|
||||
#include <asm/arch/mux_ti814x.h>
|
||||
#elif defined(CONFIG_TI816X)
|
||||
#include <asm/arch/mux_ti816x.h>
|
||||
#elif defined(CONFIG_AM43XX)
|
||||
#include <asm/arch/mux_am43xx.h>
|
||||
#endif
|
||||
|
||||
363
arch/arm/include/asm/arch-am33xx/mux_ti816x.h
Normal file
363
arch/arm/include/asm/arch-am33xx/mux_ti816x.h
Normal file
@@ -0,0 +1,363 @@
|
||||
/*
|
||||
* mux_ti816x.h
|
||||
*
|
||||
* Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
|
||||
* Antoine Tenart, <atenart@adeneo-embedded.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef _MUX_TI816X_H_
|
||||
#define _MUX_TI816X_H_
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#define MUX_CFG(value, offset) \
|
||||
__raw_writel(value, (CTRL_BASE + offset));
|
||||
|
||||
#define PULLDOWN_EN (0x0 << 4) /* Pull Down Selection */
|
||||
#define PULLUP_EN (0x1 << 4) /* Pull Up Selection */
|
||||
#define PULLUDEN (0x0 << 3) /* Pull up enabled */
|
||||
#define PULLUDDIS (0x1 << 3) /* Pull up disabled */
|
||||
#define MODE(val) (val) /* used for Readability */
|
||||
|
||||
|
||||
/*
|
||||
* PAD CONTROL OFFSETS
|
||||
* Field names corresponds to the pad signal name
|
||||
*/
|
||||
struct pad_signals {
|
||||
int pincntl1;
|
||||
int pincntl2;
|
||||
int pincntl3;
|
||||
int pincntl4;
|
||||
int pincntl5;
|
||||
int pincntl6;
|
||||
int pincntl7;
|
||||
int pincntl8;
|
||||
int pincntl9;
|
||||
int pincntl10;
|
||||
int pincntl11;
|
||||
int pincntl12;
|
||||
int pincntl13;
|
||||
int pincntl14;
|
||||
int pincntl15;
|
||||
int pincntl16;
|
||||
int pincntl17;
|
||||
int pincntl18;
|
||||
int pincntl19;
|
||||
int pincntl20;
|
||||
int pincntl21;
|
||||
int pincntl22;
|
||||
int pincntl23;
|
||||
int pincntl24;
|
||||
int pincntl25;
|
||||
int pincntl26;
|
||||
int pincntl27;
|
||||
int pincntl28;
|
||||
int pincntl29;
|
||||
int pincntl30;
|
||||
int pincntl31;
|
||||
int pincntl32;
|
||||
int pincntl33;
|
||||
int pincntl34;
|
||||
int pincntl35;
|
||||
int pincntl36;
|
||||
int pincntl37;
|
||||
int pincntl38;
|
||||
int pincntl39;
|
||||
int pincntl40;
|
||||
int pincntl41;
|
||||
int pincntl42;
|
||||
int pincntl43;
|
||||
int pincntl44;
|
||||
int pincntl45;
|
||||
int pincntl46;
|
||||
int pincntl47;
|
||||
int pincntl48;
|
||||
int pincntl49;
|
||||
int pincntl50;
|
||||
int pincntl51;
|
||||
int pincntl52;
|
||||
int pincntl53;
|
||||
int pincntl54;
|
||||
int pincntl55;
|
||||
int pincntl56;
|
||||
int pincntl57;
|
||||
int pincntl58;
|
||||
int pincntl59;
|
||||
int pincntl60;
|
||||
int pincntl61;
|
||||
int pincntl62;
|
||||
int pincntl63;
|
||||
int pincntl64;
|
||||
int pincntl65;
|
||||
int pincntl66;
|
||||
int pincntl67;
|
||||
int pincntl68;
|
||||
int pincntl69;
|
||||
int pincntl70;
|
||||
int pincntl71;
|
||||
int pincntl72;
|
||||
int pincntl73;
|
||||
int pincntl74;
|
||||
int pincntl75;
|
||||
int pincntl76;
|
||||
int pincntl77;
|
||||
int pincntl78;
|
||||
int pincntl79;
|
||||
int pincntl80;
|
||||
int pincntl81;
|
||||
int pincntl82;
|
||||
int pincntl83;
|
||||
int pincntl84;
|
||||
int pincntl85;
|
||||
int pincntl86;
|
||||
int pincntl87;
|
||||
int pincntl88;
|
||||
int pincntl89;
|
||||
int pincntl90;
|
||||
int pincntl91;
|
||||
int pincntl92;
|
||||
int pincntl93;
|
||||
int pincntl94;
|
||||
int pincntl95;
|
||||
int pincntl96;
|
||||
int pincntl97;
|
||||
int pincntl98;
|
||||
int pincntl99;
|
||||
int pincntl100;
|
||||
int pincntl101;
|
||||
int pincntl102;
|
||||
int pincntl103;
|
||||
int pincntl104;
|
||||
int pincntl105;
|
||||
int pincntl106;
|
||||
int pincntl107;
|
||||
int pincntl108;
|
||||
int pincntl109;
|
||||
int pincntl110;
|
||||
int pincntl111;
|
||||
int pincntl112;
|
||||
int pincntl113;
|
||||
int pincntl114;
|
||||
int pincntl115;
|
||||
int pincntl116;
|
||||
int pincntl117;
|
||||
int pincntl118;
|
||||
int pincntl119;
|
||||
int pincntl120;
|
||||
int pincntl121;
|
||||
int pincntl122;
|
||||
int pincntl123;
|
||||
int pincntl124;
|
||||
int pincntl125;
|
||||
int pincntl126;
|
||||
int pincntl127;
|
||||
int pincntl128;
|
||||
int pincntl129;
|
||||
int pincntl130;
|
||||
int pincntl131;
|
||||
int pincntl132;
|
||||
int pincntl133;
|
||||
int pincntl134;
|
||||
int pincntl135;
|
||||
int pincntl136;
|
||||
int pincntl137;
|
||||
int pincntl138;
|
||||
int pincntl139;
|
||||
int pincntl140;
|
||||
int pincntl141;
|
||||
int pincntl142;
|
||||
int pincntl143;
|
||||
int pincntl144;
|
||||
int pincntl145;
|
||||
int pincntl146;
|
||||
int pincntl147;
|
||||
int pincntl148;
|
||||
int pincntl149;
|
||||
int pincntl150;
|
||||
int pincntl151;
|
||||
int pincntl152;
|
||||
int pincntl153;
|
||||
int pincntl154;
|
||||
int pincntl155;
|
||||
int pincntl156;
|
||||
int pincntl157;
|
||||
int pincntl158;
|
||||
int pincntl159;
|
||||
int pincntl160;
|
||||
int pincntl161;
|
||||
int pincntl162;
|
||||
int pincntl163;
|
||||
int pincntl164;
|
||||
int pincntl165;
|
||||
int pincntl166;
|
||||
int pincntl167;
|
||||
int pincntl168;
|
||||
int pincntl169;
|
||||
int pincntl170;
|
||||
int pincntl171;
|
||||
int pincntl172;
|
||||
int pincntl173;
|
||||
int pincntl174;
|
||||
int pincntl175;
|
||||
int pincntl176;
|
||||
int pincntl177;
|
||||
int pincntl178;
|
||||
int pincntl179;
|
||||
int pincntl180;
|
||||
int pincntl181;
|
||||
int pincntl182;
|
||||
int pincntl183;
|
||||
int pincntl184;
|
||||
int pincntl185;
|
||||
int pincntl186;
|
||||
int pincntl187;
|
||||
int pincntl188;
|
||||
int pincntl189;
|
||||
int pincntl190;
|
||||
int pincntl191;
|
||||
int pincntl192;
|
||||
int pincntl193;
|
||||
int pincntl194;
|
||||
int pincntl195;
|
||||
int pincntl196;
|
||||
int pincntl197;
|
||||
int pincntl198;
|
||||
int pincntl199;
|
||||
int pincntl200;
|
||||
int pincntl201;
|
||||
int pincntl202;
|
||||
int pincntl203;
|
||||
int pincntl204;
|
||||
int pincntl205;
|
||||
int pincntl206;
|
||||
int pincntl207;
|
||||
int pincntl208;
|
||||
int pincntl209;
|
||||
int pincntl210;
|
||||
int pincntl211;
|
||||
int pincntl212;
|
||||
int pincntl213;
|
||||
int pincntl214;
|
||||
int pincntl215;
|
||||
int pincntl216;
|
||||
int pincntl217;
|
||||
int pincntl218;
|
||||
int pincntl219;
|
||||
int pincntl220;
|
||||
int pincntl221;
|
||||
int pincntl222;
|
||||
int pincntl223;
|
||||
int pincntl224;
|
||||
int pincntl225;
|
||||
int pincntl226;
|
||||
int pincntl227;
|
||||
int pincntl228;
|
||||
int pincntl229;
|
||||
int pincntl230;
|
||||
int pincntl231;
|
||||
int pincntl232;
|
||||
int pincntl233;
|
||||
int pincntl234;
|
||||
int pincntl235;
|
||||
int pincntl236;
|
||||
int pincntl237;
|
||||
int pincntl238;
|
||||
int pincntl239;
|
||||
int pincntl240;
|
||||
int pincntl241;
|
||||
int pincntl242;
|
||||
int pincntl243;
|
||||
int pincntl244;
|
||||
int pincntl245;
|
||||
int pincntl246;
|
||||
int pincntl247;
|
||||
int pincntl248;
|
||||
int pincntl249;
|
||||
int pincntl250;
|
||||
int pincntl251;
|
||||
int pincntl252;
|
||||
int pincntl253;
|
||||
int pincntl254;
|
||||
int pincntl255;
|
||||
int pincntl256;
|
||||
int pincntl257;
|
||||
int pincntl258;
|
||||
int pincntl259;
|
||||
int pincntl260;
|
||||
int pincntl261;
|
||||
int pincntl262;
|
||||
int pincntl263;
|
||||
int pincntl264;
|
||||
int pincntl265;
|
||||
int pincntl266;
|
||||
int pincntl267;
|
||||
int pincntl268;
|
||||
int pincntl269;
|
||||
int pincntl270;
|
||||
int pincntl271;
|
||||
int pincntl272;
|
||||
int pincntl273;
|
||||
int pincntl274;
|
||||
int pincntl275;
|
||||
int pincntl276;
|
||||
int pincntl277;
|
||||
int pincntl278;
|
||||
int pincntl279;
|
||||
int pincntl280;
|
||||
int pincntl281;
|
||||
int pincntl282;
|
||||
int pincntl283;
|
||||
int pincntl284;
|
||||
int pincntl285;
|
||||
int pincntl286;
|
||||
int pincntl287;
|
||||
int pincntl288;
|
||||
int pincntl289;
|
||||
int pincntl290;
|
||||
int pincntl291;
|
||||
int pincntl292;
|
||||
int pincntl293;
|
||||
int pincntl294;
|
||||
int pincntl295;
|
||||
int pincntl296;
|
||||
int pincntl297;
|
||||
int pincntl298;
|
||||
int pincntl299;
|
||||
int pincntl300;
|
||||
int pincntl301;
|
||||
int pincntl302;
|
||||
int pincntl303;
|
||||
int pincntl304;
|
||||
int pincntl305;
|
||||
int pincntl306;
|
||||
int pincntl307;
|
||||
int pincntl308;
|
||||
int pincntl309;
|
||||
int pincntl310;
|
||||
int pincntl311;
|
||||
int pincntl312;
|
||||
int pincntl313;
|
||||
int pincntl314;
|
||||
int pincntl315;
|
||||
int pincntl316;
|
||||
int pincntl317;
|
||||
int pincntl318;
|
||||
int pincntl319;
|
||||
int pincntl320;
|
||||
int pincntl321;
|
||||
int pincntl322;
|
||||
int pincntl323;
|
||||
};
|
||||
|
||||
#endif /* endif _MUX_TI816X_H_ */
|
||||
@@ -7,6 +7,14 @@
|
||||
#ifndef _ASM_ARCH_SPL_H_
|
||||
#define _ASM_SPL_H_
|
||||
|
||||
#if defined(CONFIG_TI816X)
|
||||
#define BOOT_DEVICE_XIP 2
|
||||
#define BOOT_DEVICE_NAND 3
|
||||
#define BOOT_DEVICE_MMC1 6
|
||||
#define BOOT_DEVICE_MMC2 5
|
||||
#define BOOT_DEVICE_UART 0x43
|
||||
#define BOOT_DEVICE_MMC2_2 0xFF
|
||||
#else
|
||||
#define BOOT_DEVICE_XIP 2
|
||||
#define BOOT_DEVICE_NAND 5
|
||||
#if defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX)
|
||||
@@ -21,11 +29,12 @@
|
||||
#define BOOT_DEVICE_USBETH 68
|
||||
#define BOOT_DEVICE_CPGMAC 70
|
||||
#define BOOT_DEVICE_MMC2_2 0xFF
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX)
|
||||
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
|
||||
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
|
||||
#elif defined(CONFIG_TI814X)
|
||||
#elif defined(CONFIG_TI81XX)
|
||||
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2
|
||||
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user