ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.

Its reset value is random, and we sometimes read uninitialized TLB
arrays.  Make sure that we don't retain MAS8 from reading such an entry
if the VF bit in MAS8 is set, attempts to use the mapping will trap.

Signed-off-by: Scott Wood <scottwood@freescale.com>

cpu/mpc85xx/start.S

@@ -156,6 +156,10 @@ _start_e500:
 	mtspr	MCSR,r0			/* machine check syndrome register */
 	mtxer	r0			/* clear integer exception register */
 
+#ifdef CONFIG_SYS_BOOK3E_HV
+	mtspr	MAS8,r0			/* make sure MAS8 is clear */
+#endif
+
 	/* Enable Time Base and Select Time Base Clock */
 	lis	r0,HID0_EMCP@h		/* Enable machine check */
 #if defined(CONFIG_ENABLE_36BIT_PHYS)

cpu/mpc85xx/tlb.c

@@ -50,6 +50,9 @@ void set_tlb(u8 tlb, u32 epn, u64 rpn,
 	mtspr(MAS3, _mas3);
 #ifdef CONFIG_ENABLE_36BIT_PHYS
 	mtspr(MAS7, _mas7);
+#endif
+#ifdef CONFIG_SYS_BOOK3E_HV
+	mtspr(MAS8, 0);
 #endif
 	asm volatile("isync;msync;tlbwe;isync");