From 5af654197263dfac08e17d24e477e27c6990df72 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 19 Jun 2018 06:13:42 +0200 Subject: [PATCH 1/9] pinctrl: renesas: Fix register usage in sh_pfc_{read,write} The sh_pfc_{read,write}() must operate on the register address directly rather than on an offset, fix this to prevent illegal access. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- drivers/pinctrl/renesas/pfc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c index 6aa2e13f3e..90011537a8 100644 --- a/drivers/pinctrl/renesas/pfc.c +++ b/drivers/pinctrl/renesas/pfc.c @@ -121,7 +121,7 @@ void sh_pfc_write_raw_reg(void __iomem *mapped_reg, unsigned int reg_width, u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg) { - return sh_pfc_read_raw_reg(pfc->regs + reg, 32); + return sh_pfc_read_raw_reg((void __iomem *)(uintptr_t)reg, 32); } void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data) @@ -132,7 +132,7 @@ void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data) if (pfc->info->unlock_reg) sh_pfc_write_raw_reg(unlock_reg, 32, ~data); - sh_pfc_write_raw_reg(pfc->regs + reg, 32, data); + sh_pfc_write_raw_reg((void __iomem *)(uintptr_t)reg, 32, data); } static void sh_pfc_config_reg_helper(struct sh_pfc *pfc, From 27d290c46ee01094632a2b0058f7c1f9b37afbe4 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 17 Jun 2018 06:40:13 +0200 Subject: [PATCH 2/9] ARM: rmobile: Adjust text base on V3M Eagle The latest ATF puts the U-Boot at 0x50000000, just like on all the other boards. Adjust the text base to reflect that change. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- configs/r8a77970_eagle_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index b736e31177..251415c03a 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_RMOBILE=y -CONFIG_SYS_TEXT_BASE=0x58280000 +CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_RCAR_GEN3=y CONFIG_R8A77970=y From 24417edfff837e21c8f4b659e08c4da5f59181b8 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 17 Jun 2018 07:38:50 +0200 Subject: [PATCH 3/9] ARM: dts: rmobile: Move the PHY reset GPIO back The current state of RAVB driver expects the PHY reset GPIO in the RAVB mode, move it back from the PHY node to avoid breakage. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/dts/salvator-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/salvator-common.dtsi b/arch/arm/dts/salvator-common.dtsi index a36e0ebca0..21dbb21184 100644 --- a/arch/arm/dts/salvator-common.dtsi +++ b/arch/arm/dts/salvator-common.dtsi @@ -257,6 +257,7 @@ pinctrl-names = "default"; phy-handle = <&phy0>; phy-mode = "rgmii-txid"; + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; status = "okay"; phy0: ethernet-phy@0 { @@ -264,7 +265,6 @@ reg = <0>; interrupt-parent = <&gpio2>; interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; }; }; From c4a8d9ca046a6881babe1ca6e08223bd1a2f7d59 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 18 Jun 2018 09:35:45 +0200 Subject: [PATCH 4/9] net: ravb: Do not shut down clock in start callback Do not stop the clock in the start callback in case of failure, keep them running to also keep the PHY running. The failure could be ie. PHY failing to negotiate link and if the clock get shut down, another attempt at bringing the link up would fail. The clock right now are started in probe function and stopped in remove function, which is the correct behavior. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Cc: Joe Hershberger --- drivers/net/ravb.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 999894f0f6..c1c946856b 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -437,7 +437,7 @@ static int ravb_start(struct udevice *dev) ret = ravb_reset(dev); if (ret) - goto err; + return ret; ravb_base_desc_init(eth); ravb_tx_desc_init(eth); @@ -445,16 +445,12 @@ static int ravb_start(struct udevice *dev) ret = ravb_config(dev); if (ret) - goto err; + return ret; /* Setting the control will start the AVB-DMAC process. */ writel(CCC_OPC_OPERATION, eth->iobase + RAVB_REG_CCC); return 0; - -err: - clk_disable(ð->clk); - return ret; } static void ravb_stop(struct udevice *dev) From 536fb5d47c350de0a67279c344470119a9f53886 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 18 Jun 2018 05:44:53 +0200 Subject: [PATCH 5/9] net: ravb: Filter out supported PHY features The RAVB only supports 100Full and 1000Full operation, it does not support 10Full or any Half-duplex modes. The PHY could still advertise those features though, so filter out the PHY features accordingly. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Cc: Joe Hershberger --- drivers/net/ravb.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index c1c946856b..0dd2792c60 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -318,12 +318,13 @@ static int ravb_phy_config(struct udevice *dev) eth->phydev = phydev; - /* 10BASE is not supported for Ethernet AVB MAC */ - phydev->supported &= ~(SUPPORTED_10baseT_Full - | SUPPORTED_10baseT_Half); + phydev->supported &= SUPPORTED_100baseT_Full | + SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | + SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_Pause | + SUPPORTED_Asym_Pause; + if (pdata->max_speed != 1000) { - phydev->supported &= ~(SUPPORTED_1000baseT_Half - | SUPPORTED_1000baseT_Full); + phydev->supported &= ~SUPPORTED_1000baseT_Full; reg = phy_read(phydev, -1, MII_CTRL1000); reg &= ~(BIT(9) | BIT(8)); phy_write(phydev, -1, MII_CTRL1000, reg); From 701db6e9c62ce1f61ec83a75b0367b4d46284e27 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 18 Jun 2018 04:02:15 +0200 Subject: [PATCH 6/9] net: ravb: Support reset GPIO both in mac and phy node The recent DTs have the PHY reset GPIO in the PHY node rather than the ethernet MAC node, support extracting the PHY reset GPIO info from both the PHY node and ethernet MAC node. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Cc: Joe Hershberger --- drivers/net/ravb.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c index 0dd2792c60..749562db96 100644 --- a/drivers/net/ravb.c +++ b/drivers/net/ravb.c @@ -466,6 +466,7 @@ static int ravb_probe(struct udevice *dev) { struct eth_pdata *pdata = dev_get_platdata(dev); struct ravb_priv *eth = dev_get_priv(dev); + struct ofnode_phandle_args phandle_args; struct mii_dev *mdiodev; void __iomem *iobase; int ret; @@ -477,8 +478,16 @@ static int ravb_probe(struct udevice *dev) if (ret < 0) goto err_mdio_alloc; - gpio_request_by_name(dev, "reset-gpios", 0, ð->reset_gpio, - GPIOD_IS_OUT); + ret = dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, &phandle_args); + if (!ret) { + gpio_request_by_name_nodev(phandle_args.node, "reset-gpios", 0, + ð->reset_gpio, GPIOD_IS_OUT); + } + + if (!dm_gpio_is_valid(ð->reset_gpio)) { + gpio_request_by_name(dev, "reset-gpios", 0, ð->reset_gpio, + GPIOD_IS_OUT); + } mdiodev = mdio_alloc(); if (!mdiodev) { From 159b3292266aab1064a594063f7ac5565140121a Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 18 Jun 2018 04:03:01 +0200 Subject: [PATCH 7/9] net: sh_eth: Support reset GPIO both in mac and phy node The recent DTs have the PHY reset GPIO in the PHY node rather than the ethernet MAC node, support extracting the PHY reset GPIO info from both the PHY node and ethernet MAC node. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Cc: Joe Hershberger --- drivers/net/sh_eth.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 645cde8e4a..2e1123c488 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -810,6 +810,7 @@ static int sh_ether_probe(struct udevice *udev) struct eth_pdata *pdata = dev_get_platdata(udev); struct sh_ether_priv *priv = dev_get_priv(udev); struct sh_eth_dev *eth = &priv->shdev; + struct ofnode_phandle_args phandle_args; struct mii_dev *mdiodev; int ret; @@ -819,8 +820,16 @@ static int sh_ether_probe(struct udevice *udev) if (ret < 0) return ret; - gpio_request_by_name(udev, "reset-gpios", 0, &priv->reset_gpio, - GPIOD_IS_OUT); + ret = dev_read_phandle_with_args(udev, "phy-handle", NULL, 0, 0, &phandle_args); + if (!ret) { + gpio_request_by_name_nodev(phandle_args.node, "reset-gpios", 0, + &priv->reset_gpio, GPIOD_IS_OUT); + } + + if (!dm_gpio_is_valid(&priv->reset_gpio)) { + gpio_request_by_name(udev, "reset-gpios", 0, &priv->reset_gpio, + GPIOD_IS_OUT); + } mdiodev = mdio_alloc(); if (!mdiodev) { From ea273e8d72e994ea2403570bad7737e23cca593f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 18 Jun 2018 04:09:10 +0200 Subject: [PATCH 8/9] ARM: dts: rmobile: Move the PHY reset GPIOs into PHY nodes Both the RAVB and SH ether driver now support parsing the PHY reset GPIOs from both the PHY nodes and the MAC nodes, move the reset GPIOs back into the PHY nodes to minimize DT difference between U-Boot and Linux. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/dts/r8a77970-eagle.dts | 2 +- arch/arm/dts/salvator-common.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/r8a77970-eagle.dts b/arch/arm/dts/r8a77970-eagle.dts index 5b8b2f8704..5dcad63492 100644 --- a/arch/arm/dts/r8a77970-eagle.dts +++ b/arch/arm/dts/r8a77970-eagle.dts @@ -39,13 +39,13 @@ phy-handle = <&phy0>; phy-mode = "rgmii-id"; status = "okay"; - reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; phy0: ethernet-phy@0 { rxc-skew-ps = <1500>; reg = <0>; interrupt-parent = <&gpio1>; interrupts = <17 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; }; }; diff --git a/arch/arm/dts/salvator-common.dtsi b/arch/arm/dts/salvator-common.dtsi index 21dbb21184..a36e0ebca0 100644 --- a/arch/arm/dts/salvator-common.dtsi +++ b/arch/arm/dts/salvator-common.dtsi @@ -257,7 +257,6 @@ pinctrl-names = "default"; phy-handle = <&phy0>; phy-mode = "rgmii-txid"; - reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; status = "okay"; phy0: ethernet-phy@0 { @@ -265,6 +264,7 @@ reg = <0>; interrupt-parent = <&gpio2>; interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; }; }; From 2c84d5218e7e379dce493080a01938530b477611 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 18 Jun 2018 06:03:57 +0200 Subject: [PATCH 9/9] ARM: dts: rmobile: Add HS200 support to E3 Ebisu Add regulator nodes and pinmux settings to the SDHI3 on E3 Ebisu and enable HS200 mode on it. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- arch/arm/dts/r8a77990-ebisu.dts | 38 +++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts index 1946999874..8b0d24bd29 100644 --- a/arch/arm/dts/r8a77990-ebisu.dts +++ b/arch/arm/dts/r8a77990-ebisu.dts @@ -28,6 +28,24 @@ /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x38000000>; }; + + reg_1p8v: regulator0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; }; &avb { @@ -71,6 +89,18 @@ groups = "scif_clk_a"; function = "scif_clk"; }; + + sdhi3_pins: sd2 { + groups = "sdhi3_data8", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <1800>; + }; + + sdhi3_pins_uhs: sd2_uhs { + groups = "sdhi3_data8", "sdhi3_ctrl"; + function = "sdhi3"; + power-source = <1800>; + }; }; &sdhi0 { @@ -82,7 +112,15 @@ }; &sdhi3 { + /* used for on-board 8bit eMMC */ + pinctrl-0 = <&sdhi3_pins>; + pinctrl-1 = <&sdhi3_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; bus-width = <8>; + mmc-hs200-1_8v; non-removable; status = "okay"; };