Revert "sunxi/nand: Add support to the SPL for loading u-boot from internal NAND memory"

This reverts commit f76eba38b3.

This patch did not have a full and proper copyright/S-o-b chain.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>

Conflicts:
	include/configs/sun6i.h
	include/configs/sun8i.h
This commit is contained in:
Ian Campbell
2015-06-26 19:42:24 +01:00
committed by Tom Rini
parent ef0f2f5752
commit da9971d1b3
13 changed files with 2 additions and 415 deletions

View File

@@ -280,18 +280,6 @@ config MMC_SUNXI_SLOT_EXTRA
slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
support for this.
config SPL_NAND_SUPPORT
bool "SPL/NAND mode support"
depends on SPL
default n
---help---
This enables support for booting from NAND internal
memory. U-Boot SPL doesn't detect where is it load from,
therefore this option is needed to properly load image from
flash. Option also disables MMC functionality on U-Boot due to
initialization errors encountered, when both controllers are
enabled.
config USB0_VBUS_PIN
string "Vbus enable pin for usb0 (otg)"
default ""

View File

@@ -22,9 +22,6 @@
#ifdef CONFIG_AXP221_POWER
#include <axp221.h>
#endif
#ifdef CONFIG_NAND_SUNXI
#include <nand.h>
#endif
#include <asm/arch/clock.h>
#include <asm/arch/cpu.h>
#include <asm/arch/display.h>
@@ -318,21 +315,6 @@ int board_mmc_init(bd_t *bis)
}
#endif
#ifdef CONFIG_NAND
void board_nand_init(void)
{
unsigned int pin;
static u8 ports[] = CONFIG_NAND_SUNXI_GPC_PORTS;
/* Configure AHB muxes to connect output pins with NAND controller */
for (pin = 0; pin < 16; pin++)
sunxi_gpio_set_cfgpin(SUNXI_GPC(pin), SUNXI_GPC_NAND);
for (pin = 0; pin < ARRAY_SIZE(ports); pin++)
sunxi_gpio_set_cfgpin(SUNXI_GPC(ports[pin]), SUNXI_GPC_NAND);
}
#endif
void i2c_init_board(void)
{
#ifdef CONFIG_I2C0_ENABLE