Revert "sunxi/nand: Add support to the SPL for loading u-boot from internal NAND memory"
This reverts commit f76eba38b3.
This patch did not have a full and proper copyright/S-o-b chain.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Conflicts:
include/configs/sun6i.h
include/configs/sun8i.h
This commit is contained in:
@@ -280,18 +280,6 @@ config MMC_SUNXI_SLOT_EXTRA
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slot or emmc on mmc1 - mmc3. Setting this to 1, 2 or 3 will enable
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support for this.
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config SPL_NAND_SUPPORT
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bool "SPL/NAND mode support"
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depends on SPL
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default n
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---help---
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This enables support for booting from NAND internal
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memory. U-Boot SPL doesn't detect where is it load from,
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therefore this option is needed to properly load image from
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flash. Option also disables MMC functionality on U-Boot due to
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initialization errors encountered, when both controllers are
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enabled.
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config USB0_VBUS_PIN
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string "Vbus enable pin for usb0 (otg)"
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default ""
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@@ -22,9 +22,6 @@
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#ifdef CONFIG_AXP221_POWER
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#include <axp221.h>
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#endif
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#ifdef CONFIG_NAND_SUNXI
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#include <nand.h>
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#endif
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#include <asm/arch/clock.h>
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#include <asm/arch/cpu.h>
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#include <asm/arch/display.h>
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@@ -318,21 +315,6 @@ int board_mmc_init(bd_t *bis)
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}
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#endif
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#ifdef CONFIG_NAND
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void board_nand_init(void)
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{
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unsigned int pin;
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static u8 ports[] = CONFIG_NAND_SUNXI_GPC_PORTS;
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/* Configure AHB muxes to connect output pins with NAND controller */
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for (pin = 0; pin < 16; pin++)
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sunxi_gpio_set_cfgpin(SUNXI_GPC(pin), SUNXI_GPC_NAND);
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for (pin = 0; pin < ARRAY_SIZE(ports); pin++)
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sunxi_gpio_set_cfgpin(SUNXI_GPC(ports[pin]), SUNXI_GPC_NAND);
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}
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#endif
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void i2c_init_board(void)
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{
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#ifdef CONFIG_I2C0_ENABLE
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