Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-01 17:20:00 -07:00
parent 3146f0c017
commit da3b9e7fd6
122 changed files with 109 additions and 98 deletions
--- a/include/config_phylib_all_drivers.h
+++ b/include/config_phylib_all_drivers.h
@@ -16,7 +16,6 @@

 #define CONFIG_PHY_VITESSE
 #define CONFIG_PHY_MARVELL
-#define CONFIG_PHY_MICREL
 #define CONFIG_PHY_BROADCOM
 #define CONFIG_PHY_DAVICOM
 #define CONFIG_PHY_REALTEK
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -480,7 +480,6 @@
 #if defined(CONFIG_TSEC_ENET)

 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
-#define CONFIG_PHY_MICREL_KSZ90X1
 #else
 #error "UCP1020 module revision is not defined !!!"
 #endif
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -51,7 +51,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI

--- a/include/configs/ap_sh4a_4a.h
+++ b/include/configs/ap_sh4a_4a.h
@@ -29,7 +29,6 @@
 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
 #define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII)
 #define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */
-#define CONFIG_PHY_MICREL 1
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI

--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -86,8 +86,6 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		6
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
 #define CONFIG_IP_DEFRAG
 #define CONFIG_TFTP_BLOCKSIZE		4096
 #define CONFIG_TFTP_TSIZE
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -32,8 +32,6 @@
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		0

-#define CONFIG_PHY_MICREL
-
 #define CONFIG_SPI_FLASH_MTD
 #define CONFIG_MXC_SPI
 #define CONFIG_SF_DEFAULT_SPEED		20000000
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -20,7 +20,6 @@
 #define CONSOLE_DEV	"ttymxc1"

 #define CONFIG_FEC_XCV_TYPE		RGMII
-#define CONFIG_PHY_MICREL_KSZ90X1

 #define CONFIG_SF_DEFAULT_BUS		3
 #define CONFIG_SF_DEFAULT_CS		1
--- a/include/configs/aristainetos2b.h
+++ b/include/configs/aristainetos2b.h
@@ -20,7 +20,6 @@
 #define CONSOLE_DEV	"ttymxc1"

 #define CONFIG_FEC_XCV_TYPE		RGMII
-#define CONFIG_PHY_MICREL_KSZ90X1

 #define CONFIG_SF_DEFAULT_BUS		0
 #define CONFIG_SF_DEFAULT_CS		0
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -72,7 +72,6 @@
 #define CONFIG_FEC_XCV_TYPE		RMII
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		1
-#define CONFIG_PHY_MICREL
 #define CONFIG_IP_DEFRAG
 #define CONFIG_TFTP_BLOCKSIZE		16352
 #define CONFIG_TFTP_TSIZE
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -32,7 +32,6 @@
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          0

-#define CONFIG_PHY_MICREL
 #define CONFIG_IP_DEFRAG
 #define CONFIG_TFTP_BLOCKSIZE		16352
 #define CONFIG_TFTP_TSIZE
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -66,7 +66,6 @@
 #define IMX_FEC_BASE			ENET1_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE		RMII
 #define CONFIG_FEC_MXC_PHYADDR          0
-#define CONFIG_PHY_MICREL

 #define CONFIG_IPADDR		192.168.10.2
 #define CONFIG_NETMASK		255.255.255.0
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -366,8 +366,6 @@

 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
 #endif

 #ifdef CONFIG_PCI
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -77,7 +77,6 @@
 */
 #define CONFIG_FEC_MXC
 #define IMX_FEC_BASE	FEC_BASE_ADDR
-#define CONFIG_PHY_MICREL
 #define CONFIG_FEC_MXC_PHYADDR	0x1

 #define CONFIG_MII
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -50,7 +50,6 @@
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
--- a/include/configs/k2g_evm.h
+++ b/include/configs/k2g_evm.h
@@ -84,7 +84,6 @@
 #define CONFIG_KSNET_NETCP_V1_5
 #define CONFIG_KSNET_CPSW_NUM_PORTS	2
 #define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
-#define CONFIG_PHY_MICREL
 #define PHY_ANEG_TIMEOUT	10000 /* PHY needs longer aneg time */

 #define CONFIG_ENV_SIZE			(256 << 10)  /* 256 KiB */
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -50,7 +50,6 @@
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -51,7 +51,6 @@
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI

--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -116,7 +116,6 @@
 #define CONFIG_MII
 #define CONFIG_DISCOVER_PHY
 #define CONFIG_FEC_XCV_TYPE		RMII
-#define CONFIG_PHY_MICREL
 #define CONFIG_ETHPRIME			"FEC0"
 #endif

--- a/include/configs/mccmon6.h
+++ b/include/configs/mccmon6.h
@@ -108,8 +108,6 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		1
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1

 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 #define CONFIG_EXTRA_ENV_SETTINGS \
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -245,8 +245,6 @@
 # define CONFIG_PHY_DAVICOM	1
 # define CONFIG_PHY_LXT		1
 # define CONFIG_PHY_MARVELL	1
-# define CONFIG_PHY_MICREL	1
-# define CONFIG_PHY_MICREL_KSZ90X1
 # define CONFIG_PHY_NATSEMI	1
 # define CONFIG_PHY_REALTEK	1
 # define CONFIG_PHY_VITESSE	1
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -206,8 +206,6 @@
 #define CONFIG_FEC_XCV_TYPE		RMII
 #endif
 #define CONFIG_ETHPRIME			"FEC"
-
-#define CONFIG_PHY_MICREL
 #endif

 #define CONFIG_IMX_THERMAL
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -65,8 +65,6 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		6
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1

 /* USB Configs */
 #define CONFIG_USB_HOST_ETHER
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -72,8 +72,6 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		0x7
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
 #define CONFIG_ARP_TIMEOUT		200UL
 #endif

--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -61,7 +61,6 @@
 #define IMX_FEC_BASE			ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE		RMII
 #define CONFIG_FEC_MXC_PHYADDR          0
-#define CONFIG_PHY_MICREL

 /* QSPI Configs*/

--- a/include/configs/pcm058.h
+++ b/include/configs/pcm058.h
@@ -43,9 +43,6 @@
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		3

-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
-
 /* SPI Flash */
 #define CONFIG_MXC_SPI
 #define CONFIG_SF_DEFAULT_BUS		0
--- a/include/configs/pepper.h
+++ b/include/configs/pepper.h
@@ -79,8 +79,6 @@
 /* Ethernet support */
 #define CONFIG_PHY_GIGE
 #define CONFIG_PHY_ADDR			0
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
 #define CONFIG_PHY_RESET_DELAY 1000

 /* SPL */
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -21,7 +21,6 @@
 #define IMX_FEC_BASE			ENET2_BASE_ADDR
 #define CONFIG_FEC_MXC_PHYADDR		0x1
 #define CONFIG_FEC_XCV_TYPE		RMII
-#define CONFIG_PHY_MICREL

 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(35 * SZ_1M) /* Increase due to DFU */
--- a/include/configs/platinum_titanium.h
+++ b/include/configs/platinum_titanium.h
@@ -20,8 +20,6 @@
 #define CONFIG_FEC_XCV_TYPE			RGMII
 #define CONFIG_FEC_MXC_PHYADDR			4

-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
 #define CONFIG_PHY_RESET_DELAY			1000

 #define CONFIG_HOSTNAME				titanium
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -52,7 +52,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI

--- a/include/configs/s32v234evb.h
+++ b/include/configs/s32v234evb.h
@@ -93,7 +93,6 @@
 #define IMX_FEC_BASE            ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE     RMII
 #define CONFIG_FEC_MXC_PHYADDR  0
-#define CONFIG_PHY_MICREL
 #endif

 #if 0				/* Disable until the FLASH will be implemented */
--- a/include/configs/salvator-x.h
+++ b/include/configs/salvator-x.h
@@ -26,7 +26,6 @@

 /* Ethernet RAVB */
 #define CONFIG_NET_MULTI
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI

--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -85,8 +85,6 @@
 #define CONFIG_PMECC_CAP		4
 #define CONFIG_PMECC_SECTOR_SIZE	512

-#define CONFIG_PHY_MICREL_KSZ90X1
-
 /* USB */

 #ifdef CONFIG_CMD_USB
--- a/include/configs/secomx6quq7.h
+++ b/include/configs/secomx6quq7.h
@@ -33,8 +33,6 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		6
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1

 #define CONFIG_EXTRA_ENV_SETTINGS					\
 	"netdev=eth0\0"							\
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -52,7 +52,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI

--- a/include/configs/socfpga_arria10_socdk.h
+++ b/include/configs/socfpga_arria10_socdk.h
@@ -25,10 +25,6 @@
 #define PHYS_SDRAM_1_SIZE		0x40000000

 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
-#endif

 /*
 * U-Boot environment configurations
--- a/include/configs/socfpga_arria5_socdk.h
+++ b/include/configs/socfpga_arria5_socdk.h
@@ -18,10 +18,6 @@
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
-#endif

 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
--- a/include/configs/socfpga_cyclone5_socdk.h
+++ b/include/configs/socfpga_cyclone5_socdk.h
@@ -18,10 +18,6 @@
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
-#endif

 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
--- a/include/configs/socfpga_de0_nano_soc.h
+++ b/include/configs/socfpga_de0_nano_soc.h
@@ -18,10 +18,6 @@
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
-#endif

 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
--- a/include/configs/socfpga_de10_nano.h
+++ b/include/configs/socfpga_de10_nano.h
@@ -18,10 +18,6 @@
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
-#endif

 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
--- a/include/configs/socfpga_de1_soc.h
+++ b/include/configs/socfpga_de1_soc.h
@@ -18,10 +18,6 @@
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
-#endif

 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
--- a/include/configs/socfpga_is1.h
+++ b/include/configs/socfpga_is1.h
@@ -25,8 +25,6 @@
 #define CONFIG_ARP_TIMEOUT		500UL

 /* PHY */
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
 #endif

 /* The rest of the configuration is shared */
--- a/include/configs/socfpga_sockit.h
+++ b/include/configs/socfpga_sockit.h
@@ -18,10 +18,6 @@
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
-#endif

 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
--- a/include/configs/socfpga_socrates.h
+++ b/include/configs/socfpga_socrates.h
@@ -18,10 +18,6 @@
 #define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

 /* Ethernet on SoC (EMAC) */
-#if defined(CONFIG_CMD_NET)
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
-#endif

 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
--- a/include/configs/socfpga_vining_fpga.h
+++ b/include/configs/socfpga_vining_fpga.h
@@ -41,8 +41,6 @@
 #if defined(CONFIG_CMD_NET)
 #define CONFIG_BOOTP_SEND_HOSTNAME
 /* PHY */
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1
 #endif

 /* Extra Environment */
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -55,7 +55,6 @@
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
-#define CONFIG_PHY_MICREL
 #define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI

--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -49,7 +49,6 @@

 #define CONFIG_MII
 #define CONFIG_DW_ALTDESCRIPTOR
-#define CONFIG_PHY_MICREL

 /* Command support defines */
 #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -45,8 +45,6 @@
 #define IMX_FEC_BASE			ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_FEC_MXC_PHYADDR		4
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1

 /* USB Configs */
 #define CONFIG_MXC_USB_PORT	1
--- a/include/configs/tqma6_mba6.h
+++ b/include/configs/tqma6_mba6.h
@@ -14,8 +14,6 @@
 #define CONFIG_ETHPRIME			"FEC"

 #define CONFIG_FEC_MXC_PHYADDR		0x03
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1

 #define CONFIG_MXC_UART_BASE		UART2_BASE
 #define CONSOLE_DEV		"ttymxc1"
--- a/include/configs/udoo.h
+++ b/include/configs/udoo.h
@@ -41,8 +41,6 @@
 #define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          6
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1

 #define CONFIG_SYS_MEMTEST_START	0x10000000
 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
--- a/include/configs/udoo_neo.h
+++ b/include/configs/udoo_neo.h
@@ -112,6 +112,4 @@
 #define CONFIG_FEC_XCV_TYPE             RMII
 #define CONFIG_ETHPRIME                 "FEC0"

-#define CONFIG_PHY_MICREL
-
 #endif				/* __CONFIG_H */
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -59,7 +59,6 @@
 #define IMX_FEC_BASE			ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE		RMII
 #define CONFIG_FEC_MXC_PHYADDR          0
-#define CONFIG_PHY_MICREL

 /* QSPI Configs*/

--- a/include/configs/woodburn_common.h
+++ b/include/configs/woodburn_common.h
@@ -88,7 +88,6 @@
 */
 #define CONFIG_FEC_MXC
 #define IMX_FEC_BASE	FEC_BASE_ADDR
-#define CONFIG_PHY_MICREL
 #define CONFIG_FEC_MXC_PHYADDR	0x1

 #define CONFIG_MII
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -75,8 +75,6 @@
 #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
 #define CONFIG_PHY_ADDR		0	/* PHY address */
 #define CONFIG_PHY_GIGE			/* Include GbE speed/duplex detection */
-#define CONFIG_PHY_MICREL
-#define CONFIG_PHY_MICREL_KSZ90X1

 #define CONFIG_SPEAR_GPIO