From 28e94bb2f7b796f58587752ab018b7d23fdc9061 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 26 Nov 2010 15:45:22 +0100 Subject: [PATCH 1/2] ppc4xx/POST: Handle cached SDRAM correctly in Denali (440EPx) ECC POST This patch fixes a problem in the Denali (440EPx) SDRAM ECC POST test. When cache is enabled in the SDRAM area, the values written to SDRAM need to be flushed from cache to SDRAM using the dcfb instruction. Without this patch the POST ECC test failed. Now its working again on platforms with cache enabled in SDRAM. Signed-off-by: Stefan Roese --- post/cpu/ppc4xx/denali_ecc.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/post/cpu/ppc4xx/denali_ecc.c b/post/cpu/ppc4xx/denali_ecc.c index 50ae7fb8f0..6d14635595 100644 --- a/post/cpu/ppc4xx/denali_ecc.c +++ b/post/cpu/ppc4xx/denali_ecc.c @@ -174,6 +174,7 @@ static int test_ecc(uint32_t ecc_addr) clear_and_enable_ecc(); out_be32(ecc_mem, ECC_PATTERN); out_be32(ecc_mem + 1, ECC_PATTERN); + ppcDcbf((u32)ecc_mem); /* Verify no ECC error reading back */ value = in_be32(ecc_mem); @@ -193,6 +194,7 @@ static int test_ecc(uint32_t ecc_addr) /* Test for correctable error by creating a one-bit error */ out_be32(ecc_mem, ECC_PATTERN_CORR); + ppcDcbf((u32)ecc_mem); clear_and_enable_ecc(); value = in_be32(ecc_mem); disable_ecc(); @@ -212,6 +214,7 @@ static int test_ecc(uint32_t ecc_addr) /* Test for uncorrectable error by creating a two-bit error */ out_be32(ecc_mem, ECC_PATTERN_UNCORR); + ppcDcbf((u32)ecc_mem); clear_and_enable_ecc(); value = in_be32(ecc_mem); disable_ecc(); @@ -232,6 +235,7 @@ static int test_ecc(uint32_t ecc_addr) /* Remove error from SDRAM and enable ECC. */ out_be32(ecc_mem, ECC_PATTERN); + ppcDcbf((u32)ecc_mem); clear_and_enable_ecc(); return ret; From 7920954bd2bd9d49013378a722fb2325cbbeadeb Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Fri, 26 Nov 2010 15:45:34 +0100 Subject: [PATCH 2/2] ppc4xx: Flush complete dcache in relocate_code() When the cache is enabled in SDRAM we need to flush not only the global data area but also the bd_info struct in relocate_code. This patch now flushed the complete dcache (all dcache lines) via flush_dcache() instead of adding a flush_dcache_range() call for bd_info since this is faster. Signed-off-by: Stefan Roese --- arch/powerpc/cpu/ppc4xx/start.S | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 65195f528a..0e75794d22 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -1389,8 +1389,8 @@ in32r: relocate_code: #if defined(CONFIG_4xx_DCACHE) || defined(CONFIG_SYS_INIT_DCACHE_CS) /* - * We need to flush the initial global data (gd_t) before the dcache - * will be invalidated. + * We need to flush the initial global data (gd_t) and bd_info + * before the dcache will be invalidated. */ /* Save registers */ @@ -1398,10 +1398,11 @@ relocate_code: mr r10, r4 mr r11, r5 - /* Flush initial global data range */ - mr r3, r4 - addi r4, r4, GENERATED_GBL_DATA_SIZE@l - bl flush_dcache_range + /* + * Flush complete dcache, this is faster than flushing the + * ranges for global_data and bd_info instead. + */ + bl flush_dcache #if defined(CONFIG_SYS_INIT_DCACHE_CS) /*