fpga: xilinx: add bitstream flags to driver desc
Store a set of supported bitstream types in xilinx_desc structure. It will be used to determine whether an FPGA image is able to be loaded with a given driver. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>
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committed by
Michal Simek
parent
f18adf1065
commit
d7fcbfc19b
@@ -14,7 +14,4 @@
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extern struct xilinx_fpga_op versal_op;
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#define XILINX_VERSAL_DESC \
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{ xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op }
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#endif /* _VERSALPL_H_ */
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@@ -37,6 +37,9 @@ typedef enum { /* typedef xilinx_family */
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max_xilinx_type /* insert all new types before this */
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} xilinx_family; /* end, typedef xilinx_family */
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/* FPGA bitstream supported types */
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#define FPGA_LEGACY BIT(0)
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typedef struct { /* typedef xilinx_desc */
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xilinx_family family; /* part type */
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xilinx_iface iface; /* interface type */
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@@ -45,6 +48,7 @@ typedef struct { /* typedef xilinx_desc */
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int cookie; /* implementation specific cookie */
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struct xilinx_fpga_op *operations; /* operations */
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char *name; /* device name in bitstream */
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int flags; /* compatible flags */
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} xilinx_desc; /* end, typedef xilinx_desc */
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struct xilinx_fpga_op {
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@@ -25,7 +25,6 @@
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extern struct xilinx_fpga_op zynqmp_op;
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#define XILINX_ZYNQMP_DESC \
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{ xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op }
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#define ZYNQMP_FPGA_FLAGS (FPGA_LEGACY)
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#endif /* _ZYNQMPPL_H_ */
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