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Convert CONFIG_SYS_IDE_MAXBUS et al to Kconfig

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This converts the following to Kconfig:
   CONFIG_SYS_IDE_MAXBUS
   CONFIG_SYS_IDE_MAXDEVICE
   CONFIG_SYS_ATA_BASE_ADDR
   CONFIG_SYS_ATA_STRIDE
   CONFIG_SYS_ATA_DATA_OFFSET
   CONFIG_SYS_ATA_REG_OFFSET
   CONFIG_SYS_ATA_ALT_OFFSET
   CONFIG_SYS_ATA_IDE0_OFFSET
   CONFIG_SYS_ATA_IDE1_OFFSET
   CONFIG_ATAPI
   CONFIG_IDE_RESET

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Simon Glass
2022-01-22 05:53:24 -07:00
committed by Tom Rini
parent e30be6e406
commit d2da54bfc4
42 changed files with 246 additions and 113 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
include/ata.h
View File

@@ -19,9 +19,6 @@
* 8-bit (register) and 16-bit (data) accesses might use different
* address spaces. This is implemented by the following definitions.
*/
#ifndef CONFIG_SYS_ATA_STRIDE
#define CONFIG_SYS_ATA_STRIDE 1
#endif
#define ATA_IO_DATA(x) (CONFIG_SYS_ATA_DATA_OFFSET+((x) * CONFIG_SYS_ATA_STRIDE))
#define ATA_IO_REG(x) (CONFIG_SYS_ATA_REG_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE))

13
include/configs/M5253DEMO.h
View File

@@ -23,21 +23,8 @@
#ifdef CONFIG_IDE
/* ATA */
# define CONFIG_IDE_RESET 1
# define CONFIG_IDE_PREINIT 1
# define CONFIG_ATAPI
# undef CONFIG_LBA48
# define CONFIG_SYS_IDE_MAXBUS 1
# define CONFIG_SYS_IDE_MAXDEVICE 2
# define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800)
# define CONFIG_SYS_ATA_IDE0_OFFSET 0
# define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */
# define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
# define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
# define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
#endif
#define CONFIG_DRIVER_DM9000

9
include/configs/coreboot.h
View File

@@ -22,14 +22,5 @@
"stderr=serial,vidconsole\0"
/* ATA/IDE support */
#define CONFIG_SYS_IDE_MAXBUS 2
#define CONFIG_SYS_IDE_MAXDEVICE 4
#define CONFIG_SYS_ATA_BASE_ADDR 0
#define CONFIG_SYS_ATA_DATA_OFFSET 0
#define CONFIG_SYS_ATA_REG_OFFSET 0
#define CONFIG_SYS_ATA_ALT_OFFSET 0
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
#define CONFIG_ATAPI
#endif /* __CONFIG_H */

8
include/configs/edminiv2.h
View File

@@ -110,20 +110,12 @@
#ifdef CONFIG_IDE
#define __io
/* Data, registers and alternate blocks are at the same offset */
#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
/* Each 8-bit ATA register is aligned to a 4-bytes address */
#define CONFIG_SYS_ATA_STRIDE 4
/* Controller supports 48-bits LBA addressing */
#define CONFIG_LBA48
/* A single bus, a single device */
#define CONFIG_SYS_IDE_MAXBUS 1
#define CONFIG_SYS_IDE_MAXDEVICE 1
/* ATA registers base is at SATA controller base */
#define CONFIG_SYS_ATA_BASE_ADDR ORION5X_SATA_BASE
/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
#define CONFIG_SYS_ATA_IDE0_OFFSET ORION5X_SATA_PORT1_OFFSET
/* end of IDE defines */
#endif /* CMD_IDE */

9
include/configs/efi-x86_payload.h
View File

@@ -19,14 +19,5 @@
"stderr=serial,vidconsole\0"
/* ATA/IDE support */
#define CONFIG_SYS_IDE_MAXBUS 2
#define CONFIG_SYS_IDE_MAXDEVICE 4
#define CONFIG_SYS_ATA_BASE_ADDR 0
#define CONFIG_SYS_ATA_DATA_OFFSET 0
#define CONFIG_SYS_ATA_REG_OFFSET 0
#define CONFIG_SYS_ATA_ALT_OFFSET 0
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
#define CONFIG_ATAPI
#endif /* __CONFIG_H */

2
include/configs/ib62x0.h
View File

@@ -40,8 +40,6 @@
*/
#ifdef CONFIG_IDE
#define __io
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
#endif /* CONFIG_IDE */
#endif /* _CONFIG_IB62x0_H */

2
include/configs/lacie_kw.h
View File

@@ -9,8 +9,6 @@
#include "mv-common.h"
/* Remove or override few declarations from mv-common.h */
#undef CONFIG_SYS_IDE_MAXBUS
#undef CONFIG_SYS_IDE_MAXDEVICE
/*
* Enable platform initialisation via misc_init_r() function

6
include/configs/malta.h
View File

@@ -63,12 +63,6 @@
/*
* IDE/ATA
*/
#define CONFIG_SYS_IDE_MAXBUS 1
#define CONFIG_SYS_IDE_MAXDEVICE 2
#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
#define CONFIG_SYS_ATA_DATA_OFFSET 0
#define CONFIG_SYS_ATA_REG_OFFSET 0
/*
* Commands

4
include/configs/openrd.h
View File

@@ -59,9 +59,5 @@
/*
* SATA Driver configuration
*/
#ifdef CONFIG_MVSATA_IDE
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#define CONFIG_SYS_ATA_IDE1_OFFSET MV_SATA_PORT1_OFFSET
#endif /*CONFIG_MVSATA_IDE*/
#endif /* _CONFIG_OPENRD_BASE_H */

9
include/configs/qemu-x86.h
View File

@@ -33,15 +33,6 @@
* - Only legacy IDE controller is supported for QEMU '-M pc' target
* - AHCI controller is supported for QEMU '-M q35' target
*/
#define CONFIG_SYS_IDE_MAXBUS 2
#define CONFIG_SYS_IDE_MAXDEVICE 4
#define CONFIG_SYS_ATA_BASE_ADDR 0
#define CONFIG_SYS_ATA_DATA_OFFSET 0
#define CONFIG_SYS_ATA_REG_OFFSET 0
#define CONFIG_SYS_ATA_ALT_OFFSET 0
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
#define CONFIG_ATAPI
#define CONFIG_SPL_BOARD_LOAD_IMAGE

8
include/configs/r2dplus.h
View File

@@ -32,15 +32,7 @@
/*
* IDE support
*/
#define CONFIG_IDE_RESET 1
#define CONFIG_SYS_PIO_MODE 1
#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
#define CONFIG_SYS_IDE_MAXDEVICE 1
#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
/*
* SuperH PCI Bridge Configration

11
include/configs/sandbox.h
View File

@@ -29,17 +29,6 @@
#define CONFIG_SANDBOX_SDL
#endif
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_IDE_MAXBUS 1
#define CONFIG_SYS_ATA_IDE0_OFFSET 0
#define CONFIG_SYS_IDE_MAXDEVICE 2
#define CONFIG_SYS_ATA_BASE_ADDR 0x100
#define CONFIG_SYS_ATA_DATA_OFFSET 0
#define CONFIG_SYS_ATA_REG_OFFSET 1
#define CONFIG_SYS_ATA_ALT_OFFSET 2
#define CONFIG_SYS_ATA_STRIDE 4
#endif
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_DEVICE 2
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 8