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Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Browse Source
This commit is contained in:
Tom Rini
2020-04-20 08:45:27 -04:00
parent 8d5d3bcf3c 931edc6efb
commit d1bbf833aa
92 changed files with 3152 additions and 491 deletions
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51
board/dhelectronics/dh_imx6/dh_imx6.c
View File

@@ -28,10 +28,7 @@
#include <fsl_esdhc_imx.h>
#include <fuse.h>
#include <i2c_eeprom.h>
#include <miiphy.h>
#include <mmc.h>
#include <net.h>
#include <netdev.h>
#include <usb.h>
#include <usb/ehci-ci.h>
@@ -52,24 +49,6 @@ int overwrite_console(void)
return 1;
}
#ifdef CONFIG_FEC_MXC
static void eth_phy_reset(void)
{
/* Reset PHY */
gpio_direction_output(IMX_GPIO_NR(5, 0) , 0);
udelay(500);
gpio_set_value(IMX_GPIO_NR(5, 0), 1);
/* Enable VIO */
gpio_direction_output(IMX_GPIO_NR(1, 7) , 0);
/*
* KSZ9021 PHY needs at least 10 mSec after PHY reset
* is released to stabilize
*/
mdelay(10);
}
static int setup_fec_clock(void)
{
struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
@@ -80,34 +59,6 @@ static int setup_fec_clock(void)
return enable_fec_anatop_clock(0, ENET_50MHZ);
}
int board_eth_init(bd_t *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
struct phy_device *phydev = NULL;
gpio_request(IMX_GPIO_NR(5, 0), "PHY-reset");
gpio_request(IMX_GPIO_NR(1, 7), "VIO");
setup_fec_clock();
eth_phy_reset();
bus = fec_get_miibus(base, -1);
if (!bus)
return -EINVAL;
/* Scan PHY 0 */
phydev = phy_find_by_mask(bus, 0xf, PHY_INTERFACE_MODE_RGMII);
if (!phydev) {
printf("Ethernet PHY not found!\n");
return -EINVAL;
}
return fec_probe(bis, -1, base, bus, phydev);
}
#endif
#ifdef CONFIG_USB_EHCI_MX6
static void setup_usb(void)
{
@@ -190,6 +141,8 @@ int board_init(void)
setup_dhcom_mac_from_fuse();
setup_fec_clock();
return 0;
}

6
board/freescale/imx8mm_evk/imx8mm_evk.c
View File

@@ -15,7 +15,11 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
gd->ram_size = PHYS_SDRAM_SIZE;
/* rom_pointer[1] contains the size of TEE occupies */
if (rom_pointer[1])
gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
else
gd->ram_size = PHYS_SDRAM_SIZE;
return 0;
}

18
board/freescale/imx8qxp_mek/spl.c
View File

@@ -12,9 +12,24 @@
#include <dm/uclass-internal.h>
#include <dm/device-internal.h>
#include <dm/lists.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <asm/arch/sci/sci.h>
#include <asm/arch/imx8-pins.h>
#include <asm/arch/iomux.h>
DECLARE_GLOBAL_DATA_PTR;
#define GPIO_PAD_CTRL ((SC_PAD_CONFIG_NORMAL << PADRING_CONFIG_SHIFT) | \
(SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \
(SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \
(SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT))
#define USDHC2_SD_PWR IMX_GPIO_NR(4, 19)
static iomux_cfg_t usdhc2_sd_pwr[] = {
SC_P_USDHC1_RESET_B | MUX_PAD_CTRL(GPIO_PAD_CTRL),
};
void spl_board_init(void)
{
struct udevice *dev;
@@ -32,6 +47,9 @@ void spl_board_init(void)
timer_init();
imx8_iomux_setup_multiple_pads(usdhc2_sd_pwr, ARRAY_SIZE(usdhc2_sd_pwr));
gpio_direction_output(USDHC2_SD_PWR, 0);
preloader_console_init();
puts("Normal Boot\n");

22
board/freescale/imxrt1020-evk/Kconfig Normal file
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@@ -0,0 +1,22 @@
if TARGET_IMXRT1020_EVK
config SYS_BOARD
string
default "imxrt1020-evk"
config SYS_VENDOR
string
default "freescale"
config SYS_SOC
string
default "imxrt1020"
config SYS_CONFIG_NAME
string
default "imxrt1020-evk"
config IMX_CONFIG
default "board/freescale/imxrt1020-evk/imximage.cfg"
endif

6
board/freescale/imxrt1020-evk/MAINTAINERS Normal file
View File

@@ -0,0 +1,6 @@
IMXRT1020 EVALUATION KIT
M: Giulio Benetti <giulio.benetti@benettiengineering.com>
S: Maintained
F: board/freescale/imxrt1020-evk
F: include/configs/imxrt1020-evk.h
F: configs/imxrt1020-evk_defconfig

6
board/freescale/imxrt1020-evk/Makefile Normal file
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@@ -0,0 +1,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2020
# Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
obj-y := imxrt1020-evk.o

31
board/freescale/imxrt1020-evk/README Normal file
View File

@@ -0,0 +1,31 @@
How to use U-Boot on NXP i.MXRT1020 EVK
-----------------------------------------------
- Build U-Boot for i.MXRT1020 EVK:
$ make mrproper
$ make imxrt1020-evk_defconfig
$ make
This will generate the SPL image called SPL and the u-boot.img.
- Flash the SPL image into the micro SD card:
sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
- Flash the u-boot.img image into the micro SD card:
sudo dd if=u-boot.img of=/dev/sdb bs=1k seek=128; sync
- Jumper settings:
SW8: 0 1 1 0
where 0 means bottom position and 1 means top position (from the
switch label numbers reference).
- Connect the USB cable between the EVK and the PC for the console.
(The USB console connector is the one close the ethernet connector)
- Insert the micro SD card in the board, power it up and U-Boot messages should
come up.

36
board/freescale/imxrt1020-evk/imximage.cfg Normal file
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@@ -0,0 +1,36 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2020
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */
IMAGE_VERSION 2
/*
* Boot Device : one of
* spi/sd/nand/onenand, qspi/nor
*/
BOOT_FROM sd
/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
/* Set all FlexRAM as OCRAM(01b) */
DATA 4 0x400AC044 0x00005555
/* Use FLEXRAM_BANK_CFG to config FlexRAM */
SET_BIT 4 0x400AC040 0x4

81
board/freescale/imxrt1020-evk/imxrt1020-evk.c Normal file
View File

@@ -0,0 +1,81 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2020
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
#include <common.h>
#include <dm.h>
#include <ram.h>
#include <spl.h>
#include <asm/io.h>
#include <asm/armv7m.h>
DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
#ifndef CONFIG_SUPPORT_SPL
int rv;
struct udevice *dev;
rv = uclass_get_device(UCLASS_RAM, 0, &dev);
if (rv) {
debug("DRAM init failed: %d\n", rv);
return rv;
}
#endif
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
}
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{
debug("SPL: booting kernel\n");
/* break into full u-boot on 'c' */
return serial_tstc() && serial_getc() == 'c';
}
#endif
int spl_dram_init(void)
{
struct udevice *dev;
int rv;
rv = uclass_get_device(UCLASS_RAM, 0, &dev);
if (rv)
debug("DRAM init failed: %d\n", rv);
return rv;
}
void spl_board_init(void)
{
spl_dram_init();
preloader_console_init();
arch_cpu_init(); /* to configure mpu for sdram rw permissions */
}
u32 spl_boot_device(void)
{
return BOOT_DEVICE_MMC1;
}
#endif
u32 get_board_rev(void)
{
return 0;
}
int board_init(void)
{
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
return 0;
}

50
board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
View File

@@ -196,56 +196,6 @@ int board_ehci_hcd_init(int port)
#endif
#ifdef CONFIG_FEC_MXC
/*
* pin conflicts for fec1 and fec2, GPIO1_IO06 and GPIO1_IO07 can only
* be used for ENET1 or ENET2, cannot be used for both.
*/
static iomux_v3_cfg_t const fec1_pads[] = {
MX6_PAD_GPIO1_IO06__ENET1_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL),
MX6_PAD_GPIO1_IO07__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_TX_DATA1__ENET1_TDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_TX_EN__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
MX6_PAD_ENET1_RX_DATA0__ENET1_RDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_RX_DATA1__ENET1_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_RX_ER__ENET1_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET1_RX_EN__ENET1_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
};
static iomux_v3_cfg_t const fec2_pads[] = {
MX6_PAD_GPIO1_IO06__ENET2_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL),
MX6_PAD_GPIO1_IO07__ENET2_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
MX6_PAD_ENET2_TX_EN__ENET2_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET2_RX_EN__ENET2_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET2_RX_ER__ENET2_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL),
};
static void setup_iomux_fec(int fec_id)
{
if (fec_id == 0)
imx_iomux_v3_setup_multiple_pads(fec1_pads,
ARRAY_SIZE(fec1_pads));
else
imx_iomux_v3_setup_multiple_pads(fec2_pads,
ARRAY_SIZE(fec2_pads));
}
int board_eth_init(bd_t *bis)
{
setup_iomux_fec(CONFIG_FEC_ENET_DEV);
return fecmxc_initialize_multi(bis, CONFIG_FEC_ENET_DEV,
CONFIG_FEC_MXC_PHYADDR, IMX_FEC_BASE);
}
static int setup_fec(int fec_id)
{
struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;

47
board/freescale/mx6ullevk/mx6ullevk.c
View File

@@ -19,6 +19,7 @@
#include <fsl_esdhc_imx.h>
#include <linux/sizes.h>
#include <mmc.h>
#include <miiphy.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -60,11 +61,57 @@ int board_early_init_f(void)
return 0;
}
#ifdef CONFIG_FEC_MXC
static int setup_fec(int fec_id)
{
struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
int ret;
if (fec_id == 0) {
/*
* Use 50MHz anatop loopback REF_CLK1 for ENET1,
* clear gpr1[13], set gpr1[17].
*/
clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
} else {
/*
* Use 50MHz anatop loopback REF_CLK2 for ENET2,
* clear gpr1[14], set gpr1[18].
*/
clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
}
ret = enable_fec_anatop_clock(fec_id, ENET_50MHZ);
if (ret)
return ret;
enable_enet_clk(1);
return 0;
}
int board_phy_config(struct phy_device *phydev)
{
phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190);
if (phydev->drv->config)
phydev->drv->config(phydev);
return 0;
}
#endif
int board_init(void)
{
/* Address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifdef CONFIG_FEC_MXC
setup_fec(CONFIG_FEC_ENET_DEV);
#endif
return 0;
}

2
board/k+p/kp_imx53/kp_imx53.c
View File

@@ -48,7 +48,7 @@ static int power_init(void)
struct udevice *dev;
int ret;
ret = pmic_get("mc34708", &dev);
ret = pmic_get("mc34708@8", &dev);
if (ret) {
printf("%s: mc34708 not found !\n", __func__);
return ret;

7
board/toradex/verdin-imx8mm/verdin-imx8mm.c
View File

@@ -5,6 +5,7 @@
#include <common.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <miiphy.h>
#include <netdev.h>
@@ -13,7 +14,11 @@ DECLARE_GLOBAL_DATA_PTR;
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
/* rom_pointer[1] contains the size of TEE occupies */
if (rom_pointer[1])
gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
else
gd->ram_size = PHYS_SDRAM_SIZE;
return 0;
}

15
board/tqc/tqma6/Kconfig
View File

@@ -63,6 +63,17 @@ choice
config MBA6
bool "TQMa6 on MBa6 Starterkit"
select DM_ETH
select USB
select DM_USB
select CMD_USB
select USB_STORAGE
select USB_HOST_ETHER
select USB_ETHER_SMSC95XX
select PHYLIB
select PHY_MICREL
select PHY_MICREL_KSZ90X1
select MXC_UART
help
Select the MBa6 starterkit. This features a GigE Phy, USB, SD-Card
etc.
@@ -74,6 +85,10 @@ config WRU4
endchoice
config SYS_TEXT_BASE
default 0x2fc00000 if TQMA6S
default 0x4fc00000 if TQMA6Q || TQMA6DL
config IMX_CONFIG
default "board/tqc/tqma6/tqma6q.cfg" if TQMA6Q
default "board/tqc/tqma6/tqma6dl.cfg" if TQMA6DL

12
board/tqc/tqma6/tqma6.c
View File

@@ -60,6 +60,7 @@ int dram_init(void)
static const uint16_t tqma6_emmc_dsr = 0x0100;
#ifndef CONFIG_DM_MMC
/* eMMC on USDHCI3 always present */
static iomux_v3_cfg_t const tqma6_usdhc3_pads[] = {
NEW_PAD_CTRL(MX6_PAD_SD3_CLK__SD3_CLK, USDHC_PAD_CTRL),
@@ -132,7 +133,9 @@ int board_mmc_init(bd_t *bis)
return 0;
}
#endif
#ifndef CONFIG_DM_SPI
static iomux_v3_cfg_t const tqma6_ecspi1_pads[] = {
/* SS1 */
NEW_PAD_CTRL(MX6_PAD_EIM_D19__GPIO3_IO19, SPI_PAD_CTRL),
@@ -164,7 +167,9 @@ int board_spi_cs_gpio(unsigned bus, unsigned cs)
(cs == CONFIG_SF_DEFAULT_CS)) ? TQMA6_SF_CS_GPIO : -1;
}
#endif
#endif
#ifdef CONFIG_SYS_I2C
static struct i2c_pads_info tqma6_i2c3_pads = {
/* I2C3: on board LM75, M24C64, */
.scl = {
@@ -194,6 +199,7 @@ static void tqma6_setup_i2c(void)
if (ret)
printf("setup I2C3 failed: %d\n", ret);
}
#endif
int board_early_init_f(void)
{
@@ -205,8 +211,12 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
#ifndef CONFIG_DM_SPI
tqma6_iomuxc_spi();
#endif
#ifdef CONFIG_SYS_I2C
tqma6_setup_i2c();
#endif
tqma6_bb_board_init();
@@ -235,6 +245,7 @@ static const char *tqma6_get_boardname(void)
};
}
#ifdef CONFIG_POWER
/* setup board specific PMIC */
int power_init_board(void)
{
@@ -251,6 +262,7 @@ int power_init_board(void)
return 0;
}
#endif
int board_late_init(void)
{

171
board/tqc/tqma6/tqma6_mba6.c
View File

@@ -68,13 +68,6 @@
#endif
#define ENET_RX_PAD_CTRL (PAD_CTL_DSE_34ohm)
#define ENET_TX_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_34ohm)
#define ENET_CLK_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH | \
PAD_CTL_DSE_34ohm)
#define ENET_MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
PAD_CTL_DSE_60ohm)
/* disable on die termination for RGMII */
#define IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE 0x00000000
/* optimised drive strength for 1.0 .. 1.3 V signal on RGMII */
@@ -82,34 +75,6 @@
/* optimised drive strength for 1.3 .. 2.5 V signal on RGMII */
#define IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V 0x000C0000
#define ENET_PHY_RESET_GPIO IMX_GPIO_NR(1, 25)
static iomux_v3_cfg_t const mba6_enet_pads[] = {
NEW_PAD_CTRL(MX6_PAD_ENET_MDIO__ENET_MDIO, ENET_MDIO_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_ENET_MDC__ENET_MDC, ENET_MDIO_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_TXC__RGMII_TXC, ENET_TX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_TD0__RGMII_TD0, ENET_TX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_TD1__RGMII_TD1, ENET_TX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_TD2__RGMII_TD2, ENET_TX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_TD3__RGMII_TD3, ENET_TX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL,
ENET_TX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_ENET_REF_CLK__ENET_TX_CLK, ENET_CLK_PAD_CTRL),
/*
* these pins are also used for config strapping by phy
*/
NEW_PAD_CTRL(MX6_PAD_RGMII_RD0__RGMII_RD0, ENET_RX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_RD1__RGMII_RD1, ENET_RX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_RD2__RGMII_RD2, ENET_RX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_RD3__RGMII_RD3, ENET_RX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_RXC__RGMII_RXC, ENET_RX_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL,
ENET_RX_PAD_CTRL),
/* KSZ9031 PHY Reset */
NEW_PAD_CTRL(MX6_PAD_ENET_CRS_DV__GPIO1_IO25, GPIO_OUT_PAD_CTRL),
};
static void mba6_setup_iomuxc_enet(void)
{
struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
@@ -121,22 +86,6 @@ static void mba6_setup_iomuxc_enet(void)
(void *)IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM);
__raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V,
(void *)IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII);
imx_iomux_v3_setup_multiple_pads(mba6_enet_pads,
ARRAY_SIZE(mba6_enet_pads));
/* Reset PHY */
gpio_direction_output(ENET_PHY_RESET_GPIO , 0);
/* Need delay 10ms after power on according to KSZ9031 spec */
mdelay(10);
gpio_set_value(ENET_PHY_RESET_GPIO, 1);
/*
* KSZ9031 manual: 100 usec wait time after reset before communication
* over MDIO
* BUGBUG: hardware has an RC const that needs > 10 msec from 0->1 on
* reset before the phy sees a high level
*/
mdelay(15);
}
static iomux_v3_cfg_t const mba6_uart2_pads[] = {
@@ -150,91 +99,14 @@ static void mba6_setup_iomuxc_uart(void)
ARRAY_SIZE(mba6_uart2_pads));
}
#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4)
#define USDHC2_WP_GPIO IMX_GPIO_NR(1, 2)
int tqma6_bb_board_mmc_getcd(struct mmc *mmc)
int board_mmc_get_env_dev(int devno)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
int ret = 0;
if (cfg->esdhc_base == USDHC2_BASE_ADDR)
ret = !gpio_get_value(USDHC2_CD_GPIO);
return ret;
}
int tqma6_bb_board_mmc_getwp(struct mmc *mmc)
{
struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
int ret = 0;
if (cfg->esdhc_base == USDHC2_BASE_ADDR)
ret = gpio_get_value(USDHC2_WP_GPIO);
return ret;
}
static struct fsl_esdhc_cfg mba6_usdhc_cfg = {
.esdhc_base = USDHC2_BASE_ADDR,
.max_bus_width = 4,
};
static iomux_v3_cfg_t const mba6_usdhc2_pads[] = {
NEW_PAD_CTRL(MX6_PAD_SD2_CLK__SD2_CLK, USDHC_CLK_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_SD2_CMD__SD2_CMD, USDHC_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_SD2_DAT0__SD2_DATA0, USDHC_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_SD2_DAT1__SD2_DATA1, USDHC_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_SD2_DAT2__SD2_DATA2, USDHC_PAD_CTRL),
NEW_PAD_CTRL(MX6_PAD_SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL),
/* CD */
NEW_PAD_CTRL(MX6_PAD_GPIO_4__GPIO1_IO04, GPIO_IN_PAD_CTRL),
/* WP */
NEW_PAD_CTRL(MX6_PAD_GPIO_2__GPIO1_IO02, GPIO_IN_PAD_CTRL),
};
int tqma6_bb_board_mmc_init(bd_t *bis)
{
imx_iomux_v3_setup_multiple_pads(mba6_usdhc2_pads,
ARRAY_SIZE(mba6_usdhc2_pads));
gpio_direction_input(USDHC2_CD_GPIO);
gpio_direction_input(USDHC2_WP_GPIO);
mba6_usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
if (fsl_esdhc_initialize(bis, &mba6_usdhc_cfg))
puts("Warning: failed to initialize SD\n");
return 0;
}
static struct i2c_pads_info mba6_i2c1_pads = {
/* I2C1: MBa6x */
.scl = {
.i2c_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT9__I2C1_SCL,
I2C_PAD_CTRL),
.gpio_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT9__GPIO5_IO27,
I2C_PAD_CTRL),
.gp = IMX_GPIO_NR(5, 27)
},
.sda = {
.i2c_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT8__I2C1_SDA,
I2C_PAD_CTRL),
.gpio_mode = NEW_PAD_CTRL(MX6_PAD_CSI0_DAT8__GPIO5_IO26,
I2C_PAD_CTRL),
.gp = IMX_GPIO_NR(5, 26)
}
};
static void mba6_setup_i2c(void)
{
int ret;
/*
* use logical index for bus, e.g. I2C1 -> 0
* warn on error
* This assumes that the baseboard registered
* the boot device first ...
* Note: SDHC3 == idx2
*/
ret = setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mba6_i2c1_pads);
if (ret)
printf("setup I2C1 failed: %d\n", ret);
return (2 == devno) ? 0 : 1;
}
int board_phy_config(struct phy_device *phydev)
@@ -284,37 +156,6 @@ int board_phy_config(struct phy_device *phydev)
return 0;
}
int board_eth_init(bd_t *bis)
{
uint32_t base = IMX_FEC_BASE;
struct mii_dev *bus = NULL;
struct phy_device *phydev = NULL;
int ret;
bus = fec_get_miibus(base, -1);
if (!bus)
return -EINVAL;
/* scan phy */
phydev = phy_find_by_mask(bus, (0xf << CONFIG_FEC_MXC_PHYADDR),
PHY_INTERFACE_MODE_RGMII);
if (!phydev) {
ret = -EINVAL;
goto free_bus;
}
ret = fec_probe(bis, -1, base, bus, phydev);
if (ret)
goto free_phydev;
return 0;
free_phydev:
free(phydev);
free_bus:
free(bus);
return ret;
}
int tqma6_bb_board_early_init_f(void)
{
mba6_setup_iomuxc_uart();
@@ -324,8 +165,6 @@ int tqma6_bb_board_early_init_f(void)
int tqma6_bb_board_init(void)
{
mba6_setup_i2c();
/* do it here - to have reset completed */
mba6_setup_iomuxc_enet();
return 0;

29
board/wandboard/wandboard.c
View File

@@ -369,7 +369,7 @@ int power_init_board(void)
reg = pmic_reg_read(dev, PFUZE100_DEVICEID);
if (reg < 0) {
printf("pmic_reg_read() ret %d\n", reg);
debug("pmic_reg_read() ret %d\n", reg);
return 0;
}
printf("PMIC: PFUZE100 ID=0x%02x\n", reg);
@@ -404,6 +404,7 @@ static const struct boot_mode board_boot_modes[] = {
static bool is_revc1(void)
{
SETUP_IOMUX_PADS(rev_detection_pad);
gpio_request(REV_DETECTION, "REV_DETECT");
gpio_direction_input(REV_DETECTION);
if (gpio_get_value(REV_DETECTION))
@@ -442,6 +443,14 @@ int board_late_init(void)
env_set("board_name", "B1");
#endif
setup_iomux_enet();
if (is_revd1())
puts("Board: Wandboard rev D1\n");
else if (is_revc1())
puts("Board: Wandboard rev C1\n");
else
puts("Board: Wandboard rev B1\n");
return 0;
}
@@ -466,31 +475,17 @@ int board_init(void)
return 0;
}
int checkboard(void)
{
gpio_request(REV_DETECTION, "REV_DETECT");
if (is_revd1())
puts("Board: Wandboard rev D1\n");
else if (is_revc1())
puts("Board: Wandboard rev C1\n");
else
puts("Board: Wandboard rev B1\n");
return 0;
}
#ifdef CONFIG_SPL_LOAD_FIT
int board_fit_config_name_match(const char *name)
{
if (is_mx6dq()) {
if (!strcmp(name, "imx6q-wandboard-revb1"))
if (!strcmp(name, "imx6q-wandboard-revd1"))
return 0;
} else if (is_mx6dqp()) {
if (!strcmp(name, "imx6qp-wandboard-revd1"))
return 0;
} else if (is_mx6dl() || is_mx6solo()) {
if (!strcmp(name, "imx6dl-wandboard-revb1"))
if (!strcmp(name, "imx6dl-wandboard-revd1"))
return 0;
}