Merge commit 'wd/master'
This commit is contained in:
Jon Loeliger
@@ -54,14 +54,17 @@
|
||||
#define MMC_SPI_CRC_ON (0x01UL << 1)
|
||||
|
||||
/* MMC_CMDAT */
|
||||
#define MMC_CMDAT_SD_4DAT (0x0001UL << 8)
|
||||
#define MMC_CMDAT_MMC_DMA_EN (0x0001UL << 7)
|
||||
#define MMC_CMDAT_INIT (0x0001UL << 6)
|
||||
#define MMC_CMDAT_BUSY (0x0001UL << 5)
|
||||
#define MMC_CMDAT_BCR (0x0003UL << 5)
|
||||
#define MMC_CMDAT_STREAM (0x0001UL << 4)
|
||||
#define MMC_CMDAT_BLOCK (0x0000UL << 4)
|
||||
#define MMC_CMDAT_WRITE (0x0001UL << 3)
|
||||
#define MMC_CMDAT_READ (0x0000UL << 3)
|
||||
#define MMC_CMDAT_DATA_EN (0x0001UL << 2)
|
||||
#define MMC_CMDAT_R0 (0)
|
||||
#define MMC_CMDAT_R1 (0x0001UL)
|
||||
#define MMC_CMDAT_R2 (0x0002UL)
|
||||
#define MMC_CMDAT_R3 (0x0003UL)
|
||||
@@ -111,6 +114,7 @@
|
||||
#define MMC_CMD_SEND_OP_COND 1
|
||||
#define MMC_CMD_ALL_SEND_CID 2
|
||||
#define MMC_CMD_SET_RCA 3
|
||||
#define MMC_CMD_SELECT_CARD 7
|
||||
#define MMC_CMD_SEND_CSD 9
|
||||
#define MMC_CMD_SEND_CID 10
|
||||
#define MMC_CMD_SEND_STATUS 13
|
||||
@@ -118,6 +122,10 @@
|
||||
#define MMC_CMD_READ_BLOCK 17
|
||||
#define MMC_CMD_RD_BLK_MULTI 18
|
||||
#define MMC_CMD_WRITE_BLOCK 24
|
||||
#define MMC_CMD_APP_CMD 55
|
||||
|
||||
#define SD_CMD_APP_SET_BUS_WIDTH 6
|
||||
#define SD_CMD_APP_OP_COND 41
|
||||
|
||||
#define MMC_MAX_BLOCK_SIZE 512
|
||||
|
||||
@@ -158,42 +166,41 @@ typedef struct mmc_cid
|
||||
|
||||
typedef struct mmc_csd
|
||||
{
|
||||
uchar ecc:2,
|
||||
file_format:2,
|
||||
tmp_write_protect:1,
|
||||
perm_write_protect:1,
|
||||
copy:1,
|
||||
file_format_grp:1;
|
||||
uint64_t content_prot_app:1,
|
||||
rsvd3:4,
|
||||
write_bl_partial:1,
|
||||
write_bl_len:4,
|
||||
r2w_factor:3,
|
||||
default_ecc:2,
|
||||
wp_grp_enable:1,
|
||||
wp_grp_size:5,
|
||||
erase_grp_mult:5,
|
||||
erase_grp_size:5,
|
||||
c_size_mult1:3,
|
||||
vdd_w_curr_max:3,
|
||||
vdd_w_curr_min:3,
|
||||
vdd_r_curr_max:3,
|
||||
vdd_r_curr_min:3,
|
||||
c_size:12,
|
||||
rsvd2:2,
|
||||
dsr_imp:1,
|
||||
read_blk_misalign:1,
|
||||
write_blk_misalign:1,
|
||||
read_bl_partial:1;
|
||||
|
||||
ushort read_bl_len:4,
|
||||
ccc:12;
|
||||
uchar tran_speed;
|
||||
uchar nsac;
|
||||
uchar taac;
|
||||
uchar rsvd1:2,
|
||||
spec_vers:4,
|
||||
csd_structure:2;
|
||||
uint8_t csd_structure:2,
|
||||
spec_ver:4,
|
||||
rsvd1:2;
|
||||
uint8_t taac;
|
||||
uint8_t nsac;
|
||||
uint8_t tran_speed;
|
||||
uint16_t ccc:12,
|
||||
read_bl_len:4;
|
||||
uint64_t read_bl_partial:1,
|
||||
write_blk_misalign:1,
|
||||
read_blk_misalign:1,
|
||||
dsr_imp:1,
|
||||
rsvd2:2,
|
||||
c_size:12,
|
||||
vdd_r_curr_min:3,
|
||||
vdd_r_curr_max:3,
|
||||
vdd_w_curr_min:3,
|
||||
vdd_w_curr_max:3,
|
||||
c_size_mult:3,
|
||||
erase_blk_en:1,
|
||||
sector_size:7,
|
||||
wp_grp_size:7,
|
||||
wp_grp_enable:1,
|
||||
default_ecc:2,
|
||||
r2w_factor:3,
|
||||
write_bl_len:4,
|
||||
write_bl_partial:1,
|
||||
rsvd3:4,
|
||||
content_prot_app:1;
|
||||
uint8_t file_format_grp:1,
|
||||
copy:1,
|
||||
perm_write_protect:1,
|
||||
tmp_write_protect:1,
|
||||
file_format:2,
|
||||
ecc:2;
|
||||
} mmc_csd_t;
|
||||
|
||||
|
||||
|
||||
@@ -1288,15 +1288,15 @@ typedef void (*ExcpHndlr) (void) ;
|
||||
#define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3)
|
||||
#define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2)
|
||||
|
||||
#define GPLR(x) __REG2(0x40E00000 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
|
||||
#define GPDR(x) __REG2(0x40E0000C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
|
||||
#define GPSR(x) __REG2(0x40E00018 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
|
||||
#define GPCR(x) __REG2(0x40E00024 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
|
||||
#define GRER(x) __REG2(0x40E00030 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
|
||||
#define GFER(x) __REG2(0x40E0003C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
|
||||
#define GEDR(x) __REG2(0x40E00048 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
|
||||
#define GAFR(x) __REG2((((x) & 0x7f) < 96) ? 0x40E00054 : \
|
||||
((((x) & 0x7f) < 112) ? 0x40E0006C : 0x40E00070),((x) & 0x60) >> 3)
|
||||
#define GPLR(x) (*((((x) & 0x7f) < 96) ? &_GPLR(x) : &GPLR3))
|
||||
#define GPDR(x) (*((((x) & 0x7f) < 96) ? &_GPDR(x) : &GPDR3))
|
||||
#define GPSR(x) (*((((x) & 0x7f) < 96) ? &_GPSR(x) : &GPSR3))
|
||||
#define GPCR(x) (*((((x) & 0x7f) < 96) ? &_GPCR(x) : &GPCR3))
|
||||
#define GRER(x) (*((((x) & 0x7f) < 96) ? &_GRER(x) : &GRER3))
|
||||
#define GFER(x) (*((((x) & 0x7f) < 96) ? &_GFER(x) : &GFER3))
|
||||
#define GEDR(x) (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3))
|
||||
#define GAFR(x) (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \
|
||||
((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U)))
|
||||
#else
|
||||
|
||||
#define GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3)
|
||||
|
||||
@@ -479,6 +479,8 @@ ulong get_OPB_freq (void);
|
||||
ulong get_PCI_freq (void);
|
||||
#endif
|
||||
#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_LH7A40X)
|
||||
void s3c2410_irq(void);
|
||||
#define ARM920_IRQ_CALLBACK s3c2410_irq
|
||||
ulong get_FCLK (void);
|
||||
ulong get_HCLK (void);
|
||||
ulong get_PCLK (void);
|
||||
|
||||
@@ -22,8 +22,6 @@
|
||||
* (easy to change)
|
||||
*/
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_405 1 /* This is a PPC405 CPU */
|
||||
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
|
||||
|
||||
|
||||
@@ -28,7 +28,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
#define GTREGREAD(x) 0xffffffff /* needed for debug */
|
||||
|
||||
/*
|
||||
|
||||
@@ -27,9 +27,7 @@
|
||||
|
||||
#define CONFIG_EB_MCF_EV123
|
||||
|
||||
#undef DEBUG
|
||||
#undef CFG_HALT_BEFOR_RAM_JUMP
|
||||
#undef ET_DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options (easy to change)
|
||||
|
||||
@@ -28,7 +28,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
#define GTREGREAD(x) 0xffffffff /* needed for debug */
|
||||
|
||||
/*
|
||||
|
||||
@@ -30,8 +30,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG /* General debug */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
|
||||
@@ -38,8 +38,6 @@
|
||||
#define CONFIG_M52277 /* define processor type */
|
||||
#define CONFIG_M52277EVB /* M52277EVB board */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_MCFUART
|
||||
#define CFG_UART_PORT (0)
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
@@ -37,8 +37,6 @@
|
||||
#define CONFIG_MCF523x /* define processor family */
|
||||
#define CONFIG_M5235 /* define processor type */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_MCFUART
|
||||
#define CFG_UART_PORT (0)
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
@@ -31,8 +31,6 @@
|
||||
#ifndef _M5271EVB_H
|
||||
#define _M5271EVB_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options (easy to change)
|
||||
*/
|
||||
|
||||
@@ -37,8 +37,6 @@
|
||||
#define CONFIG_MCF532x /* define processor family */
|
||||
#define CONFIG_M5329 /* define processor type */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_MCFUART
|
||||
#define CFG_UART_PORT (0)
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
@@ -37,8 +37,6 @@
|
||||
#define CONFIG_MCF532x /* define processor family */
|
||||
#define CONFIG_M5373 /* define processor type */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_MCFUART
|
||||
#define CFG_UART_PORT (0)
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
@@ -38,8 +38,6 @@
|
||||
#define CONFIG_M54455 /* define processor type */
|
||||
#define CONFIG_M54455EVB /* M54455EVB board */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_MCFUART
|
||||
#define CFG_UART_PORT (0)
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
@@ -38,8 +38,6 @@
|
||||
#define CONFIG_M547x /* define processor type */
|
||||
#define CONFIG_M5475 /* define processor type */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_MCFUART
|
||||
#define CFG_UART_PORT (0)
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
@@ -38,8 +38,6 @@
|
||||
#define CONFIG_M548x /* define processor type */
|
||||
#define CONFIG_M5485 /* define processor type */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_MCFUART
|
||||
#define CFG_UART_PORT (0)
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
@@ -25,8 +25,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
*/
|
||||
|
||||
@@ -9,8 +9,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
*/
|
||||
|
||||
@@ -20,8 +20,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
*/
|
||||
|
||||
@@ -29,8 +29,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
*/
|
||||
@@ -356,6 +354,7 @@
|
||||
#define CFG_I2C2_OFFSET 0x3100
|
||||
|
||||
/* SPI */
|
||||
#define CONFIG_MPC8XXX_SPI
|
||||
#define CONFIG_HARD_SPI /* SPI with hardware support */
|
||||
#undef CONFIG_SOFT_SPI /* SPI bit-banged */
|
||||
|
||||
|
||||
@@ -22,8 +22,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
*/
|
||||
|
||||
@@ -17,8 +17,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
*/
|
||||
|
||||
@@ -21,8 +21,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
*/
|
||||
|
||||
@@ -240,8 +240,6 @@
|
||||
#define INTEL_LXT971_PHY 1
|
||||
#endif
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/* Environment */
|
||||
#ifndef CFG_RAMBOOT
|
||||
#if defined(CONFIG_RAM_AS_FLASH)
|
||||
|
||||
@@ -53,8 +53,6 @@
|
||||
#define ERR_LED(code)
|
||||
#endif
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_MPC824X 1
|
||||
#define CONFIG_MPC8245 1
|
||||
#define CONFIG_MVBLUE 1
|
||||
|
||||
@@ -38,7 +38,6 @@
|
||||
#undef CFG_DEVICE_NULLDEV /* null device */
|
||||
#undef CONFIG_SILENT_CONSOLE /* silent console */
|
||||
#undef CFG_CONSOLE_INFO_QUIET /* silent console ? */
|
||||
#undef DEBUG /* debug output code */
|
||||
#undef DEBUG_FLASH /* debug flash code */
|
||||
#undef FLASH_DEBUG /* debug fash code */
|
||||
#undef DEBUG_ENV /* debug environment code */
|
||||
|
||||
@@ -38,7 +38,6 @@
|
||||
#undef CFG_DEVICE_NULLDEV /* null device */
|
||||
#undef CONFIG_SILENT_CONSOLE /* silent console */
|
||||
#undef CFG_CONSOLE_INFO_QUIET /* silent console ? */
|
||||
#undef DEBUG /* debug output code */
|
||||
#undef DEBUG_FLASH /* debug flash code */
|
||||
#undef FLASH_DEBUG /* debug fash code */
|
||||
#undef DEBUG_ENV /* debug environment code */
|
||||
|
||||
@@ -38,7 +38,6 @@
|
||||
#undef CFG_DEVICE_NULLDEV /* null device */
|
||||
#undef CONFIG_SILENT_CONSOLE /* silent console */
|
||||
#undef CFG_CONSOLE_INFO_QUIET /* silent console ? */
|
||||
#undef DEBUG /* debug output code */
|
||||
#undef DEBUG_FLASH /* debug flash code */
|
||||
#undef FLASH_DEBUG /* debug fash code */
|
||||
#undef DEBUG_ENV /* debug environment code */
|
||||
|
||||
@@ -37,8 +37,6 @@
|
||||
|
||||
#define CONFIG_RATTLER /* Analogue&Micro Rattler board */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
|
||||
@@ -181,7 +181,7 @@ extern int tqm834x_num_flash_banks;
|
||||
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
|
||||
|
||||
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
|
||||
#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
|
||||
#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc */
|
||||
|
||||
/*
|
||||
* Serial Port
|
||||
@@ -302,7 +302,7 @@ extern int tqm834x_num_flash_banks;
|
||||
#ifndef CFG_RAMBOOT
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000)
|
||||
#define CFG_ENV_SECT_SIZE 0x20000 /* 256K(one sector) for env */
|
||||
#define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
|
||||
#define CFG_ENV_SIZE 0x2000
|
||||
#else
|
||||
#define CFG_NO_FLASH 1 /* Flash is not usable now */
|
||||
@@ -335,6 +335,7 @@ extern int tqm834x_num_flash_banks;
|
||||
#define CONFIG_CMD_JFFS2
|
||||
#define CONFIG_CMD_MII
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_DHCP
|
||||
|
||||
#if defined(CONFIG_PCI)
|
||||
#define CONFIG_CMD_PCI
|
||||
@@ -557,7 +558,7 @@ extern int tqm834x_num_flash_banks;
|
||||
#define MTDIDS_DEFAULT "nor0=TQM834x-0"
|
||||
|
||||
/* default mtd partition table */
|
||||
#define MTDPARTS_DEFAULT "mtdparts=TQM834x-0:256k(u-boot),128k(env),"\
|
||||
#define MTDPARTS_DEFAULT "mtdparts=TQM834x-0:256k(u-boot),256k(env),"\
|
||||
"1m(kernel),2m(initrd),"\
|
||||
"-(user);"\
|
||||
|
||||
|
||||
@@ -27,9 +27,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define DEBUG
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* Memory map for the ADS5121 board:
|
||||
*
|
||||
@@ -109,25 +106,22 @@
|
||||
* [04:00] DRAM tRPA
|
||||
*/
|
||||
|
||||
#define CFG_MDDRC_SYS_CFG 0xF8604200
|
||||
#define CFG_MDDRC_SYS_CFG_RUN 0xE8604200
|
||||
#define CFG_MDDRC_SYS_CFG_EN 0x30000000
|
||||
#define CFG_MDDRC_TIME_CFG0 0x0000281E
|
||||
#define CFG_MDDRC_TIME_CFG0_RUN 0x01F4281E
|
||||
#define CFG_MDDRC_SYS_CFG 0xF8604A00
|
||||
#define CFG_MDDRC_SYS_CFG_RUN 0xE8604A00
|
||||
#define CFG_MDDRC_SYS_CFG_EN 0xF0000000
|
||||
#define CFG_MDDRC_TIME_CFG0 0x00003D2E
|
||||
#define CFG_MDDRC_TIME_CFG0_RUN 0x06183D2E
|
||||
#define CFG_MDDRC_TIME_CFG1 0x54EC1168
|
||||
#define CFG_MDDRC_TIME_CFG2 0x35210864
|
||||
|
||||
#define CFG_MICRON_NOP 0x01380000
|
||||
#define CFG_MICRON_PCHG_ALL 0x01100400
|
||||
#define CFG_MICRON_MR 0x01000022
|
||||
#define CFG_MICRON_EM2 0x01020000
|
||||
#define CFG_MICRON_EM3 0x01030000
|
||||
#define CFG_MICRON_EN_DLL 0x01010000
|
||||
#define CFG_MICRON_RST_DLL 0x01000932
|
||||
#define CFG_MICRON_RFSH 0x01080000
|
||||
#define CFG_MICRON_INIT_DEV_OP 0x01000832
|
||||
#define CFG_MICRON_INIT_DEV_OP 0x01000432
|
||||
#define CFG_MICRON_OCD_DEFAULT 0x01010780
|
||||
#define CFG_MICRON_OCD_EXIT 0x01010400
|
||||
|
||||
/* DDR Priority Manager Configuration */
|
||||
#define CFG_MDDRCGRP_PM_CFG1 0x000777AA
|
||||
@@ -415,8 +409,9 @@
|
||||
#define CONFIG_OF_BOARD_SETUP 1
|
||||
|
||||
#define OF_CPU "PowerPC,5121@0"
|
||||
#define OF_SOC "soc5121@80000000"
|
||||
#define OF_SOC "soc@80000000"
|
||||
#define OF_SOC_OLD "soc5121@80000000"
|
||||
#define OF_TBCLK (bd->bi_busfreq / 4)
|
||||
#define OF_STDOUT_PATH "/soc5121@80000000/serial@11300"
|
||||
#define OF_STDOUT_PATH "/soc@80000000/serial@11300"
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
@@ -29,8 +29,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
|
||||
@@ -170,8 +170,8 @@
|
||||
|
||||
#define CONFIG_HAS_DATAFLASH 1
|
||||
#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
|
||||
#define CFG_MAX_DATAFLASH_BANKS 2
|
||||
#define CFG_MAX_DATAFLASH_PAGES 16384
|
||||
#define CFG_MAX_DATAFLASH_BANKS 2
|
||||
#define CFG_MAX_DATAFLASH_PAGES 16384
|
||||
#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
|
||||
#define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
|
||||
|
||||
@@ -192,11 +192,11 @@
|
||||
#else
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
|
||||
#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */
|
||||
#else
|
||||
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
|
||||
#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
|
||||
#else
|
||||
#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
|
||||
#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
#endif /* CFG_ENV_IS_IN_DATAFLASH */
|
||||
|
||||
@@ -204,44 +204,25 @@
|
||||
#define CFG_LOAD_ADDR 0x21000000 /* default load address */
|
||||
|
||||
#ifdef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */
|
||||
#define CFG_U_BOOT_BASE PHYS_FLASH_1
|
||||
#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */
|
||||
#else
|
||||
#define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */
|
||||
#define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
|
||||
#define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */
|
||||
#else
|
||||
#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */
|
||||
#define CFG_U_BOOT_BASE PHYS_FLASH_1
|
||||
#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */
|
||||
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
|
||||
|
||||
#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
|
||||
#define CFG_BAUDRATE_TABLE { 115200, 19200, 38400, 57600, 9600 }
|
||||
|
||||
#define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*-----------------------------------------------------------------------
|
||||
* Board specific extension for bd_info
|
||||
*
|
||||
* This structure is embedded in the global bd_info (bd_t) structure
|
||||
* and can be used by the board specific code (eg board/...)
|
||||
*/
|
||||
|
||||
struct bd_info_ext {
|
||||
/* helper variable for board environment handling
|
||||
*
|
||||
* env_crc_valid == 0 => uninitialised
|
||||
* env_crc_valid > 0 => environment crc in flash is valid
|
||||
* env_crc_valid < 0 => environment crc in flash is invalid
|
||||
*/
|
||||
int env_crc_valid;
|
||||
};
|
||||
#endif
|
||||
|
||||
#define CFG_HZ 1000
|
||||
#define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
|
||||
/* AT91C_TC_TIMER_DIV1_CLOCK */
|
||||
/* AT91C_TC_TIMER_DIV1_CLOCK */
|
||||
|
||||
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
|
||||
|
||||
|
||||
@@ -148,7 +148,7 @@
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM 0x20000000
|
||||
#define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */
|
||||
#define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */
|
||||
|
||||
#define CFG_MEMTEST_START PHYS_SDRAM
|
||||
#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
|
||||
@@ -186,25 +186,6 @@
|
||||
#define CFG_MAXARGS 32 /* max number of command args */
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*-----------------------------------------------------------------------
|
||||
* Board specific extension for bd_info
|
||||
*
|
||||
* This structure is embedded in the global bd_info (bd_t) structure
|
||||
* and can be used by the board specific code (eg board/...)
|
||||
*/
|
||||
|
||||
struct bd_info_ext {
|
||||
/* helper variable for board environment handling
|
||||
*
|
||||
* env_crc_valid == 0 => uninitialised
|
||||
* env_crc_valid > 0 => environment crc in flash is valid
|
||||
* env_crc_valid < 0 => environment crc in flash is invalid
|
||||
*/
|
||||
int env_crc_valid;
|
||||
};
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#define CFG_HZ 1000
|
||||
#define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */
|
||||
/* AT91C_TC_TIMER_DIV1_CLOCK */
|
||||
|
||||
@@ -170,8 +170,8 @@
|
||||
|
||||
#undef CONFIG_HAS_DATAFLASH
|
||||
#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
|
||||
#define CFG_MAX_DATAFLASH_BANKS 0
|
||||
#define CFG_MAX_DATAFLASH_PAGES 16384
|
||||
#define CFG_MAX_DATAFLASH_BANKS 0
|
||||
#define CFG_MAX_DATAFLASH_PAGES 16384
|
||||
#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* Logical adress for CS0 */
|
||||
#define CFG_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* Logical adress for CS3 */
|
||||
|
||||
@@ -209,35 +209,16 @@
|
||||
|
||||
#define CFG_LOAD_ADDR 0x21000000 /* default load address */
|
||||
|
||||
#define CFG_BAUDRATE_TABLE {115200, 57600, 38400, 19200, 9600 }
|
||||
#define CFG_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 }
|
||||
|
||||
#define CFG_PROMPT "U-Boot> " /* Monitor Command Prompt */
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
#define CFG_MAXARGS 16 /* max number of command args */
|
||||
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*-----------------------------------------------------------------------
|
||||
* Board specific extension for bd_info
|
||||
*
|
||||
* This structure is embedded in the global bd_info (bd_t) structure
|
||||
* and can be used by the board specific code (eg board/...)
|
||||
*/
|
||||
|
||||
struct bd_info_ext {
|
||||
/* helper variable for board environment handling
|
||||
*
|
||||
* env_crc_valid == 0 => uninitialised
|
||||
* env_crc_valid > 0 => environment crc in flash is valid
|
||||
* env_crc_valid < 0 => environment crc in flash is invalid
|
||||
*/
|
||||
int env_crc_valid;
|
||||
};
|
||||
#endif
|
||||
|
||||
#define CFG_HZ 1000
|
||||
#define CFG_HZ_CLOCK AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to */
|
||||
/* AT91C_TC_TIMER_DIV1_CLOCK */
|
||||
/* AT91C_TC_TIMER_DIV1_CLOCK */
|
||||
|
||||
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
|
||||
|
||||
|
||||
@@ -31,8 +31,6 @@
|
||||
|
||||
#define CONFIG_EP8248 /* Embedded Planet EP8248 board */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
|
||||
|
||||
/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
|
||||
|
||||
@@ -31,8 +31,6 @@
|
||||
#define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */
|
||||
/* 256MB SDRAM / 64MB FLASH */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
|
||||
|
||||
/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
|
||||
|
||||
@@ -29,8 +29,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* The ADS GCPlus Linux boot ROM loads U-Boot into RAM at 0xc0200000.
|
||||
* We don't actually init RAM in this case since we're using U-Boot as
|
||||
|
||||
@@ -51,7 +51,6 @@
|
||||
#define __CONFIG_H
|
||||
|
||||
/* Enable debug prints */
|
||||
#undef DEBUG /* General debug */
|
||||
#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */
|
||||
|
||||
/* What is the oscillator's (UX2) frequency in Hz? */
|
||||
|
||||
@@ -35,8 +35,6 @@
|
||||
|
||||
#define CONFIG_CPM2 1 /* Has a CPM2 */
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* Select serial console configuration
|
||||
*
|
||||
|
||||
@@ -47,7 +47,7 @@
|
||||
|
||||
#define CFG_ATMEL_PLL_INIT_BUG 1
|
||||
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CFG_USE_MAIN_OSCILLATOR 1
|
||||
#define CFG_USE_MAIN_OSCILLATOR 1
|
||||
/* flash */
|
||||
#define MC_PUIA_VAL 0x00000000
|
||||
#define MC_PUP_VAL 0x00000000
|
||||
@@ -216,25 +216,6 @@
|
||||
#define CFG_DEVICE_DEREGISTER /* needs device_deregister */
|
||||
#define LITTLEENDIAN 1 /* used by usb_ohci.c */
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*-----------------------------------------------------------------------
|
||||
* Board specific extension for bd_info
|
||||
*
|
||||
* This structure is embedded in the global bd_info (bd_t) structure
|
||||
* and can be used by the board specific code (eg board/...)
|
||||
*/
|
||||
|
||||
struct bd_info_ext {
|
||||
/* helper variable for board environment handling
|
||||
*
|
||||
* env_crc_valid == 0 => uninitialised
|
||||
* env_crc_valid > 0 => environment crc in flash is valid
|
||||
* env_crc_valid < 0 => environment crc in flash is invalid
|
||||
*/
|
||||
int env_crc_valid;
|
||||
};
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#define CFG_HZ 1000
|
||||
#define CFG_HZ_CLOCK (AT91C_MASTER_CLOCK/2) /* AT91C_TC0_CMR is implicitly set to */
|
||||
/* AT91C_TC_TIMER_DIV1_CLOCK */
|
||||
|
||||
@@ -33,8 +33,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/* Board Configuration Definitions */
|
||||
/* MPC7448HPC2 (High-Performance Computing II) (Taiga) board */
|
||||
|
||||
|
||||
@@ -25,7 +25,6 @@
|
||||
#ifndef __MS7720SE_H
|
||||
#define __MS7720SE_H
|
||||
|
||||
#undef DEBUG
|
||||
#define CONFIG_SH 1
|
||||
#define CONFIG_SH3 1
|
||||
#define CONFIG_CPU_SH7720 1
|
||||
|
||||
@@ -25,7 +25,6 @@
|
||||
#ifndef __MS7722SE_H
|
||||
#define __MS7722SE_H
|
||||
|
||||
#undef DEBUG
|
||||
#define CONFIG_SH 1
|
||||
#define CONFIG_SH4 1
|
||||
#define CONFIG_CPU_SH7722 1
|
||||
|
||||
@@ -25,7 +25,6 @@
|
||||
#ifndef __MS7750SE_H
|
||||
#define __MS7750SE_H
|
||||
|
||||
#undef DEBUG
|
||||
#define CONFIG_SH 1
|
||||
#define CONFIG_SH4 1
|
||||
#define CONFIG_CPU_SH7750 1
|
||||
|
||||
@@ -30,7 +30,6 @@
|
||||
* do_bdinfo - Required to build with debug
|
||||
*/
|
||||
|
||||
#undef DEBUG
|
||||
#ifdef DEBUG
|
||||
#define GTREGREAD(x) 0xFFFFFFFF
|
||||
#define do_bdinfo(a,b,c,d)
|
||||
|
||||
@@ -32,8 +32,6 @@
|
||||
#define CONFIG_QEMU_MIPS 1
|
||||
#define CONFIG_MISC_INIT_R
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*IP address is default used by Qemu*/
|
||||
#define CONFIG_IPADDR 10.0.2.15 /* Our IP address */
|
||||
#define CONFIG_SERVERIP 10.0.2.2 /* Server IP address*/
|
||||
|
||||
@@ -35,7 +35,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG /* General debug */
|
||||
#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */
|
||||
|
||||
#undef CONFIG_LOGBUFFER /* External logbuffer support */
|
||||
|
||||
@@ -36,7 +36,6 @@
|
||||
#define __CONFIG_H
|
||||
|
||||
/* Enable debug prints */
|
||||
#undef DEBUG /* General debug */
|
||||
#undef DEBUG_BOOTP_EXT /* Debug received vendor fields */
|
||||
|
||||
/*****************************************************************************
|
||||
|
||||
@@ -31,8 +31,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#undef DEBUG
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
*/
|
||||
|
||||
@@ -26,10 +26,6 @@
|
||||
|
||||
#include <configs/omap1510.h>
|
||||
|
||||
/*
|
||||
* High Level Configuration Options
|
||||
* (easy to change)
|
||||
*/
|
||||
#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
|
||||
#define CONFIG_OMAP 1 /* in a TI OMAP core */
|
||||
#define CONFIG_OMAP1510 1 /* which is in a 5910 */
|
||||
@@ -54,10 +50,9 @@
|
||||
*/
|
||||
#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
|
||||
#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
|
||||
#define PHYS_SDRAM_1_SIZE SZ_64M
|
||||
#define PHYS_SDRAM_1_SIZE (64 * 1024 * 1024)
|
||||
|
||||
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
|
||||
#define PHYS_FLASH_2 0x0c000000
|
||||
|
||||
#define CFG_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */
|
||||
|
||||
@@ -67,50 +62,34 @@
|
||||
#define CFG_FLASH_CFI /* Flash is CFI conformant */
|
||||
#define CFG_FLASH_CFI_DRIVER /* Use the common driver */
|
||||
#define CFG_MAX_FLASH_BANKS 1
|
||||
#ifdef VOICEBLUE_SMALL_FLASH
|
||||
#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_2 }
|
||||
#else
|
||||
#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 }
|
||||
#endif
|
||||
#define CFG_FLASH_BASE PHYS_FLASH_1
|
||||
|
||||
/* FIXME: Does not work on AMD flash */
|
||||
/* #define CFG_FLASH_USE_BUFFER_WRITE 1 */ /* use buffered writes (20x faster) */
|
||||
#define CFG_MAX_FLASH_SECT 512 /* max # of sectors on one chip */
|
||||
|
||||
#define CFG_MONITOR_BASE PHYS_FLASH_1
|
||||
#define CFG_MONITOR_LEN SZ_128K
|
||||
#define CFG_MONITOR_LEN (256 * 1024)
|
||||
|
||||
/*
|
||||
* Environment settings
|
||||
*/
|
||||
#ifdef VOICEBLUE_SMALL_FLASH
|
||||
#define CFG_ENV_IS_NOWHERE
|
||||
#define CFG_ENV_SIZE SZ_1K
|
||||
#else
|
||||
#define CFG_ENV_IS_IN_FLASH
|
||||
#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN)
|
||||
#define CFG_ENV_SIZE SZ_8K
|
||||
#define CFG_ENV_SECT_SIZE SZ_64K
|
||||
#define CFG_ENV_SIZE (8 * 1024)
|
||||
#define CFG_ENV_SECT_SIZE (64 * 1024)
|
||||
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
|
||||
#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
|
||||
|
||||
#define CONFIG_ENV_OVERWRITE
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Size of malloc() pool and stack
|
||||
*/
|
||||
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
|
||||
#ifdef VOICEBLUE_SMALL_FLASH
|
||||
#define CFG_MALLOC_LEN (SZ_64K - CFG_GBL_DATA_SIZE)
|
||||
#define CONFIG_STACKSIZE SZ_8K
|
||||
#define PHYS_SDRAM_1_RESERVED 0
|
||||
#else
|
||||
#define CFG_MALLOC_LEN SZ_4M
|
||||
#define CONFIG_STACKSIZE SZ_1M
|
||||
#define CFG_MALLOC_LEN (4 * 1024 * 1024)
|
||||
#define CONFIG_STACKSIZE (1 * 1024 * 1024)
|
||||
#define PHYS_SDRAM_1_RESERVED (CFG_MONITOR_LEN + CFG_MALLOC_LEN + CONFIG_STACKSIZE)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
@@ -118,6 +97,14 @@
|
||||
#define CONFIG_DRIVER_SMC91111
|
||||
#define CONFIG_SMC91111_BASE 0x08000300
|
||||
|
||||
#define CONFIG_HARD_I2C
|
||||
#define CFG_I2C_SPEED 100000
|
||||
#define CFG_I2C_SLAVE 1
|
||||
#define CONFIG_DRIVER_OMAP1510_I2C
|
||||
|
||||
#define CONFIG_RTC_DS1307
|
||||
#define CFG_I2C_RTC_ADDR 0x68
|
||||
|
||||
/*
|
||||
* NS16550 Configuration
|
||||
*/
|
||||
@@ -138,21 +125,18 @@
|
||||
#include <config_cmd_default.h>
|
||||
|
||||
#define CONFIG_CMD_BDI
|
||||
#define CONFIG_CMD_LOADB
|
||||
#define CONFIG_CMD_IMI
|
||||
#define CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_BOOTD
|
||||
#define CONFIG_CMD_DHCP
|
||||
#define CONFIG_CMD_ENV
|
||||
#define CONFIG_CMD_FLASH
|
||||
#define CONFIG_CMD_IMI
|
||||
#define CONFIG_CMD_JFFS2
|
||||
#define CONFIG_CMD_LOADB
|
||||
#define CONFIG_CMD_MEMORY
|
||||
#define CONFIG_CMD_NET
|
||||
#define CONFIG_CMD_PING
|
||||
#define CONFIG_CMD_RUN
|
||||
|
||||
#if !defined(VOICEBLUE_SMALL_FLASH)
|
||||
#define CONFIG_CMD_ENV
|
||||
#define CONFIG_CMD_JFFS2
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
@@ -165,32 +149,20 @@
|
||||
|
||||
#define CONFIG_LOOPW
|
||||
|
||||
#ifdef VOICEBLUE_SMALL_FLASH
|
||||
#define CONFIG_BOOTDELAY 0
|
||||
#undef CONFIG_BOOTARGS /* the preboot command will set bootargs*/
|
||||
#define CFG_AUTOLOAD "n" /* no autoload */
|
||||
#define CONFIG_PREBOOT "run setup"
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"setup=setenv bootargs console=ttyS0,${baudrate} " \
|
||||
"root=/dev/nfs ip=dhcp\0" \
|
||||
"update=erase c000000 c03ffff; " \
|
||||
"cp.b 10400000 c000000 ${filesize}\0"
|
||||
#else
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#undef CONFIG_BOOTARGS /* boot command will set bootargs */
|
||||
#define CFG_AUTOLOAD "n" /* no autoload */
|
||||
#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
|
||||
#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
|
||||
#define CFG_AUTOLOAD "n" /* No autoload */
|
||||
#define CONFIG_BOOTCOMMAND "run nboot"
|
||||
#define CONFIG_PREBOOT "run setup"
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"silent=1\0" \
|
||||
"ospart=0\0" \
|
||||
"swapos=no\0" \
|
||||
"bootfile=/boot/uImage\0" \
|
||||
"setpart=" \
|
||||
"if test $swapos = yes; then " \
|
||||
"if test $ospart -eq 0; then chpart 4; else chpart 3; fi; "\
|
||||
"setenv swapos no; saveenv; " \
|
||||
"else " \
|
||||
"if test $ospart -eq 0; then chpart 3; else chpart 4; fi; "\
|
||||
"if test -n $swapos; then " \
|
||||
"setenv swapos; saveenv; " \
|
||||
"if test $ospart -eq 0; then setenv ospart 1; else setenv ospart 0; fi; "\
|
||||
"fi\0" \
|
||||
"setup=setenv bootargs console=ttyS0,$baudrate " \
|
||||
"mtdparts=$mtdparts\0" \
|
||||
@@ -198,16 +170,14 @@
|
||||
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
|
||||
"nfsroot=$rootpath root=/dev/nfs\0" \
|
||||
"flashargs=run setpart; setenv bootargs $bootargs " \
|
||||
"root=/dev/mtdblock$partition ro " \
|
||||
"root=mtd:data$ospart ro " \
|
||||
"rootfstype=jffs2\0" \
|
||||
"initrdargs=setenv bootargs $bootargs " \
|
||||
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
|
||||
"fboot=run flashargs; fsload /boot/uImage; bootm\0" \
|
||||
"iboot=bootp; run initrdargs; tftp; bootm\0" \
|
||||
"fboot=run flashargs; chpart data$ospart; fsload; bootm\0" \
|
||||
"mboot=bootp; run initrdargs; tftp; bootm\0" \
|
||||
"nboot=bootp; run nfsargs; tftp; bootm\0"
|
||||
#endif
|
||||
|
||||
#ifndef VOICEBLUE_SMALL_FLASH
|
||||
#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
|
||||
|
||||
#if 1 /* feel free to disable for development */
|
||||
@@ -221,19 +191,15 @@
|
||||
*/
|
||||
#define CONFIG_JFFS2_CMDLINE
|
||||
#define MTDIDS_DEFAULT "nor0=omapflash.0"
|
||||
#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:128k(uboot),64k(env),64k(r_env),16256k(data1),-(data2)"
|
||||
|
||||
#endif /* VOICEBLUE_SMALL_FLASH */
|
||||
#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:256k(u-boot),64k(env),64k(r_env),16192k(data0),-(data1)"
|
||||
|
||||
|
||||
/*
|
||||
* Miscellaneous configurable options
|
||||
*/
|
||||
#ifndef VOICEBLUE_SMALL_FLASH
|
||||
#define CFG_HUSH_PARSER
|
||||
#define CFG_PROMPT_HUSH_PS2 "> "
|
||||
#define CONFIG_AUTO_COMPLETE
|
||||
#endif
|
||||
#define CFG_LONGHELP /* undef to save memory */
|
||||
#define CFG_PROMPT "# " /* Monitor Command Prompt */
|
||||
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
|
||||
|
||||
@@ -33,7 +33,7 @@
|
||||
#define CONFIG_XSENGINE 1
|
||||
#define CONFIG_MMC 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
#define BOARD_POST_INIT 1
|
||||
#define OARD_LATE_INIT 1
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
|
||||
|
||||
|
||||
@@ -185,7 +185,7 @@
|
||||
|
||||
/* SCFR1 System Clock Frequency Register 1
|
||||
*/
|
||||
#define SCFR1_IPS_DIV 0x4
|
||||
#define SCFR1_IPS_DIV 0x3
|
||||
#define SCFR1_IPS_DIV_MASK 0x03800000
|
||||
#define SCFR1_IPS_DIV_SHIFT 23
|
||||
|
||||
|
||||
@@ -59,6 +59,7 @@ typedef struct block_dev_desc {
|
||||
#define IF_TYPE_USB 4
|
||||
#define IF_TYPE_DOC 5
|
||||
#define IF_TYPE_MMC 6
|
||||
#define IF_TYPE_SD 7
|
||||
|
||||
/* Part types */
|
||||
#define PART_TYPE_UNKNOWN 0x00
|
||||
|
||||
@@ -36,6 +36,11 @@ extern struct serial_device eserial4_device;
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_S3C2410)
|
||||
extern struct serial_device s3c24xx_serial0_device;
|
||||
extern struct serial_device s3c24xx_serial1_device;
|
||||
extern struct serial_device s3c24xx_serial2_device;
|
||||
#endif
|
||||
|
||||
extern struct serial_device serial_ffuart_device;
|
||||
extern struct serial_device serial_btuart_device;
|
||||
|
||||
Reference in New Issue
Block a user