Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
This commit is contained in:
@@ -224,8 +224,8 @@
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||||
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/* PMIC */
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#define CONFIG_PMIC
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#define CONFIG_PMIC_I2C
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#define CONFIG_PMIC_MAX77686
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_MAX77686
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#define CONFIG_DEFAULT_DEVICE_TREE exynos5250-arndale
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@@ -20,6 +20,7 @@
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_BOARD_COMMON
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#define CONFIG_SYS_GENERIC_BOARD
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/* Enable fdt support */
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#define CONFIG_OF_CONTROL
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@@ -44,6 +45,9 @@
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#define CONFIG_S5P_SDHCI
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#define CONFIG_SDHCI
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#define CONFIG_MMC_SDMA
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#define CONFIG_DWMMC
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#define CONFIG_EXYNOS_DWMMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_MMC_DEFAULT_DEV 0
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/* PWM */
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@@ -259,6 +259,7 @@
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_TPS65090
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/* Ethernet Controllor Driver */
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#ifdef CONFIG_CMD_NET
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@@ -45,7 +45,7 @@
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK
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/* PMIC */
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#define CONFIG_PMIC_MAX77686
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#define CONFIG_POWER_MAX77686
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/* Sound */
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#define CONFIG_CMD_SOUND
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@@ -107,7 +107,7 @@
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_FSL
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#define CONFIG_PMIC_FSL_MC34704
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#define CONFIG_POWER_FSL_MC34704
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#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x54
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#define CONFIG_DOS_PARTITION
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@@ -52,7 +52,7 @@
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_FSL
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#define CONFIG_PMIC_FSL_MC13892
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#define CONFIG_POWER_FSL_MC13892
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#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
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#define CONFIG_RTC_MC13XXX
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@@ -47,7 +47,7 @@
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_FSL
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#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
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#define CONFIG_PMIC_FSL_MC13892
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#define CONFIG_POWER_FSL_MC13892
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#define CONFIG_RTC_MC13XXX
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/* MMC Configs */
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@@ -82,7 +82,7 @@
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#define CONFIG_POWER_I2C
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#define CONFIG_DIALOG_POWER
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#define CONFIG_POWER_FSL
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#define CONFIG_PMIC_FSL_MC13892
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#define CONFIG_POWER_FSL_MC13892
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#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
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#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
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@@ -17,6 +17,7 @@
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#define CONFIG_S5PC110 1 /* which is in a S5PC110 */
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#define CONFIG_MACH_GONI 1 /* working with Goni */
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#include <linux/sizes.h>
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#include <asm/arch/cpu.h> /* get chip and board defs */
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#define CONFIG_ARCH_CPU_INIT
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@@ -38,11 +39,9 @@
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#define CONFIG_INITRD_TAG
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#define CONFIG_CMDLINE_EDITING
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/*
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* Size of malloc() pool
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* 1MB = 0x100000, 0x100000 = 1024 * 1024
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*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
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/* Size of malloc() pool.*/
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 80 * SZ_1M)
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/*
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* select serial console configuration
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*/
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@@ -72,14 +71,19 @@
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_ONENAND
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_DFU
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#define CONFIG_CMD_GPT
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#define CONFIG_BOOTDELAY 1
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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/* USB Composite download gadget - g_dnl */
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#define CONFIG_USBDOWNLOAD_GADGET
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#define CONFIG_DFU_FUNCTION
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#define CONFIG_DFU_MMC
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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/* USB Samsung's IDs */
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#define CONFIG_G_DNL_VENDOR_NUM 0x04E8
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#define CONFIG_G_DNL_PRODUCT_NUM 0x6601
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#define CONFIG_G_DNL_MANUFACTURER "Samsung"
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/* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
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#define MTDIDS_DEFAULT "onenand0=samsung-onenand"
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@@ -90,30 +94,52 @@
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",7m(kernel)"\
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",1m(log)"\
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",12m(modem)"\
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",60m(qboot)"\
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",-(UBI)\0"
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",60m(qboot)\0"
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#define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
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#define CONFIG_BOOTDELAY 1
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CONFIG_BOOTCOMMAND "run ubifsboot"
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/* partitions definitions */
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#define PARTS_CSA "csa-mmc"
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#define PARTS_BOOTLOADER "u-boot"
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#define PARTS_BOOT "boot"
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#define PARTS_ROOT "platform"
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#define PARTS_DATA "data"
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#define PARTS_CSC "csc"
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#define PARTS_UMS "ums"
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#define CONFIG_DFU_ALT \
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"u-boot raw 0x80 0x400;" \
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"uImage ext4 0 2;" \
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"exynos3-goni.dtb ext4 0 2;" \
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""PARTS_ROOT" part 0 5\0"
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#define PARTS_DEFAULT \
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"uuid_disk=${uuid_gpt_disk};" \
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"name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
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"name="PARTS_BOOTLOADER",size=60MiB," \
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"uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
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"name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
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"name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
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"name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
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"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
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"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
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#define CONFIG_BOOTCOMMAND "run mmcboot"
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#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
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#define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext2" \
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#define CONFIG_RAMDISK_BOOT "root=/dev/ram0 rw rootfstype=ext4" \
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" ${console} ${meminfo}"
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#define CONFIG_COMMON_BOOT "${console} ${meminfo} ${mtdparts}"
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#define CONFIG_BOOTARGS "root=/dev/mtdblock8 ubi.mtd=8 ubi.mtd=3 ubi.mtd=6" \
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" rootfstype=cramfs " CONFIG_COMMON_BOOT
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#define CONFIG_BOOTARGS "root=/dev/mtdblock8 rootfstype=ext4 " \
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CONFIG_COMMON_BOOT
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#define CONFIG_UPDATEB "updateb=onenand erase 0x0 0x100000;" \
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" onenand write 0x32008000 0x0 0x100000\0"
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#define CONFIG_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=3 ubi.mtd=6"
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#define CONFIG_UBIFS_OPTION "rootflags=bulk_read,no_chk_data_crc"
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#define CONFIG_MISC_COMMON
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#define CONFIG_MISC_INIT_R
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@@ -130,42 +156,44 @@
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"onenand erase 0x01560000 0x1eaa0000;" \
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"onenand write 0x32000000 0x1260000 0x8C0000\0" \
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"bootk=" \
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"onenand read 0x30007FC0 0xc00000 0x600000;" \
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"run loaduimage;" \
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"bootm 0x30007FC0\0" \
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"flashboot=" \
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"set bootargs root=/dev/mtdblock${bootblock} " \
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"rootfstype=${rootfstype}" CONFIG_UBI_MTD " ${opts} " \
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"rootfstype=${rootfstype} ${opts} " \
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"${lcdinfo} " CONFIG_COMMON_BOOT "; run bootk\0" \
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"ubifsboot=" \
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"set bootargs root=ubi0!rootfs rootfstype=ubifs " \
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CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \
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"${opts} ${lcdinfo} " \
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CONFIG_COMMON_BOOT "; run bootk\0" \
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"tftpboot=" \
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"set bootargs root=ubi0!rootfs rootfstype=ubifs " \
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CONFIG_UBIFS_OPTION CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \
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CONFIG_COMMON_BOOT "; tftp 0x30007FC0 uImage; " \
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"bootm 0x30007FC0\0" \
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"${opts} ${lcdinfo} " CONFIG_COMMON_BOOT \
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"; tftp 0x30007FC0 uImage; bootm 0x30007FC0\0" \
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"ramboot=" \
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"set bootargs " CONFIG_RAMDISK_BOOT \
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" initrd=0x33000000,8M ramdisk=8192\0" \
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"initrd=0x33000000,8M ramdisk=8192\0" \
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"mmcboot=" \
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"set bootargs root=${mmcblk} rootfstype=${rootfstype}" \
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CONFIG_UBI_MTD " ${opts} ${lcdinfo} " \
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"set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
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"rootfstype=${rootfstype} ${opts} ${lcdinfo} " \
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CONFIG_COMMON_BOOT "; run bootk\0" \
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"boottrace=setenv opts initcall_debug; run bootcmd\0" \
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"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
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"verify=n\0" \
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"rootfstype=cramfs\0" \
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"rootfstype=ext4\0" \
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"console=" CONFIG_DEFAULT_CONSOLE \
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"mtdparts=" MTDPARTS_DEFAULT \
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"meminfo=mem=80M mem=256M@0x40000000 mem=128M@0x50000000\0" \
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"mmcblk=/dev/mmcblk1p1\0" \
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"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x30007FC0 uImage\0" \
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"mmcdev=0\0" \
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"mmcbootpart=2\0" \
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"mmcrootpart=5\0" \
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"partitions=" PARTS_DEFAULT \
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"bootblock=9\0" \
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"ubiblock=8\0" \
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"ubi=enabled\0" \
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"opts=always_resume=1"
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"opts=always_resume=1\0" \
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"dfu_alt_info=" CONFIG_DFU_ALT "\0"
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/* Miscellaneous configurable options */
|
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
|
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#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
|
||||
#define CONFIG_SYS_PROMPT "Goni # "
|
||||
@@ -202,6 +230,18 @@
|
||||
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
|
||||
#define CONFIG_CMD_FAT
|
||||
#define CONFIG_CMD_EXT4
|
||||
#define CONFIG_CMD_EXT4_WRITE
|
||||
|
||||
/* write support for filesystems */
|
||||
#define CONFIG_FAT_WRITE
|
||||
#define CONFIG_EXT4_WRITE
|
||||
|
||||
/* GPT */
|
||||
#define CONFIG_EFI_PARTITION
|
||||
#define CONFIG_PARTITION_UUIDS
|
||||
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - 0x1000000)
|
||||
|
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#define CONFIG_SYS_CACHELINE_SIZE 64
|
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@@ -226,5 +266,8 @@
|
||||
#define CONFIG_USB_GADGET
|
||||
#define CONFIG_USB_GADGET_S3C_UDC_OTG
|
||||
#define CONFIG_USB_GADGET_DUALSPEED
|
||||
#define CONFIG_USB_GADGET_VBUS_DRAW 2
|
||||
#define CONFIG_CMD_USB_MASS_STORAGE
|
||||
#define CONFIG_USB_GADGET_MASS_STORAGE
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
@@ -55,7 +55,7 @@
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_POWER_FSL
|
||||
#define CONFIG_PMIC_FSL_MC13892
|
||||
#define CONFIG_POWER_FSL_MC13892
|
||||
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
|
||||
#define CONFIG_RTC_MC13XXX
|
||||
|
||||
|
||||
@@ -123,6 +123,9 @@
|
||||
#define DWMCI_BMOD_IDMAC_FB (1 << 1)
|
||||
#define DWMCI_BMOD_IDMAC_EN (1 << 7)
|
||||
|
||||
/* UHS register */
|
||||
#define DWMCI_DDR_MODE (1 << 16)
|
||||
|
||||
/* quirks */
|
||||
#define DWMCI_QUIRK_DISABLE_SMU (1 << 0)
|
||||
|
||||
@@ -134,7 +137,9 @@ struct dwmci_host {
|
||||
unsigned int version;
|
||||
unsigned int clock;
|
||||
unsigned int bus_hz;
|
||||
unsigned int div;
|
||||
int dev_index;
|
||||
int dev_id;
|
||||
int buswidth;
|
||||
u32 clksel_val;
|
||||
u32 fifoth_val;
|
||||
|
||||
@@ -81,7 +81,7 @@ enum fdt_compat_id {
|
||||
COMPAT_SAMSUNG_EXYNOS_FIMD, /* Exynos Display controller */
|
||||
COMPAT_SAMSUNG_EXYNOS_MIPI_DSI, /* Exynos mipi dsi */
|
||||
COMPAT_SAMSUNG_EXYNOS5_DP, /* Exynos Display port controller */
|
||||
COMPAT_SAMSUNG_EXYNOS5_DWMMC, /* Exynos5 DWMMC controller */
|
||||
COMPAT_SAMSUNG_EXYNOS_DWMMC, /* Exynos DWMMC controller */
|
||||
COMPAT_SAMSUNG_EXYNOS_MMC, /* Exynos MMC controller */
|
||||
COMPAT_SAMSUNG_EXYNOS_SERIAL, /* Exynos UART */
|
||||
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
|
||||
@@ -92,6 +92,8 @@ enum fdt_compat_id {
|
||||
COMPAT_SAMSUNG_EXYNOS5_I2C, /* Exynos5 High Speed I2C Controller */
|
||||
COMPAT_SANDBOX_HOST_EMULATION, /* Sandbox emulation of a function */
|
||||
COMPAT_SANDBOX_LCD_SDL, /* Sandbox LCD emulation with SDL */
|
||||
COMPAT_TI_TPS65090, /* Texas Instrument TPS65090 */
|
||||
COMPAT_NXP_PTN3460, /* NXP PTN3460 DP/LVDS bridge */
|
||||
|
||||
COMPAT_COUNT,
|
||||
};
|
||||
|
||||
@@ -6,4 +6,4 @@
|
||||
|
||||
typedef int (*init_fnc_t)(void);
|
||||
|
||||
int initcall_run_list(init_fnc_t init_sequence[]);
|
||||
int initcall_run_list(const init_fnc_t init_sequence[]);
|
||||
|
||||
@@ -32,15 +32,13 @@
|
||||
#define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429)
|
||||
#define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405)
|
||||
|
||||
#define MMC_MODE_HS 0x001
|
||||
#define MMC_MODE_HS_52MHz 0x010
|
||||
#define MMC_MODE_4BIT 0x100
|
||||
#define MMC_MODE_8BIT 0x200
|
||||
#define MMC_MODE_SPI 0x400
|
||||
#define MMC_MODE_HC 0x800
|
||||
|
||||
#define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT)
|
||||
#define MMC_MODE_WIDTH_BITS_SHIFT 8
|
||||
#define MMC_MODE_HS (1 << 0)
|
||||
#define MMC_MODE_HS_52MHz (1 << 1)
|
||||
#define MMC_MODE_4BIT (1 << 2)
|
||||
#define MMC_MODE_8BIT (1 << 3)
|
||||
#define MMC_MODE_SPI (1 << 4)
|
||||
#define MMC_MODE_HC (1 << 5)
|
||||
#define MMC_MODE_DDR_52MHz (1 << 6)
|
||||
|
||||
#define SD_DATA_4BIT 0x00040000
|
||||
|
||||
@@ -100,9 +98,6 @@
|
||||
#define SD_HIGHSPEED_BUSY 0x00020000
|
||||
#define SD_HIGHSPEED_SUPPORTED 0x00020000
|
||||
|
||||
#define MMC_HS_TIMING 0x00000100
|
||||
#define MMC_HS_52MHZ 0x2
|
||||
|
||||
#define OCR_BUSY 0x80000000
|
||||
#define OCR_HCS 0x40000000
|
||||
#define OCR_VOLTAGE_MASK 0x007FFF80
|
||||
@@ -178,10 +173,16 @@
|
||||
|
||||
#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
|
||||
#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
|
||||
#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2)
|
||||
#define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3)
|
||||
#define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \
|
||||
| EXT_CSD_CARD_TYPE_DDR_1_2V)
|
||||
|
||||
#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
|
||||
#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
|
||||
#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
|
||||
#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */
|
||||
#define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */
|
||||
|
||||
#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6)
|
||||
#define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3)
|
||||
|
||||
@@ -10,8 +10,6 @@
|
||||
|
||||
#include <power/power_chrg.h>
|
||||
|
||||
enum {CHARGER_ENABLE, CHARGER_DISABLE};
|
||||
|
||||
#define CHARGER_MIN_CURRENT 200
|
||||
#define CHARGER_MAX_CURRENT 2000
|
||||
|
||||
|
||||
@@ -170,7 +170,6 @@ enum {
|
||||
#define SAFEOUT_3_30V 0x03
|
||||
|
||||
/* Charger */
|
||||
enum {CHARGER_ENABLE, CHARGER_DISABLE};
|
||||
#define DETBAT (1 << 2)
|
||||
#define MBCICHFCSET (1 << 4)
|
||||
#define MBCHOSTEN (1 << 6)
|
||||
|
||||
@@ -17,6 +17,11 @@ enum { I2C_PMIC, I2C_NUM, };
|
||||
enum { PMIC_READ, PMIC_WRITE, };
|
||||
enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
|
||||
|
||||
enum {
|
||||
PMIC_CHARGER_DISABLE,
|
||||
PMIC_CHARGER_ENABLE,
|
||||
};
|
||||
|
||||
struct p_i2c {
|
||||
unsigned char addr;
|
||||
unsigned char *buf;
|
||||
|
||||
73
include/power/tps65090_pmic.h
Normal file
73
include/power/tps65090_pmic.h
Normal file
@@ -0,0 +1,73 @@
|
||||
/*
|
||||
* Copyright (c) 2012 The Chromium OS Authors.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __TPS65090_PMIC_H_
|
||||
#define __TPS65090_PMIC_H_
|
||||
|
||||
/* I2C device address for TPS65090 PMU */
|
||||
#define TPS65090_I2C_ADDR 0x48
|
||||
|
||||
enum {
|
||||
/* Status register fields */
|
||||
TPS65090_ST1_OTC = 1 << 0,
|
||||
TPS65090_ST1_OCC = 1 << 1,
|
||||
TPS65090_ST1_STATE_SHIFT = 4,
|
||||
TPS65090_ST1_STATE_MASK = 0xf << TPS65090_ST1_STATE_SHIFT,
|
||||
};
|
||||
|
||||
/**
|
||||
* Enable FET
|
||||
*
|
||||
* @param fet_id FET ID, value between 1 and 7
|
||||
* @return 0 on success, non-0 on failure
|
||||
*/
|
||||
int tps65090_fet_enable(unsigned int fet_id);
|
||||
|
||||
/**
|
||||
* Disable FET
|
||||
*
|
||||
* @param fet_id FET ID, value between 1 and 7
|
||||
* @return 0 on success, non-0 on failure
|
||||
*/
|
||||
int tps65090_fet_disable(unsigned int fet_id);
|
||||
|
||||
/**
|
||||
* Is FET enabled?
|
||||
*
|
||||
* @param fet_id FET ID, value between 1 and 7
|
||||
* @return 1 enabled, 0 disabled, negative value on failure
|
||||
*/
|
||||
int tps65090_fet_is_enabled(unsigned int fet_id);
|
||||
|
||||
/**
|
||||
* Enable / disable the battery charger
|
||||
*
|
||||
* @param enable 0 to disable charging, non-zero to enable
|
||||
*/
|
||||
int tps65090_set_charge_enable(int enable);
|
||||
|
||||
/**
|
||||
* Check whether we have enabled battery charging
|
||||
*
|
||||
* @return 1 if enabled, 0 if disabled
|
||||
*/
|
||||
int tps65090_get_charging(void);
|
||||
|
||||
/**
|
||||
* Return the value of the status register
|
||||
*
|
||||
* @return status register value, or -1 on error
|
||||
*/
|
||||
int tps65090_get_status(void);
|
||||
|
||||
/**
|
||||
* Initialize the TPS65090 PMU.
|
||||
*
|
||||
* @return 0 on success, non-0 on failure
|
||||
*/
|
||||
int tps65090_init(void);
|
||||
|
||||
#endif /* __TPS65090_PMIC_H_ */
|
||||
Reference in New Issue
Block a user