Merge branch 'master' of git://git.denx.de/u-boot-i2c

This commit is contained in:
Tom Rini
2017-05-15 13:01:26 -04:00
109 changed files with 220 additions and 3113 deletions

View File

@@ -499,9 +499,19 @@ void reset_phy (void);
void fdc_hw_init (void);
/* $(BOARD)/eeprom.c */
#ifdef CONFIG_CMD_EEPROM
void eeprom_init (int bus);
int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt);
#else
/*
* Some EEPROM code is depecated because it used the legacy I2C interface. Add
* some macros here so we don't have to touch every one of those uses
*/
#define eeprom_init(bus)
#define eeprom_read(dev_addr, offset, buffer, cnt) ((void)-ENOSYS)
#define eeprom_write(dev_addr, offset, buffer, cnt) ((void)-ENOSYS)
#endif
/*
* Set this up regardless of board

View File

@@ -166,7 +166,6 @@
/* I2c */
#undef CONFIG_SYS_FSL_I2C
#undef CONFIG_HARD_I2C /* I2C with hardware support */
#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
/* I2C speed and slave address */
#define CONFIG_SYS_I2C_SPEED 80000

View File

@@ -124,8 +124,7 @@
#ifndef CONFIG_CAM5200
/* POST support */
#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
CONFIG_SYS_POST_CPU | \
CONFIG_SYS_POST_I2C)
CONFIG_SYS_POST_CPU)
#endif
#ifdef CONFIG_POST
@@ -144,7 +143,6 @@
/*
* Command line configuration.
*/
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO
@@ -278,54 +276,6 @@
#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#ifdef CONFIG_TQM5200_REV100
#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
#else
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
#endif
/*
* I2C clock frequency
*
* Please notice, that the resulting clock frequency could differ from the
* configured value. This is because the I2C clock is derived from system
* clock over a frequency divider with only a few divider values. U-Boot
* calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
* approximation allways lies below the configured value, never above.
*/
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
* also). For other EEPROMs configuration should be verified. On Mini-FAP the
* EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
* same configuration could be used.
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
/*
* HW-Monitor configuration on Mini-FAP
*/
#if defined (CONFIG_MINIFAP)
#define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
#endif
/* List of I2C addresses to be verified by POST */
#if defined (CONFIG_MINIFAP)
#undef CONFIG_SYS_POST_I2C_ADDRS
#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
CONFIG_SYS_I2C_HWMON_ADDR, \
CONFIG_SYS_I2C_SLAVE}
#endif
/*
* Flash configuration
*/
@@ -544,18 +494,6 @@
#endif
#endif
/*
* RTC configuration
*/
#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
# define CONFIG_RTC_M41T11 1
# define CONFIG_SYS_I2C_RTC_ADDR 0x68
# define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
year */
#else
# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
#endif
/*
* Miscellaneous configurable options
*/

View File

@@ -81,7 +81,6 @@
/*
* Command line configuration.
*/
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#if defined(CONFIG_PCI)
@@ -145,25 +144,6 @@
*/
#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* EEPROM configuration
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010010x */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
#define CONFIG_SYS_EEPROM_WREN 1
#define CONFIG_SYS_EEPROM_WP GPIO_PSC2_4
/*
* Flash configuration
*/

View File

@@ -336,28 +336,11 @@
#define CONFIG_CMDLINE_EDITING 1 /* command line history */
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_I2C_MULTI_BUS
/* I2C speed and slave address */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* IIM - IC Identification Module
*/
#undef CONFIG_FSL_IIM
/*
* EEPROM configuration for Atmel AT24C01:
* 8-bit addresses, 30ms write delay, 32-Byte Page Write Mode
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 30
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
/*
* Ethernet configuration
*/
@@ -384,7 +367,6 @@
#define CONFIG_LOADS_ECHO 1
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_FUSE
#undef CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2

View File

@@ -35,20 +35,6 @@
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
/* I2C */
#define CONFIG_SH_SH7734_I2C 1
#define CONFIG_HARD_I2C 1
#define CONFIG_I2C_MULTI_BUS 1
#define CONFIG_SYS_MAX_I2C_BUS 2
#define CONFIG_SYS_I2C_MODULE 0
#define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x50
#define CONFIG_SH_I2C_DATA_HIGH 4
#define CONFIG_SH_I2C_DATA_LOW 5
#define CONFIG_SH_I2C_CLOCK 500000000
#define CONFIG_SH_I2C_BASE0 0xFFC70000
#define CONFIG_SH_I2C_BASE1 0xFFC71000
/* undef to save memory */
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */

View File

@@ -79,12 +79,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
/* RTC */
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_PCF8563
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
#endif
/* Boot Linux */
#define CONFIG_BOOTFILE "uImage"
#define CONFIG_BOOTCOMMAND "run bootcmd_nand"

View File

@@ -340,31 +340,11 @@
#endif
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_I2C_MULTI_BUS
/* I2C speed and slave address */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7F
#if 0
#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
#endif
/*
* IIM - IC Identification Module
*/
#undef CONFIG_FSL_IIM
/*
* EEPROM configuration for Atmel AT24C32A-10TQ-2.7:
* 16-bit addresses, 10ms write delay, 32-Byte Page Write Mode
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
/*
* Ethernet configuration
*/
@@ -392,7 +372,6 @@
#define CONFIG_LOADS_ECHO 1
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_FUSE
#undef CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2

View File

@@ -100,7 +100,7 @@
/*
* Environment settings
*/
#define CONFIG_ENV_IS_IN_EEPROM
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_SIZE SZ_512
#define CONFIG_ENV_OFFSET 0

View File

@@ -44,7 +44,7 @@
/*
* POST support
*/
#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU | CONFIG_SYS_POST_I2C)
#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | CONFIG_SYS_POST_CPU)
#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
/* List of I2C addresses to be verified by POST */
#define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_SLAVE, \
@@ -199,16 +199,6 @@
"2m(kernel),27904k(rootfs)," \
"-(config)"
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 */
#define CONFIG_SYS_I2C_SPEED 40000 /* 40 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
#define CONFIG_SYS_I2C_EEPROM 0x53 /* I2C EEPROM device address */
/*
* RTC configuration
*/

View File

@@ -85,7 +85,6 @@
/*
* Command line configuration.
*/
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_IRQ
#define CONFIG_CMD_PCI
@@ -205,36 +204,6 @@
#define CONFIG_BOOTCOMMAND "run mtcb_start"
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_MODULE 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* EEPROM configuration
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
/*
* RTC configuration
*/
#if defined(CONFIG_DIGSY_REV5)
#define CONFIG_SYS_I2C_RTC_ADDR 0x56
#define CONFIG_RTC_RV3029
/* Enable 5k Ohm trickle charge resistor */
#define CONFIG_SYS_RV3029_TCR 0x20
#else
#define CONFIG_RTC_DS1337
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
#define CONFIG_SYS_DS1339_TCR_VAL 0xAB /* diode + 4k resistor */
#endif
/*
* Flash configuration
*/

View File

@@ -165,7 +165,6 @@
#define CONFIG_TSEC2
#define CONFIG_TSEC_ENET
#define CONFIG_HARD_SPI
#define CONFIG_HARD_I2C
/*
* NOR FLASH setup

View File

@@ -150,29 +150,6 @@
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* EEPROM configuration
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
/*
* RTC configuration
*/
#define CONFIG_RTC_PCF8563
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
#define CONFIG_SYS_FLASH_BASE 0xFC000000
#define CONFIG_SYS_FLASH_SIZE 0x01000000
#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \

View File

@@ -127,25 +127,6 @@
#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
#endif
#if 0
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* EEPROM configuration
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
#endif
/*
* Flash configuration
*/

View File

@@ -16,7 +16,6 @@
/* U-Boot Commands */
#define CONFIG_FAT_WRITE
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS
@@ -63,11 +62,6 @@
#define CONFIG_FEC_MXC
#endif
/* EEPROM */
#ifdef CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#endif
/* RTC */
#ifdef CONFIG_CMD_DATE
/* Use the internal RTC in the MXS chip */

View File

@@ -0,0 +1,176 @@
/*
* (C) Copyright 2009
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __MANROLAND_MPC52XX__COMMON_H
#define __MANROLAND_MPC52XX__COMMON_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_MPC5200 1 /* MPC5200 CPU */
/* ... running at 33.000000MHz */
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*
* Serial console configuration
*/
#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200,\
230400 }
#if (CONFIG_SYS_TEXT_BASE == 0xFFF00000) /* Boot low */
# define CONFIG_SYS_LOWBOOT 1
#endif
/*
* IPB Bus clocking configuration.
*/
#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* Flash configuration
*/
#define CONFIG_SYS_FLASH_BASE 0xFF800000
#define CONFIG_SYS_FLASH_SIZE 0x00800000 /* 8 MByte */
#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE+0x40000) /* second sector */
#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
(= chip selects) */
#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout [ms]*/
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout [ms]*/
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_FLASH_CFI_AMD_RESET
/*
* Environment settings
*/
#define CONFIG_ENV_IS_IN_FLASH 1
#define CONFIG_ENV_SIZE 0x4000
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET+CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
/*
* Memory map
*/
#define CONFIG_SYS_MBAR 0xF0000000
#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE -\
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
#define CONFIG_SYS_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SRAM_BASE 0x80100000 /* CS 1 */
#define CONFIG_SYS_DISPLAY_BASE 0x80600000 /* CS 3 */
/* Settings for XLB = 132 MHz */
#define SDRAM_DDR 1
#define SDRAM_MODE 0x018D0000
#define SDRAM_EMODE 0x40090000
#define SDRAM_CONTROL 0x714f0f00
#define SDRAM_CONFIG1 0x73722930
#define SDRAM_CONFIG2 0x47770000
#define SDRAM_TAPDELAY 0x10000000
/* Use ON-Chip SRAM until RAM will be available */
#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
#ifdef CONFIG_POST
/* preserve space for the post_word at end of on-chip SRAM */
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
#else
#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
#endif
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT 1
#endif
#define CONFIG_SYS_MONITOR_LEN (192 << 10)
#define CONFIG_SYS_MALLOC_LEN (512 << 10)
#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
/*
* Ethernet configuration
*/
#define CONFIG_MPC5xxx_FEC 1
#define CONFIG_MPC5xxx_FEC_MII100
#define CONFIG_PHY_ADDR 0x00
#define CONFIG_MII 1
/*use Hardware WDT */
#define CONFIG_HW_WATCHDOG
#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
#if defined(CONFIG_CMD_KGDB)
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Various low-level settings
*/
#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
#define CONFIG_SYS_HID0_FINAL HID0_ICE
#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
/* 8Mbit SRAM @0x80100000 */
#define CONFIG_SYS_CS1_START CONFIG_SYS_SRAM_BASE
#define CONFIG_SYS_CS_BURST 0x00000000
#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
/*-----------------------------------------------------------------------
* IDE/ATA stuff Supports IDE harddisk
*-----------------------------------------------------------------------
*/
#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
#undef CONFIG_IDE_LED /* LED for ide not supported */
#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
#define CONFIG_IDE_PREINIT 1
#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
/* Offset for data I/O */
#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
/* Offset for normal register accesses */
#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
/* Offset for alternate registers */
#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
/* Interval between registers */
#define CONFIG_SYS_ATA_STRIDE 4
#define CONFIG_ATAPI 1
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
#define CONFIG_OF_IDE_FIXUP
#endif /* __MANROLAND_MPC52XX__COMMON_H */

View File

@@ -241,26 +241,11 @@
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */
#define CONFIG_SYS_I2C_SLAVE 0x7F /* slave address */
/*
* IIM - IC Identification Module
*/
#undef CONFIG_FSL_IIM
/*
* EEPROM configuration
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */
#define CONFIG_SYS_EEPROM_WREN /* Use EEPROM write protect */
/*
* Ethernet configuration
*/
@@ -280,7 +265,7 @@
/*
* Environment
*/
#define CONFIG_ENV_IS_IN_EEPROM /* Store env in I2C EEPROM */
#define CONFIG_ENV_IS_NOWHERE /* Store env in I2C EEPROM */
#define CONFIG_ENV_SIZE 0x1000
#define CONFIG_ENV_OFFSET 0x0000 /* environment starts here */
@@ -288,7 +273,6 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
#define CONFIG_CMD_REGINFO
#define CONFIG_CMD_EEPROM
#undef CONFIG_CMD_FUSE
#undef CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2

View File

@@ -34,7 +34,6 @@
* Command line configuration.
*/
#define CONFIG_CMD_DTT
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_IMMAP
#define CONFIG_CMD_JFFS2
@@ -255,21 +254,6 @@
#define CONFIG_SYS_ATA_REG_OFFSET CONFIG_SYS_ATA_DATA_OFFSET
#define CONFIG_SYS_ATA_STRIDE 4
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE 2 /* select I2C module #2 */
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* EEPROM configuration
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
/*
* RTC configuration
*/
@@ -283,12 +267,6 @@
#define ENABLE_GPIO_OUT 0x00000024
#define LED_ON 0x00000010
/*
* Temperature sensor
*/
#define CONFIG_DTT_LM75 1
#define CONFIG_DTT_SENSORS { 0x49 }
/*
* Environment settings
*/

View File

@@ -327,28 +327,11 @@
#endif
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
#define CONFIG_SYS_I2C_SLAVE 0x7F
#if 0
#define CONFIG_SYS_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
#endif
/*
* IIM - IC Identification Module
*/
#undef CONFIG_FSL_IIM
/*
* EEPROM configuration
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM address */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel: AT24C32A-10TQ-2.7 */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 32-Byte Page Write Mode */
/*
* Ethernet configuration
*/
@@ -395,7 +378,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_IDE
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_REGINFO

View File

@@ -126,16 +126,6 @@
#endif
#endif
/* I2C */
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXS
#define CONFIG_HARD_I2C
#ifndef CONFIG_SYS_I2C_SPEED
#define CONFIG_SYS_I2C_SPEED 400000
#endif
#endif
/* LCD */
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_MXS

View File

@@ -68,7 +68,6 @@
/*
* Supported commands
*/
#define CONFIG_CMD_EEPROM
#ifdef CONFIG_PCI
#define CONFIG_CMD_PCI
#endif
@@ -172,27 +171,6 @@
#define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 or #2 */
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* EEPROM configuration:
*
* O2DNT board is equiped with Ramtron FRAM device FM24CL16
* 16 Kib Ferroelectric Nonvolatile serial RAM memory
* organized as 2048 x 8 bits and addressable as eight I2C devices
* 0x50 ... 0x57 each 256 bytes in size
*
*/
#define CONFIG_SYS_I2C_FRAM
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
/*
* There is no write delay with FRAM, write operations are performed at bus
* speed. Thus, no status polling or write delay is needed.

View File

@@ -49,7 +49,6 @@ Serial console configuration
/*
* Command line configuration.
*/
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_PCI
@@ -120,31 +119,6 @@ IPB Bus clocking configuration.
#define CONFIG_PCI_IO_SIZE 0x01000000
#define CONFIG_SYS_XLB_PIPELINING 1
/*---------------------------------------------------------------------------
I2C configuration
---------------------------------------------------------------------------*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*---------------------------------------------------------------------------
EEPROM CAT24WC32 configuration
---------------------------------------------------------------------------*/
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 /* 1010100x */
#define CONFIG_SYS_I2C_FACT_ADDR 0x52 /* EEPROM CAT24WC32 */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
#define CONFIG_SYS_EEPROM_SIZE 2048
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 15
/*---------------------------------------------------------------------------
RTC configuration
---------------------------------------------------------------------------*/
#define RTC
#define CONFIG_RTC_PCF8563 1
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
/*---------------------------------------------------------------------------
Flash configuration
---------------------------------------------------------------------------*/
@@ -172,11 +146,10 @@ RTC configuration
Environment settings
---------------------------------------------------------------------------*/
/* pcm030 ships with environment is EEPROM by default */
#define CONFIG_ENV_IS_IN_EEPROM 1
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_OFFSET 0x00 /* environment starts at the */
/*beginning of the EEPROM */
#define CONFIG_ENV_SIZE CONFIG_SYS_EEPROM_SIZE
#define CONFIG_ENV_SIZE 2048
#define CONFIG_ENV_OVERWRITE 1

View File

@@ -301,34 +301,11 @@
#define CONFIG_SYS_PDM360NG_COPROC_READ_DELAY 5000
#define CONFIG_SYS_PDM360NG_COPROC_BAUDRATE 38400
/*
* I2C
*/
#define CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
/* I2C speed and slave address */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* IIM - IC Identification Module
*/
#undef CONFIG_FSL_IIM
/*
* EEPROM configuration
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM addr */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* ST AT24C01 */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-Byte Write Mode */
/*
* MAC addr in EEPROM
*/
#define CONFIG_SYS_I2C_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_MAC_OFFSET 0x10
/*
* Enabled only to delete "ethaddr" before testing
* "ethaddr" setting from EEPROM
@@ -344,12 +321,6 @@
#define CONFIG_FEC_AN_TIMEOUT 1
#define CONFIG_HAS_ETH0
/*
* Configure on-board RTC
*/
#define CONFIG_RTC_M41T62 /* use M41T00 rtc via i2c */
#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */
/*
* Environment
*/
@@ -367,7 +338,6 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_REGINFO
#undef CONFIG_CMD_FUSE

View File

@@ -40,20 +40,6 @@
# define CONFIG_SMC911X_BASE (0x84000000)
#endif
/* I2C */
#define CONFIG_SH_SH7734_I2C 1
#define CONFIG_HARD_I2C 1
#define CONFIG_I2C_MULTI_BUS 1
#define CONFIG_SYS_MAX_I2C_BUS 2
#define CONFIG_SYS_I2C_MODULE 0
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x50
#define CONFIG_SH_I2C_DATA_HIGH 4
#define CONFIG_SH_I2C_DATA_LOW 5
#define CONFIG_SH_I2C_CLOCK 500000000
#define CONFIG_SH_I2C_BASE0 0xFFC70000
#define CONFIG_SH_I2C_BASE1 0xFFC7100
/* undef to save memory */
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */

View File

@@ -97,16 +97,6 @@
#define CONFIG_PHY_MICREL
#endif
#if 0 /* Disable until the I2C driver will be updated */
/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_BASE I2C0_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED 100000
#endif
#if 0 /* Disable until the FLASH will be implemented */
#define CONFIG_SYS_USE_NAND
#endif

View File

@@ -134,27 +134,6 @@
*/
#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
*/
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_I2C_SLAVE 0x7F
/*
* EEPROM configuration
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
/*
* RTC configuration
*/
#define CONFIG_SYS_I2C_RTC_ADDR 0x51
/*
* Flash configuration - use CFI driver
*/

View File

@@ -706,9 +706,6 @@ void i2c_early_init_f(void);
#endif
void i2c_init(int speed, int slaveaddr);
void i2c_init_board(void);
#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
void i2c_board_late_init(void);
#endif
#ifdef CONFIG_SYS_I2C
/*