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dm: treewide: Rename 'platdata' variables to just 'plat'

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We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
2020-12-03 16:55:18 -07:00
parent 41575d8e4c
commit caa4daa2ae
575 changed files with 1633 additions and 1644 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-imx/mx6/soc.c
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@@ -46,7 +46,7 @@ static const struct imx_thermal_plat imx6_thermal_plat = {
U_BOOT_DEVICE(imx6_thermal) = {
.name = "imx_thermal",
.platdata = &imx6_thermal_plat,
.plat = &imx6_thermal_plat,
};
#endif

2
arch/arm/mach-imx/mx7/soc.c
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@@ -62,7 +62,7 @@ static const struct imx_thermal_plat imx7_thermal_plat = {
U_BOOT_DEVICE(imx7_thermal) = {
.name = "imx_thermal",
.platdata = &imx7_thermal_plat,
.plat = &imx7_thermal_plat,
};
#endif

2
arch/arm/mach-omap2/am33xx/board.c
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@@ -157,7 +157,7 @@ static const struct omap3_spi_plat omap3_spi_pdata = {
U_BOOT_DEVICE(am33xx_spi) = {
.name = "omap3_spi",
.platdata = &omap3_spi_pdata,
.plat = &omap3_spi_pdata,
};
#endif
#endif

4
arch/arm/mach-rockchip/spl-boot-order.c
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@@ -46,7 +46,7 @@ static int spl_node_to_boot_device(int node)
dev;
device_find_next_child(&dev)) {
if (device_get_uclass_id(dev) == UCLASS_BLK) {
desc = dev_get_uclass_platdata(dev);
desc = dev_get_uclass_plat(dev);
break;
}
}
@@ -99,7 +99,7 @@ __weak const char *board_spl_was_booted_from(void)
void board_boot_order(u32 *spl_boot_list)
{
/* In case of no fdt (or only platdata), use spl_boot_device() */
/* In case of no fdt (or only plat), use spl_boot_device() */
if (!CONFIG_IS_ENABLED(OF_CONTROL) || CONFIG_IS_ENABLED(OF_PLATDATA)) {
spl_boot_list[0] = spl_boot_device();
return;

2
arch/arm/mach-stm32mp/bsec.c
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@@ -513,7 +513,7 @@ U_BOOT_DRIVER(stm32mp_bsec) = {
.id = UCLASS_MISC,
.of_match = stm32mp_bsec_ids,
.ofdata_to_platdata = stm32mp_bsec_ofdata_to_platdata,
.platdata_auto = sizeof(struct stm32mp_bsec_platdata),
.plat_auto = sizeof(struct stm32mp_bsec_platdata),
.ops = &stm32mp_bsec_ops,
.probe = stm32mp_bsec_probe,
};

12
arch/arm/mach-stm32mp/pwr_regulator.c
View File

@@ -135,9 +135,9 @@ static const struct stm32mp_pwr_reg_info *stm32mp_pwr_reg_infos[] = {
static int stm32mp_pwr_regulator_probe(struct udevice *dev)
{
const struct stm32mp_pwr_reg_info **p = stm32mp_pwr_reg_infos;
struct dm_regulator_uclass_platdata *uc_pdata;
struct dm_regulator_uclass_plat *uc_pdata;
uc_pdata = dev_get_uclass_platdata(dev);
uc_pdata = dev_get_uclass_plat(dev);
while (*p) {
int rc;
@@ -172,9 +172,9 @@ static int stm32mp_pwr_regulator_probe(struct udevice *dev)
static int stm32mp_pwr_regulator_set_value(struct udevice *dev, int uV)
{
struct dm_regulator_uclass_platdata *uc_pdata;
struct dm_regulator_uclass_plat *uc_pdata;
uc_pdata = dev_get_uclass_platdata(dev);
uc_pdata = dev_get_uclass_plat(dev);
if (!uc_pdata)
return -ENXIO;
@@ -188,9 +188,9 @@ static int stm32mp_pwr_regulator_set_value(struct udevice *dev, int uV)
static int stm32mp_pwr_regulator_get_value(struct udevice *dev)
{
struct dm_regulator_uclass_platdata *uc_pdata;
struct dm_regulator_uclass_plat *uc_pdata;
uc_pdata = dev_get_uclass_platdata(dev);
uc_pdata = dev_get_uclass_plat(dev);
if (!uc_pdata)
return -ENXIO;

2
arch/x86/cpu/apollolake/hostbridge.c
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@@ -403,7 +403,7 @@ U_BOOT_DRIVER(intel_apl_hostbridge) = {
.ofdata_to_platdata = apl_hostbridge_ofdata_to_platdata,
.probe = apl_hostbridge_probe,
.remove = apl_hostbridge_remove,
.platdata_auto = sizeof(struct apl_hostbridge_platdata),
.plat_auto = sizeof(struct apl_hostbridge_platdata),
ACPI_OPS_PTR(&apl_hostbridge_acpi_ops)
.flags = DM_FLAG_OS_PREPARE,
};

2
arch/x86/cpu/apollolake/pmc.c
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@@ -224,5 +224,5 @@ U_BOOT_DRIVER(intel_apl_pmc) = {
.ofdata_to_platdata = apl_pmc_ofdata_to_uc_platdata,
.probe = apl_pmc_probe,
.ops = &apl_pmc_ops,
.platdata_auto = sizeof(struct apl_pmc_platdata),
.plat_auto = sizeof(struct apl_pmc_platdata),
};

4
arch/x86/cpu/apollolake/spl.c
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@@ -85,7 +85,7 @@ static int apl_flash_probe(struct udevice *dev)
/*
* Manually set the parent of the SPI flash to SPI, since dtoc doesn't. We also
* need to allocate the parent_platdata since by the time this function is
* need to allocate the parent_plat since by the time this function is
* called device_bind() has already gone past that step.
*/
static int apl_flash_bind(struct udevice *dev)
@@ -104,7 +104,7 @@ static int apl_flash_bind(struct udevice *dev)
plat = calloc(sizeof(*plat), 1);
if (!plat)
return -ENOMEM;
dev->parent_platdata = plat;
dev->parent_plat = plat;
}
return 0;

6
arch/x86/cpu/apollolake/uart.c
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@@ -92,7 +92,7 @@ static int apl_ns16550_ofdata_to_platdata(struct udevice *dev)
struct ns16550_platdata *plat;
/*
* Convert our platdata to the ns16550's platdata, so we can just use
* Convert our plat to the ns16550's plat, so we can just use
* that driver
*/
plat = malloc(sizeof(*plat));
@@ -105,7 +105,7 @@ static int apl_ns16550_ofdata_to_platdata(struct udevice *dev)
plat->clock = dtplat->clock_frequency;
plat->fcr = UART_FCR_DEFVAL;
plat->bdf = pci_ofplat_get_devfn(dtplat->reg[0]);
dev->platdata = plat;
dev->plat = plat;
#else
int ret;
@@ -126,7 +126,7 @@ U_BOOT_DRIVER(intel_apl_ns16550) = {
.name = "intel_apl_ns16550",
.id = UCLASS_SERIAL,
.of_match = apl_ns16550_serial_ids,
.platdata_auto = sizeof(struct ns16550_platdata),
.plat_auto = sizeof(struct ns16550_platdata),
.priv_auto = sizeof(struct NS16550),
.ops = &ns16550_serial_ops,
.ofdata_to_platdata = apl_ns16550_ofdata_to_platdata,

2
arch/x86/cpu/broadwell/sata.c
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@@ -266,5 +266,5 @@ U_BOOT_DRIVER(ahci_broadwell_drv) = {
.of_match = broadwell_ahci_ids,
.ofdata_to_platdata = broadwell_sata_ofdata_to_platdata,
.probe = broadwell_sata_probe,
.platdata_auto = sizeof(struct sata_platdata),
.plat_auto = sizeof(struct sata_platdata),
};

2
arch/x86/cpu/cpu_x86.c
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@@ -13,7 +13,7 @@ DECLARE_GLOBAL_DATA_PTR;
int cpu_x86_bind(struct udevice *dev)
{
struct cpu_platdata *plat = dev_get_parent_platdata(dev);
struct cpu_platdata *plat = dev_get_parent_plat(dev);
struct cpuid_result res;
plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),

2
arch/x86/cpu/intel_common/itss.c
View File

@@ -242,6 +242,6 @@ U_BOOT_DRIVER(intel_itss) = {
.ops = &itss_ops,
.bind = itss_bind,
.ofdata_to_platdata = itss_ofdata_to_platdata,
.platdata_auto = sizeof(struct itss_platdata),
.plat_auto = sizeof(struct itss_platdata),
.priv_auto = sizeof(struct itss_priv),
};

6
arch/x86/cpu/intel_common/p2sb.c
View File

@@ -167,7 +167,7 @@ static int p2sb_remove(struct udevice *dev)
static int p2sb_child_post_bind(struct udevice *dev)
{
#if !CONFIG_IS_ENABLED(OF_PLATDATA)
struct p2sb_child_platdata *pplat = dev_get_parent_platdata(dev);
struct p2sb_child_platdata *pplat = dev_get_parent_plat(dev);
int ret;
u32 pid;
@@ -197,8 +197,8 @@ U_BOOT_DRIVER(intel_p2sb) = {
.remove = p2sb_remove,
.ops = &p2sb_ops,
.ofdata_to_platdata = p2sb_ofdata_to_platdata,
.platdata_auto = sizeof(struct p2sb_platdata),
.per_child_platdata_auto =
.plat_auto = sizeof(struct p2sb_platdata),
.per_child_plat_auto =
sizeof(struct p2sb_child_platdata),
.child_post_bind = p2sb_child_post_bind,
.flags = DM_FLAG_OS_PREPARE,

4
arch/x86/cpu/mp_init.c
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@@ -221,7 +221,7 @@ static int find_cpu_by_apic_id(int apic_id, struct udevice **devp)
for (uclass_find_first_device(UCLASS_CPU, &dev);
dev;
uclass_find_next_device(&dev)) {
struct cpu_platdata *plat = dev_get_parent_platdata(dev);
struct cpu_platdata *plat = dev_get_parent_plat(dev);
if (plat->cpu_id == apic_id) {
*devp = dev;
@@ -706,7 +706,7 @@ static int ap_wait_for_instruction(struct udevice *cpu, void *unused)
static int mp_init_cpu(struct udevice *cpu, void *unused)
{
struct cpu_platdata *plat = dev_get_parent_platdata(cpu);
struct cpu_platdata *plat = dev_get_parent_plat(cpu);
plat->ucode_version = microcode_read_rev();
plat->device_id = gd->arch.x86_device;

2
arch/x86/cpu/qfw_cpu.c
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@@ -67,7 +67,7 @@ int qemu_cpu_fixup(void)
printf("binding cpu@%d failed: %d\n", cpu_num, ret);
return ret;
}
plat = dev_get_parent_platdata(dev);
plat = dev_get_parent_plat(dev);
plat->cpu_id = cpu_num;
}
return 0;

4
arch/x86/cpu/slimbootloader/serial.c
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@@ -18,7 +18,7 @@ static int slimbootloader_serial_ofdata_to_platdata(struct udevice *dev)
{
const efi_guid_t guid = SBL_SERIAL_PORT_INFO_GUID;
struct sbl_serial_port_info *data;
struct ns16550_platdata *plat = dev->platdata;
struct ns16550_platdata *plat = dev->plat;
if (!gd->arch.hob_list)
panic("hob list not found!");
@@ -58,7 +58,7 @@ U_BOOT_DRIVER(serial_slimbootloader) = {
.id = UCLASS_SERIAL,
.of_match = slimbootloader_serial_ids,
.ofdata_to_platdata = slimbootloader_serial_ofdata_to_platdata,
.platdata_auto = sizeof(struct ns16550_platdata),
.plat_auto = sizeof(struct ns16550_platdata),
.priv_auto = sizeof(struct NS16550),
.probe = ns16550_serial_probe,
.ops = &ns16550_serial_ops,

2
arch/x86/include/asm/intel_pinctrl.h
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@@ -162,7 +162,7 @@ extern const struct pinctrl_ops intel_pinctrl_ops;
int intel_pinctrl_probe(struct udevice *dev);
/**
* intel_pinctrl_ofdata_to_platdata() - Handle common platdata setup
* intel_pinctrl_ofdata_to_platdata() - Handle common plat setup
*
* @dev: Pinctrl device
* @comm: Pad community for this device

2
arch/x86/lib/acpi_table.c
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@@ -74,7 +74,7 @@ int acpi_create_madt_lapics(u32 current)
for (uclass_find_first_device(UCLASS_CPU, &dev);
dev;
uclass_find_next_device(&dev)) {
struct cpu_platdata *plat = dev_get_parent_platdata(dev);
struct cpu_platdata *plat = dev_get_parent_plat(dev);
int length;
length = acpi_create_madt_lapic(

4
arch/x86/lib/fsp/fsp_graphics.c
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@@ -80,7 +80,7 @@ static int save_vesa_mode(struct vesa_mode_info *vesa)
static int fsp_video_probe(struct udevice *dev)
{
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
struct video_uc_platdata *plat = dev_get_uclass_plat(dev);
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct vesa_mode_info *vesa = &mode_info.vesa;
int ret;
@@ -124,7 +124,7 @@ err:
static int fsp_video_bind(struct udevice *dev)
{
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
struct video_uc_platdata *plat = dev_get_uclass_plat(dev);
/* Set the maximum supported resolution */
plat->size = 2560 * 1600 * 4;

2
arch/x86/lib/mpspec.c
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@@ -81,7 +81,7 @@ void mp_write_processor(struct mp_config_table *mc)
for (uclass_find_first_device(UCLASS_CPU, &dev);
dev;
uclass_find_next_device(&dev)) {
struct cpu_platdata *plat = dev_get_parent_platdata(dev);
struct cpu_platdata *plat = dev_get_parent_plat(dev);
u8 cpuflag = MPC_CPU_EN;
if (!device_active(dev))

2
arch/x86/lib/sfi.c
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@@ -84,7 +84,7 @@ static int sfi_write_cpus(struct table_info *tab)
for (uclass_find_first_device(UCLASS_CPU, &dev);
dev;
uclass_find_next_device(&dev)) {
struct cpu_platdata *plat = dev_get_parent_platdata(dev);
struct cpu_platdata *plat = dev_get_parent_plat(dev);
if (!device_active(dev))
continue;