From 70c2f590c88b75a9b41d5b655ad7e4475ba06d5f Mon Sep 17 00:00:00 2001 From: Shyam Saini Date: Thu, 18 Apr 2019 19:47:39 +0530 Subject: [PATCH 01/60] include: configs: Increase CONFIG_SYS_BOOTM_LEN to 16MB The default value of CONFIG_SYS_BOOTM_LEN is 0x800000 i.e, 8MB which causes board reset because of larger uImage size. This was tested on rk3288 Amarula Vyasa and rk3288 Asus Tinker boards. Error log snippet: Booting using the fdt blob at 0x1f00000 Loading Kernel Image ... Image too large: increase CONFIG_SYS_BOOTM_LEN Must RESET board to recover resetting ... Reviewed-by: Jagan Teki Signed-off-by: Shyam Saini Reviewed-by: Kever Yang --- include/configs/rk3288_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 5472a90633..5c3b35ccba 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -9,6 +9,8 @@ #include #include "rockchip-common.h" +#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* 16MB */ + #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 From 7a9dd60749bea72dfe985fca8748583129bb3dab Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:08 +0800 Subject: [PATCH 02/60] rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang --- include/configs/rk3188_common.h | 2 -- include/configs/rk3328_common.h | 2 -- include/configs/rk3368_common.h | 2 -- include/configs/rk3399_common.h | 2 -- 4 files changed, 8 deletions(-) diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 1d41702846..ec90088309 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_NS16550_MEM32 - #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */ #endif diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 2a81c803b6..3a8e37ef98 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -12,8 +12,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 #define CONFIG_SPL_STACK 0x00400000 diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 8a1e3118ae..1a859a7e43 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -23,8 +23,6 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020 #define COUNTER_FREQUENCY 24000000 -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00280000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 8df0180284..63eac19a4e 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -15,8 +15,6 @@ #define COUNTER_FREQUENCY 24000000 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0 -#define CONFIG_SYS_NS16550_MEM32 - #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 From 5f2468086743e95d163b3cbd9244d3acf35ea558 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:09 +0800 Subject: [PATCH 03/60] rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang --- include/configs/rk3128_common.h | 2 ++ include/configs/rk3188_common.h | 1 + include/configs/rk322x_common.h | 1 + include/configs/rk3288_common.h | 2 ++ include/configs/rk3328_common.h | 2 ++ include/configs/rk3368_common.h | 2 ++ include/configs/rk3399_common.h | 2 ++ include/configs/rv1108_common.h | 2 ++ 8 files changed, 14 insertions(+) diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 20d62439fb..d12696d6b3 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -19,6 +19,8 @@ #define CONFIG_SYS_ARCH_TIMER #define CONFIG_SYS_HZ_CLOCK 24000000 +#define CONFIG_IRAM_BASE 0x10080000 + #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index ec90088309..92524b06ad 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -23,6 +23,7 @@ #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800) #define CONFIG_ROCKCHIP_CHIP_TAG "RK31" +#define CONFIG_IRAM_BASE 0x10080000 /* spl size 32kb sram - 2kb bootrom */ #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800) diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index cc08699944..9582cdfb64 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -24,6 +24,7 @@ #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK32" +#define CONFIG_IRAM_BASE 0x10080000 #define CONFIG_SYS_SDRAM_BASE 0x60000000 #define SDRAM_BANK_SIZE (512UL << 20UL) diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 5c3b35ccba..da10e29139 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -27,6 +27,8 @@ #define CONFIG_SYS_LOAD_ADDR 0x00800800 #define CONFIG_SPL_STACK 0xff718000 +#define CONFIG_IRAM_BASE 0xff700000 + /* RAW SD card / eMMC locations. */ #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 3a8e37ef98..1cf45bbb3e 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -8,6 +8,8 @@ #include "rockchip-common.h" +#define CONFIG_IRAM_BASE 0xff090000 + #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 1a859a7e43..340413dbba 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -23,6 +23,8 @@ #define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020 #define COUNTER_FREQUENCY 24000000 +#define CONFIG_IRAM_BASE 0xff8c0000 + #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00280000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 63eac19a4e..12ad60d443 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -15,6 +15,8 @@ #define COUNTER_FREQUENCY 24000000 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0 +#define CONFIG_IRAM_BASE 0xff8c0000 + #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 6f61f01538..691aa51e98 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -8,6 +8,8 @@ #include #include "rockchip-common.h" +#define CONFIG_IRAM_BASE 0x10080000 + #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT From cd59501f21124a3aa228bd1998ee8a61176f1309 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:10 +0800 Subject: [PATCH 04/60] rockchip: intruduce common BROM_BOOTSOURCE_ID_ADDR The boot source from BootRom is store at a fix offset of IRAM, update to use the common macro instead of rk3399 specific one. Signed-off-by: Kever Yang --- arch/arm/include/asm/arch-rockchip/bootrom.h | 2 +- arch/arm/mach-rockchip/rk3399-board-spl.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h index d67f43f09c..3499227e29 100644 --- a/arch/arm/include/asm/arch-rockchip/bootrom.h +++ b/arch/arm/include/asm/arch-rockchip/bootrom.h @@ -55,6 +55,6 @@ enum { /** * Locations of the boot-device identifier in SRAM */ -#define RK3399_BROM_BOOTSOURCE_ID_ADDR 0xff8c0010 +#define BROM_BOOTSOURCE_ID_ADDR (CONFIG_IRAM_BASE + 0x10) #endif diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 7154d8e5d0..3624c8ea65 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -35,7 +35,7 @@ static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { const char *board_spl_was_booted_from(void) { - u32 bootdevice_brom_id = readl(RK3399_BROM_BOOTSOURCE_ID_ADDR); + u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR); const char *bootdevice_ofpath = NULL; if (bootdevice_brom_id < ARRAY_SIZE(boot_devices)) From bfcf15aad2aebe393aefcc2b0e7cc64e8193fae0 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:11 +0800 Subject: [PATCH 05/60] rockchip: declear boot_devices in bootrom.h boot_devices may defined in soc file, and used in board file, we need to delear it in header file. Signed-off-by: Kever Yang --- arch/arm/include/asm/arch-rockchip/bootrom.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h index 3499227e29..0da78f30b6 100644 --- a/arch/arm/include/asm/arch-rockchip/bootrom.h +++ b/arch/arm/include/asm/arch-rockchip/bootrom.h @@ -52,6 +52,8 @@ enum { BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB }; +extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1]; + /** * Locations of the boot-device identifier in SRAM */ From 49105fb7ed1c4e91409307a33363fc2a2c7aa711 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:12 +0800 Subject: [PATCH 06/60] rockchip: add common spl board file The common spl board file handles board_init_f() in SPL, and with board_early_init_f() and arch_cpu_init() callback, other operateion after board_init_f() should go to board specific spl_board_init(). Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 8 ++ arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/spl.c | 154 ++++++++++++++++++++++++++++++++ 3 files changed, 163 insertions(+) create mode 100644 arch/arm/mach-rockchip/spl.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 17f31e89f3..ac86532c88 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -227,6 +227,14 @@ config TPL_ROCKCHIP_BACK_TO_BROM SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. +config SPL_ROCKCHIP_COMMON_BOARD + bool "Rockchip SPL common board file" + depends on SPL + help + Rockchip SoCs have similar boot process, SPL is mainly in charge of + load and boot Trust ATF/U-Boot firmware, and DRAM init if there is + no TPL for the board. + config TPL_ROCKCHIP_COMMON_BOARD bool "" depends on TPL diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index a12b8d4434..b831ec6f2b 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -7,6 +7,7 @@ # inaccessible/protected memory (and the bootrom-helper assumes that # the stack-pointer is valid before switching to the U-Boot stack). obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o +obj-spl-$(CONFIG_SPL_ROCKCHIP_COMMON_BOARD) += spl.o spl-boot-order.o obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c new file mode 100644 index 0000000000..33137cc5ef --- /dev/null +++ b/arch/arm/mach-rockchip/spl.c @@ -0,0 +1,154 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +void board_return_to_bootrom(void) +{ + back_to_bootrom(BROM_BOOT_NEXTSTAGE); +} + +__weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { +}; + +const char *board_spl_was_booted_from(void) +{ + u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR); + const char *bootdevice_ofpath = NULL; + + if (bootdevice_brom_id < ARRAY_SIZE(boot_devices)) + bootdevice_ofpath = boot_devices[bootdevice_brom_id]; + + if (bootdevice_ofpath) + debug("%s: brom_bootdevice_id %x maps to '%s'\n", + __func__, bootdevice_brom_id, bootdevice_ofpath); + else + debug("%s: failed to resolve brom_bootdevice_id %x\n", + __func__, bootdevice_brom_id); + + return bootdevice_ofpath; +} + +u32 spl_boot_device(void) +{ + u32 boot_device = BOOT_DEVICE_MMC1; + +#if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ + defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ + defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) + return BOOT_DEVICE_SPI; +#endif + if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) + return BOOT_DEVICE_BOOTROM; + + return boot_device; +} + +u32 spl_boot_mode(const u32 boot_device) +{ + return MMCSD_MODE_RAW; +} + +#if !defined(CONFIG_ROCKCHIP_RK3188) +#define TIMER_LOAD_COUNT_L 0x00 +#define TIMER_LOAD_COUNT_H 0x04 +#define TIMER_CONTROL_REG 0x10 +#define TIMER_EN 0x1 +#define TIMER_FMODE BIT(0) +#define TIMER_RMODE BIT(1) + +__weak void rockchip_stimer_init(void) +{ + /* If Timer already enabled, don't re-init it */ + u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); + + if (reg & TIMER_EN) + return; +#ifndef CONFIG_ARM64 + asm volatile("mcr p15, 0, %0, c14, c0, 0" + : : "r"(COUNTER_FREQUENCY)); +#endif + writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); + writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); + writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + + TIMER_CONTROL_REG); +} +#endif + +__weak int board_early_init_f(void) +{ + return 0; +} + +__weak int arch_cpu_init(void) +{ + return 0; +} + +void board_init_f(ulong dummy) +{ + int ret; +#if !defined(CONFIG_SUPPORT_TPL) || defined(CONFIG_SPL_OS_BOOT) + struct udevice *dev; +#endif + +#ifdef CONFIG_DEBUG_UART + /* + * Debug UART can be used from here if required: + * + * debug_uart_init(); + * printch('a'); + * printhex8(0x1234); + * printascii("string"); + */ + debug_uart_init(); + debug("\nspl:debug uart enabled in %s\n", __func__); +#endif + + board_early_init_f(); + + ret = spl_early_init(); + if (ret) { + printf("spl_early_init() failed: %d\n", ret); + hang(); + } + arch_cpu_init(); +#if !defined(CONFIG_SUPPORT_TPL) || defined(CONFIG_SPL_OS_BOOT) + debug("\nspl:init dram\n"); + ret = uclass_get_device(UCLASS_RAM, 0, &dev); + if (ret) { + printf("DRAM init failed: %d\n", ret); + return; + } +#endif +#if !defined(CONFIG_ROCKCHIP_RK3188) + rockchip_stimer_init(); +#endif +#ifdef CONFIG_SYS_ARCH_TIMER + /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ + timer_init(); +#endif + preloader_console_init(); +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif From 84a6a27ae3fffda333e801c0fa4c64da85eff55b Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:13 +0800 Subject: [PATCH 07/60] rockchip: rk3188: init CPU freq in clock driver Init CPU frquency in clock driver instead of in SPL board file, this will help for use common board file later. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3188-board-spl.c | 22 ---------------------- drivers/clk/rockchip/clk_rk3188.c | 3 +++ 2 files changed, 3 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index c3efe0d7a9..017bc6e805 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -70,27 +70,6 @@ fallback: return BOOT_DEVICE_MMC1; } -static int setup_arm_clock(void) -{ - struct udevice *dev; - struct clk clk; - int ret; - - ret = rockchip_get_clk(&dev); - if (ret) - return ret; - - clk.id = CLK_ARM; - ret = clk_request(dev, &clk); - if (ret < 0) - return ret; - - ret = clk_set_rate(&clk, 600000000); - - clk_free(&clk); - return ret; -} - void board_init_f(ulong dummy) { struct udevice *dev; @@ -146,7 +125,6 @@ void board_init_f(ulong dummy) return; } - setup_arm_clock(); #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) back_to_bootrom(BROM_BOOT_NEXTSTAGE); #endif diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c index 9bb9959c9d..dda686cfb3 100644 --- a/drivers/clk/rockchip/clk_rk3188.c +++ b/drivers/clk/rockchip/clk_rk3188.c @@ -562,6 +562,9 @@ static int rk3188_clk_probe(struct udevice *dev) #endif rkclk_init(priv->cru, priv->grf, priv->has_bwadj); + + /* Init CPU frequency */ + rkclk_configure_cpu(priv->cru, priv->grf, APLL_HZ, priv->has_bwadj); #endif return 0; From 4dd4fc32dbe1f0e9359031319d03617789266fe8 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:14 +0800 Subject: [PATCH 08/60] rockchip: rk3188: move usb uart init into arch_cpu_init() The SoC feature init will be better to use arch_cpu_init() and goes to soc file. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3188-board-spl.c | 27 +++++----------------- arch/arm/mach-rockchip/rk3188/rk3188.c | 28 ++++++++++++++++++++++- 2 files changed, 33 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index 017bc6e805..05ae3eca98 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -17,10 +17,7 @@ #include #include #include -#include -#include #include -#include #include #include #include @@ -70,6 +67,11 @@ fallback: return BOOT_DEVICE_MMC1; } +__weak int arch_cpu_init(void) +{ + return 0; +} + void board_init_f(ulong dummy) { struct udevice *dev; @@ -88,24 +90,7 @@ void board_init_f(ulong dummy) printascii("U-Boot SPL board init"); #endif -#ifdef CONFIG_ROCKCHIP_USB_UART - rk_clrsetreg(&grf->uoc0_con[0], - SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK, - 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT | - 1 << COMMON_ON_N_SHIFT); - rk_clrsetreg(&grf->uoc0_con[2], - SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT); - rk_clrsetreg(&grf->uoc0_con[3], - OPMODE_MASK | XCVRSELECT_MASK | - TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK, - OPMODE_NODRIVING << OPMODE_SHIFT | - XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT | - 1 << TERMSEL_FULLSPEED_SHIFT | - 1 << SUSPENDN_SHIFT); - rk_clrsetreg(&grf->uoc0_con[0], - BYPASSSEL_MASK | BYPASSDMEN_MASK, - 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT); -#endif + arch_cpu_init(); ret = spl_early_init(); if (ret) { diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c index 933484e0df..f7e12a95b2 100644 --- a/arch/arm/mach-rockchip/rk3188/rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -7,11 +7,12 @@ #include #include +#define GRF_BASE 0x20008000 + #ifdef CONFIG_DEBUG_UART_BOARD_INIT void board_debug_uart_init(void) { /* Enable early UART on the RK3188 */ -#define GRF_BASE 0x20008000 struct rk3188_grf * const grf = (void *)GRF_BASE; enum { GPIO1B1_SHIFT = 2, @@ -34,3 +35,28 @@ void board_debug_uart_init(void) GPIO1B0_UART2_SIN << GPIO1B0_SHIFT); } #endif + +int arch_cpu_init(void) +{ +#ifdef CONFIG_ROCKCHIP_USB_UART + struct rk3188_grf * const grf = (void *)GRF_BASE; + + rk_clrsetreg(&grf->uoc0_con[0], + SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK, + 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT | + 1 << COMMON_ON_N_SHIFT); + rk_clrsetreg(&grf->uoc0_con[2], + SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT); + rk_clrsetreg(&grf->uoc0_con[3], + OPMODE_MASK | XCVRSELECT_MASK | + TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK, + OPMODE_NODRIVING << OPMODE_SHIFT | + XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT | + 1 << TERMSEL_FULLSPEED_SHIFT | + 1 << SUSPENDN_SHIFT); + rk_clrsetreg(&grf->uoc0_con[0], + BYPASSSEL_MASK | BYPASSDMEN_MASK, + 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT); +#endif + return 0; +} From bf1133b1e9c17d9434f16e4c60e7435de43ce903 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:15 +0800 Subject: [PATCH 09/60] rockchip: Migrate to use BOOTROM_SUPPORT driver SPL bootrom support is a boot device just like mmc and etc, use formal boot device instead of jump to bootrom directly. Enable the Kconfig by default if ROCKCHIP_BACK_TO_BROM is enabled. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 9 +++------ arch/arm/mach-rockchip/rk3188-board-spl.c | 13 ++++++------- arch/arm/mach-rockchip/rk3288-board-spl.c | 13 ++++++------- 3 files changed, 15 insertions(+), 20 deletions(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ac86532c88..2b4e3c7ce4 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -34,8 +34,8 @@ config ROCKCHIP_RK3188 select SPL_RAM select SPL_DRIVERS_MISC_SUPPORT select SPL_ROCKCHIP_EARLYRETURN_TO_BROM + select SPL_ROCKCHIP_BACK_TO_BROM select BOARD_LATE_INIT - select ROCKCHIP_BROM_HELPER help The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two @@ -59,9 +59,7 @@ config ROCKCHIP_RK322X select SPL_DRIVERS_MISC_SUPPORT imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT - imply TPL_BOOTROM_SUPPORT imply TPL_ROCKCHIP_COMMON_BOARD - select ROCKCHIP_BROM_HELPER select TPL_LIBCOMMON_SUPPORT select TPL_LIBGENERIC_SUPPORT help @@ -77,7 +75,6 @@ config ROCKCHIP_RK3288 select SUPPORT_SPL select SPL select SUPPORT_TPL - imply TPL_BOOTROM_SUPPORT imply TPL_CLK imply TPL_DM imply TPL_DRIVERS_MISC_SUPPORT @@ -169,12 +166,10 @@ config ROCKCHIP_RK3399 select DM_PMIC select DM_REGULATOR_FIXED select BOARD_LATE_INIT - select ROCKCHIP_BROM_HELPER imply TPL_SERIAL_SUPPORT imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT imply TPL_SYS_MALLOC_SIMPLE - imply TPL_BOOTROM_SUPPORT imply TPL_DRIVERS_MISC_SUPPORT imply TPL_OF_CONTROL imply TPL_DM @@ -211,6 +206,7 @@ config SPL_ROCKCHIP_BACK_TO_BROM bool "SPL returns to bootrom" default y if ROCKCHIP_RK3036 select ROCKCHIP_BROM_HELPER + select SPL_BOOTROM_SUPPORT depends on SPL help Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, @@ -221,6 +217,7 @@ config TPL_ROCKCHIP_BACK_TO_BROM bool "TPL returns to bootrom" default y select ROCKCHIP_BROM_HELPER + select TPL_BOOTROM_SUPPORT depends on TPL help Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled, diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index 05ae3eca98..33fa7d0bb7 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -26,6 +26,11 @@ DECLARE_GLOBAL_DATA_PTR; +void board_return_to_bootrom(void) +{ + back_to_bootrom(BROM_BOOT_NEXTSTAGE); +} + u32 spl_boot_device(void) { #if !CONFIG_IS_ENABLED(OF_PLATDATA) @@ -109,10 +114,6 @@ void board_init_f(ulong dummy) debug("DRAM init failed: %d\n", ret); return; } - -#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) - back_to_bootrom(BROM_BOOT_NEXTSTAGE); -#endif } static int setup_led(void) @@ -149,8 +150,6 @@ void spl_board_init(void) } preloader_console_init(); -#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) - back_to_bootrom(BROM_BOOT_NEXTSTAGE); -#endif + return; } diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index c2e168192c..9efba47aff 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -30,6 +30,11 @@ DECLARE_GLOBAL_DATA_PTR; +void board_return_to_bootrom(void) +{ + back_to_bootrom(BROM_BOOT_NEXTSTAGE); +} + u32 spl_boot_device(void) { #if !CONFIG_IS_ENABLED(OF_PLATDATA) @@ -187,10 +192,6 @@ void board_init_f(ulong dummy) return; } #endif - -#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) - back_to_bootrom(BROM_BOOT_NEXTSTAGE); -#endif } static int setup_led(void) @@ -227,9 +228,7 @@ void spl_board_init(void) } preloader_console_init(); -#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) - back_to_bootrom(BROM_BOOT_NEXTSTAGE); -#endif + return; } From 9323ffafc91223472fa32de8b815cb2b4bc6977a Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:16 +0800 Subject: [PATCH 10/60] rockchip: rk3188: move spl_board_init() into rk3188.c Clean up the rk3188.c so that we can re-use the common spl board file. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3188-board-spl.c | 36 ----------------------- arch/arm/mach-rockchip/rk3188/rk3188.c | 36 +++++++++++++++++++++++ 2 files changed, 36 insertions(+), 36 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c index 33fa7d0bb7..6370d3837e 100644 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ b/arch/arm/mach-rockchip/rk3188-board-spl.c @@ -114,42 +114,6 @@ void board_init_f(ulong dummy) debug("DRAM init failed: %d\n", ret); return; } -} - -static int setup_led(void) -{ -#ifdef CONFIG_SPL_LED - struct udevice *dev; - char *led_name; - int ret; - - led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led"); - if (!led_name) - return 0; - ret = led_get_by_label(led_name, &dev); - if (ret) { - debug("%s: get=%d\n", __func__, ret); - return ret; - } - ret = led_set_on(dev, 1); - if (ret) - return ret; -#endif - - return 0; -} - -void spl_board_init(void) -{ - int ret; - - ret = setup_led(); - if (ret) { - debug("LED ret=%d\n", ret); - hang(); - } preloader_console_init(); - - return; } diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c index f7e12a95b2..7a0b10a27d 100644 --- a/arch/arm/mach-rockchip/rk3188/rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -60,3 +60,39 @@ int arch_cpu_init(void) #endif return 0; } + +#ifdef CONFIG_SPL_BUILD +static int setup_led(void) +{ +#ifdef CONFIG_SPL_LED + struct udevice *dev; + char *led_name; + int ret; + + led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led"); + if (!led_name) + return 0; + ret = led_get_by_label(led_name, &dev); + if (ret) { + debug("%s: get=%d\n", __func__, ret); + return ret; + } + ret = led_set_on(dev, 1); + if (ret) + return ret; +#endif + + return 0; +} + +void spl_board_init(void) +{ + int ret; + + ret = setup_led(); + if (ret) { + debug("LED ret=%d\n", ret); + hang(); + } +} +#endif From 3b3c623e61319ae268c5ccb55078931161bc719e Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:17 +0800 Subject: [PATCH 11/60] rockchip: rk3188: add boot_devices mapping to support 'same-as-spl' The driver need a mapping to get the dts node by boot srouce ID. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3188/rk3188.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c index 7a0b10a27d..08792f1674 100644 --- a/arch/arm/mach-rockchip/rk3188/rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -4,11 +4,17 @@ */ #include #include +#include #include #include #define GRF_BASE 0x20008000 +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "dwmmc@1021c000", + [BROM_BOOTSOURCE_SD] = "dwmmc@10214000", +}; + #ifdef CONFIG_DEBUG_UART_BOARD_INIT void board_debug_uart_init(void) { From 4eb506322e5f788424bcbd409e2d5f2f404d1e28 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:18 +0800 Subject: [PATCH 12/60] rockchip: rk3188: migrate to use common spl board file rk3188 has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3188-board-spl.c | 119 ---------------------- 3 files changed, 1 insertion(+), 120 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3188-board-spl.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 2b4e3c7ce4..66d07f672e 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -36,6 +36,7 @@ config ROCKCHIP_RK3188 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM select SPL_ROCKCHIP_BACK_TO_BROM select BOARD_LATE_INIT + imply SPL_ROCKCHIP_COMMON_BOARD help The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index b831ec6f2b..b4797b4e0f 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -12,7 +12,6 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o -obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o diff --git a/arch/arm/mach-rockchip/rk3188-board-spl.c b/arch/arm/mach-rockchip/rk3188-board-spl.c deleted file mode 100644 index 6370d3837e..0000000000 --- a/arch/arm/mach-rockchip/rk3188-board-spl.c +++ /dev/null @@ -1,119 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2015 Google, Inc - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -void board_return_to_bootrom(void) -{ - back_to_bootrom(BROM_BOOT_NEXTSTAGE); -} - -u32 spl_boot_device(void) -{ -#if !CONFIG_IS_ENABLED(OF_PLATDATA) - const void *blob = gd->fdt_blob; - struct udevice *dev; - const char *bootdev; - int node; - int ret; - - bootdev = fdtdec_get_config_string(blob, "u-boot,boot0"); - debug("Boot device %s\n", bootdev); - if (!bootdev) - goto fallback; - - node = fdt_path_offset(blob, bootdev); - if (node < 0) { - debug("node=%d\n", node); - goto fallback; - } - ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev); - if (ret) { - debug("device at node %s/%d not found: %d\n", bootdev, node, - ret); - goto fallback; - } - debug("Found device %s\n", dev->name); - switch (device_get_uclass_id(dev)) { - case UCLASS_SPI_FLASH: - return BOOT_DEVICE_SPI; - case UCLASS_MMC: - return BOOT_DEVICE_MMC1; - default: - debug("Booting from device uclass '%s' not supported\n", - dev_get_uclass_name(dev)); - } - -fallback: -#endif - return BOOT_DEVICE_MMC1; -} - -__weak int arch_cpu_init(void) -{ - return 0; -} - -void board_init_f(ulong dummy) -{ - struct udevice *dev; - int ret; - -#ifdef CONFIG_DEBUG_UART - /* - * Debug UART can be used from here if required: - * - * debug_uart_init(); - * printch('a'); - * printhex8(0x1234); - * printascii("string"); - */ - debug_uart_init(); - printascii("U-Boot SPL board init"); -#endif - - arch_cpu_init(); - - ret = spl_early_init(); - if (ret) { - debug("spl_early_init() failed: %d\n", ret); - hang(); - } - - ret = rockchip_get_clk(&dev); - if (ret) { - debug("CLK init failed: %d\n", ret); - return; - } - - ret = uclass_get_device(UCLASS_RAM, 0, &dev); - if (ret) { - debug("DRAM init failed: %d\n", ret); - return; - } - - preloader_console_init(); -} From 7dc79f8af0be723524bd7a242049efaa10197576 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:19 +0800 Subject: [PATCH 13/60] rockchip: rk322x: introduce arch_cpu_init() for SoC setting init Use arch_cpu_init() to init SoC secure region and move it to rk322x.c Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk322x-board-spl.c | 10 ++++++---- arch/arm/mach-rockchip/rk322x/rk322x.c | 12 ++++++++++++ 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c index c825e31c02..6bf9e444ce 100644 --- a/arch/arm/mach-rockchip/rk322x-board-spl.c +++ b/arch/arm/mach-rockchip/rk322x-board-spl.c @@ -44,7 +44,11 @@ void rockchip_stimer_init(void) TIMER_CONTROL_REG); } -#define SGRF_DDR_CON0 0x10150000 +__weak int arch_cpu_init(void) +{ + return 0; +} + void board_init_f(ulong dummy) { int ret; @@ -60,9 +64,7 @@ void board_init_f(ulong dummy) rockchip_stimer_init(); /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ timer_init(); - - /* Disable the ddr secure region setting to make it non-secure */ - rk_clrreg(SGRF_DDR_CON0, 0x4000); + arch_cpu_init(); } #ifdef CONFIG_SPL_LOAD_FIT diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c index e5250bc784..c8c656ab4b 100644 --- a/arch/arm/mach-rockchip/rk322x/rk322x.c +++ b/arch/arm/mach-rockchip/rk322x/rk322x.c @@ -42,3 +42,15 @@ void board_debug_uart_init(void) CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); } #endif + +int arch_cpu_init(void) +{ +#ifdef CONFIG_SPL_BUILD +#define SGRF_BASE 0x10150000 + static struct rk322x_sgrf * const sgrf = (void *)SGRF_BASE; + + /* Disable the ddr secure region setting to make it non-secure */ + rk_clrreg(&sgrf->soc_con[0], 0x4000); +#endif + return 0; +} From 0cd65e4b9ad00f00335766e5c669f1269eb6efd8 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:20 +0800 Subject: [PATCH 14/60] rockchip: rk322x: migrate to use common spl board file rk322x has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk322x-board-spl.c | 78 ----------------------- 3 files changed, 1 insertion(+), 79 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk322x-board-spl.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 66d07f672e..1904322091 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -59,6 +59,7 @@ config ROCKCHIP_RK322X select TPL_NEEDS_SEPARATE_STACK if TPL select SPL_DRIVERS_MISC_SUPPORT imply SPL_SERIAL_SUPPORT + imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL_SUPPORT imply TPL_ROCKCHIP_COMMON_BOARD select TPL_LIBCOMMON_SUPPORT diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index b4797b4e0f..e58da5c899 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -12,7 +12,6 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o -obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o diff --git a/arch/arm/mach-rockchip/rk322x-board-spl.c b/arch/arm/mach-rockchip/rk322x-board-spl.c deleted file mode 100644 index 6bf9e444ce..0000000000 --- a/arch/arm/mach-rockchip/rk322x-board-spl.c +++ /dev/null @@ -1,78 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2017 Rockchip Electronics Co., Ltd - */ - -#include -#include -#include -#include -#include - -u32 spl_boot_device(void) -{ - return BOOT_DEVICE_MMC1; -} - -u32 spl_boot_mode(const u32 boot_device) -{ - return MMCSD_MODE_RAW; -} - -#define TIMER_LOAD_COUNT_L 0x00 -#define TIMER_LOAD_COUNT_H 0x04 -#define TIMER_CONTROL_REG 0x10 -#define TIMER_EN 0x1 -#define TIMER_FMODE BIT(0) -#define TIMER_RMODE BIT(1) - -void rockchip_stimer_init(void) -{ - /* If Timer already enabled, don't re-init it */ - u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); - - if (reg & TIMER_EN) - return; - - asm volatile("mcr p15, 0, %0, c14, c0, 0" - : : "r"(COUNTER_FREQUENCY)); - - writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); - writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + - TIMER_CONTROL_REG); -} - -__weak int arch_cpu_init(void) -{ - return 0; -} - -void board_init_f(ulong dummy) -{ - int ret; - - ret = spl_early_init(); - if (ret) { - printf("spl_early_init() failed: %d\n", ret); - hang(); - } - preloader_console_init(); - - /* Init secure timer */ - rockchip_stimer_init(); - /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ - timer_init(); - arch_cpu_init(); -} - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - /* Just empty function now - can't decide what to choose */ - debug("%s: %s\n", __func__, name); - - return 0; -} -#endif From a49660b658b0921584f6f76b4bca72ff90f75653 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:21 +0800 Subject: [PATCH 15/60] rockchip: rk322x: add boot_devices mapping to support 'same-as-spl' The driver need a mapping to get the dts node by boot srouce ID. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk322x/rk322x.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c index c8c656ab4b..a8677b9783 100644 --- a/arch/arm/mach-rockchip/rk322x/rk322x.c +++ b/arch/arm/mach-rockchip/rk322x/rk322x.c @@ -3,9 +3,15 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ #include +#include #include #include +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "dwmmc@30020000", + [BROM_BOOTSOURCE_SD] = "dwmmc@30000000", +}; + #ifdef CONFIG_DEBUG_UART_BOARD_INIT void board_debug_uart_init(void) { From 66a503c700130bf52a4ddc54551495bd25b95be3 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:22 +0800 Subject: [PATCH 16/60] rockchip: fit_spl_optee: rockchip: fix warning unit_address_vs_reg Update to fix warning: u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/optee@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has a unit name, but no reg property u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /configurations/conf@1 has a unit name, but no reg property Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/fit_spl_optee.its | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-rockchip/fit_spl_optee.its b/arch/arm/mach-rockchip/fit_spl_optee.its index 9be4b3c8d2..6ed5d486f2 100644 --- a/arch/arm/mach-rockchip/fit_spl_optee.its +++ b/arch/arm/mach-rockchip/fit_spl_optee.its @@ -11,7 +11,7 @@ #address-cells = <1>; images { - uboot@1 { + uboot { description = "U-Boot"; data = /incbin/("../../../u-boot-nodtb.bin"); type = "standalone"; @@ -20,7 +20,7 @@ compression = "none"; load = <0x61000000>; }; - optee@1 { + optee { description = "OP-TEE"; data = /incbin/("../../../tee.bin"); type = "firmware"; @@ -30,7 +30,7 @@ load = <0x68400000>; entry = <0x68400000>; }; - fdt@1 { + fdt { description = "dtb"; data = /incbin/("../../../u-boot.dtb"); type = "flat_dt"; @@ -39,12 +39,12 @@ }; configurations { - default = "conf@1"; - conf@1 { + default = "conf"; + conf { description = "Rockchip armv7 with OP-TEE"; - firmware = "optee@1"; - loadables = "uboot@1"; - fdt = "fdt@1"; + firmware = "optee"; + loadables = "uboot"; + fdt = "fdt"; }; }; }; From 4f0b061444063d7c60e9624c5431c16f00d067af Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:23 +0800 Subject: [PATCH 17/60] rockchip: rk3288: show SPL BANNER earlier in board_init_f() Show the SPL BANNER earlier so that we know already get into SPL. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3288-board-spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 9efba47aff..6fbb22075c 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -167,6 +167,8 @@ void board_init_f(ulong dummy) arch_cpu_init(); + preloader_console_init(); + ret = rockchip_get_clk(&dev); if (ret) { debug("CLK init failed: %d\n", ret); @@ -227,8 +229,6 @@ void spl_board_init(void) hang(); } - preloader_console_init(); - return; } From 57d55db603f548b48d03bdf021dc7eb33464e12c Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:24 +0800 Subject: [PATCH 18/60] rockchip: rk3288: move setup_led() to firefly-rk3288 Only firefly-rk3288 has the dts node "u-boot,boot-led", while CONFIG_SPL_LED is not enable, move code to firefly-rk3288 now in case someone need this code. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 - arch/arm/mach-rockchip/rk3288-board-spl.c | 36 ------------------- arch/arm/mach-rockchip/rk3288/Kconfig | 1 + board/firefly/firefly-rk3288/firefly-rk3288.c | 36 +++++++++++++++++++ 4 files changed, 37 insertions(+), 37 deletions(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 1904322091..ef9d6e1fac 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -73,7 +73,6 @@ config ROCKCHIP_RK322X config ROCKCHIP_RK3288 bool "Support Rockchip RK3288" select CPU_V7A - select SPL_BOARD_INIT if SPL select SUPPORT_SPL select SPL select SUPPORT_TPL diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 6fbb22075c..6db5369a10 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -196,42 +196,6 @@ void board_init_f(ulong dummy) #endif } -static int setup_led(void) -{ -#ifdef CONFIG_SPL_LED - struct udevice *dev; - char *led_name; - int ret; - - led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led"); - if (!led_name) - return 0; - ret = led_get_by_label(led_name, &dev); - if (ret) { - debug("%s: get=%d\n", __func__, ret); - return ret; - } - ret = led_set_on(dev, 1); - if (ret) - return ret; -#endif - - return 0; -} - -void spl_board_init(void) -{ - int ret; - - ret = setup_led(); - if (ret) { - debug("LED ret=%d\n", ret); - hang(); - } - - return; -} - #ifdef CONFIG_SPL_OS_BOOT #define PMU_BASE 0xff730000 diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index de8d9c24f1..6e3ab1d06b 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -66,6 +66,7 @@ config TARGET_FENNEC_RK3288 config TARGET_FIREFLY_RK3288 bool "Firefly-RK3288" select BOARD_LATE_INIT + select SPL_BOARD_INIT if SPL help Firefly is a RK3288-based development board with 2 USB ports, HDMI, VGA, micro-SD card, audio, WiFi and Gigabit Ethernet, It diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c index bdc02a6a79..a3f784f0a3 100644 --- a/board/firefly/firefly-rk3288/firefly-rk3288.c +++ b/board/firefly/firefly-rk3288/firefly-rk3288.c @@ -4,3 +4,39 @@ */ #include + +#ifdef CONFIG_SPL_BUILD +static int setup_led(void) +{ +#ifdef CONFIG_SPL_LED + struct udevice *dev; + char *led_name; + int ret; + + led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led"); + if (!led_name) + return 0; + ret = led_get_by_label(led_name, &dev); + if (ret) { + debug("%s: get=%d\n", __func__, ret); + return ret; + } + ret = led_set_on(dev, 1); + if (ret) + return ret; +#endif + + return 0; +} + +void spl_board_init(void) +{ + int ret; + + ret = setup_led(); + if (ret) { + debug("LED ret=%d\n", ret); + hang(); + } +} +#endif From 8f5b5aac7671fcf7ad681b1f690b853cacb3fe3d Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:25 +0800 Subject: [PATCH 19/60] rockchip: rk3288-phycore: move phycore_init() to its own board file phycore_init() is use for phycore board only, it should be move back to phycore-rk3288.c Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3288-board-spl.c | 39 ---------------- arch/arm/mach-rockchip/rk3288/Kconfig | 1 + board/phytec/phycore_rk3288/phycore-rk3288.c | 47 ++++++++++++++++++++ 3 files changed, 48 insertions(+), 39 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 6db5369a10..13cd86079b 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -25,8 +25,6 @@ #include #include #include -#include -#include DECLARE_GLOBAL_DATA_PTR; @@ -81,32 +79,6 @@ fallback: return BOOT_DEVICE_MMC1; } -#if !defined(CONFIG_SPL_OF_PLATDATA) -static int phycore_init(void) -{ - struct udevice *pmic; - int ret; - - ret = uclass_first_device_err(UCLASS_PMIC, &pmic); - if (ret) - return ret; - -#if defined(CONFIG_SPL_POWER_SUPPORT) - /* Increase USB input current to 2A */ - ret = rk818_spl_configure_usb_input_current(pmic, 2000); - if (ret) - return ret; - - /* Close charger when USB lower then 3.26V */ - ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000); - if (ret) - return ret; -#endif - - return 0; -} -#endif - __weak int arch_cpu_init(void) { return 0; @@ -175,17 +147,6 @@ void board_init_f(ulong dummy) return; } -#if !defined(CONFIG_SPL_OF_PLATDATA) - if (of_machine_is_compatible("phytec,rk3288-phycore-som")) { - ret = phycore_init(); - if (ret) { - debug("Failed to set up phycore power settings: %d\n", - ret); - return; - } - } -#endif - #if !defined(CONFIG_SUPPORT_TPL) debug("\nspl:init dram\n"); ret = uclass_get_device(UCLASS_RAM, 0, &dev); diff --git a/arch/arm/mach-rockchip/rk3288/Kconfig b/arch/arm/mach-rockchip/rk3288/Kconfig index 6e3ab1d06b..87d0786ba8 100644 --- a/arch/arm/mach-rockchip/rk3288/Kconfig +++ b/arch/arm/mach-rockchip/rk3288/Kconfig @@ -85,6 +85,7 @@ config TARGET_MIQI_RK3288 config TARGET_PHYCORE_RK3288 bool "phyCORE-RK3288" select BOARD_LATE_INIT + select SPL_BOARD_INIT if SPL help Add basic support for the PCM-947 carrier board, a RK3288 based development board made by PHYTEC. This board works in a combination diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c index ffe1833b06..fbf1511978 100644 --- a/board/phytec/phycore_rk3288/phycore-rk3288.c +++ b/board/phytec/phycore_rk3288/phycore-rk3288.c @@ -8,10 +8,13 @@ #include #include #include +#include #include #include #include #include "som.h" +#include +#include static int valid_rk3288_som(struct rk3288_som *som) { @@ -68,3 +71,47 @@ int rk_board_late_init(void) return 0; } + +#ifdef CONFIG_SPL_BUILD +#if !defined(CONFIG_SPL_OF_PLATDATA) +static int phycore_init(void) +{ + struct udevice *pmic; + int ret; + + ret = uclass_first_device_err(UCLASS_PMIC, &pmic); + if (ret) + return ret; + +#if defined(CONFIG_SPL_POWER_SUPPORT) + /* Increase USB input current to 2A */ + ret = rk818_spl_configure_usb_input_current(pmic, 2000); + if (ret) + return ret; + + /* Close charger when USB lower then 3.26V */ + ret = rk818_spl_configure_usb_chrg_shutdown(pmic, 3260000); + if (ret) + return ret; +#endif + + return 0; +} +#endif + +void spl_board_init(void) +{ +#if !defined(CONFIG_SPL_OF_PLATDATA) + int ret; + + if (of_machine_is_compatible("phytec,rk3288-phycore-som")) { + ret = phycore_init(); + if (ret) { + debug("Failed to set up phycore power settings: %d\n", + ret); + return; + } + } +#endif +} +#endif From f35c417c9bb62da461b32c9491bc8a72f800046c Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:26 +0800 Subject: [PATCH 20/60] rockchip: rk3288: move dram_init_banksize() into soc file Mov edram_init_banksize() into rk3288.c so that we can re-use the common SPL board file later. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3288-board-spl.c | 15 --------------- arch/arm/mach-rockchip/rk3288/rk3288.c | 19 +++++++++++++++++++ 2 files changed, 19 insertions(+), 15 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 13cd86079b..97853ccdc7 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -156,18 +156,3 @@ void board_init_f(ulong dummy) } #endif } - -#ifdef CONFIG_SPL_OS_BOOT - -#define PMU_BASE 0xff730000 -int dram_init_banksize(void) -{ - struct rk3288_pmu *const pmu = (void *)PMU_BASE; - size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]); - - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = size; - - return 0; -} -#endif diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index 7552472fbc..0a185d676b 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -6,6 +6,10 @@ #include #include #include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; #define GRF_BASE 0xff770000 @@ -57,3 +61,18 @@ void board_debug_uart_init(void) GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); } #endif + +#ifdef CONFIG_SPL_OS_BOOT + +#define PMU_BASE 0xff730000 +int dram_init_banksize(void) +{ + struct rk3288_pmu *const pmu = (void *)PMU_BASE; + size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]); + + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = size; + + return 0; +} +#endif From 60b13c8b4a6d5d147addfa68308dedd81587c7fe Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:27 +0800 Subject: [PATCH 21/60] rockchip: rk3288: Migrate to use common spl board file rk3288 has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3288-board-spl.c | 158 ---------------------- 3 files changed, 1 insertion(+), 159 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3288-board-spl.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ef9d6e1fac..34979206d2 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -76,6 +76,7 @@ config ROCKCHIP_RK3288 select SUPPORT_SPL select SPL select SUPPORT_TPL + imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_CLK imply TPL_DM imply TPL_DRIVERS_MISC_SUPPORT diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index e58da5c899..808ca43ca0 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -12,7 +12,6 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o -obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c deleted file mode 100644 index 97853ccdc7..0000000000 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ /dev/null @@ -1,158 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2015 Google, Inc - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -void board_return_to_bootrom(void) -{ - back_to_bootrom(BROM_BOOT_NEXTSTAGE); -} - -u32 spl_boot_device(void) -{ -#if !CONFIG_IS_ENABLED(OF_PLATDATA) - const void *blob = gd->fdt_blob; - struct udevice *dev; - const char *bootdev; - int node; - int ret; - - bootdev = fdtdec_get_config_string(blob, "u-boot,boot0"); - debug("Boot device %s\n", bootdev); - if (!bootdev) - goto fallback; - - node = fdt_path_offset(blob, bootdev); - if (node < 0) { - debug("node=%d\n", node); - goto fallback; - } - ret = device_get_global_by_ofnode(offset_to_ofnode(node), &dev); - if (ret) { - debug("device at node %s/%d not found: %d\n", bootdev, node, - ret); - goto fallback; - } - debug("Found device %s\n", dev->name); - switch (device_get_uclass_id(dev)) { - case UCLASS_SPI_FLASH: - return BOOT_DEVICE_SPI; - case UCLASS_MMC: - return BOOT_DEVICE_MMC1; - default: - debug("Booting from device uclass '%s' not supported\n", - dev_get_uclass_name(dev)); - } - -fallback: -#elif defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ - defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ - defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \ - defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY) - return BOOT_DEVICE_SPI; -#endif - return BOOT_DEVICE_MMC1; -} - -__weak int arch_cpu_init(void) -{ - return 0; -} - -#define TIMER_LOAD_COUNT_L 0x00 -#define TIMER_LOAD_COUNT_H 0x04 -#define TIMER_CONTROL_REG 0x10 -#define TIMER_EN 0x1 -#define TIMER_FMODE BIT(0) -#define TIMER_RMODE BIT(1) - -void rockchip_stimer_init(void) -{ - /* If Timer already enabled, don't re-init it */ - u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); - - if (reg & TIMER_EN) - return; - - asm volatile("mcr p15, 0, %0, c14, c0, 0" - : : "r"(COUNTER_FREQUENCY)); - - writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); - writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + - TIMER_CONTROL_REG); -} - -void board_init_f(ulong dummy) -{ - struct udevice *dev; - int ret; - -#ifdef CONFIG_DEBUG_UART - /* - * Debug UART can be used from here if required: - * - * debug_uart_init(); - * printch('a'); - * printhex8(0x1234); - * printascii("string"); - */ - debug_uart_init(); - debug("\nspl:debug uart enabled in %s\n", __func__); -#endif - ret = spl_early_init(); - if (ret) { - debug("spl_early_init() failed: %d\n", ret); - hang(); - } - - /* Init secure timer */ - rockchip_stimer_init(); - /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ - timer_init(); - - arch_cpu_init(); - - preloader_console_init(); - - ret = rockchip_get_clk(&dev); - if (ret) { - debug("CLK init failed: %d\n", ret); - return; - } - -#if !defined(CONFIG_SUPPORT_TPL) - debug("\nspl:init dram\n"); - ret = uclass_get_device(UCLASS_RAM, 0, &dev); - if (ret) { - debug("DRAM init failed: %d\n", ret); - return; - } -#endif -} From 65ea919bf78824634911c47668fb7e4f366febc4 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:28 +0800 Subject: [PATCH 22/60] rockchip: phycore: remove no use "u-boot, boot0" in dts We are using "u-boot,spl-boot-order" now and re-use the definition from rk3288-u-boot.dtsi, so remove it directly here. Signed-off-by: Kever Yang --- arch/arm/dts/rk3288-phycore-rdk.dts | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm/dts/rk3288-phycore-rdk.dts b/arch/arm/dts/rk3288-phycore-rdk.dts index f2bb7b5f11..cc3921095c 100644 --- a/arch/arm/dts/rk3288-phycore-rdk.dts +++ b/arch/arm/dts/rk3288-phycore-rdk.dts @@ -55,11 +55,6 @@ stdout-path = &uart2; }; - config { - u-boot,dm-pre-reloc; - u-boot,boot0 = &emmc; - }; - user_buttons: user-buttons { compatible = "gpio-keys"; pinctrl-names = "default"; From 68907a0a58fd8299b18c01e2e3445d90fee85a3d Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:29 +0800 Subject: [PATCH 23/60] rockchip: rk3288-veyron: Migrate "u-boot, boot0" to "u-boot, spl-boot-order" "u-boot,spl-boot-order" is more flexible and other rockchip SoCs has convert to use it, migrate to use the new dts property. Signed-off-by: Kever Yang --- arch/arm/dts/rk3288-veyron.dtsi | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/arch/arm/dts/rk3288-veyron.dtsi b/arch/arm/dts/rk3288-veyron.dtsi index 916dd486de..8754043b9b 100644 --- a/arch/arm/dts/rk3288-veyron.dtsi +++ b/arch/arm/dts/rk3288-veyron.dtsi @@ -16,11 +16,7 @@ chosen { stdout-path = &uart2; - }; - - config { - u-boot,dm-pre-reloc; - u-boot,boot0 = &spi_flash; + u-boot,spl-boot-order = &spi_flash; }; firmware { From 8af6cafc897a0b3cd7691c6c7f7e5445b31e0665 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:30 +0800 Subject: [PATCH 24/60] rockchip: rk3288: add boot_devices mapping to support 'same-as-spl' The driver need a mapping to get the dts node by boot srouce ID. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3288/rk3288.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index 0a185d676b..04a87d64f4 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -4,6 +4,7 @@ */ #include #include +#include #include #include #include @@ -13,6 +14,11 @@ DECLARE_GLOBAL_DATA_PTR; #define GRF_BASE 0xff770000 +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "dwmmc@ff0f0000", + [BROM_BOOTSOURCE_SD] = "dwmmc@ff0c0000", +}; + #ifdef CONFIG_SPL_BUILD static void configure_l2ctlr(void) { From 7e35ad92cbe50874b2f0460eee1609f2529be7a3 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:31 +0800 Subject: [PATCH 25/60] rockchip: rk3328: add STIMER_BASE definition Add the CONFIG_ROCKCHIP_STIMER_BASE so that we can use the stimer init function in tpl.c and spl.c Signed-off-by: Kever Yang --- include/configs/rk3328_common.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h index 1cf45bbb3e..6ed7525304 100644 --- a/include/configs/rk3328_common.h +++ b/include/configs/rk3328_common.h @@ -10,6 +10,8 @@ #define CONFIG_IRAM_BASE 0xff090000 +#define CONFIG_ROCKCHIP_STIMER_BASE 0xff1d0020 + #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT From 9cc67049c269d9f9fbda0b4e731bfbbf5b201ea0 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:32 +0800 Subject: [PATCH 26/60] rockchip: rk3328: migrate to use common spl board file rk3328 has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3328-board-spl.c | 58 ----------------------- 3 files changed, 1 insertion(+), 59 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3328-board-spl.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 34979206d2..05d207dd7a 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -105,6 +105,7 @@ config ROCKCHIP_RK3328 select ARM64 select SUPPORT_SPL select SPL + imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SERIAL_SUPPORT imply SPL_SEPARATE_BSS select ENABLE_ARM_SOC_BOOT0_HOOK diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 808ca43ca0..579a2ce8ca 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -12,7 +12,6 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o -obj-spl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-spl.o obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o diff --git a/arch/arm/mach-rockchip/rk3328-board-spl.c b/arch/arm/mach-rockchip/rk3328-board-spl.c deleted file mode 100644 index f24fd89e3f..0000000000 --- a/arch/arm/mach-rockchip/rk3328-board-spl.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2016 Rockchip Electronics Co., Ltd - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -void board_debug_uart_init(void) -{ -} - -void board_init_f(ulong dummy) -{ - struct udevice *dev; - int ret; - - ret = spl_early_init(); - if (ret) { - debug("spl_early_init() failed: %d\n", ret); - hang(); - } - - preloader_console_init(); - - ret = uclass_get_device(UCLASS_RAM, 0, &dev); - if (ret) { - debug("DRAM init failed: %d\n", ret); - return; - } -} - -u32 spl_boot_mode(const u32 boot_device) -{ - return MMCSD_MODE_RAW; -} - -u32 spl_boot_device(void) -{ - return BOOT_DEVICE_MMC1; -} - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - /* Just empty function now - can't decide what to choose */ - debug("%s: %s\n", __func__, name); - - return 0; -} -#endif From 612fd9e5e0154104579f7c8686f0725b577daf6c Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:33 +0800 Subject: [PATCH 27/60] rockchip: rk3328: add boot_devices mapping to support 'same-as-spl' The driver need a mapping to get the dts node by boot srouce ID. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3328/rk3328.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c index 1cf829dc34..222a8d36d3 100644 --- a/arch/arm/mach-rockchip/rk3328/rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c @@ -4,12 +4,18 @@ */ #include +#include #include #include #include DECLARE_GLOBAL_DATA_PTR; +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "rksdmmc@ff520000", + [BROM_BOOTSOURCE_SD] = "rksdmmc@ff500000", +}; + static struct mm_region rk3328_mem_map[] = { { .virt = 0x0UL, From 30d7109757e96fc91f45baf2af54247ea0cc01a3 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:34 +0800 Subject: [PATCH 28/60] rockchip: rk3368: migrate to use common spl board file rk3368 has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3368-board-spl.c | 80 ----------------------- 3 files changed, 1 insertion(+), 81 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3368-board-spl.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 05d207dd7a..25214bca9c 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -125,6 +125,7 @@ config ROCKCHIP_RK3368 select SUPPORT_TPL select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL + imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SEPARATE_BSS imply SPL_SERIAL_SUPPORT imply TPL_SERIAL_SUPPORT diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 579a2ce8ca..c7ab72c13b 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -12,7 +12,6 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o -obj-spl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-spl.o spl-boot-order.o obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c b/arch/arm/mach-rockchip/rk3368-board-spl.c deleted file mode 100644 index 6ba106c63b..0000000000 --- a/arch/arm/mach-rockchip/rk3368-board-spl.c +++ /dev/null @@ -1,80 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH - */ - -#include -#include -#include -#include -#include -#include -#include - -__weak int arch_cpu_init(void) -{ - return 0; -} - -#define TIMER_LOAD_COUNT_L 0x00 -#define TIMER_LOAD_COUNT_H 0x04 -#define TIMER_CONTROL_REG 0x10 -#define TIMER_EN 0x1 -#define TIMER_FMODE BIT(0) -#define TIMER_RMODE BIT(1) - -void rockchip_stimer_init(void) -{ - /* If Timer already enabled, don't re-init it */ - u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); - - if (reg & TIMER_EN) - return; - - writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); - writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); - writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE + - TIMER_CONTROL_REG); -} - -void board_init_f(ulong dummy) -{ - struct udevice *dev; - int ret; - - ret = spl_early_init(); - if (ret) { - debug("spl_early_init() failed: %d\n", ret); - hang(); - } - - /* Init secure timer */ - rockchip_stimer_init(); - /* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */ - timer_init(); - - arch_cpu_init(); - preloader_console_init(); - - ret = uclass_get_device(UCLASS_RAM, 0, &dev); - if (ret) { - debug("DRAM init failed: %d\n", ret); - return; - } -} - -u32 spl_boot_device(void) -{ - return BOOT_DEVICE_MMC1; -} - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - /* Just empty function now - can't decide what to choose */ - debug("%s: %s\n", __func__, name); - - return 0; -} -#endif From 4a395788c407a49a00ab027e2e9cba3df6f3dabd Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:35 +0800 Subject: [PATCH 29/60] rockchip: rk3368: add boot_devices mapping to support 'same-as-spl' The driver need a mapping to get the dts node by boot srouce ID. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3368/rk3368.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c index 47786f52ee..c75a5cd0c4 100644 --- a/arch/arm/mach-rockchip/rk3368/rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/rk3368.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -52,6 +53,11 @@ static struct mm_region rk3368_mem_map[] = { struct mm_region *mem_map = rk3368_mem_map; +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "dwmmc@ff0f0000", + [BROM_BOOTSOURCE_SD] = "dwmmc@ff0c0000", +}; + int dram_init_banksize(void) { size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top); From 4238e526fa8e0721c6c8ef0144b2b9ae57663c82 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:36 +0800 Subject: [PATCH 30/60] rockchip: rk3399: move spl_perform_fixups() into soc file Move the spl_perform_fixups() into rk3399.c so that we can use common spl board file later. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3399-board-spl.c | 48 ---------------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 50 +++++++++++++++++++++++ 2 files changed, 50 insertions(+), 48 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 3624c8ea65..826ca443ce 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -61,54 +61,6 @@ u32 spl_boot_device(void) return boot_device; } -const char *spl_decode_boot_device(u32 boot_device) -{ - int i; - static const struct { - u32 boot_device; - const char *ofpath; - } spl_boot_devices_tbl[] = { - { BOOT_DEVICE_MMC1, "/dwmmc@fe320000" }, - { BOOT_DEVICE_MMC2, "/sdhci@fe330000" }, - { BOOT_DEVICE_SPI, "/spi@ff1d0000" }, - }; - - for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i) - if (spl_boot_devices_tbl[i].boot_device == boot_device) - return spl_boot_devices_tbl[i].ofpath; - - return NULL; -} - -void spl_perform_fixups(struct spl_image_info *spl_image) -{ - void *blob = spl_image->fdt_addr; - const char *boot_ofpath; - int chosen; - - /* - * Inject the ofpath of the device the full U-Boot (or Linux in - * Falcon-mode) was booted from into the FDT, if a FDT has been - * loaded at the same time. - */ - if (!blob) - return; - - boot_ofpath = spl_decode_boot_device(spl_image->boot_device); - if (!boot_ofpath) { - pr_err("%s: could not map boot_device to ofpath\n", __func__); - return; - } - - chosen = fdt_find_or_add_subnode(blob, 0, "chosen"); - if (chosen < 0) { - pr_err("%s: could not find/create '/chosen'\n", __func__); - return; - } - fdt_setprop_string(blob, chosen, - "u-boot,spl-boot-device", boot_ofpath); -} - __weak void rockchip_stimer_init(void) { } diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 0f09ea5c49..dacbcf8fdf 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -146,3 +146,53 @@ void board_debug_uart_init(void) #endif } #endif + +#ifdef CONFIG_SPL_BUILD +const char *spl_decode_boot_device(u32 boot_device) +{ + int i; + static const struct { + u32 boot_device; + const char *ofpath; + } spl_boot_devices_tbl[] = { + { BOOT_DEVICE_MMC1, "/dwmmc@fe320000" }, + { BOOT_DEVICE_MMC2, "/sdhci@fe330000" }, + { BOOT_DEVICE_SPI, "/spi@ff1d0000" }, + }; + + for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i) + if (spl_boot_devices_tbl[i].boot_device == boot_device) + return spl_boot_devices_tbl[i].ofpath; + + return NULL; +} + +void spl_perform_fixups(struct spl_image_info *spl_image) +{ + void *blob = spl_image->fdt_addr; + const char *boot_ofpath; + int chosen; + + /* + * Inject the ofpath of the device the full U-Boot (or Linux in + * Falcon-mode) was booted from into the FDT, if a FDT has been + * loaded at the same time. + */ + if (!blob) + return; + + boot_ofpath = spl_decode_boot_device(spl_image->boot_device); + if (!boot_ofpath) { + pr_err("%s: could not map boot_device to ofpath\n", __func__); + return; + } + + chosen = fdt_find_or_add_subnode(blob, 0, "chosen"); + if (chosen < 0) { + pr_err("%s: could not find/create '/chosen'\n", __func__); + return; + } + fdt_setprop_string(blob, chosen, + "u-boot,spl-boot-device", boot_ofpath); +} +#endif From 08f7905bc6c431ec6563047f2fdc619f341e9e24 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:37 +0800 Subject: [PATCH 31/60] rockchip: rk3399: show SPL BANNER earlier in board_init_f() Show the SPL BANNER earlier so that we know already get into SPL. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3399-board-spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 826ca443ce..b790ad909c 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -130,6 +130,8 @@ void board_init_f(ulong dummy) pr_err("DRAM init failed: %d\n", ret); return; } + + preloader_console_init(); } #if defined(SPL_GPIO_SUPPORT) @@ -188,8 +190,6 @@ void spl_board_init(void) if (regulators_enable_boot_on(false)) debug("%s: Cannot enable boot on regulator\n", __func__); #endif - - preloader_console_init(); } #ifdef CONFIG_SPL_LOAD_FIT From bd06a7c88e6a5b0faa67b880eb5b563ea89dd155 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:38 +0800 Subject: [PATCH 32/60] rockchip: rk3399: move SoC setting into arch_cpu_init() SoC setting like DDR secure region and EMMC clock setting should go to arch_cpu_init(). Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3399-board-spl.c | 27 ++++++----------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 23 ++++++++++++++++--- 2 files changed, 27 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index b790ad909c..2757c27da0 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -65,11 +64,14 @@ __weak void rockchip_stimer_init(void) { } +__weak int arch_cpu_init(void) +{ + return 0; +} + void board_init_f(ulong dummy) { struct udevice *dev; - struct rk3399_pmusgrf_regs *sgrf; - struct rk3399_grf_regs *grf; int ret; #ifdef CONFIG_DEBUG_UART @@ -100,29 +102,14 @@ void board_init_f(ulong dummy) debug("U-Boot SPL board init\n"); #endif + arch_cpu_init(); + ret = spl_early_init(); if (ret) { debug("spl_early_init() failed: %d\n", ret); hang(); } - /* - * Disable DDR and SRAM security regions. - * - * As we are entered from the BootROM, the region from - * 0x0 through 0xfffff (i.e. the first MB of memory) will - * be protected. This will cause issues with the DW_MMC - * driver, which tries to DMA from/to the stack (likely) - * located in this range. - */ - sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF); - rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0); - rk_clrreg(&sgrf->slv_secure_con4, 0x2000); - - /* eMMC clock generator: disable the clock multipilier */ - grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); - rk_clrreg(&grf->emmccore_con[11], 0x0ff); - rockchip_stimer_init(); ret = uclass_get_device(UCLASS_RAM, 0, &dev); diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index dacbcf8fdf..ead878b3fd 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -80,11 +80,28 @@ int dram_init_banksize(void) int arch_cpu_init(void) { - /* We do some SoC one time setting here. */ - struct rk3399_grf_regs * const grf = (void *)GRF_BASE; - /* Emmc clock generator: disable the clock multipilier */ +#ifdef CONFIG_SPL_BUILD + struct rk3399_pmusgrf_regs *sgrf; + struct rk3399_grf_regs *grf; + + /* + * Disable DDR and SRAM security regions. + * + * As we are entered from the BootROM, the region from + * 0x0 through 0xfffff (i.e. the first MB of memory) will + * be protected. This will cause issues with the DW_MMC + * driver, which tries to DMA from/to the stack (likely) + * located in this range. + */ + sgrf = syscon_get_first_range(ROCKCHIP_SYSCON_PMUSGRF); + rk_clrsetreg(&sgrf->ddr_rgn_con[16], 0x1ff, 0); + rk_clrreg(&sgrf->slv_secure_con4, 0x2000); + + /* eMMC clock generator: disable the clock multipilier */ + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); rk_clrreg(&grf->emmccore_con[11], 0x0ff); +#endif return 0; } From 47b0ead21a32f4a8b08ade4c2693f70e731b61fa Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:39 +0800 Subject: [PATCH 33/60] rockchip: rk3399; move spl_board_init() into soc file Move spl_board_init() into rk3399.c so that we can re-use the common SPL board file later. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3399-board-spl.c | 61 --------------------- arch/arm/mach-rockchip/rk3399/rk3399.c | 64 ++++++++++++++++++++++- 2 files changed, 63 insertions(+), 62 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 2757c27da0..81a99f8e40 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -10,16 +10,13 @@ #include #include #include -#include #include #include #include -#include #include #include #include #include -#include void board_return_to_bootrom(void) { @@ -121,64 +118,6 @@ void board_init_f(ulong dummy) preloader_console_init(); } -#if defined(SPL_GPIO_SUPPORT) -static void rk3399_force_power_on_reset(void) -{ - ofnode node; - struct gpio_desc sysreset_gpio; - - debug("%s: trying to force a power-on reset\n", __func__); - - node = ofnode_path("/config"); - if (!ofnode_valid(node)) { - debug("%s: no /config node?\n", __func__); - return; - } - - if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0, - &sysreset_gpio, GPIOD_IS_OUT)) { - debug("%s: could not find a /config/sysreset-gpio\n", __func__); - return; - } - - dm_gpio_set_value(&sysreset_gpio, 1); -} -#endif - -void spl_board_init(void) -{ -#if defined(SPL_GPIO_SUPPORT) - struct rk3399_cru *cru = rockchip_get_cru(); - - /* - * The RK3399 resets only 'almost all logic' (see also in the TRM - * "3.9.4 Global software reset"), when issuing a software reset. - * This may cause issues during boot-up for some configurations of - * the application software stack. - * - * To work around this, we test whether the last reset reason was - * a power-on reset and (if not) issue an overtemp-reset to reset - * the entire module. - * - * While this was previously fixed by modifying the various places - * that could generate a software reset (e.g. U-Boot's sysreset - * driver, the ATF or Linux), we now have it here to ensure that - * we no longer have to track this through the various components. - */ - if (cru->glb_rst_st != 0) - rk3399_force_power_on_reset(); -#endif - -#if defined(SPL_DM_REGULATOR) - /* - * Turning the eMMC and SPI back on (if disabled via the Qseven - * BIOS_ENABLE) signal is done through a always-on regulator). - */ - if (regulators_enable_boot_on(false)) - debug("%s: Cannot enable boot on regulator\n", __func__); -#endif -} - #ifdef CONFIG_SPL_LOAD_FIT int board_fit_config_name_match(const char *name) { diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index ead878b3fd..c4337e6093 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -4,12 +4,16 @@ */ #include +#include #include +#include #include #include +#include #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -164,7 +168,7 @@ void board_debug_uart_init(void) } #endif -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) const char *spl_decode_boot_device(u32 boot_device) { int i; @@ -212,4 +216,62 @@ void spl_perform_fixups(struct spl_image_info *spl_image) fdt_setprop_string(blob, chosen, "u-boot,spl-boot-device", boot_ofpath); } + +#if defined(SPL_GPIO_SUPPORT) +static void rk3399_force_power_on_reset(void) +{ + ofnode node; + struct gpio_desc sysreset_gpio; + + debug("%s: trying to force a power-on reset\n", __func__); + + node = ofnode_path("/config"); + if (!ofnode_valid(node)) { + debug("%s: no /config node?\n", __func__); + return; + } + + if (gpio_request_by_name_nodev(node, "sysreset-gpio", 0, + &sysreset_gpio, GPIOD_IS_OUT)) { + debug("%s: could not find a /config/sysreset-gpio\n", __func__); + return; + } + + dm_gpio_set_value(&sysreset_gpio, 1); +} +#endif + +void spl_board_init(void) +{ +#if defined(SPL_GPIO_SUPPORT) + struct rk3399_cru *cru = rockchip_get_cru(); + + /* + * The RK3399 resets only 'almost all logic' (see also in the TRM + * "3.9.4 Global software reset"), when issuing a software reset. + * This may cause issues during boot-up for some configurations of + * the application software stack. + * + * To work around this, we test whether the last reset reason was + * a power-on reset and (if not) issue an overtemp-reset to reset + * the entire module. + * + * While this was previously fixed by modifying the various places + * that could generate a software reset (e.g. U-Boot's sysreset + * driver, the ATF or Linux), we now have it here to ensure that + * we no longer have to track this through the various components. + */ + if (cru->glb_rst_st != 0) + rk3399_force_power_on_reset(); +#endif + +#if defined(SPL_DM_REGULATOR) + /* + * Turning the eMMC and SPI back on (if disabled via the Qseven + * BIOS_ENABLE) signal is done through a always-on regulator). + */ + if (regulators_enable_boot_on(false)) + debug("%s: Cannot enable boot on regulator\n", __func__); +#endif +} #endif From 4e1aeb89afcc63f4d498719e1d2e5dcac8ae9ffc Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:40 +0800 Subject: [PATCH 34/60] rockchip: rk3399: move boot_devices into soc file Move boot_devices definition into rk3399.c, so that we can share the common code for board_spl_was_booted_from(). Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3399-board-spl.c | 6 +----- arch/arm/mach-rockchip/rk3399/rk3399.c | 7 +++++++ 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index 81a99f8e40..e6325274c3 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -23,11 +23,7 @@ void board_return_to_bootrom(void) back_to_bootrom(BROM_BOOT_NEXTSTAGE); } -static const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { - [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000", - [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000", - [BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000", -}; +__weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {}; const char *board_spl_was_booted_from(void) { diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index c4337e6093..89c4d59267 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -20,6 +21,12 @@ DECLARE_GLOBAL_DATA_PTR; #define GRF_EMMCCORE_CON11 0xff77f02c #define GRF_BASE 0xff770000 +const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { + [BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000", + [BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000", + [BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000", +}; + static struct mm_region rk3399_mem_map[] = { { .virt = 0x0UL, From faa98c7c5af2cc1224b77526f0106f26af86ad63 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:41 +0800 Subject: [PATCH 35/60] rockchip: rk3399: move chromebook bob specific flow to its board file Add a board_early_init_f() in board_init_f() and move the board specific init code into its own board file. Signed-off-by: Kever Yang --- .../arm/include/asm/arch-rockchip/sys_proto.h | 4 ---- arch/arm/mach-rockchip/rk3399-board-spl.c | 20 ++++++------------ board/google/gru/gru.c | 21 +++++++++++++++++++ 3 files changed, 27 insertions(+), 18 deletions(-) diff --git a/arch/arm/include/asm/arch-rockchip/sys_proto.h b/arch/arm/include/asm/arch-rockchip/sys_proto.h index 905c774c15..de5a8f11a9 100644 --- a/arch/arm/include/asm/arch-rockchip/sys_proto.h +++ b/arch/arm/include/asm/arch-rockchip/sys_proto.h @@ -6,8 +6,4 @@ #ifndef _ASM_ARCH_SYS_PROTO_H #define _ASM_ARCH_SYS_PROTO_H - -/* provided to defeat compiler optimisation in board_init_f() */ -void gru_dummy_function(int i); - #endif /* _ASM_ARCH_SYS_PROTO_H */ diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c index e6325274c3..cb481c58ec 100644 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ b/arch/arm/mach-rockchip/rk3399-board-spl.c @@ -57,6 +57,11 @@ __weak void rockchip_stimer_init(void) { } +__weak int board_early_init_f(void) +{ + return 0; +} + __weak int arch_cpu_init(void) { return 0; @@ -70,20 +75,6 @@ void board_init_f(ulong dummy) #ifdef CONFIG_DEBUG_UART debug_uart_init(); -# ifdef CONFIG_TARGET_CHROMEBOOK_BOB - int sum, i; - - /* - * Add a delay and ensure that the compiler does not optimise this out. - * This is needed since the power rails tail a while to turn on, and - * we get garbage serial output otherwise. - */ - sum = 0; - for (i = 0; i < 150000; i++) - sum += i; - gru_dummy_function(sum); -#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */ - /* * Debug UART can be used from here if required: * @@ -95,6 +86,7 @@ void board_init_f(ulong dummy) debug("U-Boot SPL board init\n"); #endif + board_early_init_f(); arch_cpu_init(); ret = spl_early_init(); diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c index b116b1a549..c2895e1267 100644 --- a/board/google/gru/gru.c +++ b/board/google/gru/gru.c @@ -10,7 +10,28 @@ int board_init(void) return 0; } +#ifdef CONFIG_SPL_BUILD /* provided to defeat compiler optimisation in board_init_f() */ void gru_dummy_function(int i) { } + +int board_early_init_f(void) +{ +# ifdef CONFIG_TARGET_CHROMEBOOK_BOB + int sum, i; + + /* + * Add a delay and ensure that the compiler does not optimise this out. + * This is needed since the power rails tail a while to turn on, and + * we get garbage serial output otherwise. + */ + sum = 0; + for (i = 0; i < 150000; i++) + sum += i; + gru_dummy_function(sum); +#endif /* CONFIG_TARGET_CHROMEBOOK_BOB */ + + return 0; +} +#endif From b7abef2ecbcc46df38d5519e649cd3779a17ab35 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 19:59:42 +0800 Subject: [PATCH 36/60] rockchip: rk3399: Migrate to use common spl board file rk3399 has similar boot flow in SPL with other Rockchip SoCs, migrate to use common spl board file. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3399-board-spl.c | 117 ---------------------- 3 files changed, 1 insertion(+), 118 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3399-board-spl.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 25214bca9c..81dee9e5c7 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -170,6 +170,7 @@ config ROCKCHIP_RK3399 select DM_PMIC select DM_REGULATOR_FIXED select BOARD_LATE_INIT + imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL_SUPPORT imply TPL_LIBCOMMON_SUPPORT imply TPL_LIBGENERIC_SUPPORT diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index c7ab72c13b..5cb2c6dcc9 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -12,7 +12,6 @@ obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o -obj-spl-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board-spl.o spl-boot-order.o ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c deleted file mode 100644 index cb481c58ec..0000000000 --- a/arch/arm/mach-rockchip/rk3399-board-spl.c +++ /dev/null @@ -1,117 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2016 Rockchip Electronics Co., Ltd - * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -void board_return_to_bootrom(void) -{ - back_to_bootrom(BROM_BOOT_NEXTSTAGE); -} - -__weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {}; - -const char *board_spl_was_booted_from(void) -{ - u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR); - const char *bootdevice_ofpath = NULL; - - if (bootdevice_brom_id < ARRAY_SIZE(boot_devices)) - bootdevice_ofpath = boot_devices[bootdevice_brom_id]; - - if (bootdevice_ofpath) - debug("%s: brom_bootdevice_id %x maps to '%s'\n", - __func__, bootdevice_brom_id, bootdevice_ofpath); - else - debug("%s: failed to resolve brom_bootdevice_id %x\n", - __func__, bootdevice_brom_id); - - return bootdevice_ofpath; -} - -u32 spl_boot_device(void) -{ - u32 boot_device = BOOT_DEVICE_MMC1; - - if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) - return BOOT_DEVICE_BOOTROM; - - return boot_device; -} - -__weak void rockchip_stimer_init(void) -{ -} - -__weak int board_early_init_f(void) -{ - return 0; -} - -__weak int arch_cpu_init(void) -{ - return 0; -} - -void board_init_f(ulong dummy) -{ - struct udevice *dev; - int ret; - -#ifdef CONFIG_DEBUG_UART - debug_uart_init(); - - /* - * Debug UART can be used from here if required: - * - * debug_uart_init(); - * printch('a'); - * printhex8(0x1234); - * printascii("string"); - */ - debug("U-Boot SPL board init\n"); -#endif - - board_early_init_f(); - arch_cpu_init(); - - ret = spl_early_init(); - if (ret) { - debug("spl_early_init() failed: %d\n", ret); - hang(); - } - - rockchip_stimer_init(); - - ret = uclass_get_device(UCLASS_RAM, 0, &dev); - if (ret) { - pr_err("DRAM init failed: %d\n", ret); - return; - } - - preloader_console_init(); -} - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - /* Just empty function now - can't decide what to choose */ - debug("%s: %s\n", __func__, name); - - return 0; -} -#endif From 604814c8dc5ca56f7103a51d8d209fa26e5ad9ef Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:01:58 +0800 Subject: [PATCH 37/60] rockchip: rk3328: add board_debug_uart_init() Add board_debug_uart_init() to make the debug UART work with correct setting. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3328/rk3328.c | 49 ++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c index 222a8d36d3..afd9de4a1f 100644 --- a/arch/arm/mach-rockchip/rk3328/rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c @@ -6,11 +6,17 @@ #include #include #include +#include +#include #include #include DECLARE_GLOBAL_DATA_PTR; +#define CRU_BASE 0xFF440000 +#define GRF_BASE 0xFF100000 +#define UART2_BASE 0xFF130000 + const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_EMMC] = "rksdmmc@ff520000", [BROM_BOOTSOURCE_SD] = "rksdmmc@ff500000", @@ -55,3 +61,46 @@ int arch_cpu_init(void) return 0; } + +void board_debug_uart_init(void) +{ + struct rk3328_grf_regs * const grf = (void *)GRF_BASE; + struct rk_uart * const uart = (void *)UART2_BASE; + enum{ + GPIO2A0_SEL_SHIFT = 0, + GPIO2A0_SEL_MASK = 3 << GPIO2A0_SEL_SHIFT, + GPIO2A0_UART2_TX_M1 = 1, + + GPIO2A1_SEL_SHIFT = 2, + GPIO2A1_SEL_MASK = 3 << GPIO2A1_SEL_SHIFT, + GPIO2A1_UART2_RX_M1 = 1, + }; + enum { + IOMUX_SEL_UART2_SHIFT = 0, + IOMUX_SEL_UART2_MASK = 3 << IOMUX_SEL_UART2_SHIFT, + IOMUX_SEL_UART2_M0 = 0, + IOMUX_SEL_UART2_M1, + }; + + /* uart_sel_clk default select 24MHz */ + writel((3 << (8 + 16)) | (2 << 8), CRU_BASE + 0x148); + + /* init uart baud rate 1500000 */ + writel(0x83, &uart->lcr); + writel(0x1, &uart->rbr); + writel(0x3, &uart->lcr); + + /* Enable early UART2 */ + rk_clrsetreg(&grf->com_iomux, + IOMUX_SEL_UART2_MASK, + IOMUX_SEL_UART2_M1 << IOMUX_SEL_UART2_SHIFT); + rk_clrsetreg(&grf->gpio2a_iomux, + GPIO2A0_SEL_MASK, + GPIO2A0_UART2_TX_M1 << GPIO2A0_SEL_SHIFT); + rk_clrsetreg(&grf->gpio2a_iomux, + GPIO2A1_SEL_MASK, + GPIO2A1_UART2_RX_M1 << GPIO2A1_SEL_SHIFT); + + /* enable FIFO */ + writel(0x1, &uart->sfe); +} From 283e61a6615b66f2539ebecafe274d9608911be1 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:01:59 +0800 Subject: [PATCH 38/60] rockchip: convert to use ROCKCHIP_BOOT_MODE_REG for fastboot tag The fastboot_set_reboot_flag() update a TAG into a register for next boot, use the common macro for the register so that we can re-use the function for different SoCs. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3128-board.c | 5 +---- arch/arm/mach-rockchip/rk322x-board.c | 5 +---- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c index 0945829d0e..636ee65fee 100644 --- a/arch/arm/mach-rockchip/rk3128-board.c +++ b/arch/arm/mach-rockchip/rk3128-board.c @@ -111,12 +111,9 @@ int board_usb_cleanup(int index, enum usb_init_type init) #if CONFIG_IS_ENABLED(FASTBOOT) int fastboot_set_reboot_flag(void) { - struct rk3128_grf *grf; - printf("Setting reboot to fastboot flag ...\n"); - grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); /* Set boot mode to fastboot */ - writel(BOOT_FASTBOOT, &grf->os_reg[0]); + writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); return 0; } diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index e7a1e54874..c0a537616c 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -115,12 +115,9 @@ int board_usb_cleanup(int index, enum usb_init_type init) #if CONFIG_IS_ENABLED(FASTBOOT) int fastboot_set_reboot_flag(void) { - struct rk322x_grf *grf; - printf("Setting reboot to fastboot flag ...\n"); - grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); /* Set boot mode to fastboot */ - writel(BOOT_FASTBOOT, &grf->os_reg[0]); + writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); return 0; } From 6c9a9df9f507986bdcd4cd518f4022c7373292f8 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:00 +0800 Subject: [PATCH 39/60] rockchip: clean up board_usb_init() for all SoCs Use "snps,dwc2" for compatible name and and common variable names so that we can share the common code for all SoCs. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3036-board.c | 10 +++--- arch/arm/mach-rockchip/rk3128-board.c | 10 +++--- arch/arm/mach-rockchip/rk322x-board.c | 10 +++--- arch/arm/mach-rockchip/rk3288-board.c | 38 ++++---------------- arch/arm/mach-rockchip/rv1108-board.c | 49 ++++++-------------------- board/rockchip/evb_rk3328/evb-rk3328.c | 11 +++--- 6 files changed, 36 insertions(+), 92 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c index c594c4d61c..b7967b8577 100644 --- a/arch/arm/mach-rockchip/rk3036-board.c +++ b/arch/arm/mach-rockchip/rk3036-board.c @@ -59,7 +59,7 @@ void enable_caches(void) #include #include -static struct dwc2_plat_otg_data rk3036_otg_data = { +static struct dwc2_plat_otg_data otg_data = { .rx_fifo_sz = 512, .np_tx_fifo_sz = 16, .tx_fifo_sz = 128, @@ -74,7 +74,7 @@ int board_usb_init(int index, enum usb_init_type init) /* find the usb_otg node */ node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3288-usb"); + "snps,dwc2"); while (node > 0) { mode = fdt_getprop(blob, node, "dr_mode", NULL); @@ -84,15 +84,15 @@ int board_usb_init(int index, enum usb_init_type init) } node = fdt_node_offset_by_compatible(blob, node, - "rockchip,rk3288-usb"); + "snps,dwc2"); } if (!matched) { debug("Not found usb_otg device\n"); return -ENODEV; } - rk3036_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); + otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - return dwc2_udc_probe(&rk3036_otg_data); + return dwc2_udc_probe(&otg_data); } int board_usb_cleanup(int index, enum usb_init_type init) diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c index 636ee65fee..cfc41286e7 100644 --- a/arch/arm/mach-rockchip/rk3128-board.c +++ b/arch/arm/mach-rockchip/rk3128-board.c @@ -66,7 +66,7 @@ void enable_caches(void) #include #include -static struct dwc2_plat_otg_data rk3128_otg_data = { +static struct dwc2_plat_otg_data otg_data = { .rx_fifo_sz = 512, .np_tx_fifo_sz = 16, .tx_fifo_sz = 128, @@ -81,7 +81,7 @@ int board_usb_init(int index, enum usb_init_type init) /* find the usb_otg node */ node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3128-usb"); + "snps,dwc2"); while (node > 0) { mode = fdt_getprop(blob, node, "dr_mode", NULL); @@ -91,15 +91,15 @@ int board_usb_init(int index, enum usb_init_type init) } node = fdt_node_offset_by_compatible(blob, node, - "rockchip,rk3128-usb"); + "snps,dwc2"); } if (!matched) { debug("Not found usb_otg device\n"); return -ENODEV; } - rk3128_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); + otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - return dwc2_udc_probe(&rk3128_otg_data); + return dwc2_udc_probe(&otg_data); } int board_usb_cleanup(int index, enum usb_init_type init) diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index c0a537616c..5103ad4ccc 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -70,7 +70,7 @@ void enable_caches(void) #include #include -static struct dwc2_plat_otg_data rk322x_otg_data = { +static struct dwc2_plat_otg_data otg_data = { .rx_fifo_sz = 512, .np_tx_fifo_sz = 16, .tx_fifo_sz = 128, @@ -85,7 +85,7 @@ int board_usb_init(int index, enum usb_init_type init) /* find the usb_otg node */ node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3288-usb"); + "snps,dwc2"); while (node > 0) { mode = fdt_getprop(blob, node, "dr_mode", NULL); @@ -95,15 +95,15 @@ int board_usb_init(int index, enum usb_init_type init) } node = fdt_node_offset_by_compatible(blob, node, - "rockchip,rk3288-usb"); + "snps,dwc2"); } if (!matched) { debug("Not found usb_otg device\n"); return -ENODEV; } - rk322x_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); + otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - return dwc2_udc_probe(&rk322x_otg_data); + return dwc2_udc_probe(&otg_data); } int board_usb_cleanup(int index, enum usb_init_type init) diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index a250d50387..23c5343eb8 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -171,7 +171,7 @@ void enable_caches(void) #include #include -static struct dwc2_plat_otg_data rk3288_otg_data = { +static struct dwc2_plat_otg_data otg_data = { .rx_fifo_sz = 512, .np_tx_fifo_sz = 16, .tx_fifo_sz = 128, @@ -179,15 +179,14 @@ static struct dwc2_plat_otg_data rk3288_otg_data = { int board_usb_init(int index, enum usb_init_type init) { - int node, phy_node; + int node; const char *mode; bool matched = false; const void *blob = gd->fdt_blob; - u32 grf_phy_offset; /* find the usb_otg node */ node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3288-usb"); + "snps,dwc2"); while (node > 0) { mode = fdt_getprop(blob, node, "dr_mode", NULL); @@ -197,40 +196,15 @@ int board_usb_init(int index, enum usb_init_type init) } node = fdt_node_offset_by_compatible(blob, node, - "rockchip,rk3288-usb"); + "snps,dwc2"); } if (!matched) { debug("Not found usb_otg device\n"); return -ENODEV; } - rk3288_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); + otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - node = fdtdec_lookup_phandle(blob, node, "phys"); - if (node <= 0) { - debug("Not found usb phy device\n"); - return -ENODEV; - } - - phy_node = fdt_parent_offset(blob, node); - if (phy_node <= 0) { - debug("Not found usb phy device\n"); - return -ENODEV; - } - - rk3288_otg_data.phy_of_node = phy_node; - grf_phy_offset = fdtdec_get_addr(blob, node, "reg"); - - /* find the grf node */ - node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3288-grf"); - if (node <= 0) { - debug("Not found grf device\n"); - return -ENODEV; - } - rk3288_otg_data.regs_phy = grf_phy_offset + - fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&rk3288_otg_data); + return dwc2_udc_probe(&otg_data); } int board_usb_cleanup(int index, enum usb_init_type init) diff --git a/arch/arm/mach-rockchip/rv1108-board.c b/arch/arm/mach-rockchip/rv1108-board.c index 3412f2c063..3c683cb8ac 100644 --- a/arch/arm/mach-rockchip/rv1108-board.c +++ b/arch/arm/mach-rockchip/rv1108-board.c @@ -11,7 +11,7 @@ DECLARE_GLOBAL_DATA_PTR; #include #include -static struct dwc2_plat_otg_data rv1108_otg_data = { +static struct dwc2_plat_otg_data otg_data = { .rx_fifo_sz = 512, .np_tx_fifo_sz = 16, .tx_fifo_sz = 128, @@ -19,14 +19,14 @@ static struct dwc2_plat_otg_data rv1108_otg_data = { int board_usb_init(int index, enum usb_init_type init) { - const void *blob = gd->fdt_blob; - bool matched = false; - int node, phy_node; - u32 grf_phy_offset; + int node; const char *mode; + bool matched = false; + const void *blob = gd->fdt_blob; /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, "rockchip,rk3066-usb"); + node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); + while (node > 0) { mode = fdt_getprop(blob, node, "dr_mode", NULL); if (mode && strcmp(mode, "otg") == 0) { @@ -34,44 +34,15 @@ int board_usb_init(int index, enum usb_init_type init) break; } - node = fdt_node_offset_by_compatible(blob, node, - "rockchip,rk3066-usb"); + node = fdt_node_offset_by_compatible(blob, node, "snps,dwc2"); } - if (!matched) { - debug("usb_otg device not found\n"); + debug("Not found usb_otg device\n"); return -ENODEV; } + otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - rv1108_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - node = fdtdec_lookup_phandle(blob, node, "phys"); - if (node <= 0) { - debug("phys node not found\n"); - return -ENODEV; - } - - phy_node = fdt_parent_offset(blob, node); - if (phy_node <= 0) { - debug("usb phy node not found\n"); - return -ENODEV; - } - - rv1108_otg_data.phy_of_node = phy_node; - grf_phy_offset = fdtdec_get_addr(blob, node, "reg"); - - /* find the grf node */ - node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rv1108-grf"); - if (node <= 0) { - debug("grf node not found\n"); - return -ENODEV; - } - - rv1108_otg_data.regs_phy = grf_phy_offset + fdtdec_get_addr(blob, node, - "reg"); - - return dwc2_udc_probe(&rv1108_otg_data); + return dwc2_udc_probe(&otg_data); } int board_usb_cleanup(int index, enum usb_init_type init) diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c index bc9ef5e98b..64595c783d 100644 --- a/board/rockchip/evb_rk3328/evb-rk3328.c +++ b/board/rockchip/evb_rk3328/evb-rk3328.c @@ -26,7 +26,7 @@ int board_init(void) #include #include -static struct dwc2_plat_otg_data rk3328_otg_data = { +static struct dwc2_plat_otg_data otg_data = { .rx_fifo_sz = 512, .np_tx_fifo_sz = 16, .tx_fifo_sz = 128, @@ -41,7 +41,7 @@ int board_usb_init(int index, enum usb_init_type init) /* find the usb_otg node */ node = fdt_node_offset_by_compatible(blob, -1, - "rockchip,rk3328-usb"); + "snps,dwc2"); while (node > 0) { mode = fdt_getprop(blob, node, "dr_mode", NULL); @@ -51,16 +51,15 @@ int board_usb_init(int index, enum usb_init_type init) } node = fdt_node_offset_by_compatible(blob, node, - "rockchip,rk3328-usb"); + "snps,dwc2"); } if (!matched) { debug("Not found usb_otg device\n"); return -ENODEV; } + otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - rk3328_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&rk3328_otg_data); + return dwc2_udc_probe(&otg_data); } int board_usb_cleanup(int index, enum usb_init_type init) From 54f17fa05d453618afabff1246c1a16cea304b1b Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:01 +0800 Subject: [PATCH 40/60] rockchip: add common board file for U-Boot proper Add common board file for Rockchip SoCs to avoid too much copy-paste work for different SoCs. This board file in charge for common board_init() and board_late_init() in U-Boot proper. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 7 +++ arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/board.c | 104 ++++++++++++++++++++++++++++++++ 3 files changed, 112 insertions(+) create mode 100644 arch/arm/mach-rockchip/board.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 81dee9e5c7..4d983f8fce 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -229,6 +229,13 @@ config TPL_ROCKCHIP_BACK_TO_BROM SPL will return to the boot rom, which will then load the U-Boot binary to keep going on. +config ROCKCHIP_COMMON_BOARD + bool "Rockchip common board file" + help + Rockchip SoCs have similar boot process, Common board file is mainly + in charge of common process of board_init() and board_late_init() for + U-Boot proper. + config SPL_ROCKCHIP_COMMON_BOARD bool "Rockchip SPL common board file" depends on SPL diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 5cb2c6dcc9..7d2a227794 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -20,6 +20,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # we can have the preprocessor correctly recognise both 0x0 and 0 # meaning "turn it off". obj-y += boot_mode.o +obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c new file mode 100644 index 0000000000..b2a88e789d --- /dev/null +++ b/arch/arm/mach-rockchip/board.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +__weak int rk_board_late_init(void) +{ + return 0; +} + +int board_late_init(void) +{ + setup_boot_mode(); + + return rk_board_late_init(); +} + +int board_init(void) +{ + int ret; + +#ifdef CONFIG_DM_REGULATOR + ret = regulators_enable_boot_on(false); + if (ret) + debug("%s: Cannot enable boot on regulator\n", __func__); +#endif + + return 0; +} + +#if !defined(CONFIG_SYS_DCACHE_OFF) && !defined(CONFIG_ARM64) +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} +#endif + +#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) +#include +#include + +static struct dwc2_plat_otg_data otg_data = { + .rx_fifo_sz = 512, + .np_tx_fifo_sz = 16, + .tx_fifo_sz = 128, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + int node; + const char *mode; + bool matched = false; + const void *blob = gd->fdt_blob; + + /* find the usb_otg node */ + node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); + + while (node > 0) { + mode = fdt_getprop(blob, node, "dr_mode", NULL); + if (mode && strcmp(mode, "otg") == 0) { + matched = true; + break; + } + + node = fdt_node_offset_by_compatible(blob, node, "snps,dwc2"); + } + if (!matched) { + debug("Not found usb_otg device\n"); + return -ENODEV; + } + otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); + + return dwc2_udc_probe(&otg_data); +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + return 0; +} +#endif + +#if CONFIG_IS_ENABLED(FASTBOOT) +int fastboot_set_reboot_flag(void) +{ + printf("Setting reboot to fastboot flag ...\n"); + /* Set boot mode to fastboot */ + writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); + + return 0; +} +#endif From 5eb9a78fcdb3af09527f16698f251756eb07359f Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:02 +0800 Subject: [PATCH 41/60] rockchip: sdram_common: add common dram_init_banksize dram_init_banksize() can be common used by all SoCs, move it into sdram_common.c Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3128-board.c | 13 ------ arch/arm/mach-rockchip/rk3128/rk3128.c | 3 ++ arch/arm/mach-rockchip/rk322x-board.c | 13 ------ arch/arm/mach-rockchip/rk3288/rk3288.c | 15 ------ arch/arm/mach-rockchip/rk3328/rk3328.c | 11 ----- arch/arm/mach-rockchip/rk3368/rk3368.c | 11 ----- arch/arm/mach-rockchip/rk3399/rk3399.c | 11 ----- arch/arm/mach-rockchip/sdram_common.c | 63 ++++++++++++++++++++++++++ board/rockchip/evb_rv1108/evb_rv1108.c | 8 ---- 9 files changed, 66 insertions(+), 82 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c index cfc41286e7..b931057329 100644 --- a/arch/arm/mach-rockchip/rk3128-board.c +++ b/arch/arm/mach-rockchip/rk3128-board.c @@ -41,19 +41,6 @@ int board_init(void) return 0; } -int dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x8400000; - /* Reserve 0xe00000(14MB) for OPTEE with TA enabled, otherwise 2MB */ - gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE - + gd->bd->bi_dram[0].size + 0xe00000; - gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start - + gd->ram_size - gd->bd->bi_dram[1].start; - - return 0; -} - #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c index 11bba148c3..ee176de80b 100644 --- a/arch/arm/mach-rockchip/rk3128/rk3128.c +++ b/arch/arm/mach-rockchip/rk3128/rk3128.c @@ -2,6 +2,9 @@ /* * Copyright (c) 2017 Rockchip Electronics Co., Ltd */ +#include + +DECLARE_GLOBAL_DATA_PTR; int arch_cpu_init(void) { diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index 5103ad4ccc..91fbd6abb8 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -45,19 +45,6 @@ int board_init(void) return 0; } -int dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x8400000; - /* Reserve 0x200000 for OPTEE */ - gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE - + gd->bd->bi_dram[0].size + 0x200000; - gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start - + gd->ram_size - gd->bd->bi_dram[1].start; - - return 0; -} - #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index 04a87d64f4..b80193012a 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -67,18 +67,3 @@ void board_debug_uart_init(void) GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); } #endif - -#ifdef CONFIG_SPL_OS_BOOT - -#define PMU_BASE 0xff730000 -int dram_init_banksize(void) -{ - struct rk3288_pmu *const pmu = (void *)PMU_BASE; - size_t size = rockchip_sdram_size((phys_addr_t)&pmu->sys_reg[2]); - - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = size; - - return 0; -} -#endif diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c index afd9de4a1f..592f287613 100644 --- a/arch/arm/mach-rockchip/rk3328/rk3328.c +++ b/arch/arm/mach-rockchip/rk3328/rk3328.c @@ -44,17 +44,6 @@ static struct mm_region rk3328_mem_map[] = { struct mm_region *mem_map = rk3328_mem_map; -int dram_init_banksize(void) -{ - size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top); - - /* Reserve 0x200000 for ATF bl31 */ - gd->bd->bi_dram[0].start = 0x200000; - gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start; - - return 0; -} - int arch_cpu_init(void) { /* We do some SoC one time setting here. */ diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c index c75a5cd0c4..7ccd417a18 100644 --- a/arch/arm/mach-rockchip/rk3368/rk3368.c +++ b/arch/arm/mach-rockchip/rk3368/rk3368.c @@ -58,17 +58,6 @@ const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { [BROM_BOOTSOURCE_SD] = "dwmmc@ff0c0000", }; -int dram_init_banksize(void) -{ - size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top); - - /* Reserve 0x200000 for ATF bl31 */ - gd->bd->bi_dram[0].start = 0x200000; - gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start; - - return 0; -} - #ifdef CONFIG_ARCH_EARLY_INIT_R static int mcu_init(void) { diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c index 89c4d59267..863024d071 100644 --- a/arch/arm/mach-rockchip/rk3399/rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/rk3399.c @@ -78,17 +78,6 @@ void rockchip_stimer_init(void) } #endif -int dram_init_banksize(void) -{ - size_t max_size = min((unsigned long)gd->ram_size, gd->ram_top); - - /* Reserve 0x200000 for ATF bl31 */ - gd->bd->bi_dram[0].start = 0x200000; - gd->bd->bi_dram[0].size = max_size - gd->bd->bi_dram[0].start; - - return 0; -} - int arch_cpu_init(void) { diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c index 8684dbd4fa..22a4aca940 100644 --- a/arch/arm/mach-rockchip/sdram_common.c +++ b/arch/arm/mach-rockchip/sdram_common.c @@ -11,6 +11,69 @@ #include DECLARE_GLOBAL_DATA_PTR; + +#define TRUST_PARAMETER_OFFSET (34 * 1024 * 1024) + +struct tos_parameter_t { + u32 version; + u32 checksum; + struct { + char name[8]; + s64 phy_addr; + u32 size; + u32 flags; + } tee_mem; + struct { + char name[8]; + s64 phy_addr; + u32 size; + u32 flags; + } drm_mem; + s64 reserve[8]; +}; + +int dram_init_banksize(void) +{ + size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE), + gd->ram_top); + +#ifdef CONFIG_ARM64 + /* Reserve 0x200000 for ATF bl31 */ + gd->bd->bi_dram[0].start = 0x200000; + gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; +#else +#ifdef CONFIG_SPL_OPTEE + struct tos_parameter_t *tos_parameter; + + tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE + + TRUST_PARAMETER_OFFSET); + + if (tos_parameter->tee_mem.flags == 1) { + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr + - CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr + + tos_parameter->tee_mem.size; + gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start + + top - gd->bd->bi_dram[1].start; + } else { + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = 0x8400000; + /* Reserve 32M for OPTEE with TA */ + gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE + + gd->bd->bi_dram[0].size + 0x2000000; + gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start + + top - gd->bd->bi_dram[1].start; + } +#else + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; +#endif +#endif + + return 0; +} + size_t rockchip_sdram_size(phys_addr_t reg) { u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4; diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c index 457b110cd5..6d934f8805 100644 --- a/board/rockchip/evb_rv1108/evb_rv1108.c +++ b/board/rockchip/evb_rv1108/evb_rv1108.c @@ -59,11 +59,3 @@ int dram_init(void) return 0; } - -int dram_init_banksize(void) -{ - gd->bd->bi_dram[0].start = 0x60000000; - gd->bd->bi_dram[0].size = 0x8000000; - - return 0; -} From 7559f6e9f03ed1aac211d351427c0664666c35e9 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:03 +0800 Subject: [PATCH 42/60] rockchip: rk3036: move dram_init() into soc file Move dram_init() into rk3036.c so that we can use to common board file later. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3036-board.c | 14 -------------- arch/arm/mach-rockchip/rk3036/rk3036.c | 16 ++++++++++++++++ 2 files changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c index b7967b8577..40f5e0aa3d 100644 --- a/arch/arm/mach-rockchip/rk3036-board.c +++ b/arch/arm/mach-rockchip/rk3036-board.c @@ -13,7 +13,6 @@ #include #include #include -#include DECLARE_GLOBAL_DATA_PTR; @@ -34,19 +33,6 @@ int board_init(void) return 0; } -#if !CONFIG_IS_ENABLED(RAM) -/* - * When CONFIG_RAM is enabled, the dram_init() function is implemented - * in sdram_common.c. - */ -int dram_init(void) -{ - gd->ram_size = sdram_size(); - - return 0; -} -#endif - #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) void enable_caches(void) { diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c b/arch/arm/mach-rockchip/rk3036/rk3036.c index 481af8a934..be458cfb64 100644 --- a/arch/arm/mach-rockchip/rk3036/rk3036.c +++ b/arch/arm/mach-rockchip/rk3036/rk3036.c @@ -5,6 +5,9 @@ #include #include #include +#include + +DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_DEBUG_UART_BOARD_INIT void board_debug_uart_init(void) @@ -36,3 +39,16 @@ void board_debug_uart_init(void) GPIO1C2_UART2_SIN << GPIO1C2_SHIFT); } #endif + +#if !CONFIG_IS_ENABLED(RAM) +/* + * When CONFIG_RAM is enabled, the dram_init() function is implemented + * in sdram_common.c. + */ +int dram_init(void) +{ + gd->ram_size = sdram_size(); + + return 0; +} +#endif From c0c2a2e4a5a93425cd34d59f6bfb0387056e2c94 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:04 +0800 Subject: [PATCH 43/60] rockchip: rk3036: Migrate to use common board file Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3036-board.c | 88 --------------------------- 3 files changed, 1 insertion(+), 89 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3036-board.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 4d983f8fce..74e37eeb2a 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -7,6 +7,7 @@ config ROCKCHIP_RK3036 select SPL imply USB_FUNCTION_ROCKUSB imply CMD_ROCKUSB + imply ROCKCHIP_COMMON_BOARD help The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 7d2a227794..e7f9a11a97 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -26,7 +26,6 @@ obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o -obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board.o obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board.o endif diff --git a/arch/arm/mach-rockchip/rk3036-board.c b/arch/arm/mach-rockchip/rk3036-board.c deleted file mode 100644 index 40f5e0aa3d..0000000000 --- a/arch/arm/mach-rockchip/rk3036-board.c +++ /dev/null @@ -1,88 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2015 Rockchip Electronics Co., Ltd - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -__weak int rk_board_late_init(void) -{ - return 0; -} - -int board_late_init(void) -{ - setup_boot_mode(); - - return rk_board_late_init(); -} - -int board_init(void) -{ - return 0; -} - -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif - -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -#include -#include - -static struct dwc2_plat_otg_data otg_data = { - .rx_fifo_sz = 512, - .np_tx_fifo_sz = 16, - .tx_fifo_sz = 128, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - int node; - const char *mode; - bool matched = false; - const void *blob = gd->fdt_blob; - - /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, - "snps,dwc2"); - - while (node > 0) { - mode = fdt_getprop(blob, node, "dr_mode", NULL); - if (mode && strcmp(mode, "otg") == 0) { - matched = true; - break; - } - - node = fdt_node_offset_by_compatible(blob, node, - "snps,dwc2"); - } - if (!matched) { - debug("Not found usb_otg device\n"); - return -ENODEV; - } - otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&otg_data); -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} -#endif From 7e719d94a55ff98145cbaa5117b297ac17b4550e Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:05 +0800 Subject: [PATCH 44/60] rockchip: rk3128: Migrate to use common board file Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3128-board.c | 107 -------------------------- 3 files changed, 1 insertion(+), 108 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3128-board.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 74e37eeb2a..ea8908cd29 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -17,6 +17,7 @@ config ROCKCHIP_RK3036 config ROCKCHIP_RK3128 bool "Support Rockchip RK3128" select CPU_V7A + imply ROCKCHIP_COMMON_BOARD help The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 including NEON and GPU, Mali-400 graphics, several DDR3 options diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index e7f9a11a97..260a0cfabb 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,7 +23,6 @@ obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o -obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o diff --git a/arch/arm/mach-rockchip/rk3128-board.c b/arch/arm/mach-rockchip/rk3128-board.c deleted file mode 100644 index b931057329..0000000000 --- a/arch/arm/mach-rockchip/rk3128-board.c +++ /dev/null @@ -1,107 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2017 Rockchip Electronics Co., Ltd. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -__weak int rk_board_late_init(void) -{ - return 0; -} - -int board_late_init(void) -{ - setup_boot_mode(); - - return rk_board_late_init(); -} - -int board_init(void) -{ - int ret = 0; - - ret = regulators_enable_boot_on(false); - if (ret) { - debug("%s: Cannot enable boot on regulator\n", __func__); - return ret; - } - - return 0; -} - -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif - -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -#include -#include - -static struct dwc2_plat_otg_data otg_data = { - .rx_fifo_sz = 512, - .np_tx_fifo_sz = 16, - .tx_fifo_sz = 128, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - int node; - const char *mode; - bool matched = false; - const void *blob = gd->fdt_blob; - - /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, - "snps,dwc2"); - - while (node > 0) { - mode = fdt_getprop(blob, node, "dr_mode", NULL); - if (mode && strcmp(mode, "otg") == 0) { - matched = true; - break; - } - - node = fdt_node_offset_by_compatible(blob, node, - "snps,dwc2"); - } - if (!matched) { - debug("Not found usb_otg device\n"); - return -ENODEV; - } - otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&otg_data); -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} -#endif - -#if CONFIG_IS_ENABLED(FASTBOOT) -int fastboot_set_reboot_flag(void) -{ - printf("Setting reboot to fastboot flag ...\n"); - /* Set boot mode to fastboot */ - writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); - - return 0; -} -#endif From 55cdcebc99ec678da82a56a73dbc7201f3bc035a Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:06 +0800 Subject: [PATCH 45/60] rockchip: rk322x: move SoC setting into arch_cpu_init() The SoC one time setting should go to arch_cpu_init() in rk322x.c Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk322x-board.c | 14 -------------- arch/arm/mach-rockchip/rk322x/rk322x.c | 11 +++++++++++ 2 files changed, 11 insertions(+), 14 deletions(-) diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c index 91fbd6abb8..0a129520da 100644 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ b/arch/arm/mach-rockchip/rk322x-board.c @@ -10,7 +10,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; @@ -29,19 +28,6 @@ int board_late_init(void) int board_init(void) { -#include - /* Enable early UART2 channel 1 on the RK322x */ -#define GRF_BASE 0x11000000 - static struct rk322x_grf * const grf = (void *)GRF_BASE; - - /* - * The integrated macphy is enabled by default, disable it - * for saving power consuming. - */ - rk_clrsetreg(&grf->macphy_con[0], - MACPHY_CFG_ENABLE_MASK, - 0 << MACPHY_CFG_ENABLE_SHIFT); - return 0; } diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c index a8677b9783..cd0bf8a70c 100644 --- a/arch/arm/mach-rockchip/rk322x/rk322x.c +++ b/arch/arm/mach-rockchip/rk322x/rk322x.c @@ -57,6 +57,17 @@ int arch_cpu_init(void) /* Disable the ddr secure region setting to make it non-secure */ rk_clrreg(&sgrf->soc_con[0], 0x4000); +#else +#define GRF_BASE 0x11000000 + static struct rk322x_grf * const grf = (void *)GRF_BASE; + /* + * The integrated macphy is enabled by default, disable it + * for saving power consuming. + */ + rk_clrsetreg(&grf->macphy_con[0], + MACPHY_CFG_ENABLE_MASK, + 0 << MACPHY_CFG_ENABLE_SHIFT); + #endif return 0; } From cca3b09147ea572ba1491186328588f6aa9c9aef Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:07 +0800 Subject: [PATCH 46/60] rockchip: rk322x: Migrate to use common board file Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk322x-board.c | 97 --------------------------- 3 files changed, 1 insertion(+), 98 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk322x-board.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ea8908cd29..a62ce448a4 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -60,6 +60,7 @@ config ROCKCHIP_RK322X select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL select SPL_DRIVERS_MISC_SUPPORT + imply ROCKCHIP_COMMON_BOARD imply SPL_SERIAL_SUPPORT imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL_SUPPORT diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 260a0cfabb..1dd9d2fd25 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -23,7 +23,6 @@ obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o -obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board.o diff --git a/arch/arm/mach-rockchip/rk322x-board.c b/arch/arm/mach-rockchip/rk322x-board.c deleted file mode 100644 index 0a129520da..0000000000 --- a/arch/arm/mach-rockchip/rk322x-board.c +++ /dev/null @@ -1,97 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2017 Rockchip Electronics Co., Ltd. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -__weak int rk_board_late_init(void) -{ - return 0; -} - -int board_late_init(void) -{ - setup_boot_mode(); - - return rk_board_late_init(); -} - -int board_init(void) -{ - return 0; -} - -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif - -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -#include -#include - -static struct dwc2_plat_otg_data otg_data = { - .rx_fifo_sz = 512, - .np_tx_fifo_sz = 16, - .tx_fifo_sz = 128, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - int node; - const char *mode; - bool matched = false; - const void *blob = gd->fdt_blob; - - /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, - "snps,dwc2"); - - while (node > 0) { - mode = fdt_getprop(blob, node, "dr_mode", NULL); - if (mode && strcmp(mode, "otg") == 0) { - matched = true; - break; - } - - node = fdt_node_offset_by_compatible(blob, node, - "snps,dwc2"); - } - if (!matched) { - debug("Not found usb_otg device\n"); - return -ENODEV; - } - otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&otg_data); -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} -#endif - -#if CONFIG_IS_ENABLED(FASTBOOT) -int fastboot_set_reboot_flag(void) -{ - printf("Setting reboot to fastboot flag ...\n"); - /* Set boot mode to fastboot */ - writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG); - - return 0; -} -#endif From c14fe2a8e192d1b1974a425dff7552df71962fa4 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:08 +0800 Subject: [PATCH 47/60] rockchip: rk3188: Move SoC one time setting into arch_cpu_init() The setting for noc remap should goto arch_cpu_init(). Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3188-board.c | 15 --------------- arch/arm/mach-rockchip/rk3188/rk3188.c | 20 ++++++++++++++++++-- 2 files changed, 18 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c index 94fd6c01eb..5b6f21577f 100644 --- a/arch/arm/mach-rockchip/rk3188-board.c +++ b/arch/arm/mach-rockchip/rk3188-board.c @@ -7,13 +7,9 @@ #include #include #include -#include #include #include -#include -#include #include -#include #include __weak int rk_board_late_init(void) @@ -23,18 +19,7 @@ __weak int rk_board_late_init(void) int board_late_init(void) { - struct rk3188_grf *grf; - setup_boot_mode(); - grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); - if (IS_ERR(grf)) { - pr_err("grf syscon returned %ld\n", PTR_ERR(grf)); - } else { - /* enable noc remap to mimic legacy loaders */ - rk_clrsetreg(&grf->soc_con0, - NOC_REMAP_MASK << NOC_REMAP_SHIFT, - NOC_REMAP_MASK << NOC_REMAP_SHIFT); - } return rk_board_late_init(); } diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c index 08792f1674..95f0e3ccbe 100644 --- a/arch/arm/mach-rockchip/rk3188/rk3188.c +++ b/arch/arm/mach-rockchip/rk3188/rk3188.c @@ -3,8 +3,11 @@ * (C) Copyright 2019 Rockchip Electronics Co., Ltd */ #include +#include +#include #include #include +#include #include #include @@ -42,11 +45,17 @@ void board_debug_uart_init(void) } #endif +#ifdef CONFIG_SPL_BUILD int arch_cpu_init(void) { -#ifdef CONFIG_ROCKCHIP_USB_UART - struct rk3188_grf * const grf = (void *)GRF_BASE; + struct rk3188_grf *grf; + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + if (IS_ERR(grf)) { + pr_err("grf syscon returned %ld\n", PTR_ERR(grf)); + return 0; + } +#ifdef CONFIG_ROCKCHIP_USB_UART rk_clrsetreg(&grf->uoc0_con[0], SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK, 1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT | @@ -64,8 +73,15 @@ int arch_cpu_init(void) BYPASSSEL_MASK | BYPASSDMEN_MASK, 1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT); #endif + + /* enable noc remap to mimic legacy loaders */ + rk_clrsetreg(&grf->soc_con0, + NOC_REMAP_MASK << NOC_REMAP_SHIFT, + NOC_REMAP_MASK << NOC_REMAP_SHIFT); + return 0; } +#endif #ifdef CONFIG_SPL_BUILD static int setup_led(void) From a97b65a7a0b907a9ac8920a24137dbe802e41ef8 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:09 +0800 Subject: [PATCH 48/60] rockchip: rk3188: Migrate to use common board file Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3188-board.c | 38 --------------------------- 3 files changed, 1 insertion(+), 39 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3188-board.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index a62ce448a4..86b01df8c4 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -38,6 +38,7 @@ config ROCKCHIP_RK3188 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM select SPL_ROCKCHIP_BACK_TO_BROM select BOARD_LATE_INIT + imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD help The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 1dd9d2fd25..dd7297d3c8 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -22,7 +22,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board.o diff --git a/arch/arm/mach-rockchip/rk3188-board.c b/arch/arm/mach-rockchip/rk3188-board.c deleted file mode 100644 index 5b6f21577f..0000000000 --- a/arch/arm/mach-rockchip/rk3188-board.c +++ /dev/null @@ -1,38 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2015 Google, Inc - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -__weak int rk_board_late_init(void) -{ - return 0; -} - -int board_late_init(void) -{ - setup_boot_mode(); - - return rk_board_late_init(); -} - -int board_init(void) -{ - return 0; -} - -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif From 1e7d2be011c2f51e62d3096a7bd808f9d4feb2ca Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:10 +0800 Subject: [PATCH 49/60] rockchip: rk3288: move SOC setting into arch_cpu_init() Qos setting and emmc relate SoC setting should go to arch_cpu_init(). Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3288-board.c | 30 -------------------------- arch/arm/mach-rockchip/rk3288/rk3288.c | 28 ++++++++++++++++++++++++ 2 files changed, 28 insertions(+), 30 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index 23c5343eb8..9d88365fff 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -26,24 +25,6 @@ __weak int rk_board_late_init(void) return 0; } -int rk3288_qos_init(void) -{ - int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT; - /* set vop qos to higher priority */ - writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS); - writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS); - - if (!fdt_node_check_compatible(gd->fdt_blob, 0, - "rockchip,rk3288-tinker")) - { - /* set isp qos to higher priority */ - writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS); - writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS); - writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS); - } - return 0; -} - static void rk3288_detect_reset_reason(void) { struct rk3288_cru *cru = rockchip_get_cru(); @@ -84,7 +65,6 @@ static void rk3288_detect_reset_reason(void) int board_late_init(void) { setup_boot_mode(); - rk3288_qos_init(); rk3288_detect_reset_reason(); return rk_board_late_init(); @@ -266,8 +246,6 @@ U_BOOT_CMD( int board_early_init_f(void) { - const uintptr_t GRF_SOC_CON0 = 0xff770244; - const uintptr_t GRF_SOC_CON2 = 0xff77024c; struct udevice *dev; int ret; @@ -282,13 +260,5 @@ int board_early_init_f(void) return ret; } - rk_setreg(GRF_SOC_CON2, 1 << 0); - - /* - * Disable JTAG on sdmmc0 IO. The SDMMC won't work until this bit is - * cleared - */ - rk_clrreg(GRF_SOC_CON0, 1 << 12); - return 0; } diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index b80193012a..4a1db99ac4 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -2,12 +2,14 @@ /* * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ +#include #include #include #include #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -40,6 +42,24 @@ static void configure_l2ctlr(void) } #endif +int rk3288_qos_init(void) +{ + int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT; + /* set vop qos to higher priority */ + writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS); + writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS); + + if (!fdt_node_check_compatible(gd->fdt_blob, 0, + "rockchip,rk3288-tinker")) { + /* set isp qos to higher priority */ + writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS); + writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS); + writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS); + } + + return 0; +} + int arch_cpu_init(void) { #ifdef CONFIG_SPL_BUILD @@ -50,6 +70,14 @@ int arch_cpu_init(void) /* Use rkpwm by default */ rk_setreg(&grf->soc_con2, 1 << 0); + + /* + * Disable JTAG on sdmmc0 IO. The SDMMC won't work until this bit is + * cleared + */ + rk_clrreg(&grf->soc_con0, 1 << 12); + + rk3288_qos_init(); #endif return 0; From 0221910042a629e3439576e8807f04b612c94fd5 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:11 +0800 Subject: [PATCH 50/60] rockchip: rk3288: move board_early_init_f() back to veyron The board_early_init_f() is only used by veyron board now, move it into the board file veyron.c Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3288-board.c | 19 ------------------- board/google/veyron/veyron.c | 20 ++++++++++++++++++++ 2 files changed, 20 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index 9d88365fff..e629df3abb 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -243,22 +243,3 @@ U_BOOT_CMD( "display information about clocks", "" ); - -int board_early_init_f(void) -{ - struct udevice *dev; - int ret; - - /* - * This init is done in SPL, but when chain-loading U-Boot SPL will - * have been skipped. Allow the clock driver to check if it needs - * setting up. - */ - ret = rockchip_get_clk(&dev); - if (ret) { - debug("CLK init failed: %d\n", ret); - return ret; - } - - return 0; -} diff --git a/board/google/veyron/veyron.c b/board/google/veyron/veyron.c index 19edb18a66..361f0e9da2 100644 --- a/board/google/veyron/veyron.c +++ b/board/google/veyron/veyron.c @@ -4,9 +4,29 @@ */ #include +#include /* * We should increase the DDR voltage to 1.2V using the PWM regulator. * There is a U-Boot driver for this but it may need to add support for the * 'voltage-table' property. */ + +int board_early_init_f(void) +{ + struct udevice *dev; + int ret; + + /* + * This init is done in SPL, but when chain-loading U-Boot SPL will + * have been skipped. Allow the clock driver to check if it needs + * setting up. + */ + ret = rockchip_get_clk(&dev); + if (ret) { + debug("CLK init failed: %d\n", ret); + return ret; + } + + return 0; +} From b678f2790c8634539a3458f03d53f2273e0fdc75 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:12 +0800 Subject: [PATCH 51/60] rockchip: rk3288: Move veyron_init() back to veyron.c The veyron_init() should go to its board file veyron.c, and the board_early_init_f() could be the right place. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3288-board.c | 65 --------------------------- board/google/veyron/veyron.c | 63 ++++++++++++++++++++++++++ 2 files changed, 63 insertions(+), 65 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index e629df3abb..915f82e8ba 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -15,7 +15,6 @@ #include #include #include -#include #include DECLARE_GLOBAL_DATA_PTR; @@ -70,73 +69,9 @@ int board_late_init(void) return rk_board_late_init(); } -#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) -static int veyron_init(void) -{ - struct udevice *dev; - struct clk clk; - int ret; - - ret = regulator_get_by_platname("vdd_arm", &dev); - if (ret) { - debug("Cannot set regulator name\n"); - return ret; - } - - /* Slowly raise to max CPU voltage to prevent overshoot */ - ret = regulator_set_value(dev, 1200000); - if (ret) - return ret; - udelay(175); /* Must wait for voltage to stabilize, 2mV/us */ - ret = regulator_set_value(dev, 1400000); - if (ret) - return ret; - udelay(100); /* Must wait for voltage to stabilize, 2mV/us */ - - ret = rockchip_get_clk(&clk.dev); - if (ret) - return ret; - clk.id = PLL_APLL; - ret = clk_set_rate(&clk, 1800000000); - if (IS_ERR_VALUE(ret)) - return ret; - - ret = regulator_get_by_platname("vcc33_sd", &dev); - if (ret) { - debug("Cannot get regulator name\n"); - return ret; - } - - ret = regulator_set_value(dev, 3300000); - if (ret) - return ret; - - ret = regulators_enable_boot_on(false); - if (ret) { - debug("%s: Cannot enable boot on regulators\n", __func__); - return ret; - } - - return 0; -} -#endif - int board_init(void) { -#if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) return 0; -#else - int ret; - - /* We do some SoC one time setting here */ - if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) { - ret = veyron_init(); - if (ret) - return ret; - } - - return 0; -#endif } #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) diff --git a/board/google/veyron/veyron.c b/board/google/veyron/veyron.c index 361f0e9da2..dd2c014c60 100644 --- a/board/google/veyron/veyron.c +++ b/board/google/veyron/veyron.c @@ -3,20 +3,82 @@ * (C) Copyright 2015 Google, Inc */ +#include #include +#include #include +#include +#include /* * We should increase the DDR voltage to 1.2V using the PWM regulator. * There is a U-Boot driver for this but it may need to add support for the * 'voltage-table' property. */ +#ifndef CONFIG_SPL_BUILD +#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) +static int veyron_init(void) +{ + struct udevice *dev; + struct clk clk; + int ret; + + ret = regulator_get_by_platname("vdd_arm", &dev); + if (ret) { + debug("Cannot set regulator name\n"); + return ret; + } + + /* Slowly raise to max CPU voltage to prevent overshoot */ + ret = regulator_set_value(dev, 1200000); + if (ret) + return ret; + udelay(175); /* Must wait for voltage to stabilize, 2mV/us */ + ret = regulator_set_value(dev, 1400000); + if (ret) + return ret; + udelay(100); /* Must wait for voltage to stabilize, 2mV/us */ + + ret = rockchip_get_clk(&clk.dev); + if (ret) + return ret; + clk.id = PLL_APLL; + ret = clk_set_rate(&clk, 1800000000); + if (IS_ERR_VALUE(ret)) + return ret; + + ret = regulator_get_by_platname("vcc33_sd", &dev); + if (ret) { + debug("Cannot get regulator name\n"); + return ret; + } + + ret = regulator_set_value(dev, 3300000); + if (ret) + return ret; + + ret = regulators_enable_boot_on(false); + if (ret) { + debug("%s: Cannot enable boot on regulators\n", __func__); + return ret; + } + + return 0; +} +#endif int board_early_init_f(void) { struct udevice *dev; int ret; +#if !CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) + if (!fdt_node_check_compatible(gd->fdt_blob, 0, "google,veyron")) { + ret = veyron_init(); + if (ret) + return ret; + } +#endif /* * This init is done in SPL, but when chain-loading U-Boot SPL will * have been skipped. Allow the clock driver to check if it needs @@ -30,3 +92,4 @@ int board_early_init_f(void) return 0; } +#endif From 88a87bcbb344ec63c62c001c356aaad8f60c84fa Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:13 +0800 Subject: [PATCH 52/60] rockchip: rk3288: Move clock CMD to SoC file Move the do_clock CMD to rk3288.c so that we can re-use the common board file later. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3288-board.c | 51 ------------------------ arch/arm/mach-rockchip/rk3288/rk3288.c | 55 ++++++++++++++++++++++++++ 2 files changed, 55 insertions(+), 51 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index 915f82e8ba..1c37038c99 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -127,54 +127,3 @@ int board_usb_cleanup(int index, enum usb_init_type init) return 0; } #endif - -static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc, - char * const argv[]) -{ - static const struct { - char *name; - int id; - } clks[] = { - { "osc", CLK_OSC }, - { "apll", CLK_ARM }, - { "dpll", CLK_DDR }, - { "cpll", CLK_CODEC }, - { "gpll", CLK_GENERAL }, -#ifdef CONFIG_ROCKCHIP_RK3036 - { "mpll", CLK_NEW }, -#else - { "npll", CLK_NEW }, -#endif - }; - int ret, i; - struct udevice *dev; - - ret = rockchip_get_clk(&dev); - if (ret) { - printf("clk-uclass not found\n"); - return 0; - } - - for (i = 0; i < ARRAY_SIZE(clks); i++) { - struct clk clk; - ulong rate; - - clk.id = clks[i].id; - ret = clk_request(dev, &clk); - if (ret < 0) - continue; - - rate = clk_get_rate(&clk); - printf("%s: %lu\n", clks[i].name, rate); - - clk_free(&clk); - } - - return 0; -} - -U_BOOT_CMD( - clock, 2, 1, do_clock, - "display information about clocks", - "" -); diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index 4a1db99ac4..10db6dfa9b 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -3,9 +3,13 @@ * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ #include +#include +#include #include #include #include +#include +#include #include #include #include @@ -95,3 +99,54 @@ void board_debug_uart_init(void) GPIO7C6_UART2DBG_SIN << GPIO7C6_SHIFT); } #endif + +static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + static const struct { + char *name; + int id; + } clks[] = { + { "osc", CLK_OSC }, + { "apll", CLK_ARM }, + { "dpll", CLK_DDR }, + { "cpll", CLK_CODEC }, + { "gpll", CLK_GENERAL }, +#ifdef CONFIG_ROCKCHIP_RK3036 + { "mpll", CLK_NEW }, +#else + { "npll", CLK_NEW }, +#endif + }; + int ret, i; + struct udevice *dev; + + ret = rockchip_get_clk(&dev); + if (ret) { + printf("clk-uclass not found\n"); + return 0; + } + + for (i = 0; i < ARRAY_SIZE(clks); i++) { + struct clk clk; + ulong rate; + + clk.id = clks[i].id; + ret = clk_request(dev, &clk); + if (ret < 0) + continue; + + rate = clk_get_rate(&clk); + printf("%s: %lu\n", clks[i].name, rate); + + clk_free(&clk); + } + + return 0; +} + +U_BOOT_CMD( + clock, 2, 1, do_clock, + "display information about clocks", + "" +); From 271318a660eefe5623286eceaefd1b49389cbbdc Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:14 +0800 Subject: [PATCH 53/60] rockchip: rk3288: Move rk3288_detect_reset_reason to soc file The rk3288_detect_reset_reason() is per-SoC operation, move it to rk3288.c, and extend the rk_board_late_init() with rk3288_board_late_init() to make all the board works fine as before. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/rk3288-board.c | 38 -------------- arch/arm/mach-rockchip/rk3288/rk3288.c | 49 +++++++++++++++++++ .../popmetal_rk3288/popmetal-rk3288.c | 2 +- board/phytec/phycore_rk3288/phycore-rk3288.c | 2 +- board/rockchip/tinker_rk3288/tinker-rk3288.c | 2 +- 5 files changed, 52 insertions(+), 41 deletions(-) diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index 1c37038c99..1f33f25943 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -24,47 +24,9 @@ __weak int rk_board_late_init(void) return 0; } -static void rk3288_detect_reset_reason(void) -{ - struct rk3288_cru *cru = rockchip_get_cru(); - const char *reason; - - if (IS_ERR(cru)) - return; - - switch (cru->cru_glb_rst_st) { - case GLB_POR_RST: - reason = "POR"; - break; - case FST_GLB_RST_ST: - case SND_GLB_RST_ST: - reason = "RST"; - break; - case FST_GLB_TSADC_RST_ST: - case SND_GLB_TSADC_RST_ST: - reason = "THERMAL"; - break; - case FST_GLB_WDT_RST_ST: - case SND_GLB_WDT_RST_ST: - reason = "WDOG"; - break; - default: - reason = "unknown reset"; - } - - env_set("reset_reason", reason); - - /* - * Clear cru_glb_rst_st, so we can determine the last reset cause - * for following resets. - */ - rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK); -} - int board_late_init(void) { setup_boot_mode(); - rk3288_detect_reset_reason(); return rk_board_late_init(); } diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index 10db6dfa9b..b462c09069 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -100,6 +100,55 @@ void board_debug_uart_init(void) } #endif +static void rk3288_detect_reset_reason(void) +{ + struct rk3288_cru *cru = rockchip_get_cru(); + const char *reason; + + if (IS_ERR(cru)) + return; + + switch (cru->cru_glb_rst_st) { + case GLB_POR_RST: + reason = "POR"; + break; + case FST_GLB_RST_ST: + case SND_GLB_RST_ST: + reason = "RST"; + break; + case FST_GLB_TSADC_RST_ST: + case SND_GLB_TSADC_RST_ST: + reason = "THERMAL"; + break; + case FST_GLB_WDT_RST_ST: + case SND_GLB_WDT_RST_ST: + reason = "WDOG"; + break; + default: + reason = "unknown reset"; + } + + env_set("reset_reason", reason); + + /* + * Clear cru_glb_rst_st, so we can determine the last reset cause + * for following resets. + */ + rk_clrreg(&cru->cru_glb_rst_st, GLB_RST_ST_MASK); +} + +__weak int rk3288_board_late_init(void) +{ + return 0; +} + +int rk_board_late_init(void) +{ + rk3288_detect_reset_reason(); + + return rk3288_board_late_init(); +} + static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { diff --git a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c index 9ba1fbd0e2..47b921a748 100644 --- a/board/chipspark/popmetal_rk3288/popmetal-rk3288.c +++ b/board/chipspark/popmetal_rk3288/popmetal-rk3288.c @@ -8,7 +8,7 @@ #define GPIO7A3_HUB_RST 227 -int rk_board_late_init(void) +int rk3288_board_late_init(void) { int ret; diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c index fbf1511978..92f3bd25f4 100644 --- a/board/phytec/phycore_rk3288/phycore-rk3288.c +++ b/board/phytec/phycore_rk3288/phycore-rk3288.c @@ -30,7 +30,7 @@ static int valid_rk3288_som(struct rk3288_som *som) return hw == som->bs; } -int rk_board_late_init(void) +int rk3288_board_late_init(void) { int ret; struct udevice *dev; diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c index 44f13183a5..e6b018d89c 100644 --- a/board/rockchip/tinker_rk3288/tinker-rk3288.c +++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c @@ -21,7 +21,7 @@ static int get_ethaddr_from_eeprom(u8 *addr) return i2c_eeprom_read(dev, 0, addr, 6); } -int rk_board_late_init(void) +int rk3288_board_late_init(void) { u8 ethaddr[6]; From de57a9fd4af9b622140953566c1297e647c36198 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:15 +0800 Subject: [PATCH 54/60] rockchip: rk3288: Migrate to use common board file Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3288-board.c | 91 --------------------------- 3 files changed, 1 insertion(+), 92 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3288-board.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 86b01df8c4..b75c209b66 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -80,6 +80,7 @@ config ROCKCHIP_RK3288 select SUPPORT_SPL select SPL select SUPPORT_TPL + imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_CLK imply TPL_DM diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index dd7297d3c8..210e80ece2 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -22,7 +22,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board.o endif diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c deleted file mode 100644 index 1f33f25943..0000000000 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ /dev/null @@ -1,91 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2015 Google, Inc - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -__weak int rk_board_late_init(void) -{ - return 0; -} - -int board_late_init(void) -{ - setup_boot_mode(); - - return rk_board_late_init(); -} - -int board_init(void) -{ - return 0; -} - -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif - -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -#include -#include - -static struct dwc2_plat_otg_data otg_data = { - .rx_fifo_sz = 512, - .np_tx_fifo_sz = 16, - .tx_fifo_sz = 128, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - int node; - const char *mode; - bool matched = false; - const void *blob = gd->fdt_blob; - - /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, - "snps,dwc2"); - - while (node > 0) { - mode = fdt_getprop(blob, node, "dr_mode", NULL); - if (mode && strcmp(mode, "otg") == 0) { - matched = true; - break; - } - - node = fdt_node_offset_by_compatible(blob, node, - "snps,dwc2"); - } - if (!matched) { - debug("Not found usb_otg device\n"); - return -ENODEV; - } - otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&otg_data); -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} -#endif From 38ed26777f256f99dec4f30165cf36676bdaeb07 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:16 +0800 Subject: [PATCH 55/60] rockchip: rk3328: Migrate to use common board file Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang Tested-by: Matwey V. Kornilov --- arch/arm/mach-rockchip/Kconfig | 1 + board/rockchip/evb_rk3328/evb-rk3328.c | 64 -------------------------- 2 files changed, 1 insertion(+), 64 deletions(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index b75c209b66..2b8bb8aa25 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -110,6 +110,7 @@ config ROCKCHIP_RK3328 select ARM64 select SUPPORT_SPL select SPL + imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SERIAL_SUPPORT imply SPL_SEPARATE_BSS diff --git a/board/rockchip/evb_rk3328/evb-rk3328.c b/board/rockchip/evb_rk3328/evb-rk3328.c index 64595c783d..779bc646b2 100644 --- a/board/rockchip/evb_rk3328/evb-rk3328.c +++ b/board/rockchip/evb_rk3328/evb-rk3328.c @@ -3,67 +3,3 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd */ -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -int board_init(void) -{ - int ret; - - ret = regulators_enable_boot_on(false); - if (ret) - debug("%s: Cannot enable boot on regulator\n", __func__); - - return ret; -} - -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -#include -#include - -static struct dwc2_plat_otg_data otg_data = { - .rx_fifo_sz = 512, - .np_tx_fifo_sz = 16, - .tx_fifo_sz = 128, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - int node; - const char *mode; - bool matched = false; - const void *blob = gd->fdt_blob; - - /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, - "snps,dwc2"); - - while (node > 0) { - mode = fdt_getprop(blob, node, "dr_mode", NULL); - if (mode && strcmp(mode, "otg") == 0) { - matched = true; - break; - } - - node = fdt_node_offset_by_compatible(blob, node, - "snps,dwc2"); - } - if (!matched) { - debug("Not found usb_otg device\n"); - return -ENODEV; - } - otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&otg_data); -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} -#endif From edaf8db86648c0549e70b278421ae7db31e06922 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:17 +0800 Subject: [PATCH 56/60] rockchip: rk3368: Migrate to use common board file Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + board/geekbuying/geekbox/geekbox.c | 5 ----- board/rockchip/evb_px5/evb-px5.c | 6 ------ board/rockchip/sheep_rk3368/sheep_rk3368.c | 15 --------------- .../lion_rk3368/lion_rk3368.c | 18 ------------------ 5 files changed, 1 insertion(+), 44 deletions(-) diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 2b8bb8aa25..90916a382e 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -131,6 +131,7 @@ config ROCKCHIP_RK3368 select SUPPORT_TPL select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL select TPL_NEEDS_SEPARATE_STACK if TPL + imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply SPL_SEPARATE_BSS imply SPL_SERIAL_SUPPORT diff --git a/board/geekbuying/geekbox/geekbox.c b/board/geekbuying/geekbox/geekbox.c index 10b04a1ce5..b0f9a5f9b7 100644 --- a/board/geekbuying/geekbox/geekbox.c +++ b/board/geekbuying/geekbox/geekbox.c @@ -4,8 +4,3 @@ */ #include - -int board_init(void) -{ - return 0; -} diff --git a/board/rockchip/evb_px5/evb-px5.c b/board/rockchip/evb_px5/evb-px5.c index 53e753fc17..b81f970883 100644 --- a/board/rockchip/evb_px5/evb-px5.c +++ b/board/rockchip/evb_px5/evb-px5.c @@ -2,9 +2,3 @@ /* * Copyright (c) 2017 Andy Yan */ -#include - -int board_init(void) -{ - return 0; -} diff --git a/board/rockchip/sheep_rk3368/sheep_rk3368.c b/board/rockchip/sheep_rk3368/sheep_rk3368.c index 9bb93c7d16..b81f970883 100644 --- a/board/rockchip/sheep_rk3368/sheep_rk3368.c +++ b/board/rockchip/sheep_rk3368/sheep_rk3368.c @@ -2,18 +2,3 @@ /* * Copyright (c) 2017 Andy Yan */ -#include -#include -#include -#include -#include - -int mach_cpu_init(void) -{ - return 0; -} - -int board_init(void) -{ - return 0; -} diff --git a/board/theobroma-systems/lion_rk3368/lion_rk3368.c b/board/theobroma-systems/lion_rk3368/lion_rk3368.c index 6cd5a5f18e..1b0d504631 100644 --- a/board/theobroma-systems/lion_rk3368/lion_rk3368.c +++ b/board/theobroma-systems/lion_rk3368/lion_rk3368.c @@ -2,21 +2,3 @@ /* * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH */ -#include -#include -#include -#include -#include -#include -#include -#include - -int mach_cpu_init(void) -{ - return 0; -} - -int board_init(void) -{ - return 0; -} From 54b012fd961816990e7b8f9da3211fe7260c05b3 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:18 +0800 Subject: [PATCH 57/60] rockchip: rk3399: init vbus regulator in board_early_init_f() Handle per-board init in board_early_init_f() and use the common board_init() for per-platform board init later. Signed-off-by: Kever Yang --- board/rockchip/evb_rk3399/evb-rk3399.c | 34 ++++++++++++++++---------- 1 file changed, 21 insertions(+), 13 deletions(-) diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index eb1b832274..c7e93a358d 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -9,6 +9,26 @@ #include #include +#ifndef CONFIG_SPL_BUILD +int board_early_init_f(void) +{ + struct udevice *regulator; + int ret; + + ret = regulator_get_by_platname("vcc5v0_host", ®ulator); + if (ret) { + debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); + goto out; + } + + ret = regulator_set_enable(regulator, true); + if (ret) + debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret); + +out: + return 0; +} + int board_init(void) { struct udevice *regulator; @@ -18,18 +38,6 @@ int board_init(void) if (ret) debug("%s: Cannot enable boot on regulator\n", __func__); - ret = regulator_get_by_platname("vcc5v0_host", ®ulator); - if (ret) { - debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); - goto out; - } - - ret = regulator_set_enable(regulator, true); - if (ret) { - debug("%s vcc5v0-host-en set fail!\n", __func__); - goto out; - } - -out: return 0; } +#endif From 920b01388e27798977929d6cd316e3fc8cdad5cc Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:19 +0800 Subject: [PATCH 58/60] rockchip: rk3399: Migrate to use common board file Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk3399-board.c | 13 ------------- board/google/gru/gru.c | 5 ----- board/rockchip/evb_rk3399/evb-rk3399.c | 13 ------------- board/theobroma-systems/puma_rk3399/puma-rk3399.c | 15 --------------- board/vamrs/rock960_rk3399/rock960-rk3399.c | 15 --------------- 7 files changed, 1 insertion(+), 62 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk3399-board.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 90916a382e..4b211794c6 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -177,6 +177,7 @@ config ROCKCHIP_RK3399 select DM_PMIC select DM_REGULATOR_FIXED select BOARD_LATE_INIT + imply ROCKCHIP_COMMON_BOARD imply SPL_ROCKCHIP_COMMON_BOARD imply TPL_SERIAL_SUPPORT imply TPL_LIBCOMMON_SUPPORT diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index 210e80ece2..ca633afcbb 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -22,7 +22,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o -obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board.o endif diff --git a/arch/arm/mach-rockchip/rk3399-board.c b/arch/arm/mach-rockchip/rk3399-board.c deleted file mode 100644 index 443c87cccc..0000000000 --- a/arch/arm/mach-rockchip/rk3399-board.c +++ /dev/null @@ -1,13 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2017 Rockchip Electronics Co., Ltd - */ - -#include -#include - -int board_late_init(void) -{ - setup_boot_mode(); - return 0; -} diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c index c2895e1267..b6b4f19d84 100644 --- a/board/google/gru/gru.c +++ b/board/google/gru/gru.c @@ -5,11 +5,6 @@ #include -int board_init(void) -{ - return 0; -} - #ifdef CONFIG_SPL_BUILD /* provided to defeat compiler optimisation in board_init_f() */ void gru_dummy_function(int i) diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c index c7e93a358d..b9049abcc7 100644 --- a/board/rockchip/evb_rk3399/evb-rk3399.c +++ b/board/rockchip/evb_rk3399/evb-rk3399.c @@ -5,7 +5,6 @@ #include #include -#include #include #include @@ -28,16 +27,4 @@ int board_early_init_f(void) out: return 0; } - -int board_init(void) -{ - struct udevice *regulator; - int ret; - - ret = regulators_enable_boot_on(false); - if (ret) - debug("%s: Cannot enable boot on regulator\n", __func__); - - return 0; -} #endif diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c index 251cd2d566..a7e7f022ba 100644 --- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c +++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c @@ -21,21 +21,6 @@ #include #include -int board_init(void) -{ - int ret; - - /* - * We need to call into regulators_enable_boot_on() again, as the call - * during SPL may have not included all regulators. - */ - ret = regulators_enable_boot_on(false); - if (ret) - debug("%s: Cannot enable boot on regulator\n", __func__); - - return 0; -} - static void setup_macaddr(void) { #if CONFIG_IS_ENABLED(CMD_NET) diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c index 2eb7120e84..68a127b9ac 100644 --- a/board/vamrs/rock960_rk3399/rock960-rk3399.c +++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c @@ -2,18 +2,3 @@ /* * Copyright (C) 2018 Manivannan Sadhasivam */ - -#include -#include -#include - -int board_init(void) -{ - int ret; - - ret = regulators_enable_boot_on(false); - if (ret) - debug("%s: Cannot enable boot on regulator\n", __func__); - - return 0; -} From 8e9a8d0d0c8c06dd9213352b3415d94c5722bdeb Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:20 +0800 Subject: [PATCH 59/60] rockchip: elgin-rv1108: use board_early_init_f for per-boar init Use board_early_init_f() for per-board init operation and use board_init() from common board file. Signed-off-by: Kever Yang --- board/elgin/elgin_rv1108/elgin_rv1108.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/board/elgin/elgin_rv1108/elgin_rv1108.c b/board/elgin/elgin_rv1108/elgin_rv1108.c index 0de1f4243e..70a1245fa2 100644 --- a/board/elgin/elgin_rv1108/elgin_rv1108.c +++ b/board/elgin/elgin_rv1108/elgin_rv1108.c @@ -50,7 +50,7 @@ int mach_cpu_init(void) #define MODEM_ENABLE_GPIO 111 -int board_init(void) +int board_early_init_f(void) { gpio_request(MODEM_ENABLE_GPIO, "modem_enable"); gpio_direction_output(MODEM_ENABLE_GPIO, 0); @@ -58,6 +58,11 @@ int board_init(void) return 0; } +int board_init(void) +{ + return 0; +} + int dram_init(void) { gd->ram_size = 0x8000000; From 26008cd42b590dc71ee9c1ca667a218542aab342 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Mon, 22 Jul 2019 20:02:21 +0800 Subject: [PATCH 60/60] rockchip: rv1108: Migrate to use common board file Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 2 - arch/arm/mach-rockchip/rv1108-board.c | 52 ------------------------- arch/arm/mach-rockchip/rv1108/rv1108.c | 10 ----- board/elgin/elgin_rv1108/elgin_rv1108.c | 5 --- board/rockchip/evb_rv1108/evb_rv1108.c | 6 --- 6 files changed, 1 insertion(+), 75 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rv1108-board.c diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 4b211794c6..e337d06b99 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -203,6 +203,7 @@ config ROCKCHIP_RK3399 config ROCKCHIP_RV1108 bool "Support Rockchip RV1108" select CPU_V7A + imply ROCKCHIP_COMMON_BOARD help The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7 and a DSP. diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index ca633afcbb..aed379a0dc 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -21,8 +21,6 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # meaning "turn it off". obj-y += boot_mode.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o - -obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board.o endif obj-$(CONFIG_$(SPL_TPL_)RAM) += sdram_common.o diff --git a/arch/arm/mach-rockchip/rv1108-board.c b/arch/arm/mach-rockchip/rv1108-board.c deleted file mode 100644 index 3c683cb8ac..0000000000 --- a/arch/arm/mach-rockchip/rv1108-board.c +++ /dev/null @@ -1,52 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2015 Google, Inc - */ - -#include - -DECLARE_GLOBAL_DATA_PTR; - -#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) -#include -#include - -static struct dwc2_plat_otg_data otg_data = { - .rx_fifo_sz = 512, - .np_tx_fifo_sz = 16, - .tx_fifo_sz = 128, -}; - -int board_usb_init(int index, enum usb_init_type init) -{ - int node; - const char *mode; - bool matched = false; - const void *blob = gd->fdt_blob; - - /* find the usb_otg node */ - node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); - - while (node > 0) { - mode = fdt_getprop(blob, node, "dr_mode", NULL); - if (mode && strcmp(mode, "otg") == 0) { - matched = true; - break; - } - - node = fdt_node_offset_by_compatible(blob, node, "snps,dwc2"); - } - if (!matched) { - debug("Not found usb_otg device\n"); - return -ENODEV; - } - otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); - - return dwc2_udc_probe(&otg_data); -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ - return 0; -} -#endif diff --git a/arch/arm/mach-rockchip/rv1108/rv1108.c b/arch/arm/mach-rockchip/rv1108/rv1108.c index 66aeb3ffcc..6362af995b 100644 --- a/arch/arm/mach-rockchip/rv1108/rv1108.c +++ b/arch/arm/mach-rockchip/rv1108/rv1108.c @@ -3,13 +3,3 @@ * (C) Copyright 2016 Rockchip Electronics Co., Ltd * Author: Andy Yan */ - -#include - -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -void enable_caches(void) -{ - /* Enable D-cache. I-cache is already enabled in start.S */ - dcache_enable(); -} -#endif diff --git a/board/elgin/elgin_rv1108/elgin_rv1108.c b/board/elgin/elgin_rv1108/elgin_rv1108.c index 70a1245fa2..607667ac63 100644 --- a/board/elgin/elgin_rv1108/elgin_rv1108.c +++ b/board/elgin/elgin_rv1108/elgin_rv1108.c @@ -58,11 +58,6 @@ int board_early_init_f(void) return 0; } -int board_init(void) -{ - return 0; -} - int dram_init(void) { gd->ram_size = 0x8000000; diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c index 6d934f8805..733f29376e 100644 --- a/board/rockchip/evb_rv1108/evb_rv1108.c +++ b/board/rockchip/evb_rv1108/evb_rv1108.c @@ -47,12 +47,6 @@ int mach_cpu_init(void) return 0; } - -int board_init(void) -{ - return 0; -} - int dram_init(void) { gd->ram_size = 0x8000000;