powerpc/boot: Change the macro of Boot from SRIO and PCIE master module

Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable
the master module of Boot from SRIO and PCIE on a platform. But this
is not a silicon feature, it's just a specific booting mode based on
the SRIO and PCIE interfaces. So it's inappropriate to put the macro
into the file arch/powerpc/include/asm/config_mpc85xx.h.

Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to
"CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from
arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros
in configuration header file of each board which can support the
master module of Boot from SRIO and PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

include/configs/P2041RDB.h

@@ -77,6 +77,7 @@
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1			/* SRIO port 1 */
 #define CONFIG_SRIO2			/* SRIO port 2 */
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
 #define CONFIG_SYS_DPAA_RMAN		/* RMan */
 
 #define CONFIG_FSL_LAW			/* Use common FSL init code */

include/configs/P3041DS.h

@@ -40,7 +40,7 @@
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1			/* SRIO port 1 */
 #define CONFIG_SRIO2			/* SRIO port 2 */
-
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
 #define CONFIG_ICS307_REFCLK_HZ		25000000  /* ICS307 ref clk freq */
 
 #include "corenet_ds.h"

include/configs/P4080DS.h

@@ -36,7 +36,7 @@
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1			/* SRIO port 1 */
 #define CONFIG_SRIO2			/* SRIO port 2 */
-
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
 #define CONFIG_ICS307_REFCLK_HZ		33333000  /* ICS307 ref clk freq */
 
 #include "corenet_ds.h"

include/configs/P5020DS.h

@@ -41,7 +41,7 @@
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1			/* SRIO port 1 */
 #define CONFIG_SRIO2			/* SRIO port 2 */
-
+#define CONFIG_SRIO_PCIE_BOOT_MASTER
 #define CONFIG_ICS307_REFCLK_HZ		25000000  /* ICS307 ref clk freq */
 
 #include "corenet_ds.h"