Merge with /home/stefan/git/u-boot/u-boot-coldfire-freescale
This commit is contained in:
Stefan Roese
48
cpu/mcf532x/Makefile
Normal file
48
cpu/mcf532x/Makefile
Normal file
@@ -0,0 +1,48 @@
|
||||
#
|
||||
# (C) Copyright 2000-2004
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
# CFLAGS += -DET_DEBUG
|
||||
|
||||
LIB = lib$(CPU).a
|
||||
|
||||
START =
|
||||
COBJS = cpu.o speed.o cpu_init.o interrupts.o
|
||||
|
||||
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
START := $(addprefix $(obj),$(START))
|
||||
|
||||
all: $(obj).depend $(START) $(LIB)
|
||||
|
||||
$(LIB): $(OBJS)
|
||||
$(AR) $(ARFLAGS) $@ $(OBJS)
|
||||
|
||||
#########################################################################
|
||||
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
27
cpu/mcf532x/config.mk
Normal file
27
cpu/mcf532x/config.mk
Normal file
@@ -0,0 +1,27 @@
|
||||
#
|
||||
# (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
|
||||
#
|
||||
# (C) Copyright 2000-2004
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
|
||||
PLATFORM_CPPFLAGS += -m5307 -fPIC
|
||||
119
cpu/mcf532x/cpu.c
Normal file
119
cpu/mcf532x/cpu.c
Normal file
@@ -0,0 +1,119 @@
|
||||
/*
|
||||
*
|
||||
* (C) Copyright 2000-2003
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
|
||||
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <watchdog.h>
|
||||
#include <command.h>
|
||||
|
||||
#include <asm/immap.h>
|
||||
|
||||
int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
|
||||
{
|
||||
volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
|
||||
|
||||
wdp->cr = 0;
|
||||
udelay(1000);
|
||||
|
||||
/* enable watchdog, set timeout to 0 and wait */
|
||||
wdp->cr = WTM_WCR_EN;
|
||||
while (1) ;
|
||||
|
||||
/* we don't return! */
|
||||
return 0;
|
||||
};
|
||||
|
||||
int checkcpu(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
|
||||
u16 msk;
|
||||
u16 id = 0;
|
||||
u8 ver;
|
||||
|
||||
puts("CPU: ");
|
||||
msk = (ccm->cir >> 6);
|
||||
ver = (ccm->cir & 0x003f);
|
||||
switch (msk) {
|
||||
case 0x54:
|
||||
id = 5329;
|
||||
break;
|
||||
case 0x59:
|
||||
id = 5328;
|
||||
break;
|
||||
case 0x61:
|
||||
id = 5327;
|
||||
break;
|
||||
}
|
||||
|
||||
if (id) {
|
||||
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
|
||||
ver);
|
||||
printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
|
||||
(int)(gd->cpu_clk / 1000000),
|
||||
(int)(gd->bus_clk / 1000000));
|
||||
}
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
||||
#if defined(CONFIG_WATCHDOG)
|
||||
/* Called by macro WATCHDOG_RESET */
|
||||
void watchdog_reset(void)
|
||||
{
|
||||
volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
|
||||
|
||||
wdp->sr = 0x5555; /* Count register */
|
||||
}
|
||||
|
||||
int watchdog_disable(void)
|
||||
{
|
||||
volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
|
||||
|
||||
/* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
|
||||
wdp->cr |= WTM_WCR_HALTED; /* halted watchdog timer */
|
||||
|
||||
puts("WATCHDOG:disabled\n");
|
||||
return (0);
|
||||
}
|
||||
|
||||
int watchdog_init(void)
|
||||
{
|
||||
volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
|
||||
u32 wdog_module = 0;
|
||||
|
||||
/* set timeout and enable watchdog */
|
||||
wdog_module = ((CFG_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT);
|
||||
wdog_module |= (wdog_module / 8192);
|
||||
wdp->mr = wdog_module;
|
||||
|
||||
wdp->cr = WTM_WCR_EN;
|
||||
puts("WATCHDOG:enabled\n");
|
||||
|
||||
return (0);
|
||||
}
|
||||
#endif /* CONFIG_WATCHDOG */
|
||||
126
cpu/mcf532x/cpu_init.c
Normal file
126
cpu/mcf532x/cpu_init.c
Normal file
@@ -0,0 +1,126 @@
|
||||
/*
|
||||
*
|
||||
* (C) Copyright 2000-2003
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* (C) Copyright 2007 Freescale Semiconductor, Inc.
|
||||
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <watchdog.h>
|
||||
|
||||
#include <asm/immap.h>
|
||||
|
||||
/*
|
||||
* Breath some life into the CPU...
|
||||
*
|
||||
* Set up the memory map,
|
||||
* initialize a bunch of registers,
|
||||
* initialize the UPM's
|
||||
*/
|
||||
void cpu_init_f(void)
|
||||
{
|
||||
volatile scm1_t *scm1 = (scm1_t *) MMAP_SCM1;
|
||||
volatile scm2_t *scm2 = (scm2_t *) MMAP_SCM2;
|
||||
volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
|
||||
volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
|
||||
volatile wdog_t *wdog = (wdog_t *) MMAP_WDOG;
|
||||
|
||||
/* watchdog is enabled by default - disable the watchdog */
|
||||
#ifndef CONFIG_WATCHDOG
|
||||
wdog->cr = 0;
|
||||
#endif
|
||||
|
||||
scm1->mpr0 = 0x77777777;
|
||||
scm2->pacra = 0;
|
||||
scm2->pacrb = 0;
|
||||
scm2->pacrc = 0;
|
||||
scm2->pacrd = 0;
|
||||
scm2->pacre = 0;
|
||||
scm2->pacrf = 0;
|
||||
scm2->pacrg = 0;
|
||||
scm1->pacrh = 0;
|
||||
|
||||
/* Setup Ports: */
|
||||
switch (CFG_UART_PORT) {
|
||||
case 0:
|
||||
gpio->par_uart = (GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
|
||||
break;
|
||||
case 1:
|
||||
gpio->par_uart =
|
||||
(GPIO_PAR_UART_TXD1(3) | GPIO_PAR_UART_RXD1(3));
|
||||
break;
|
||||
case 2:
|
||||
gpio->par_uart = (GPIO_PAR_TIN3_URXD2 | GPIO_PAR_TIN2_UTXD2);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Port configuration */
|
||||
gpio->par_cs = 0x3E;
|
||||
|
||||
#if (defined(CFG_CS0_BASE) && defined(CFG_CS0_MASK) && defined(CFG_CS0_CTRL))
|
||||
fbcs->csar0 = CFG_CS0_BASE;
|
||||
fbcs->cscr0 = CFG_CS0_CTRL;
|
||||
fbcs->csmr0 = CFG_CS0_MASK;
|
||||
#endif
|
||||
|
||||
#if (defined(CFG_CS1_BASE) && defined(CFG_CS1_MASK) && defined(CFG_CS1_CTRL))
|
||||
/* Latch chipselect */
|
||||
fbcs->csar1 = CFG_CS1_BASE;
|
||||
fbcs->cscr1 = CFG_CS1_CTRL;
|
||||
fbcs->csmr1 = CFG_CS1_MASK;
|
||||
#endif
|
||||
|
||||
#if (defined(CFG_CS2_BASE) && defined(CFG_CS2_MASK) && defined(CFG_CS2_CTRL))
|
||||
fbcs->csar2 = CFG_CS2_BASE;
|
||||
fbcs->cscr2 = CFG_CS2_CTRL;
|
||||
fbcs->csmr2 = CFG_CS2_MASK;
|
||||
#endif
|
||||
|
||||
#if (defined(CFG_CS3_BASE) && defined(CFG_CS3_MASK) && defined(CFG_CS3_CTRL))
|
||||
fbcs->csar3 = CFG_CS3_BASE;
|
||||
fbcs->cscr3 = CFG_CS3_CTRL;
|
||||
fbcs->csmr3 = CFG_CS3_MASK;
|
||||
#endif
|
||||
|
||||
#if (defined(CFG_CS4_BASE) && defined(CFG_CS4_MASK) && defined(CFG_CS4_CTRL))
|
||||
fbcs->csar4 = CFG_CS4_BASE;
|
||||
fbcs->cscr4 = CFG_CS4_CTRL;
|
||||
fbcs->csmr4 = CFG_CS4_MASK;
|
||||
#endif
|
||||
|
||||
#if (defined(CFG_CS5_BASE) && defined(CFG_CS5_MASK) && defined(CFG_CS5_CTRL))
|
||||
fbcs->csar5 = CFG_CS5_BASE;
|
||||
fbcs->cscr5 = CFG_CS5_CTRL;
|
||||
fbcs->csmr5 = CFG_CS5_MASK;
|
||||
#endif
|
||||
|
||||
icache_enable();
|
||||
}
|
||||
|
||||
/*
|
||||
* initialize higher level parts of CPU like timers
|
||||
*/
|
||||
int cpu_init_r(void)
|
||||
{
|
||||
return (0);
|
||||
}
|
||||
49
cpu/mcf532x/interrupts.c
Normal file
49
cpu/mcf532x/interrupts.c
Normal file
@@ -0,0 +1,49 @@
|
||||
/*
|
||||
*
|
||||
* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
|
||||
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/* CPU specific interrupt routine */
|
||||
#include <common.h>
|
||||
#include <asm/immap.h>
|
||||
|
||||
int interrupt_init(void)
|
||||
{
|
||||
volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
|
||||
|
||||
/* Make sure all interrupts are disabled */
|
||||
intp->imrh0 |= 0xFFFFFFFF;
|
||||
intp->imrl0 |= 0xFFFFFFFF;
|
||||
|
||||
enable_interrupts();
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_MCFTMR)
|
||||
void dtimer_intr_setup(void)
|
||||
{
|
||||
volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
|
||||
|
||||
intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
|
||||
intp->imrh0 &= ~CFG_TMRINTR_MASK;
|
||||
}
|
||||
#endif
|
||||
216
cpu/mcf532x/speed.c
Normal file
216
cpu/mcf532x/speed.c
Normal file
@@ -0,0 +1,216 @@
|
||||
/*
|
||||
*
|
||||
* (C) Copyright 2000-2003
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
|
||||
* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
#include <asm/immap.h>
|
||||
|
||||
/* PLL min/max specifications */
|
||||
#define MAX_FVCO 500000 /* KHz */
|
||||
#define MAX_FSYS 80000 /* KHz */
|
||||
#define MIN_FSYS 58333 /* KHz */
|
||||
#define FREF 16000 /* KHz */
|
||||
#define MAX_MFD 135 /* Multiplier */
|
||||
#define MIN_MFD 88 /* Multiplier */
|
||||
#define BUSDIV 6 /* Divider */
|
||||
/*
|
||||
* Low Power Divider specifications
|
||||
*/
|
||||
#define MIN_LPD (1 << 0) /* Divider (not encoded) */
|
||||
#define MAX_LPD (1 << 15) /* Divider (not encoded) */
|
||||
#define DEFAULT_LPD (1 << 1) /* Divider (not encoded) */
|
||||
|
||||
/*
|
||||
* Get the value of the current system clock
|
||||
*
|
||||
* Parameters:
|
||||
* none
|
||||
*
|
||||
* Return Value:
|
||||
* The current output system frequency
|
||||
*/
|
||||
int get_sys_clock(void)
|
||||
{
|
||||
volatile ccm_t *ccm = (volatile ccm_t *)(MMAP_CCM);
|
||||
volatile pll_t *pll = (volatile pll_t *)(MMAP_PLL);
|
||||
int divider;
|
||||
|
||||
/* Test to see if device is in LIMP mode */
|
||||
if (ccm->misccr & CCM_MISCCR_LIMP) {
|
||||
divider = ccm->cdr & CCM_CDR_LPDIV(0xF);
|
||||
return (FREF / (2 << divider));
|
||||
} else {
|
||||
return ((FREF * pll->pfdr) / (BUSDIV * 4));
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize the Low Power Divider circuit
|
||||
*
|
||||
* Parameters:
|
||||
* div Desired system frequency divider
|
||||
*
|
||||
* Return Value:
|
||||
* The resulting output system frequency
|
||||
*/
|
||||
int clock_limp(int div)
|
||||
{
|
||||
volatile ccm_t *ccm = (volatile ccm_t *)(MMAP_CCM);
|
||||
u32 temp;
|
||||
|
||||
/* Check bounds of divider */
|
||||
if (div < MIN_LPD)
|
||||
div = MIN_LPD;
|
||||
if (div > MAX_LPD)
|
||||
div = MAX_LPD;
|
||||
|
||||
/* Save of the current value of the SSIDIV so we don't overwrite the value */
|
||||
temp = (ccm->cdr & CCM_CDR_SSIDIV(0xF));
|
||||
|
||||
/* Apply the divider to the system clock */
|
||||
ccm->cdr = (CCM_CDR_LPDIV(div) | CCM_CDR_SSIDIV(temp));
|
||||
|
||||
ccm->misccr |= CCM_MISCCR_LIMP;
|
||||
|
||||
return (FREF / (3 * (1 << div)));
|
||||
}
|
||||
|
||||
/*
|
||||
* Exit low power LIMP mode
|
||||
*
|
||||
* Parameters:
|
||||
* div Desired system frequency divider
|
||||
*
|
||||
* Return Value:
|
||||
* The resulting output system frequency
|
||||
*/
|
||||
int clock_exit_limp(void)
|
||||
{
|
||||
volatile ccm_t *ccm = (volatile ccm_t *)(MMAP_CCM);
|
||||
int fout;
|
||||
|
||||
/* Exit LIMP mode */
|
||||
ccm->misccr &= (~CCM_MISCCR_LIMP);
|
||||
|
||||
/* Wait for PLL to lock */
|
||||
while (!(ccm->misccr & CCM_MISCCR_PLL_LOCK)) ;
|
||||
|
||||
fout = get_sys_clock();
|
||||
|
||||
return fout;
|
||||
}
|
||||
|
||||
/* Initialize the PLL
|
||||
*
|
||||
* Parameters:
|
||||
* fref PLL reference clock frequency in KHz
|
||||
* fsys Desired PLL output frequency in KHz
|
||||
* flags Operating parameters
|
||||
*
|
||||
* Return Value:
|
||||
* The resulting output system frequency
|
||||
*/
|
||||
int clock_pll(int fsys, int flags)
|
||||
{
|
||||
volatile u32 *sdram_workaround = (volatile u32 *)(MMAP_SDRAM + 0x80);
|
||||
volatile pll_t *pll = (volatile pll_t *)(MMAP_PLL);
|
||||
int fref, temp, fout, mfd;
|
||||
u32 i;
|
||||
|
||||
fref = FREF;
|
||||
|
||||
if (fsys == 0) {
|
||||
/* Return current PLL output */
|
||||
mfd = pll->pfdr;
|
||||
|
||||
return (fref * mfd / (BUSDIV * 4));
|
||||
}
|
||||
|
||||
/* Check bounds of requested system clock */
|
||||
if (fsys > MAX_FSYS)
|
||||
fsys = MAX_FSYS;
|
||||
|
||||
if (fsys < MIN_FSYS)
|
||||
fsys = MIN_FSYS;
|
||||
|
||||
/* Multiplying by 100 when calculating the temp value,
|
||||
and then dividing by 100 to calculate the mfd allows
|
||||
for exact values without needing to include floating
|
||||
point libraries. */
|
||||
temp = (100 * fsys) / fref;
|
||||
mfd = (4 * BUSDIV * temp) / 100;
|
||||
|
||||
/* Determine the output frequency for selected values */
|
||||
fout = ((fref * mfd) / (BUSDIV * 4));
|
||||
|
||||
/*
|
||||
* Check to see if the SDRAM has already been initialized.
|
||||
* If it has then the SDRAM needs to be put into self refresh
|
||||
* mode before reprogramming the PLL.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Initialize the PLL to generate the new system clock frequency.
|
||||
* The device must be put into LIMP mode to reprogram the PLL.
|
||||
*/
|
||||
|
||||
/* Enter LIMP mode */
|
||||
clock_limp(DEFAULT_LPD);
|
||||
|
||||
/* Reprogram PLL for desired fsys */
|
||||
pll->podr = (PLL_PODR_CPUDIV(BUSDIV / 3) | PLL_PODR_BUSDIV(BUSDIV));
|
||||
|
||||
pll->pfdr = mfd;
|
||||
|
||||
/* Exit LIMP mode */
|
||||
clock_exit_limp();
|
||||
|
||||
/*
|
||||
* Return the SDRAM to normal operation if it is in use.
|
||||
*/
|
||||
|
||||
/* software workaround for SDRAM opeartion after exiting LIMP mode errata */
|
||||
*sdram_workaround = CFG_SDRAM_BASE;
|
||||
|
||||
/* wait for DQS logic to relock */
|
||||
for (i = 0; i < 0x200; i++) ;
|
||||
|
||||
return fout;
|
||||
}
|
||||
|
||||
/*
|
||||
* get_clocks() fills in gd->cpu_clock and gd->bus_clk
|
||||
*/
|
||||
int get_clocks(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
gd->bus_clk = clock_pll(CFG_CLK / 1000, 0) * 1000;
|
||||
gd->cpu_clk = (gd->bus_clk * 3);
|
||||
return (0);
|
||||
}
|
||||
335
cpu/mcf532x/start.S
Normal file
335
cpu/mcf532x/start.S
Normal file
@@ -0,0 +1,335 @@
|
||||
/*
|
||||
* Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
|
||||
* Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <config.h>
|
||||
#include "version.h"
|
||||
|
||||
#ifndef CONFIG_IDENT_STRING
|
||||
#define CONFIG_IDENT_STRING ""
|
||||
#endif
|
||||
|
||||
#define _START _start
|
||||
#define _FAULT _fault
|
||||
|
||||
#define SAVE_ALL \
|
||||
move.w #0x2700,%sr; /* disable intrs */ \
|
||||
subl #60,%sp; /* space for 15 regs */ \
|
||||
moveml %d0-%d7/%a0-%a6,%sp@;
|
||||
|
||||
#define RESTORE_ALL \
|
||||
moveml %sp@,%d0-%d7/%a0-%a6; \
|
||||
addl #60,%sp; /* space for 15 regs */ \
|
||||
rte;
|
||||
|
||||
.text
|
||||
/*
|
||||
* Vector table. This is used for initial platform startup.
|
||||
* These vectors are to catch any un-intended traps.
|
||||
*/
|
||||
_vectors:
|
||||
|
||||
INITSP: .long 0x00000000 /* Initial SP */
|
||||
INITPC: .long _START /* Initial PC */
|
||||
vector02: .long _FAULT /* Access Error */
|
||||
vector03: .long _FAULT /* Address Error */
|
||||
vector04: .long _FAULT /* Illegal Instruction */
|
||||
vector05: .long _FAULT /* Reserved */
|
||||
vector06: .long _FAULT /* Reserved */
|
||||
vector07: .long _FAULT /* Reserved */
|
||||
vector08: .long _FAULT /* Privilege Violation */
|
||||
vector09: .long _FAULT /* Trace */
|
||||
vector0A: .long _FAULT /* Unimplemented A-Line */
|
||||
vector0B: .long _FAULT /* Unimplemented F-Line */
|
||||
vector0C: .long _FAULT /* Debug Interrupt */
|
||||
vector0D: .long _FAULT /* Reserved */
|
||||
vector0E: .long _FAULT /* Format Error */
|
||||
vector0F: .long _FAULT /* Unitialized Int. */
|
||||
|
||||
/* Reserved */
|
||||
vector10_17:
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
vector18: .long _FAULT /* Spurious Interrupt */
|
||||
vector19: .long _FAULT /* Autovector Level 1 */
|
||||
vector1A: .long _FAULT /* Autovector Level 2 */
|
||||
vector1B: .long _FAULT /* Autovector Level 3 */
|
||||
vector1C: .long _FAULT /* Autovector Level 4 */
|
||||
vector1D: .long _FAULT /* Autovector Level 5 */
|
||||
vector1E: .long _FAULT /* Autovector Level 6 */
|
||||
vector1F: .long _FAULT /* Autovector Level 7 */
|
||||
|
||||
/* TRAP #0 - #15 */
|
||||
vector20_2F:
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
/* Reserved */
|
||||
vector30_3F:
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
vector64_127:
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
vector128_191:
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
vector192_255:
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
|
||||
|
||||
.text
|
||||
|
||||
.globl _start
|
||||
_start:
|
||||
nop
|
||||
nop
|
||||
move.w #0x2700,%sr /* Mask off Interrupt */
|
||||
|
||||
/* Set vector base register at the beginning of the Flash */
|
||||
move.l #CFG_FLASH_BASE, %d0
|
||||
movec %d0, %VBR
|
||||
|
||||
move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
|
||||
movec %d0, %RAMBAR0
|
||||
|
||||
/* invalidate and disable cache */
|
||||
move.l #0x01000000, %d0 /* Invalidate cache cmd */
|
||||
movec %d0, %CACR /* Invalidate cache */
|
||||
move.l #0, %d0
|
||||
movec %d0, %ACR0
|
||||
movec %d0, %ACR1
|
||||
|
||||
/* initialize general use internal ram */
|
||||
move.l #0, %d0
|
||||
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
|
||||
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a2
|
||||
move.l %d0, (%a1)
|
||||
move.l %d0, (%a2)
|
||||
|
||||
/* set stackpointer to end of internal ram to get some stackspace for the
|
||||
first c-code */
|
||||
move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
|
||||
clr.l %sp@-
|
||||
|
||||
move.l #__got_start, %a5 /* put relocation table address to a5 */
|
||||
|
||||
bsr cpu_init_f /* run low-level CPU init code (from flash) */
|
||||
bsr board_init_f /* run low-level board init code (from flash) */
|
||||
|
||||
/* board_init_f() does not return */
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* void relocate_code (addr_sp, gd, addr_moni)
|
||||
*
|
||||
* This "function" does not return, instead it continues in RAM
|
||||
* after relocating the monitor code.
|
||||
*
|
||||
* r3 = dest
|
||||
* r4 = src
|
||||
* r5 = length in bytes
|
||||
* r6 = cachelinesize
|
||||
*/
|
||||
.globl relocate_code
|
||||
relocate_code:
|
||||
link.w %a6,#0
|
||||
move.l 8(%a6), %sp /* set new stack pointer */
|
||||
|
||||
move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
|
||||
move.l 16(%a6), %a0 /* Save copy of Destination Address */
|
||||
|
||||
move.l #CFG_MONITOR_BASE, %a1
|
||||
move.l #__init_end, %a2
|
||||
move.l %a0, %a3
|
||||
|
||||
/* copy the code to RAM */
|
||||
1:
|
||||
move.l (%a1)+, (%a3)+
|
||||
cmp.l %a1,%a2
|
||||
bgt.s 1b
|
||||
|
||||
/*
|
||||
* We are done. Do not return, instead branch to second part of board
|
||||
* initialization, now running from RAM.
|
||||
*/
|
||||
move.l %a0, %a1
|
||||
add.l #(in_ram - CFG_MONITOR_BASE), %a1
|
||||
jmp (%a1)
|
||||
|
||||
in_ram:
|
||||
|
||||
clear_bss:
|
||||
/*
|
||||
* Now clear BSS segment
|
||||
*/
|
||||
move.l %a0, %a1
|
||||
add.l #(_sbss - CFG_MONITOR_BASE),%a1
|
||||
move.l %a0, %d1
|
||||
add.l #(_ebss - CFG_MONITOR_BASE),%d1
|
||||
6:
|
||||
clr.l (%a1)+
|
||||
cmp.l %a1,%d1
|
||||
bgt.s 6b
|
||||
|
||||
/*
|
||||
* fix got table in RAM
|
||||
*/
|
||||
move.l %a0, %a1
|
||||
add.l #(__got_start - CFG_MONITOR_BASE),%a1
|
||||
move.l %a1,%a5 /* * fix got pointer register a5 */
|
||||
|
||||
move.l %a0, %a2
|
||||
add.l #(__got_end - CFG_MONITOR_BASE),%a2
|
||||
|
||||
7:
|
||||
move.l (%a1),%d1
|
||||
sub.l #_start,%d1
|
||||
add.l %a0,%d1
|
||||
move.l %d1,(%a1)+
|
||||
cmp.l %a2, %a1
|
||||
bne 7b
|
||||
|
||||
/* calculate relative jump to board_init_r in ram */
|
||||
move.l %a0, %a1
|
||||
add.l #(board_init_r - CFG_MONITOR_BASE), %a1
|
||||
|
||||
/* set parameters for board_init_r */
|
||||
move.l %a0,-(%sp) /* dest_addr */
|
||||
move.l %d0,-(%sp) /* gd */
|
||||
jsr (%a1)
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
/* exception code */
|
||||
.globl _fault
|
||||
_fault:
|
||||
jmp _fault
|
||||
.globl _exc_handler
|
||||
|
||||
_exc_handler:
|
||||
SAVE_ALL
|
||||
movel %sp,%sp@-
|
||||
bsr exc_handler
|
||||
addql #4,%sp
|
||||
RESTORE_ALL
|
||||
|
||||
.globl _int_handler
|
||||
_int_handler:
|
||||
SAVE_ALL
|
||||
movel %sp,%sp@-
|
||||
bsr int_handler
|
||||
addql #4,%sp
|
||||
RESTORE_ALL
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
/* cache functions */
|
||||
.globl icache_enable
|
||||
icache_enable:
|
||||
move.l #0x01000000, %d0 /* Invalidate cache cmd */
|
||||
movec %d0, %CACR /* Invalidate cache */
|
||||
move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
|
||||
movec %d0, %ACR0 /* Enable cache */
|
||||
|
||||
move.l #0x80000200, %d0 /* Setup cache mask */
|
||||
movec %d0, %CACR /* Enable cache */
|
||||
nop
|
||||
|
||||
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
|
||||
moveq #1, %d0
|
||||
move.l %d0, (%a1)
|
||||
rts
|
||||
|
||||
.globl icache_disable
|
||||
icache_disable:
|
||||
move.l #0x01000000, %d0 /* Setup cache mask */
|
||||
movec %d0, %CACR /* Disable cache */
|
||||
clr.l %d0 /* Setup cache mask */
|
||||
movec %d0, %ACR0
|
||||
movec %d0, %ACR1
|
||||
|
||||
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
|
||||
moveq #0, %d0
|
||||
move.l %d0, (%a1)
|
||||
rts
|
||||
|
||||
.globl icache_status
|
||||
icache_status:
|
||||
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
|
||||
move.l (%a1), %d0
|
||||
rts
|
||||
|
||||
.globl icache_invalid
|
||||
icache_invalid:
|
||||
move.l #0x81000200, %d0 /* Setup cache mask */
|
||||
movec %d0, %CACR /* Enable cache */
|
||||
rts
|
||||
|
||||
.globl dcache_enable
|
||||
dcache_enable:
|
||||
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
|
||||
moveq #1, %d0
|
||||
move.l %d0, (%a1)
|
||||
rts
|
||||
|
||||
/* No dcache, just a dummy function */
|
||||
.globl dcache_disable
|
||||
dcache_disable:
|
||||
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
|
||||
moveq #0, %d0
|
||||
move.l %d0, (%a1)
|
||||
rts
|
||||
|
||||
.globl dcache_status
|
||||
dcache_status:
|
||||
move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
|
||||
move.l (%a1), %d0
|
||||
rts
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
|
||||
.globl version_string
|
||||
version_string:
|
||||
.ascii U_BOOT_VERSION
|
||||
.ascii " (", __DATE__, " - ", __TIME__, ")"
|
||||
.ascii CONFIG_IDENT_STRING, "\0"
|
||||
Reference in New Issue
Block a user