mtd: nand: raw: Move CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig
Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs, headers and whitelist. Please note that this symbol already was used in Kconfig (imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was not available in Kconfig. This changes now with this patch and all boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what I also need on my GARDENA AT91SAM based board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Gregory CLEMENT <gregory.clement@bootlin.com> [trini: Rework such that the configs are unchanged to start with] Signed-off-by: Tom Rini <trini@konsulko.com>
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@@ -153,7 +153,6 @@
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/* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */
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#define CONFIG_SYS_NAND_BASE -1
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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@@ -130,7 +130,6 @@
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#define CONFIG_ENV_SIZE (128 << 10)
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#define CONFIG_ENV_SECT_SIZE (128 << 10)
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#endif
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_PAGE_2K
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#define CONFIG_SYS_NAND_CS 3
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@@ -32,7 +32,6 @@
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#endif
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/* NAND */
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* Keep device tree and initrd in lower memory so the kernel can access them */
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@@ -46,7 +46,6 @@
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#endif
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/* NAND */
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/*
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@@ -22,7 +22,6 @@
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#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
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/* NAND */
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* Keep device tree and initrd in lower memory so the kernel can access them */
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@@ -98,7 +98,6 @@
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#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
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#define CONFIG_SYS_NAND_PAGE_SIZE NAND_LARGE_BLOCK_PAGE_SIZE
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/*
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* USB
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@@ -144,7 +144,6 @@
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00500000
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/* MTD device */
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@@ -70,7 +70,6 @@
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#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
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#define CONFIG_SYS_NAND_LARGEPAGE
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#define CONFIG_MXC_NAND_HWECC
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/* Environment is in NAND */
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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@@ -57,7 +57,6 @@
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_MAX_CHIPS 1
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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/*
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* Ethernet Driver configuration
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@@ -28,7 +28,6 @@
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#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
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#define CONFIG_SYS_NAND_LARGEPAGE
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#define CONFIG_MXC_NAND_HWECC
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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@@ -133,7 +133,6 @@
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#ifdef CONFIG_NAND
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#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
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#define CONFIG_ENV_SIZE (128 << 9)
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_PAGE_2K
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#define CONFIG_SYS_NAND_CS 3
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@@ -51,7 +51,6 @@
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#endif
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/* DMA stuff, needed for GPMI/MXS NAND support */
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@@ -153,7 +153,6 @@
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#define CONFIG_SYS_NAND_MASK_CLE 0x4000
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#define CONFIG_SYS_NAND_MASK_ALE 0x2000
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#define CONFIG_SYS_NAND_CS 2
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_LARGEPAGE
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@@ -39,7 +39,6 @@
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/* NAND */
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define BBT_CUSTOM_SCAN
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@@ -74,7 +73,6 @@
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#endif
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/* NAND */
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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