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Merge branch 'master' of git://git.denx.de/u-boot-arm

Browse Source
This commit is contained in:
Tom Rini
2014-02-17 14:22:02 -05:00
parent b1ad03c242 5e77a745b2
commit c4d376fd1c
149 changed files with 17584 additions and 6839 deletions
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2
include/configs/am43xx_evm.h
View File

@@ -34,7 +34,7 @@
/* SPL defines. */
#define CONFIG_SPL_TEXT_BASE 0x40300350
#define CONFIG_SPL_MAX_SIZE (0x40337C00 - CONFIG_SPL_TEXT_BASE)
#define CONFIG_SPL_MAX_SIZE (220 << 10) /* 220KB */
#define CONFIG_SPL_YMODEM_SUPPORT
/* Enabling L2 Cache */

4
include/configs/cardhu.h
View File

@@ -30,6 +30,10 @@
#define V_PROMPT "Tegra30 (Cardhu) # "
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu"
#define BOARD_EXTRA_ENV_SETTINGS \
"board_name=cardhu-a04\0" \
"fdtfile=tegra30-cardhu-a04.dtb\0"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
#define CONFIG_TEGRA_ENABLE_UARTA

4
include/configs/dra7xx_evm.h
View File

@@ -4,7 +4,7 @@
* Lokesh Vutla <lokeshvutla@ti.com>
*
* Configuration settings for the TI DRA7XX board.
* See omap5_common.h for omap5 common settings.
* See ti_omap5_common.h for omap5 common settings.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -34,7 +34,7 @@
#define CONFIG_SYS_OMAP_ABE_SYSCK
#include <configs/omap5_common.h>
#include <configs/ti_omap5_common.h>
/* CPSW Ethernet */
#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */

9
include/configs/km/keymile-common.h
View File

@@ -141,8 +141,8 @@
* - 'release': for a standalone system kernel/rootfs from flash
*/
#define CONFIG_KM_DEF_ENV_BOOTTARGETS \
"subbootcmds=ubiattach ubicopy cramfsloadfdt cramfsloadkernel " \
"flashargs add_default addpanic boot\0" \
"subbootcmds=ubiattach ubicopy cramfsloadfdt set_fdthigh " \
"cramfsloadkernel flashargs add_default addpanic boot\0"\
"develop=" \
"tftp 200000 scripts/develop-${arch}.txt && " \
"env import -t 200000 ${filesize} && " \
@@ -226,6 +226,7 @@
CONFIG_KM_DEF_ENV_FLASH_BOOT \
CONFIG_KM_DEF_ENV_CONSTANTS \
"altbootcmd=run bootcmd\0" \
"boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \
"bootcmd=km_checkbidhwk && " \
"setenv bootcmd \'if km_checktestboot; then; " \
"setenv boot_bank ${test_bank}; else; " \
@@ -235,6 +236,10 @@
"run ${subbootcmds}; reset\' && " \
"saveenv && saveenv && boot\0" \
"bootlimit=3\0" \
"cramfsloadfdt=" \
"cramfsload ${fdt_addr_r} " \
"fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \
"fdt_addr_r="__stringify(CONFIG_KM_FDT_ADDR) "\0" \
"init=/sbin/init-overlay.sh\0" \
"load_addr_r="__stringify(CONFIG_KM_KERNEL_ADDR) "\0" \
"load=tftpboot ${load_addr_r} ${u-boot}\0" \

6
include/configs/km/km-powerpc.h
View File

@@ -70,11 +70,6 @@
#define CONFIG_KM_DEF_BOOT_ARGS_CPU ""
#define CONFIG_KM_DEF_ENV_CPU \
"boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \
"cramfsloadfdt=" \
"cramfsload ${fdt_addr_r} " \
"fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \
"fdt_addr_r=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \
"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
"update=" \
"protect off " __stringify(BOOTFLASH_START) " +${filesize} && "\
@@ -82,6 +77,7 @@
"cp.b ${load_addr_r} " __stringify(BOOTFLASH_START) \
" ${filesize} && " \
"protect on " __stringify(BOOTFLASH_START) " +${filesize}\0"\
"set_fdthigh=true\0" \
""
#endif /* __CONFIG_KEYMILE_POWERPC_H */

14
include/configs/km/km_arm.h
View File

@@ -70,7 +70,8 @@
#define CONFIG_KM_PHRAM 0x17F000
#define CONFIG_KM_CRAMFS_ADDR 0x2400000
#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */
#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */
#define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */
/* architecture specific default bootargs */
#define CONFIG_KM_DEF_BOOT_ARGS_CPU \
@@ -78,15 +79,17 @@
" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
#define CONFIG_KM_DEF_ENV_CPU \
"boot=bootm ${load_addr_r} - -\0" \
"cramfsloadfdt=true\0" \
"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \
CONFIG_KM_UPDATE_UBOOT \
"set_fdthigh=setenv fdt_high ${kernelmem}\0" \
""
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
#define CONFIG_MISC_INIT_R
/* Pass open firmware flat tree */
#define CONFIG_OF_LIBFDT
/*
* NS16550 Configuration
*/
@@ -289,10 +292,15 @@ int get_scl(void);
" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
#endif
#ifndef CONFIG_KM_BOARD_EXTRA_ENV
#define CONFIG_KM_BOARD_EXTRA_ENV ""
#endif
/*
* Default environment variables
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_KM_BOARD_EXTRA_ENV \
CONFIG_KM_DEF_ENV \
CONFIG_KM_NEW_ENV \
"arch=arm\0" \

1
include/configs/km/kmp204x-common.h
View File

@@ -437,6 +437,7 @@ int get_scl(void);
"update=" \
"sf probe 0;sf erase 0 +${filesize};" \
"sf write ${load_addr_r} 0 ${filesize};\0" \
"set_fdthigh=true\0" \
""
#define CONFIG_HW_ENV_SETTINGS \

15
include/configs/km_kirkwood.h
View File

@@ -45,11 +45,19 @@
#define CONFIG_KM_DISABLE_PCIE
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
/* KM_NUSA */
#elif defined(CONFIG_KM_NUSA)
/* KM_NUSA / KM_SUGP1 */
#elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1)
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
# if defined(CONFIG_KM_NUSA)
#define CONFIG_IDENT_STRING "\nKeymile NUSA"
#define CONFIG_HOSTNAME kmnusa
# elif defined(CONFIG_KM_SUGP1)
#define CONFIG_IDENT_STRING "\nKeymile SUGP1"
#define CONFIG_HOSTNAME kmsugp1
#define KM_PCIE_RESET_MPP7
#endif
#undef CONFIG_SYS_KWD_CONFIG
#define CONFIG_SYS_KWD_CONFIG \
$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
@@ -97,6 +105,9 @@
#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
#define CONFIG_IDENT_STRING "\nKeymile SUV31"
#define CONFIG_HOSTNAME kmsuv31
#undef CONFIG_SYS_KWD_CONFIG
#define CONFIG_SYS_KWD_CONFIG \
$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
#define CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_KM_FPGA_CONFIG

189
include/configs/omap3_igep00x0.h
View File

@@ -10,20 +10,13 @@
#ifndef __IGEP00X0_H
#define __IGEP00X0_H
#include <asm/sizes.h>
#ifdef CONFIG_BOOT_NAND
#define CONFIG_NAND
#endif
/*
* High Level Configuration Options
*/
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
#define CONFIG_OMAP_GPIO
#define CONFIG_OMAP_COMMON
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_SDRC /* The chip has SDRC controller */
#include <asm/arch/cpu.h>
#include <asm/arch/omap3.h>
#include <configs/ti_omap3_common.h>
#include <asm/mach-types.h>
/*
@@ -32,47 +25,12 @@
#define CONFIG_DISPLAY_CPUINFO 1
#define CONFIG_DISPLAY_BOARDINFO 1
/* Clock Defines */
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
#define CONFIG_MISC_INIT_R
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
#define CONFIG_REVISION_TAG 1
#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ
#define CONFIG_SUPPORT_RAW_INITRD
/*
* NS16550 Configuration
*/
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
/* select serial console configuration */
#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
115200}
#define CONFIG_GENERIC_MMC 1
#define CONFIG_MMC 1
#define CONFIG_OMAP_HSMMC 1
#define CONFIG_DOS_PARTITION 1
/* define to enable boot progress via leds */
#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
(CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
@@ -95,21 +53,10 @@
#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
#define CONFIG_USBD_PRODUCT_NAME "IGEP"
/* commands to include */
#include <config_cmd_default.h>
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_FAT /* FAT support */
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_MMC /* MMC support */
#ifdef CONFIG_BOOT_ONENAND
#define CONFIG_CMD_ONENAND /* ONENAND support */
#endif
#ifdef CONFIG_BOOT_NAND
#define CONFIG_CMD_NAND
#endif
#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
(CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
@@ -117,24 +64,8 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_CMD_NFS /* NFS support */
#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
#define CONFIG_MTD_DEVICE
#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
#undef CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
/*
* TWL4030
*/
#define CONFIG_TWL4030_POWER 1
#define CONFIG_BOOTDELAY 3
/*#undef CONFIG_ENV_IS_NOWHERE*/
#define CONFIG_EXTRA_ENV_SETTINGS \
"usbtty=cdc_acm\0" \
@@ -205,48 +136,6 @@
"fi;" \
"run nandboot;" \
#define CONFIG_AUTO_COMPLETE 1
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT "U-Boot # "
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
/* works on */
#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
0x01F00000) /* 31MB */
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
/* load address */
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
/*
* OMAP3 has 12 GP timers, they can be driven by the system clock
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
* This rate is divided by a local divisor.
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
/*
* Physical Memory Map
*
*/
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
/*
* FLASH and environment organization
*/
@@ -263,23 +152,15 @@
#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
#endif
#ifdef CONFIG_BOOT_NAND
#ifdef CONFIG_NAND
#define PISMO1_NAND_SIZE GPMC_SIZE_128M /* Configure the PISMO */
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_NAND_BASE NAND_BASE
#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
#define CONFIG_ENV_IS_IN_NAND 1
#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
#define CONFIG_ENV_ADDR NAND_ENV_OFFSET
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#endif
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
/*
* SMSC911x Ethernet
*/
@@ -289,54 +170,9 @@
#define CONFIG_SMC911X_BASE 0x2C000000
#endif /* (CONFIG_CMD_NET) */
/*
* Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
* and older u-boot.bin with the new U-Boot SPL.
*/
#define CONFIG_SYS_TEXT_BASE 0x80008000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
/* SPL */
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_TEXT_BASE 0x40200800
#define CONFIG_SPL_MAX_SIZE (54 * 1024)
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
/* move malloc and bss high to prevent clashing with the main image */
#define CONFIG_SYS_SPL_MALLOC_START 0x87000000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
#define CONFIG_SPL_BSS_START_ADDR 0x87080000 /* end of minimum RAM */
#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
/* MMC boot config */
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
/* OneNAND boot config */
#ifdef CONFIG_BOOT_ONENAND
#define CONFIG_SPL_ONENAND_SUPPORT
/* OneNAND boot config */
#define CONFIG_SYS_ONENAND_U_BOOT_OFFS 0x80000
#define CONFIG_SYS_ONENAND_PAGE_SIZE 2048
#define CONFIG_SPL_ONENAND_LOAD_ADDR 0x80000
@@ -345,13 +181,8 @@
#endif
#ifdef CONFIG_BOOT_NAND
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
/* NAND boot config */
#ifdef CONFIG_NAND
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
@@ -363,8 +194,6 @@
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 3
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
#endif
#endif /* __IGEP00X0_H */

4
include/configs/omap4_panda.h
View File

@@ -4,7 +4,7 @@
* Steve Sakoman <steve@sakoman.com>
*
* Configuration settings for the TI OMAP4 Panda board.
* See omap4_common.h for OMAP4 common part
* See ti_omap4_common.h for OMAP4 common part
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -36,7 +36,7 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#include <configs/omap4_common.h>
#include <configs/ti_omap4_common.h>
#define CONFIG_CMD_NET
/* GPIO */

4
include/configs/omap4_sdp4430.h
View File

@@ -5,7 +5,7 @@
* Steve Sakoman <steve@sakoman.com>
*
* Configuration settings for the TI SDP4430 board.
* See omap4_common.h for OMAP4 common part
* See ti_omap4_common.h for OMAP4 common part
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -19,7 +19,7 @@
#define CONFIG_4430SDP 1 /* working with SDP */
#define CONFIG_MACH_TYPE MACH_TYPE_OMAP_4430SDP
#include <configs/omap4_common.h>
#include <configs/ti_omap4_common.h>
/* Battery Charger */
#ifndef CONFIG_SPL_BUILD

4
include/configs/omap5_uevm.h
View File

@@ -4,7 +4,7 @@
* Sricharan R <r.sricharan@ti.com>
*
* Configuration settings for the TI EVM5430 board.
* See omap5_common.h for omap5 common settings.
* See ti_omap5_common.h for omap5 common settings.
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -17,7 +17,7 @@
"uuid_disk=${uuid_gpt_disk};" \
"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
#include <configs/omap5_common.h>
#include <configs/ti_omap5_common.h>
#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 UART3_BASE

1
include/configs/rpi_b.h
View File

@@ -123,6 +123,7 @@
"scriptaddr=0x00000000\0" \
"kernel_addr_r=0x01000000\0" \
"fdt_addr_r=0x02000000\0" \
"fdtfile=bcm2835-rpi-b.dtb\0" \
"ramdisk_addr_r=0x02100000\0" \
"boot_targets=mmc0\0" \
\

10
include/configs/s5p_goni.h
View File

@@ -34,6 +34,7 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
@@ -113,8 +114,13 @@
#define CONFIG_UBIFS_OPTION "rootflags=bulk_read,no_chk_data_crc"
#define CONFIG_MISC_COMMON
#define CONFIG_MISC_INIT_R
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
CONFIG_UPDATEB \
"updatek=" \
@@ -208,8 +214,8 @@
/*
* I2C Settings
*/
#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get_nr(j4, 3)
#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get_nr(j4, 0)
#define CONFIG_SOFT_I2C_GPIO_SCL s5pc110_gpio_get(j4, 3)
#define CONFIG_SOFT_I2C_GPIO_SDA s5pc110_gpio_get(j4, 0)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */

46
include/configs/s5pc210_universal.h
View File

@@ -124,6 +124,9 @@
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
"updateb=" \
"onenand erase 0x0 0x100000;" \
@@ -229,8 +232,8 @@
/*
* I2C Settings
*/
#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(1, b, 7)
#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(1, b, 6)
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
@@ -253,10 +256,10 @@
*/
#define CONFIG_SOFT_SPI
#define CONFIG_SOFT_SPI_MODE SPI_MODE_3
#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1)
#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3)
#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0)
#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3)
#define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_get(2, y3, 1)
#define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_get(2, y3, 3)
#define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_get(2, y3, 0)
#define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_get(2, y4, 3)
#define SPI_DELAY udelay(1)
#undef SPI_INIT
@@ -269,16 +272,43 @@ void universal_spi_sda(int bit);
int universal_spi_read(void);
#endif
/* Common misc for Samsung */
#define CONFIG_MISC_COMMON
#define CONFIG_MISC_INIT_R
/* Download menu - Samsung common */
#define CONFIG_LCD_MENU
#define CONFIG_LCD_MENU_BOARD
/* Download menu - definitions for check keys */
#ifndef __ASSEMBLY__
#include <power/max8998_pmic.h>
#define KEY_PWR_PMIC_NAME "MAX8998_PMIC"
#define KEY_PWR_STATUS_REG MAX8998_REG_STATUS1
#define KEY_PWR_STATUS_MASK (1 << 7)
#define KEY_PWR_INTERRUPT_REG MAX8998_REG_IRQ1
#define KEY_PWR_INTERRUPT_MASK (1 << 7)
#define KEY_VOL_UP_GPIO exynos4_gpio_get(2, x2, 0)
#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1)
#endif /* __ASSEMBLY__ */
/* LCD console */
#define LCD_BPP LCD_COLOR16
#define CONFIG_SYS_WHITE_ON_BLACK
/*
* LCD Settings
*/
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
#define CONFIG_CMD_BMP
#define CONFIG_BMP_32BPP
#define CONFIG_BMP_16BPP
#define CONFIG_LD9040
#define CONFIG_EXYNOS_MIPI_DSIM
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((520 * 120 * 4) + (1 << 12))
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
#endif /* __CONFIG_H */

8
include/configs/tegra-common-post.h
View File

@@ -99,6 +99,7 @@
BOOTCMDS_DHCP
#define CONFIG_BOOTCOMMAND \
"set usb_need_init; " \
"for target in ${boot_targets}; do run bootcmd_${target}; done"
#endif
@@ -129,10 +130,15 @@
"stderr=serial" STDOUT_LCD "\0" \
""
#ifndef BOARD_EXTRA_ENV_SETTINGS
#define BOARD_EXTRA_ENV_SETTINGS
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
TEGRA_DEVICE_SETTINGS \
MEM_LAYOUT_ENV_SETTINGS \
BOOTCMDS_COMMON
BOOTCMDS_COMMON \
BOARD_EXTRA_ENV_SETTINGS
#if defined(CONFIG_TEGRA20_SFLASH) || defined(CONFIG_TEGRA20_SLINK) || defined(CONFIG_TEGRA114_SPI)
#define CONFIG_FDT_SPI

83
include/configs/tegra124-common.h Normal file
View File

@@ -0,0 +1,83 @@
/*
* (C) Copyright 2013
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _TEGRA124_COMMON_H_
#define _TEGRA124_COMMON_H_
#include "tegra-common.h"
/* Cortex-A15 uses a cache line size of 64 bytes */
#define CONFIG_SYS_CACHELINE_SIZE 64
/*
* NS16550 Configuration
*/
#define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
/*
* High Level Configuration Options
*/
#define CONFIG_TEGRA124 /* is an NVIDIA Tegra124 core */
/* Environment information, boards can override if required */
#define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_LOAD_ADDR 0x80A00800 /* default */
#define CONFIG_STACKBASE 0x82800000 /* 40MB */
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
#define CONFIG_SYS_TEXT_BASE 0x8010E000
/*
* Memory layout for where various images get loaded by boot scripts:
*
* scriptaddr can be pretty much anywhere that doesn't conflict with something
* else. Put it above BOOTMAPSZ to eliminate conflicts.
*
* pxefile_addr_r can be pretty much anywhere that doesn't conflict with
* something else. Put it above BOOTMAPSZ to eliminate conflicts.
*
* kernel_addr_r must be within the first 128M of RAM in order for the
* kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
* decompress itself to 0x8000 after the start of RAM, kernel_addr_r
* should not overlap that area, or the kernel will have to copy itself
* somewhere else before decompression. Similarly, the address of any other
* data passed to the kernel shouldn't overlap the start of RAM. Pushing
* this up to 16M allows for a sizable kernel to be decompressed below the
* compressed load address.
*
* fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
* the compressed kernel to be up to 16M too.
*
* ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
* for the FDT/DTB to be up to 1M, which is hopefully plenty.
*/
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x90000000\0" \
"pxefile_addr_r=0x90100000\0" \
"kernel_addr_r=0x81000000\0" \
"fdt_addr_r=0x82000000\0" \
"ramdisk_addr_r=0x82100000\0"
/* Defines for SPL */
#define CONFIG_SPL_TEXT_BASE 0x80108000
#define CONFIG_SYS_SPL_MALLOC_START 0x80090000
#define CONFIG_SPL_STACK 0x800ffffc
/* Total I2C ports on Tegra124 */
#define TEGRA_I2C_NUM_CONTROLLERS 5
/* For USB EHCI controller */
#define CONFIG_EHCI_IS_TDI
#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10
#endif /* _TEGRA124_COMMON_H_ */

4
include/configs/ti_am335x_common.h
View File

@@ -73,6 +73,10 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
#endif
/* Now bring in the rest of the common code. */
#include <configs/ti_armv7_common.h>

11
include/configs/ti_armv7_common.h
View File

@@ -45,11 +45,15 @@
#define CONFIG_BOOTDELAY 1
/*
* DDR information. We say (for simplicity) that we have 1 bank,
* always, even when we have more. We always start at 0x80000000,
* and we place the initial stack pointer in our SRAM.
* DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
* we say (for simplicity) that we have 1 bank, always, even when
* we have more. We always start at 0x80000000, and we place the
* initial stack pointer in our SRAM. Otherwise, we can define
* CONFIG_NR_DRAM_BANKS before including this file.
*/
#ifndef CONFIG_NR_DRAM_BANKS
#define CONFIG_NR_DRAM_BANKS 1
#endif
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
GENERATED_GBL_DATA_SIZE)
@@ -237,7 +241,6 @@
#define CONFIG_SPL_BOARD_INIT
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_AM33XX_BCH /* OMAP4 and later ELM support */
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS

73
include/configs/ti_omap3_common.h Normal file
View File

@@ -0,0 +1,73 @@
/*
* ti_omap3_common.h
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* SPDX-License-Identifier: GPL-2.0+
*
* For more details, please see the technical documents listed at
* http://www.ti.com/product/omap3530
* http://www.ti.com/product/omap3630
* http://www.ti.com/product/dm3730
*/
#ifndef __CONFIG_TI_OMAP3_COMMON_H__
#define __CONFIG_TI_OMAP3_COMMON_H__
#define CONFIG_OMAP34XX
#include <asm/arch/cpu.h>
#include <asm/arch/omap3.h>
/* The chip has SDRC controller */
#define CONFIG_SDRC
/* Clock Defines */
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
/* NS16550 Configuration */
#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
115200}
/* Select serial console configuration */
#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
#define CONFIG_SERIAL3 3
/* Physical Memory Map */
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
/*
* OMAP3 has 12 GP timers, they can be driven by the system clock
* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
* This rate is divided by a local divisor.
*/
#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
#define CONFIG_SYS_MONITOR_LEN (256 << 10)
/* TWL4030 */
#define CONFIG_TWL4030_POWER 1
/* SPL */
#define CONFIG_SPL_TEXT_BASE 0x40200800
#define CONFIG_SPL_MAX_SIZE (54 * 1024)
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#define CONFIG_SPL_POWER_SUPPORT
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_SIMPLE
#endif
/* Now bring in the rest of the common code. */
#include <configs/ti_armv7_common.h>
#endif /* __CONFIG_TI_OMAP3_COMMON_H__ */

10
include/configs/omap4_common.h → include/configs/ti_omap4_common.h
View File

@@ -9,8 +9,8 @@
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_OMAP4_COMMON_H
#define __CONFIG_OMAP4_COMMON_H
#ifndef __CONFIG_TI_OMAP4_COMMON_H
#define __CONFIG_TI_OMAP4_COMMON_H
/*
* High Level Configuration Options
@@ -159,4 +159,8 @@
#define CONFIG_SPL_DISPLAY_PRINT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#endif /* __CONFIG_OMAP4_COMMON_H */
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
#endif
#endif /* __CONFIG_TI_OMAP4_COMMON_H */

10
include/configs/omap5_common.h → include/configs/ti_omap5_common.h
View File

@@ -14,8 +14,8 @@
* http://www.ti.com/product/omap5432
*/
#ifndef __CONFIG_OMAP5_COMMON_H
#define __CONFIG_OMAP5_COMMON_H
#ifndef __CONFIG_TI_OMAP5_COMMON_H
#define __CONFIG_TI_OMAP5_COMMON_H
#define CONFIG_OMAP54XX
#define CONFIG_DISPLAY_CPUINFO
@@ -146,4 +146,8 @@
#define CONFIG_SPL_DISPLAY_PRINT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
#endif /* __CONFIG_OMAP5_COMMON_H */
#ifdef CONFIG_NAND
#define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
#endif
#endif /* __CONFIG_TI_OMAP5_COMMON_H */

50
include/configs/trats.h
View File

@@ -147,15 +147,23 @@
""PARTS_BOOT" part 0 2;" \
""PARTS_ROOT" part 0 5;" \
""PARTS_DATA" part 0 6;" \
""PARTS_UMS" part 0 7\0"
""PARTS_UMS" part 0 7;" \
"params.bin mmc 0x38 0x8\0"
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootk=" \
"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
"run loaduimage;" \
"if run loaddtb; then " \
"bootm 0x40007FC0 - ${fdtaddr};" \
"fi;" \
"bootm 0x40007FC0;\0" \
"updatemmc=" \
"mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
"mmc boot 0 1 1 0\0" \
@@ -178,7 +186,7 @@
"mmcboot=" \
"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
"run bootk\0" \
"bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
"boottrace=setenv opts initcall_debug; run bootcmd\0" \
"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
@@ -217,7 +225,6 @@
"setenv spl_imgaddr;" \
"setenv spl_addr_tmp;\0" \
"fdtaddr=40800000\0" \
"fdtfile=exynos4210-trats.dtb\0"
/* Miscellaneous configurable options */
@@ -287,8 +294,8 @@
#include <asm/arch/gpio.h>
/* I2C FG */
#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part2_get_nr(y4, 1)
#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part2_get_nr(y4, 0)
#define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_get(2, y4, 1)
#define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_get(2, y4, 0)
#define CONFIG_POWER
#define CONFIG_POWER_I2C
@@ -306,16 +313,43 @@
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_USB_CABLE_CHECK
/* Common misc for Samsung */
#define CONFIG_MISC_COMMON
#define CONFIG_MISC_INIT_R
/* Download menu - Samsung common */
#define CONFIG_LCD_MENU
#define CONFIG_LCD_MENU_BOARD
/* Download menu - definitions for check keys */
#ifndef __ASSEMBLY__
#include <power/max8997_pmic.h>
#define KEY_PWR_PMIC_NAME "MAX8997_PMIC"
#define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1
#define KEY_PWR_STATUS_MASK (1 << 0)
#define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1
#define KEY_PWR_INTERRUPT_MASK (1 << 0)
#define KEY_VOL_UP_GPIO exynos4_gpio_get(2, x2, 0)
#define KEY_VOL_DOWN_GPIO exynos4_gpio_get(2, x2, 1)
#endif /* __ASSEMBLY__ */
/* LCD console */
#define LCD_BPP LCD_COLOR16
#define CONFIG_SYS_WHITE_ON_BLACK
/* LCD */
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
#define CONFIG_CMD_BMP
#define CONFIG_BMP_32BPP
#define CONFIG_BMP_16BPP
#define CONFIG_FB_ADDR 0x52504000
#define CONFIG_S6E8AX0
#define CONFIG_EXYNOS_MIPI_DSIM
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12))
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE

47
include/configs/trats2.h
View File

@@ -152,6 +152,9 @@
#define CONFIG_SYS_CONSOLE_INFO_QUIET
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_ENV_VARS_UBOOT_CONFIG
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
/* Tizen - partitions definitions */
#define PARTS_CSA "csa"
#define PARTS_BOOT "boot"
@@ -178,11 +181,16 @@
""PARTS_BOOT" part 0 2;" \
""PARTS_ROOT" part 0 5;" \
""PARTS_DATA" part 0 6;" \
""PARTS_UMS" part 0 7\0"
""PARTS_UMS" part 0 7;" \
"params.bin mmc 0x38 0x8\0"
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootk=" \
"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
"run loaduimage;" \
"if run loaddtb; then " \
"bootm 0x40007FC0 - ${fdtaddr};" \
"fi;" \
"bootm 0x40007FC0;\0" \
"updatemmc=" \
"mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \
"mmc boot 0 1 1 0\0" \
@@ -196,7 +204,7 @@
"mmcboot=" \
"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
"run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
"run bootk\0" \
"bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
"boottrace=setenv opts initcall_debug; run bootcmd\0" \
"verify=n\0" \
@@ -237,7 +245,6 @@
"setenv spl_imgaddr;" \
"setenv spl_addr_tmp;\0" \
"fdtaddr=40800000\0" \
"fdtfile=exynos4412-trats2.dtb\0"
/*
* Miscellaneous configurable options
@@ -277,7 +284,6 @@
#define CONFIG_EFI_PARTITION
#define CONFIG_PARTITION_UUIDS
#define CONFIG_MISC_INIT_R
#define CONFIG_BOARD_EARLY_INIT_F
/* I2C */
@@ -318,16 +324,43 @@ int get_soft_i2c_sda_pin(void);
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_USB_CABLE_CHECK
/* Common misc for Samsung */
#define CONFIG_MISC_COMMON
#define CONFIG_MISC_INIT_R
/* Download menu - Samsung common */
#define CONFIG_LCD_MENU
#define CONFIG_LCD_MENU_BOARD
/* Download menu - definitions for check keys */
#ifndef __ASSEMBLY__
#include <power/max77686_pmic.h>
#define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
#define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
#define KEY_PWR_STATUS_MASK (1 << 0)
#define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
#define KEY_PWR_INTERRUPT_MASK (1 << 1)
#define KEY_VOL_UP_GPIO exynos4x12_gpio_get(2, x2, 2)
#define KEY_VOL_DOWN_GPIO exynos4x12_gpio_get(2, x3, 3)
#endif /* __ASSEMBLY__ */
/* LCD console */
#define LCD_BPP LCD_COLOR16
#define CONFIG_SYS_WHITE_ON_BLACK
/* LCD */
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
#define CONFIG_CMD_BMP
#define CONFIG_BMP_32BPP
#define CONFIG_BMP_16BPP
#define CONFIG_FB_ADDR 0x52504000
#define CONFIG_S6E8AX0
#define CONFIG_EXYNOS_MIPI_DSIM
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 250 * 4) + (1 << 12))
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE

79
include/configs/venice2.h Normal file
View File

@@ -0,0 +1,79 @@
/*
* (C) Copyright 2013-2014
* NVIDIA Corporation <www.nvidia.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <asm/sizes.h>
#include "tegra124-common.h"
/* Enable fdt support for Venice2. Flash the image in u-boot-dtb.bin */
#define CONFIG_DEFAULT_DEVICE_TREE tegra124-venice2
#define CONFIG_OF_CONTROL
#define CONFIG_OF_SEPARATE
/* High-level configuration options */
#define V_PROMPT "Tegra124 (Venice2) # "
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2"
/* Board-specific serial config */
#define CONFIG_SERIAL_MULTI
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_BOARD_EARLY_INIT_F
/* I2C */
#define CONFIG_SYS_I2C_TEGRA
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_MAX_I2C_BUS TEGRA_I2C_NUM_CONTROLLERS
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_TEGRA_MMC
#define CONFIG_CMD_MMC
/* Environment in eMMC, at the end of 2nd "boot sector" */
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
/* SPI */
#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */
#define CONFIG_TEGRA114_SPI_CTRLS 6
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
#define CONFIG_SF_DEFAULT_SPEED 24000000
#define CONFIG_CMD_SPI
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH_SIZE (4 << 20)
/* USB Host support */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_TEGRA
#define CONFIG_USB_STORAGE
#define CONFIG_CMD_USB
/* USB networking support */
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
/* General networking support */
#define CONFIG_CMD_NET
#define CONFIG_CMD_DHCP
#include "tegra-common-post.h"
#endif /* __CONFIG_H */

3
include/configs/versatile.h
View File

@@ -101,7 +101,8 @@
#define CONFIG_BOOTDELAY 2
#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\
"netdev=25,0,0xf1010000,0xf1010010,eth0"
"netdev=25,0,0xf1010000,0xf1010010,eth0 "\
"console=ttyAMA0,38400n1"
/*
* Static configuration when assigning fixed address

4
include/configs/zynq-common.h
View File

@@ -164,7 +164,7 @@
"fatload mmc 0 ${load_addr} ${fit_image} && " \
"bootm ${load_addr}\0" \
"jtagboot=echo TFTPing FIT to RAM... && " \
"tftp ${load_addr} ${fit_image} && " \
"tftpboot ${load_addr} ${fit_image} && " \
"bootm ${load_addr}\0"
#define CONFIG_BOOTCOMMAND "run $modeboot"
#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
@@ -228,6 +228,8 @@
# define CONFIG_SYS_MMC_MAX_DEVICE 1
#endif
#define CONFIG_SYS_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot.lds"
/* Commands */
#include <config_cmd_default.h>

1
include/fdtdec.h
View File

@@ -59,6 +59,7 @@ enum fdt_compat_id {
COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */
COMPAT_NVIDIA_TEGRA20_PWM, /* Tegra 2 PWM controller */
COMPAT_NVIDIA_TEGRA20_DC, /* Tegra 2 Display controller */
COMPAT_NVIDIA_TEGRA124_SDMMC, /* Tegra124 SDMMC controller */
COMPAT_NVIDIA_TEGRA30_SDMMC, /* Tegra30 SDMMC controller */
COMPAT_NVIDIA_TEGRA20_SDMMC, /* Tegra20 SDMMC controller */
COMPAT_NVIDIA_TEGRA20_SFLASH, /* Tegra 2 SPI flash controller */

2
include/lcd.h
View File

@@ -223,6 +223,8 @@ typedef struct vidinfo {
unsigned int logo_on;
unsigned int logo_width;
unsigned int logo_height;
int logo_x_offset;
int logo_y_offset;
unsigned long logo_addr;
unsigned int rgb_mode;
unsigned int resolution;

2
include/power/max77686_pmic.h
View File

@@ -8,6 +8,8 @@
#ifndef __MAX77686_H_
#define __MAX77686_H_
#include <power/pmic.h>
enum {
MAX77686_REG_PMIC_ID = 0x0,
MAX77686_REG_PMIC_INTSRC,

1
include/power/pmic.h
View File

@@ -8,7 +8,6 @@
#ifndef __CORE_PMIC_H_
#define __CORE_PMIC_H_
#include <common.h>
#include <linux/list.h>
#include <i2c.h>
#include <power/power_chrg.h>

29
include/samsung/misc.h Normal file
View File

@@ -0,0 +1,29 @@
#ifndef __SAMSUNG_MISC_COMMON_H__
#define __SAMSUNG_MISC_COMMON_H__
#ifdef CONFIG_REVISION_TAG
u32 get_board_rev(void);
#endif
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
void set_board_info(void);
#endif
#ifdef CONFIG_LCD_MENU
enum {
BOOT_MODE_INFO,
BOOT_MODE_THOR,
BOOT_MODE_UMS,
BOOT_MODE_DFU,
BOOT_MODE_EXIT,
};
void keys_init(void);
void check_boot_mode(void);
#endif /* CONFIG_LCD_MENU */
#ifdef CONFIG_CMD_BMP
void draw_logo(void);
#endif
#endif /* __SAMSUNG_MISC_COMMON_H__ */