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Merge branch 'master' of git://git.denx.de/u-boot-arm

Browse Source 
Conflicts:
	MAINTAINERS
	boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Stefano Babic
2013-09-13 12:04:54 +02:00
parent b5e7f1bc4b 8386ca8bea
commit c4a7ece020
57 changed files with 2669 additions and 2855 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
include/ahci.h
View File

@@ -87,6 +87,11 @@
| PORT_IRQ_DMAS_FIS | PORT_IRQ_PIOS_FIS \
| PORT_IRQ_D2H_REG_FIS
/* PORT_SCR_STAT bits */
#define PORT_SCR_STAT_DET_MASK 0x3
#define PORT_SCR_STAT_DET_COMINIT 0x1
#define PORT_SCR_STAT_DET_PHYRDY 0x3
/* PORT_CMD bits */
#define PORT_CMD_ATAPI (1 << 24) /* Device is ATAPI */
#define PORT_CMD_LIST_ON (1 << 15) /* cmd list DMA engine running */
@@ -103,29 +108,6 @@
#define AHCI_MAX_PORTS 32
/* SETFEATURES stuff */
#define SETFEATURES_XFER 0x03
#define XFER_UDMA_7 0x47
#define XFER_UDMA_6 0x46
#define XFER_UDMA_5 0x45
#define XFER_UDMA_4 0x44
#define XFER_UDMA_3 0x43
#define XFER_UDMA_2 0x42
#define XFER_UDMA_1 0x41
#define XFER_UDMA_0 0x40
#define XFER_MW_DMA_2 0x22
#define XFER_MW_DMA_1 0x21
#define XFER_MW_DMA_0 0x20
#define XFER_SW_DMA_2 0x12
#define XFER_SW_DMA_1 0x11
#define XFER_SW_DMA_0 0x10
#define XFER_PIO_4 0x0C
#define XFER_PIO_3 0x0B
#define XFER_PIO_2 0x0A
#define XFER_PIO_1 0x09
#define XFER_PIO_0 0x08
#define XFER_PIO_SLOW 0x00
#define ATA_FLAG_SATA (1 << 3)
#define ATA_FLAG_NO_LEGACY (1 << 4) /* no legacy mode check */
#define ATA_FLAG_MMIO (1 << 6) /* use MMIO, not PIO */

1
include/configs/MPC8544DS.h
View File

@@ -318,6 +318,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SCSI_AHCI
#ifdef CONFIG_SCSI_AHCI
#define CONFIG_LIBATA
#define CONFIG_SATA_ULI5288
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
#define CONFIG_SYS_SCSI_MAX_LUN 1

1
include/configs/MPC8572DS.h
View File

@@ -539,6 +539,7 @@
#define CONFIG_SCSI_AHCI
#ifdef CONFIG_SCSI_AHCI
#define CONFIG_LIBATA
#define CONFIG_SATA_ULI5288
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
#define CONFIG_SYS_SCSI_MAX_LUN 1

1
include/configs/MPC8610HPCD.h
View File

@@ -326,6 +326,7 @@
#define CONFIG_SCSI_AHCI
#ifdef CONFIG_SCSI_AHCI
#define CONFIG_LIBATA
#define CONFIG_SATA_ULI5288
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
#define CONFIG_SYS_SCSI_MAX_LUN 1

1
include/configs/MPC8641HPCN.h
View File

@@ -412,6 +412,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SCSI_AHCI
#ifdef CONFIG_SCSI_AHCI
#define CONFIG_LIBATA
#define CONFIG_SATA_ULI5288
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
#define CONFIG_SYS_SCSI_MAX_LUN 1

1
include/configs/P2020DS.h
View File

@@ -513,6 +513,7 @@
#define CONFIG_SCSI_AHCI
#ifdef CONFIG_SCSI_AHCI
#define CONFIG_LIBATA
#define CONFIG_SATA_ULI5288
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 4
#define CONFIG_SYS_SCSI_MAX_LUN 1

4
include/configs/am335x_evm.h
View File

@@ -132,7 +132,9 @@
"echo Running uenvcmd ...;" \
"run uenvcmd;" \
"fi;" \
"run mmcloados;" \
"if run loaduimage; then " \
"run mmcloados;" \
"fi;" \
"fi;\0" \
"spiboot=echo Booting from spi ...; " \
"run spiargs; " \

255
include/configs/arndale.h Normal file
View File

@@ -0,0 +1,255 @@
/*
* Copyright (C) 2013 Samsung Electronics
*
* SPDX-License-Identifier: GPL-2.0+
*
* Configuration settings for the SAMSUNG Arndale board.
*/
#ifndef __CONFIG_ARNDALE_H
#define __CONFIG_ARNDALE_H
/* High Level Configuration Options */
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
#define CONFIG_S5P /* S5P Family */
#define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */
#define CONFIG_EXYNOS5250
#include <asm/arch/cpu.h> /* get chip and board defs */
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
/* Enable fdt support for Exynos5250 */
#define CONFIG_ARCH_DEVICE_TREE exynos5250
#define CONFIG_OF_CONTROL
#define CONFIG_OF_SEPARATE
/* Allow tracing to be enabled */
#define CONFIG_TRACE
#define CONFIG_CMD_TRACE
#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
#define CONFIG_TRACE_EARLY
#define CONFIG_TRACE_EARLY_ADDR 0x50000000
/* Keep L2 Cache Disabled */
#define CONFIG_SYS_DCACHE_OFF
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define CONFIG_SYS_TEXT_BASE 0x43E00000
/* input clock of PLL: SMDK5250 has 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_CMDLINE_EDITING
/* Power Down Modes */
#define S5P_CHECK_SLEEP 0x00000BAD
#define S5P_CHECK_DIDLE 0xBAD00000
#define S5P_CHECK_LPA 0xABAD0000
/* Offset for inform registers */
#define INFORM0_OFFSET 0x800
#define INFORM1_OFFSET 0x804
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
/* select serial console configuration */
#define CONFIG_BAUDRATE 115200
#define EXYNOS5_DEFAULT_UART_OFFSET 0x010000
#define CONFIG_SILENT_CONSOLE
/* Console configuration */
#define CONFIG_CONSOLE_MUX
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define EXYNOS_DEVICE_SETTINGS \
"stdin=serial\0" \
"stdout=serial\0" \
"stderr=serial\0"
#define CONFIG_EXTRA_ENV_SETTINGS \
EXYNOS_DEVICE_SETTINGS
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
#define CONFIG_DWMMC
#define CONFIG_EXYNOS_DWMMC
#define CONFIG_SUPPORT_EMMC_BOOT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SKIP_LOWLEVEL_INIT
/* PWM */
#define CONFIG_PWM
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
/* Command definition*/
#include <config_cmd_default.h>
#define CONFIG_CMD_PING
#define CONFIG_CMD_ELF
#define CONFIG_CMD_MMC
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_CMD_NET
#define CONFIG_CMD_HASH
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK
/* USB */
#define CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_EXYNOS
#define CONFIG_USB_STORAGE
/* MMC SPL */
#define CONFIG_SPL
#define COPY_BL2_FNPTR_ADDR 0x02020030
#define CONFIG_SPL_LIBCOMMON_SUPPORT
/* specific .lds file */
#define CONFIG_SPL_LDSCRIPT "board/samsung/common/exynos-uboot-spl.lds"
#define CONFIG_SPL_TEXT_BASE 0x02023400
#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
#define CONFIG_BOOTCOMMAND "mmc read 40007000 451 2000; bootm 40007000"
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
#define CONFIG_SYS_PROMPT "ARNDALE # "
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
#define CONFIG_SYS_HZ 1000
#define CONFIG_RD_LVL
#define CONFIG_NR_DRAM_BANKS 8
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
#define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
#define CONFIG_SYS_MONITOR_BASE 0x00000000
/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH
#undef CONFIG_CMD_IMLS
#define CONFIG_IDENT_STRING " for ARNDALE"
#define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SECURE_BL1_ONLY
/* Secure FW size configuration */
#ifdef CONFIG_SECURE_BL1_ONLY
#define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */
#else
#define CONFIG_SEC_FW_SIZE 0
#endif
/* Configuration of BL1, BL2, ENV Blocks on mmc */
#define CONFIG_RES_BLOCK_SIZE (512)
#define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
#define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */
#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
#define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
#define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
/* U-boot copy size from boot Media to DRAM.*/
#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512)
#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512)
#define CONFIG_SPI_BOOTING
#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058
#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
#define CONFIG_DOS_PARTITION
#define CONFIG_EFI_PARTITION
#define CONFIG_CMD_PART
#define CONFIG_PARTITION_UUIDS
#define CONFIG_IRAM_STACK 0x02050000
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK
/* I2C */
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_HARD_I2C
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_SPEED 100000 /* 100 Kbps */
#define CONFIG_DRIVER_S3C24X0_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_MAX_I2C_NUM 8
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_I2C_EDID
/* PMIC */
#define CONFIG_PMIC
#define CONFIG_PMIC_I2C
#define CONFIG_PMIC_MAX77686
#define CONFIG_DEFAULT_DEVICE_TREE exynos5250-arndale
/* Ethernet Controllor Driver */
#ifdef CONFIG_CMD_NET
#define CONFIG_SMC911X
#define CONFIG_SMC911X_BASE 0x5000000
#define CONFIG_SMC911X_16_BIT
#define CONFIG_ENV_SROM_BANK 1
#endif /*CONFIG_CMD_NET*/
/* Enable PXE Support */
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_PXE
#define CONFIG_MENU
#endif
/* Enable devicetree support */
#define CONFIG_OF_LIBFDT
/* Enable Time Command */
#define CONFIG_CMD_TIME
#endif /* __CONFIG_H */

2
include/configs/cam_enc_4xx.h
View File

@@ -216,6 +216,8 @@
#define CONFIG_SPL_STACK (0x00010000 + 0x7f00)
#define CONFIG_SPL_TEXT_BASE 0x00000020 /*CONFIG_SYS_SRAM_START*/
/* Provide at least 16MB spacing between us and the Linux Kernel image */
#define CONFIG_SPL_PAD_TO 12320
#define CONFIG_SPL_MAX_FOOTPRINT 12288
#ifndef CONFIG_SPL_BUILD

1
include/configs/coreboot.h
View File

@@ -56,6 +56,7 @@
#define CONFIG_SCSI_AHCI
#ifdef CONFIG_SCSI_AHCI
#define CONFIG_LIBATA
#define CONFIG_SYS_64BIT_LBA
#define CONFIG_SATA_INTEL 1
#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \

2
include/configs/exynos5250-dt.h
View File

@@ -13,7 +13,7 @@
#define CONFIG_SAMSUNG /* in a SAMSUNG core */
#define CONFIG_S5P /* S5P Family */
#define CONFIG_EXYNOS5 /* which is in a Exynos5 Family */
#define CONFIG_SMDK5250 /* which is in a SMDK5250 */
#define CONFIG_EXYNOS5250
#include <asm/arch/cpu.h> /* get chip and board defs */

1
include/configs/highbank.h
View File

@@ -39,6 +39,7 @@
#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
#define CONFIG_MISC_INIT_R
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5

10
include/configs/lwmon5.h
View File

@@ -565,6 +565,7 @@
#define CONFIG_SYS_GPIO_PHY1_RST 12
#define CONFIG_SYS_GPIO_FLASH_WP 14
#define CONFIG_SYS_GPIO_PHY0_RST 22
#define CONFIG_SYS_GPIO_PERM_VOLT_FEED 49
#define CONFIG_SYS_GPIO_DSPIC_READY 51
#define CONFIG_SYS_GPIO_CAN_ENABLE 53
#define CONFIG_SYS_GPIO_LSB_ENABLE 54
@@ -577,6 +578,13 @@
#define CONFIG_SYS_GPIO_SYSMON_STATUS 62
#define CONFIG_SYS_GPIO_WATCHDOG 63
/* On LCD4, GPIO49 has to be configured to 0 instead of 1 */
#ifdef CONFIG_LCD4_LWMON5
#define GPIO49_VAL 0
#else
#define GPIO49_VAL 1
#endif
/*
* PPC440 GPIO Configuration
*/
@@ -635,7 +643,7 @@
{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO46 UIC_IRQ(7) DMA_REQ(0) */ \
{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO47 UIC_IRQ(8) DMA_ACK(0) */ \
{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO48 UIC_IRQ(9) DMA_EOT/TC(0) */ \
{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO49 Unselect via TraceSelect Bit */ \
{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO49_VAL}, /* GPIO49 Unselect via TraceSelect Bit */ \
{GPIO1_BASE, GPIO_IN, GPIO_SEL , GPIO_OUT_0}, /* GPIO50 Unselect via TraceSelect Bit */ \
{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO51 Unselect via TraceSelect Bit */ \
{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO52 Unselect via TraceSelect Bit */ \

3
include/configs/s5p_goni.h
View File

@@ -29,6 +29,9 @@
/* DRAM Base */
#define CONFIG_SYS_SDRAM_BASE 0x30000000
/* Text Base */
#define CONFIG_SYS_TEXT_BASE 0x34800000
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG

5
include/configs/sandbox.h
View File

@@ -109,4 +109,9 @@
"stdout=serial\0" \
"stderr=serial\0"
#define CONFIG_GZIP_COMPRESSED
#define CONFIG_BZIP2
#define CONFIG_LZO
#define CONFIG_LZMA
#endif

3
include/configs/smdkc100.h
View File

@@ -34,6 +34,9 @@
/* DRAM Base */
#define CONFIG_SYS_SDRAM_BASE 0x30000000
/* Text Base */
#define CONFIG_SYS_TEXT_BASE 0x34800000
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG

12
include/linux/compiler-gcc.h
View File

@@ -50,7 +50,9 @@
#endif
#define __deprecated __attribute__((deprecated))
#define __packed __attribute__((packed))
#ifndef __packed
# define __packed __attribute__((packed))
#endif
#define __weak __attribute__((weak))
/*
@@ -73,8 +75,12 @@
* would be.
* [...]
*/
#define __pure __attribute__((pure))
#define __aligned(x) __attribute__((aligned(x)))
#ifndef __pure
# define __pure __attribute__((pure))
#endif
#ifndef __aligned
# define __aligned(x) __attribute__((aligned(x)))
#endif
#define __printf(a,b) __attribute__((format(printf,a,b)))
#define noinline __attribute__((noinline))
#define __attribute_const__ __attribute__((__const__))

4
include/linux/compiler-gcc4.h
View File

@@ -12,7 +12,9 @@
#define __used __attribute__((__used__))
#define __must_check __attribute__((warn_unused_result))
#define __compiler_offsetof(a,b) __builtin_offsetof(a,b)
#define __always_inline inline __attribute__((always_inline))
#ifndef __always_inline
# define __always_inline inline __attribute__((always_inline))
#endif
/*
* A trick to suppress uninitialized variable warning without generating any

26
include/power/max77686_pmic.h
View File

@@ -139,6 +139,32 @@ enum {
EN_LDO = (0x3 << 6),
};
enum {
OPMODE_OFF = 0,
OPMODE_STANDBY,
OPMODE_LPM,
OPMODE_ON,
};
int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV);
int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode);
int max77686_set_buck_mode(struct pmic *p, int buck, char opmode);
#define MAX77686_LDO_VOLT_MAX_HEX 0x3f
#define MAX77686_LDO_VOLT_MASK 0x3f
#define MAX77686_LDO_MODE_MASK 0xc0
#define MAX77686_LDO_MODE_OFF (0x00 << 0x06)
#define MAX77686_LDO_MODE_STANDBY (0x01 << 0x06)
#define MAX77686_LDO_MODE_LPM (0x02 << 0x06)
#define MAX77686_LDO_MODE_ON (0x03 << 0x06)
#define MAX77686_BUCK_MODE_MASK 0x03
#define MAX77686_BUCK_MODE_SHIFT_1 0x00
#define MAX77686_BUCK_MODE_SHIFT_2 0x04
#define MAX77686_BUCK_MODE_OFF 0x00
#define MAX77686_BUCK_MODE_STANDBY 0x01
#define MAX77686_BUCK_MODE_LPM 0x02
#define MAX77686_BUCK_MODE_ON 0x03
/* Buck1 1 volt value */
#define MAX77686_BUCK1OUT_1V 0x5
/* Buck1 1.05 volt value */