Convert CONFIG_SYS_DDR_RAW_TIMING to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_DDR_RAW_TIMING

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2022-06-15 12:03:55 -04:00
parent bca4509d57
commit c24e8e2bb3
55 changed files with 54 additions and 18 deletions

View File

@@ -109,7 +109,6 @@
#define CONFIG_L2_CACHE /* toggle L2 cache */
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
#define SPD_EEPROM_ADDRESS 0x52
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef

View File

@@ -129,7 +129,6 @@
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
#elif defined(CONFIG_TARGET_T1023RDB)
#define CONFIG_SYS_DDR_RAW_TIMING
#define CONFIG_SYS_SDRAM_SIZE 2048
#endif

View File

@@ -24,10 +24,6 @@
#define SPD_EEPROM_ADDRESS 0x51
#ifndef CONFIG_SYS_FSL_DDR4
#define CONFIG_SYS_DDR_RAW_TIMING
#endif
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE

View File

@@ -13,7 +13,6 @@
/* Physical Memory Map */
#ifndef CONFIG_SPL
#define CONFIG_SYS_DDR_RAW_TIMING
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif

View File

@@ -16,10 +16,6 @@
/* Link Definitions */
#ifndef CONFIG_SYS_FSL_DDR4
#define CONFIG_SYS_DDR_RAW_TIMING
#endif
#define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */
#define CONFIG_VERY_BIG_RAM

View File

@@ -115,7 +115,6 @@
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
#define SPD_EEPROM_ADDRESS 0x52
#if defined(CONFIG_TARGET_P1020RDB_PD)