From 402ef4d2447fee1d615c9689bc545e537d21e46f Mon Sep 17 00:00:00 2001 From: Francois Gervais Date: Wed, 8 Apr 2020 09:48:12 -0400 Subject: [PATCH 1/8] net: fm: fix build error when not using nand If CONFIG_CMD_NAND is disabled, get_nand_dev_by_index() is not accessible. This fix allows the build to succeed in this case. Signed-off-by: Francois Gervais Reviewed-by: Priyanka Jain --- drivers/net/fm/fm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 926cf81a07..7a081b9d03 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -360,6 +360,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) if (src == BOOT_SOURCE_IFC_NOR) { addr = (void *)(CONFIG_SYS_FMAN_FW_ADDR + CONFIG_SYS_FSL_IFC_BASE); +#ifdef CONFIG_CMD_NAND } else if (src == BOOT_SOURCE_IFC_NAND) { size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH; @@ -372,6 +373,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) printf("NAND read of FMAN firmware at offset 0x%x failed %d\n", CONFIG_SYS_FMAN_FW_ADDR, rc); } +#endif } else if (src == BOOT_SOURCE_QSPI_NOR) { struct spi_flash *ucode_flash; From 5706b9b56ec90cec0a33479f4743b56b5d457d75 Mon Sep 17 00:00:00 2001 From: Biwen Li Date: Tue, 24 Mar 2020 11:19:01 +0800 Subject: [PATCH 2/8] configs: ls1012afrwy: fix board name Fix board name for ls1012afrwy Signed-off-by: Biwen Li Reviewed-by: Priyanka Jain --- include/configs/ls1012afrwy.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index 899dfdbdf1..6143e9731e 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -72,6 +72,7 @@ "kernel_size=0x2800000\0" \ "kernelheader_size=0x40000\0" \ "console=ttyS0,115200\0" \ + "BOARD=ls1012afrwy\0" \ BOOTENV \ "boot_scripts=ls1012afrwy_boot.scr\0" \ "boot_script_hdr=hdr_ls1012afrwy_bs.out\0" \ @@ -103,20 +104,20 @@ "source ${scriptaddr}\0" \ "installer=load mmc 0:2 $load_addr " \ "/flex_installer_arm64.itb; " \ - "bootm $load_addr#$board\0" \ + "bootm $load_addr#$BOARD\0" \ "qspi_bootcmd=pfe stop; echo Trying load from qspi..;" \ "sf probe && sf read $load_addr " \ "$kernel_addr $kernel_size; env exists secureboot " \ "&& sf read $kernelheader_addr_r $kernelheader_addr " \ "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ - "bootm $load_addr#$board\0" \ + "bootm $load_addr#$BOARD\0" \ "sd_bootcmd=pfe stop; echo Trying load from sd card..;" \ "mmcinfo; mmc read $load_addr " \ "$kernel_addr_sd $kernel_size_sd ;" \ "env exists secureboot && mmc read $kernelheader_addr_r "\ "$kernelhdr_addr_sd $kernelhdr_size_sd " \ " && esbc_validate ${kernelheader_addr_r};" \ - "bootm $load_addr#$board\0" + "bootm $load_addr#$BOARD\0" #undef CONFIG_BOOTCOMMAND #ifdef CONFIG_TFABOOT From 3460a6bba1dfeb48e6006a73c1aa9a6ba53a526b Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sat, 11 Apr 2020 10:57:09 +0200 Subject: [PATCH 3/8] board: fsl: lx2160a: unused variable gic_lpi_base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If the board is configured without CONFIG_GIC_V3_ITS, an error occurs: board/freescale/lx2160a/lx2160a.c: In function ‘ft_board_setup’: board/freescale/lx2160a/lx2160a.c:673:6: error: unused variable ‘gic_lpi_base’ [-Werror=unused-variable] 673 | u64 gic_lpi_base; | ^~~~~~~~~~~~ Let's define the variable as __maybe_unused. Signed-off-by: Heinrich Schuchardt Reviewed-by: Priyanka Jain --- board/freescale/lx2160a/lx2160a.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c index 4b20bb440f..23ea1b6f16 100644 --- a/board/freescale/lx2160a/lx2160a.c +++ b/board/freescale/lx2160a/lx2160a.c @@ -670,7 +670,7 @@ int ft_board_setup(void *blob, bd_t *bd) u64 mc_memory_base = 0; u64 mc_memory_size = 0; u16 total_memory_banks; - u64 gic_lpi_base; + u64 __maybe_unused gic_lpi_base; ft_cpu_setup(blob, bd); From 316fc6ff762b44044ef164f51e042cb8a90dc147 Mon Sep 17 00:00:00 2001 From: Yinbo Zhu Date: Tue, 14 Apr 2020 17:24:48 +0800 Subject: [PATCH 4/8] armv8: ls1028a: define esdhc_status_fixup This patch is to define esdhc_status_fixup function for ls1028a to disable SDHC1/SDHC2 status in device tree node if not selected. Signed-off-by: Yinbo Zhu Signed-off-by: Xiaowei Bao Signed-off-by: Yangbo Lu Reviewed-by: Priyanka Jain --- .../asm/arch-fsl-layerscape/immap_lsch3.h | 5 +++ board/freescale/ls1028a/ls1028a.c | 40 +++++++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 299201b157..c2fbc23b11 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -232,7 +232,12 @@ #define DCFG_PORSR1 0x000 #define DCFG_PORSR1_RCW_SRC 0xff800000 #define DCFG_PORSR1_RCW_SRC_NOR 0x12f00000 +#define DCFG_RCWSR12 0x12c +#define DCFG_RCWSR12_SDHC_SHIFT 24 +#define DCFG_RCWSR12_SDHC_MASK 0x7 #define DCFG_RCWSR13 0x130 +#define DCFG_RCWSR13_SDHC_SHIFT 3 +#define DCFG_RCWSR13_SDHC_MASK 0x7 #define DCFG_RCWSR13_DSPI (0 << 8) #define DCFG_RCWSR15 0x138 #define DCFG_RCWSR15_IFCGRPABASE_QSPI 0x3 diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index aa93534ac6..0b7504aea1 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -135,6 +135,46 @@ void detail_board_ddr_info(void) print_ddr_info(0); } +int esdhc_status_fixup(void *blob, const char *compat) +{ + void __iomem *dcfg_ccsr = (void __iomem *)DCFG_BASE; + char esdhc1_path[] = "/soc/mmc@2140000"; + char esdhc2_path[] = "/soc/mmc@2150000"; + char dspi1_path[] = "/soc/spi@2100000"; + char dspi2_path[] = "/soc/spi@2110000"; + u32 mux_sdhc1, mux_sdhc2; + u32 io = 0; + + /* + * The PMUX IO-expander for mux select is used to control + * the muxing of various onboard interfaces. + */ + + io = in_le32(dcfg_ccsr + DCFG_RCWSR12); + mux_sdhc1 = (io >> DCFG_RCWSR12_SDHC_SHIFT) & DCFG_RCWSR12_SDHC_MASK; + + /* Disable esdhc1/dspi1 if not selected. */ + if (mux_sdhc1 != 0) + do_fixup_by_path(blob, esdhc1_path, "status", "disabled", + sizeof("disabled"), 1); + if (mux_sdhc1 != 2) + do_fixup_by_path(blob, dspi1_path, "status", "disabled", + sizeof("disabled"), 1); + + io = in_le32(dcfg_ccsr + DCFG_RCWSR13); + mux_sdhc2 = (io >> DCFG_RCWSR13_SDHC_SHIFT) & DCFG_RCWSR13_SDHC_MASK; + + /* Disable esdhc2/dspi2 if not selected. */ + if (mux_sdhc2 != 0) + do_fixup_by_path(blob, esdhc2_path, "status", "disabled", + sizeof("disabled"), 1); + if (mux_sdhc2 != 2) + do_fixup_by_path(blob, dspi2_path, "status", "disabled", + sizeof("disabled"), 1); + + return 0; +} + #ifdef CONFIG_OF_BOARD_SETUP int ft_board_setup(void *blob, bd_t *bd) { From 5d3bcdb12fc48421573e1cef5c260643337bfada Mon Sep 17 00:00:00 2001 From: Florinel Iordache Date: Mon, 16 Mar 2020 15:35:59 +0200 Subject: [PATCH 5/8] phy: add support for backplane kr mode Add generic support for backplane kr modes currently available: 10gbase-kr, 40gbase-kr4. Remove platform generic fixups (armv8/layerscape and powerpc) for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by: Florinel Iordache Reviewed-by: Priyanka Jain --- arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 9 +++++++++ arch/powerpc/cpu/mpc8xxx/fdt.c | 9 +++++++++ include/phy_interface.h | 23 +++++++++++++++++++++++ 3 files changed, 41 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c index 87c3e05f45..077438765c 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2014-2015 Freescale Semiconductor, Inc. + * Copyright 2020 NXP */ #include @@ -31,6 +32,14 @@ int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) { + const char *conn; + + /* Do NOT apply fixup for backplane modes specified in DT */ + if (phyc == PHY_INTERFACE_MODE_XGMII) { + conn = fdt_getprop(blob, offset, "phy-connection-type", NULL); + if (is_backplane_mode(conn)) + return 0; + } return fdt_setprop_string(blob, offset, "phy-connection-type", phy_string_for_interface(phyc)); } diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 485c2d4feb..67f8b10001 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2009-2014 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains @@ -76,6 +77,14 @@ void ft_fixup_num_cores(void *blob) { int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc) { + const char *conn; + + /* Do NOT apply fixup for backplane modes specified in DT */ + if (phyc == PHY_INTERFACE_MODE_XGMII) { + conn = fdt_getprop(blob, offset, "phy-connection-type", NULL); + if (is_backplane_mode(conn)) + return 0; + } return fdt_setprop_string(blob, offset, "phy-connection-type", phy_string_for_interface(phyc)); } diff --git a/include/phy_interface.h b/include/phy_interface.h index 31ca72a81f..882e4af8ff 100644 --- a/include/phy_interface.h +++ b/include/phy_interface.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * Andy Fleming * * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h @@ -67,6 +68,15 @@ static const char * const phy_interface_strings[] = { [PHY_INTERFACE_MODE_NONE] = "", }; +/* Backplane modes: + * are considered a sub-type of phy_interface_t: XGMII + * and are specified in "phy-connection-type" with one of the following strings + */ +static const char * const backplane_mode_strings[] = { + "10gbase-kr", + "40gbase-kr4", +}; + static inline const char *phy_string_for_interface(phy_interface_t i) { /* Default to unknown */ @@ -76,4 +86,17 @@ static inline const char *phy_string_for_interface(phy_interface_t i) return phy_interface_strings[i]; } +static inline bool is_backplane_mode(const char *phyconn) +{ + int i; + + if (!phyconn) + return false; + for (i = 0; i < ARRAY_SIZE(backplane_mode_strings); i++) { + if (!strcmp(phyconn, backplane_mode_strings[i])) + return true; + } + return false; +} + #endif /* _PHY_INTERFACE_H */ From d698112fd668ca076d469ab50f4d64f42fb995b9 Mon Sep 17 00:00:00 2001 From: Florinel Iordache Date: Mon, 16 Mar 2020 15:36:00 +0200 Subject: [PATCH 6/8] ls1046aqds: add support for backplane kr Add support for backplane kr on ls1046aqds: remove board specific fixups on ls1046aqds for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by: Florinel Iordache Reviewed-by: Priyanka Jain --- board/freescale/ls1046aqds/eth.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c index 1eb40677b5..1d40e8bd17 100644 --- a/board/freescale/ls1046aqds/eth.c +++ b/board/freescale/ls1046aqds/eth.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP */ #include @@ -154,9 +154,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, enum fm_port port, int offset) { struct fixed_link f_link; - const u32 *handle; - const char *prop = NULL; - int off; + const char *phyconn; if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { switch (port) { @@ -212,14 +210,11 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, "qsgmii"); } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_XGMII && (port == FM1_10GEC1 || port == FM1_10GEC2)) { - handle = fdt_getprop(fdt, offset, "phy-handle", NULL); - prop = NULL; - if (handle) { - off = fdt_node_offset_by_phandle(fdt, - fdt32_to_cpu(*handle)); - prop = fdt_getprop(fdt, off, "backplane-mode", NULL); - } - if (!prop || strcmp(prop, "10gbase-kr")) { + phyconn = fdt_getprop(fdt, offset, "phy-connection-type", NULL); + if (is_backplane_mode(phyconn)) { + /* Backplane KR mode: skip fixups */ + printf("Interface %d in backplane KR mode\n", port); + } else { /* XFI interface */ f_link.phy_id = cpu_to_fdt32(port); f_link.duplex = cpu_to_fdt32(1); From d4694ad86a330a1eb5e78c7a3784c5388eee1435 Mon Sep 17 00:00:00 2001 From: Florinel Iordache Date: Mon, 16 Mar 2020 15:36:01 +0200 Subject: [PATCH 7/8] lx2160aqds: add support for backplane kr Add support for backplane kr on lx2160aqds: remove board specific fixups on lx2160aqds for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by: Florinel Iordache Reviewed-by: Priyanka Jain --- board/freescale/lx2160a/eth_lx2160aqds.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c b/board/freescale/lx2160a/eth_lx2160aqds.c index 6500649d7b..0e928ebd86 100644 --- a/board/freescale/lx2160a/eth_lx2160aqds.c +++ b/board/freescale/lx2160a/eth_lx2160aqds.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2018-2019 NXP + * Copyright 2018-2020 NXP * */ @@ -616,6 +616,13 @@ int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle) return offset; } + phy_string = fdt_getprop(fdt, offset, "phy-connection-type", NULL); + if (is_backplane_mode(phy_string)) { + /* Backplane KR mode: skip fixups */ + printf("Interface %d in backplane KR mode\n", dpmac_id); + return 0; + } + ret = fdt_appendprop_cell(fdt, offset, "phy-handle", node_phandle); if (ret) printf("%d@%s %d\n", __LINE__, __func__, ret); From e174fb7061e7a3f1996f57eb36525c51dd87b5a3 Mon Sep 17 00:00:00 2001 From: Florinel Iordache Date: Mon, 16 Mar 2020 15:36:02 +0200 Subject: [PATCH 8/8] t208xqds: add support for backplane kr Add support for backplane kr on t208xqds: remove board specific fixups on t208xqds for ethernet interfaces specified in device tree as supported backplane modes. Signed-off-by: Florinel Iordache Reviewed-by: Priyanka Jain --- board/freescale/t208xqds/eth_t208xqds.c | 29 +++++++++++++++++-------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c index 23b59bcc09..697c23b038 100644 --- a/board/freescale/t208xqds/eth_t208xqds.c +++ b/board/freescale/t208xqds/eth_t208xqds.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2013 Freescale Semiconductor, Inc. + * Copyright 2020 NXP * * Shengzhou Liu */ @@ -200,6 +201,7 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, char buf[32] = "serdes-1,"; struct fixed_link f_link; int media_type = 0; + const char *phyconn; int off; ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); @@ -412,15 +414,24 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, } if (!media_type) { - /* fixed-link is used for XFI fiber cable */ - f_link.phy_id = port; - f_link.duplex = 1; - f_link.link_speed = 10000; - f_link.pause = 0; - f_link.asym_pause = 0; - fdt_delprop(fdt, offset, "phy-handle"); - fdt_setprop(fdt, offset, "fixed-link", &f_link, - sizeof(f_link)); + phyconn = fdt_getprop(fdt, offset, + "phy-connection-type", + NULL); + if (is_backplane_mode(phyconn)) { + /* Backplane KR mode: skip fixups */ + printf("Interface %d in backplane KR mode\n", + port); + } else { + /* fixed-link for XFI fiber cable */ + f_link.phy_id = port; + f_link.duplex = 1; + f_link.link_speed = 10000; + f_link.pause = 0; + f_link.asym_pause = 0; + fdt_delprop(fdt, offset, "phy-handle"); + fdt_setprop(fdt, offset, "fixed-link", + &f_link, sizeof(f_link)); + } } else { /* set property for copper cable */ off = fdt_node_offset_by_compat_reg(fdt,