Merge tag 'xilinx-for-v2020.04-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx fixes for v2020.04-rc4 - Fix link good bit handling in dp83867 - Rename generic Zynq defconfig - Fix zybo z7 low leve setup - Fix error path in zynq_gem driver and fix 64bit usage - Fix invalid clock name quieries for Versal - Fix zynq/zynqmp SPL low level configuration via DT selection
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@@ -41,8 +41,6 @@
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# define CONFIG_BOOTP_MAY_FAIL
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#endif
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/* QSPI */
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/* NOR */
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#ifdef CONFIG_MTD_NOR_FLASH
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# define CONFIG_SYS_FLASH_BASE 0xE2000000
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