Merge with /home/hs/TQ/u-boot-dev
This commit is contained in:
@@ -49,6 +49,10 @@
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_GET_CPU_STR_F)
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extern int get_cpu_str_f (char *buf);
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#endif
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int checkcpu (void)
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{
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volatile immap_t *immap = (immap_t *) CFG_IMMR;
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@@ -81,7 +85,12 @@ int checkcpu (void)
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if ((immr & IMMR_ISB_MSK) != CFG_IMMR)
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return -1; /* whoops! someone moved the IMMR */
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#if defined(CONFIG_GET_CPU_STR_F)
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get_cpu_str_f (buf);
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printf ("%s (HiP%d Rev %02x, Mask ", buf, k, rev);
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#else
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printf (CPU_ID_STR " (HiP%d Rev %02x, Mask ", k, rev);
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#endif
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/*
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* the bottom 16 bits of the immr are the Part Number and Mask Number
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@@ -28,6 +28,10 @@
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_BOARD_GET_CPU_CLK_F)
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extern unsigned long board_get_cpu_clk_f (void);
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#endif
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static void config_8260_ioports (volatile immap_t * immr)
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{
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int portnum;
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@@ -90,6 +94,7 @@ static void config_8260_ioports (volatile immap_t * immr)
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}
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}
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#define SET_VAL_MASK(a, b, mask) ((a & mask) | (b & ~mask))
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/*
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* Breath some life into the CPU...
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*
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@@ -101,6 +106,9 @@ void cpu_init_f (volatile immap_t * immr)
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{
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#if !defined(CONFIG_COGENT) /* done in start.S for the cogent */
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uint sccr;
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#endif
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#if defined(CONFIG_BOARD_GET_CPU_CLK_F)
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unsigned long cpu_clk;
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#endif
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volatile memctl8260_t *memctl = &immr->im_memctl;
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extern void m8260_cpm_reset (void);
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@@ -119,10 +127,27 @@ void cpu_init_f (volatile immap_t * immr)
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immr->im_clkrst.car_rmr = CFG_RMR;
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/* BCR - Bus Configuration Register (4-25) */
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#if defined(CFG_BCR_60x) && (CFG_BCR_SINGLE)
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if (immr->im_siu_conf.sc_bcr & BCR_EBM) {
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immr->im_siu_conf.sc_bcr = CFG_BCR_60x;
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} else {
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immr->im_siu_conf.sc_bcr = CFG_BCR_SINGLE;
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}
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#else
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immr->im_siu_conf.sc_bcr = CFG_BCR;
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#endif
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/* SIUMCR - contains debug pin configuration (4-31) */
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#if defined(CFG_SIUMCR_LOW) && (CFG_SIUMCR_HIGH)
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cpu_clk = board_get_cpu_clk_f ();
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if (cpu_clk >= 100000000) {
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immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_HIGH;
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} else {
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immr->im_siu_conf.sc_siumcr = CFG_SIUMCR_LOW;
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}
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#else
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immr->im_siu_conf.sc_siumcr = CFG_SIUMCR;
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#endif
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config_8260_ioports (immr);
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@@ -157,7 +182,8 @@ void cpu_init_f (volatile immap_t * immr)
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#endif
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/* now restrict to preliminary range */
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memctl->memc_br0 = CFG_BR0_PRELIM;
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/* the PS came from the HRCW, don´t change it */
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memctl->memc_br0 = SET_VAL_MASK(memctl->memc_br0 , CFG_BR0_PRELIM, BRx_PS_MSK);
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memctl->memc_or0 = CFG_OR0_PRELIM;
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#if defined(CFG_BR1_PRELIM) && defined(CFG_OR1_PRELIM)
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@@ -274,7 +274,23 @@ void pci_mpc8250_init (struct pci_controller *hose)
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| SIUMCR_CS10PC00
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| SIUMCR_BCTLC00
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| SIUMCR_MMR11;
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#elif defined(CONFIG_TQM8272)
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#if 0
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immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr &
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~SIUMCR_LBPC11 &
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~SIUMCR_CS10PC11 &
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~SIUMCR_LBPC11) |
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SIUMCR_LBPC01 |
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SIUMCR_CS10PC01 |
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SIUMCR_APPC10;
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#else
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#if 0
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immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr |
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SIUMCR_APPC10);
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#else
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immap->im_siu_conf.sc_siumcr = 0x88000000;
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#endif
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#endif
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#else
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/*
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* Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
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@@ -288,6 +304,7 @@ void pci_mpc8250_init (struct pci_controller *hose)
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SIUMCR_CS10PC01 |
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SIUMCR_APPC10;
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#endif
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printf("%s siumcr: %x\n", __FUNCTION__, immap->im_siu_conf.sc_siumcr);
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/* Make PCI lowest priority */
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/* Each 4 bits is a device bus request and the MS 4bits
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@@ -25,6 +25,10 @@
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#include <mpc8260.h>
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#include <asm/processor.h>
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#if defined(CONFIG_BOARD_GET_CPU_CLK_F)
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extern unsigned long board_get_cpu_clk_f (void);
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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@@ -111,8 +115,12 @@ int get_clocks (void)
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#if !defined(CONFIG_8260_CLKIN)
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#error clock measuring not implemented yet - define CONFIG_8260_CLKIN
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#else
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#if defined(CONFIG_BOARD_GET_CPU_CLK_F)
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clkin = board_get_cpu_clk_f ();
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#else
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clkin = CONFIG_8260_CLKIN;
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#endif
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#endif
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sccr = immap->im_clkrst.car_sccr;
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@@ -156,7 +156,7 @@ void board_nand_select_device(struct nand_chip *nand, int chip)
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out32(base + NDFC_CCR, 0x00000000 | (cs << 24));
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}
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void board_nand_init(struct nand_chip *nand)
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int board_nand_init(struct nand_chip *nand)
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{
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int cs = (ulong)nand->IO_ADDR_W & 0x00000003;
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ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc;
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@@ -188,6 +188,7 @@ void board_nand_init(struct nand_chip *nand)
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*/
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board_nand_select_device(nand, cs);
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out32(base + NDFC_BCFG0 + (cs << 2), 0x80002222);
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return 0;
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}
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#endif
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