treewide: move CONFIG_PHYS_64BIT to Kconfig

We need to ensure that CONFIG_PHYS_64BIT is configured via Kconfig so
that it is always available to the build system.  Otherwise we can run
into cases where we have inconsistent sizes of certain attributes.

Ravi Babu reported offset mismatch of struct dwc3 across files since
commit 95ebc253e6 ("types.h: move and redefine resource_size_t").
Since the commit, resource_addr_t points to phys_addr_t, whose size
is dependent on CONFIG_PHYS_64BIT for ARM architecture.

I tried my best to use "select" where possible (for example, ARMv8
architecture) because I think this kind of option is generally user-
unconfigurable.  However, I see some of PowerPC boards have 36BIT
defconfigs as well as 32BIT ones.  I moved CONFIG_PHYS_64BIT to the
defconfigs for such boards.

CONFIG_36BIT is no longer referenced, so all of the defines were
removed from CONFIG_SYS_EXTRA_OPTIONS.

Fixes: 95ebc253e6 ("types.h: move and redefine resource_size_t")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Ravi Babu <ravibabu@ti.com>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Masahiro Yamada
2016-07-25 19:56:03 +09:00
committed by Tom Rini
parent 9ab0296a82
commit bb6b142fc1
81 changed files with 119 additions and 104 deletions

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@@ -13,7 +13,6 @@
* B4860 QDS board configuration file
*/
#define CONFIG_B4860QDS
#define CONFIG_PHYS_64BIT
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg

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@@ -11,7 +11,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_PHYS_64BIT
#define CONFIG_DISPLAY_BOARDINFO
#ifdef CONFIG_C29XPCIE

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@@ -14,10 +14,6 @@
#define CONFIG_DISPLAY_BOARDINFO
#include "../board/freescale/common/ics307_clk.h"
#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT 1
#endif
#ifdef CONFIG_SDCARD
#define CONFIG_RAMBOOT_SDCARD 1
#define CONFIG_SYS_TEXT_BASE 0xf8f40000

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@@ -15,10 +15,6 @@
#define CONFIG_DISPLAY_BOARDINFO
#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT
#endif
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
#define CONFIG_E500 1 /* BOOKE e500 family */

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@@ -15,10 +15,6 @@
#include "../board/freescale/common/ics307_clk.h"
#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT
#endif
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xeff40000
#endif

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@@ -23,7 +23,6 @@
#define CONFIG_MPC8641HPCN 1 /* MPC8641HPCN board specific */
#define CONFIG_MP 1 /* support multiple processors */
#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
/*#define CONFIG_PHYS_64BIT 1*/ /* Place devices in 36-bit space */
#define CONFIG_ADDR_MAP 1 /* Use addr map */
/*

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@@ -11,9 +11,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT
#endif
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_P1010

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@@ -13,10 +13,6 @@
#define CONFIG_DISPLAY_BOARDINFO
#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT
#endif
#ifdef CONFIG_SDCARD
#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT

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@@ -12,7 +12,6 @@
#define __CONFIG_H
#define CONFIG_P2041RDB
#define CONFIG_PHYS_64BIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_PPC_P2041

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@@ -9,7 +9,6 @@
*
*/
#define CONFIG_P3041DS
#define CONFIG_PHYS_64BIT
#define CONFIG_PPC_P3041
#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */

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@@ -9,7 +9,6 @@
* Also supports P4040 DS
*/
#define CONFIG_P4080DS
#define CONFIG_PHYS_64BIT
#define CONFIG_PPC_P4080
#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */

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@@ -9,7 +9,6 @@
* Also supports P5010 DS
*/
#define CONFIG_P5020DS
#define CONFIG_PHYS_64BIT
#define CONFIG_PPC_P5020
#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */

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@@ -9,7 +9,6 @@
*
*/
#define CONFIG_P5040DS
#define CONFIG_PHYS_64BIT
#define CONFIG_PPC_P5040
#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */

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@@ -18,7 +18,6 @@
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
#define CONFIG_PHYS_64BIT
#define CONFIG_ENABLE_36BIT_PHYS
#ifdef CONFIG_PHYS_64BIT

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@@ -18,7 +18,6 @@
#define CONFIG_E500MC /* BOOKE e500mc family */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
#define CONFIG_MP /* support multiple processors */
#define CONFIG_PHYS_64BIT
#define CONFIG_ENABLE_36BIT_PHYS
#ifdef CONFIG_PHYS_64BIT

View File

@@ -27,7 +27,6 @@
* T1040 QDS board configuration file
*/
#define CONFIG_T1040QDS
#define CONFIG_PHYS_64BIT
#define CONFIG_DISPLAY_BOARDINFO
#ifdef CONFIG_RAMBOOT_PBL

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@@ -11,7 +11,6 @@
* T104x RDB board configuration file
*/
#define CONFIG_T104xRDB
#define CONFIG_PHYS_64BIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_E500 /* BOOKE e500 family */

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@@ -26,7 +26,6 @@
#endif
/* High Level Configuration Options */
#define CONFIG_PHYS_64BIT
#define CONFIG_BOOKE
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */

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@@ -19,7 +19,6 @@
#define CONFIG_FSL_SATA_V2
/* High Level Configuration Options */
#define CONFIG_PHYS_64BIT
#define CONFIG_BOOKE
#define CONFIG_E500 /* BOOKE e500 family */
#define CONFIG_E500MC /* BOOKE e500mc family */

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@@ -11,7 +11,6 @@
#define __CONFIG_H
#define CONFIG_T4240QDS
#define CONFIG_PHYS_64BIT
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE4

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@@ -11,7 +11,6 @@
#define __CONFIG_H
#define CONFIG_T4240RDB
#define CONFIG_PHYS_64BIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_FSL_SATA_V2

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@@ -26,10 +26,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT
#endif
#ifdef CONFIG_SDCARD
#define CONFIG_RAMBOOT_SDCARD
#endif

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@@ -11,8 +11,6 @@
#define CONFIG_CYRUS
#define CONFIG_PHYS_64BIT
#if !defined(CONFIG_PPC_P5020) && !defined(CONFIG_PPC_P5040)
#error Must call Cyrus CONFIG with a specific CPU enabled.
#endif

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@@ -20,7 +20,6 @@
#endif
#define CONFIG_VERY_BIG_RAM
#define CONFIG_PHYS_64BIT
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_MAX_MEM_MAPPED 0x80000000

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@@ -29,7 +29,6 @@
/*
* Enable this board for more than 2GB of SDRAM
*/
#define CONFIG_PHYS_64BIT
#define CONFIG_VERY_BIG_RAM
/*

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@@ -8,7 +8,6 @@
#ifndef _CONFIG_KMP204X_H
#define _CONFIG_KMP204X_H
#define CONFIG_PHYS_64BIT
#define CONFIG_PPC_P2041
#define CONFIG_SYS_TEXT_BASE 0xfff40000

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@@ -12,10 +12,6 @@
#define CONFIG_DISPLAY_BOARDINFO
#ifdef CONFIG_36BIT
#define CONFIG_PHYS_64BIT
#endif
#if defined(CONFIG_P1020MBG)
#define CONFIG_BOARDNAME "P1020MBG-PC"
#define CONFIG_P1020

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@@ -56,8 +56,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
#endif
#define CONFIG_PHYS_64BIT
/* Virtual address range for PCI region maps */
#define CONFIG_SYS_PCI_MAP_START 0x80000000
#define CONFIG_SYS_PCI_MAP_END 0xe8000000