Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
This commit is contained in:
Tom Rini
@@ -38,7 +38,7 @@
|
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#define CONFIG_MCFUART
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#define CONFIG_SYS_UART_PORT (0)
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#define CONFIG_BAUDRATE 9600
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#define CONFIG_BAUDRATE 115200
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#undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */
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@@ -52,20 +52,24 @@
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#define CONFIG_RESET_TO_RETRY
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_HW_WATCHDOG
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#define CONFIG_STATUS_LED
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#define CONFIG_BOARD_SPECIFIC_LED
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#define STATUS_LED_ACTIVE 0
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#define STATUS_LED_BIT 0x0008 /* Timer7 GPIO */
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#define STATUS_LED_BOOT 0
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#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
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#define STATUS_LED_STATE STATUS_LED_OFF
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/*----------------------------------------------------------------------*
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* Configuration for environment *
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* Environment is in the second sector of the first 256k of flash *
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*----------------------------------------------------------------------*/
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#ifndef CONFIG_MONITOR_IS_IN_RAM
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#define CONFIG_ENV_ADDR 0xF003C000 /* End of 256K */
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#define CONFIG_ENV_SECT_SIZE 0x4000
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#define CONFIG_ENV_ADDR 0xFF040000
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#define CONFIG_ENV_SECT_SIZE 0x00020000
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#define CONFIG_ENV_IS_IN_FLASH 1
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#else
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#define CONFIG_ENV_ADDR 0xFFE04000
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#define CONFIG_ENV_SECT_SIZE 0x2000
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#define CONFIG_ENV_IS_IN_FLASH 1
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#endif
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/*
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* BOOTP options
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@@ -78,26 +82,24 @@
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMDLINE_EDITING
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_LOADB
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_I2C
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#define CONFIG_CMD_LED
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_NET
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#define CONFIG_MCFTMR
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_PROMPT "\nEB+CPU5282> "
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#define CONFIG_SYS_LONGHELP 1
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||||
|
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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@@ -112,12 +114,12 @@
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/*----------------------------------------------------------------------*
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* Clock and PLL Configuration *
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*----------------------------------------------------------------------*/
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#define CONFIG_SYS_HZ 10000000
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#define CONFIG_SYS_CLK 58982400 /* 9,8304MHz * 6 */
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_CLK 80000000 /* 8MHz * 8 */
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/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
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/* PLL Configuration: Ext Clock * 8 (see table 9-4 of MCF user manual) */
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||||
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||||
#define CONFIG_SYS_MFD 0x01 /* PLL Multiplication Factor Devider */
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#define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */
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#define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
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||||
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/*----------------------------------------------------------------------*
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||||
@@ -135,7 +137,6 @@
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#define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
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#define MCFFEC_TOUT_LOOP 50000
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||||
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||||
#define CONFIG_ETHADDR 00:CF:52:82:EB:01
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#define CONFIG_OVERWRITE_ETHADDR_ONCE
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/*-------------------------------------------------------------------------
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||||
@@ -151,7 +152,7 @@
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||||
*-----------------------------------------------------------------------*/
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||||
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||||
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
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||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
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||||
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
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||||
#define CONFIG_SYS_GBL_DATA_OFFSET \
|
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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||||
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
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||||
@@ -161,12 +162,11 @@
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||||
* (Set up by the startup code)
|
||||
* Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
|
||||
*/
|
||||
#define CONFIG_SYS_SDRAM_BASE1 0x00000000
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||||
#define CONFIG_SYS_SDRAM_SIZE1 16 /* SDRAM size in MB */
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#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE1
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#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE1
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#define CONFIG_SYS_SDRAM_BASE0 0x00000000
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||||
#define CONFIG_SYS_SDRAM_SIZE0 16 /* SDRAM size in MB */
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#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0
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#define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0
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|
||||
/* If M5282 port is fully implemented the monitor base will be behind
|
||||
* the vector table. */
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||||
@@ -190,16 +190,24 @@
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/*-----------------------------------------------------------------------
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* FLASH organization
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||||
*/
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||||
#define CONFIG_FLASH_SHOW_PROGRESS 45
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||||
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||||
#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
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#define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
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#define CONFIG_SYS_INT_FLASH_ENABLE 0x21
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||||
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#define CONFIG_SYS_MAX_FLASH_SECT 35
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#define CONFIG_SYS_MAX_FLASH_BANKS 2
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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||||
#define CONFIG_SYS_MAX_FLASH_BANKS 1
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||||
#define CONFIG_SYS_FLASH_ERASE_TOUT 10000000
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||||
#define CONFIG_SYS_FLASH_PROTECTION
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||||
#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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||||
#define CONFIG_SYS_FLASH_SIZE 16*1024*1024
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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||||
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||||
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
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||||
|
||||
/*-----------------------------------------------------------------------
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||||
* Cache Configuration
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*/
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||||
@@ -221,12 +229,16 @@
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* Memory bank definitions
|
||||
*/
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||||
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||||
#define CONFIG_SYS_CS0_BASE 0xFFE00000
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||||
#define CONFIG_SYS_CS0_BASE 0xFF000000
|
||||
#define CONFIG_SYS_CS0_CTRL 0x00001980
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||||
#define CONFIG_SYS_CS0_MASK 0x001F0001
|
||||
#define CONFIG_SYS_CS0_MASK 0x00FF0001
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||||
|
||||
#define CONFIG_SYS_CS3_BASE 0xE0000000
|
||||
#define CONFIG_SYS_CS0_CTRL 0x00001980
|
||||
#define CONFIG_SYS_CS2_BASE 0xE0000000
|
||||
#define CONFIG_SYS_CS2_CTRL 0x00001980
|
||||
#define CONFIG_SYS_CS2_MASK 0x000F0001
|
||||
|
||||
#define CONFIG_SYS_CS3_BASE 0xE0100000
|
||||
#define CONFIG_SYS_CS3_CTRL 0x00001980
|
||||
#define CONFIG_SYS_CS3_MASK 0x000F0001
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||||
|
||||
/*-----------------------------------------------------------------------
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||||
@@ -248,11 +260,30 @@
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||||
#define CONFIG_SYS_PCDDR 0x0000000
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||||
#define CONFIG_SYS_PCDAT 0x0000000
|
||||
|
||||
#define CONFIG_SYS_PASPAR 0x0F0F
|
||||
#define CONFIG_SYS_PEHLPAR 0xC0
|
||||
#define CONFIG_SYS_PUAPAR 0x0F
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||||
#define CONFIG_SYS_DDRUA 0x05
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||||
#define CONFIG_SYS_PJPAR 0xFF
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* I2C
|
||||
*/
|
||||
|
||||
#define CONFIG_HARD_I2C
|
||||
#define CONFIG_FSL_I2C
|
||||
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x00000300
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||||
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
|
||||
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||||
#define CONFIG_SYS_I2C_SPEED 100000
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||||
#define CONFIG_SYS_I2C_SLAVE 0
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||||
|
||||
#ifdef CONFIG_CMD_DATE
|
||||
#define CONFIG_RTC_DS1338
|
||||
#define CONFIG_I2C_RTC_ADDR 0x68
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* VIDEO configuration
|
||||
*/
|
||||
@@ -260,12 +291,11 @@
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#define CONFIG_VIDEO
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_VCXK 1
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#define CONFIG_VIDEO_VCXK 1
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||||
#define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2
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#define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1
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#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS3_BASE
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||||
#define CONFIG_SYS_VCXK_AUTODETECT 1
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||||
#define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS2_BASE
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||||
#define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
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#define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
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@@ -72,9 +72,9 @@
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#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
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/* PMIC Controller */
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#define CONFIG_PMIC
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#define CONFIG_PMIC_SPI
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#define CONFIG_PMIC_FSL
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#define CONFIG_POWER
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#define CONFIG_POWER_SPI
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#define CONFIG_POWER_FSL
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#define CONFIG_FSL_PMIC_BUS 1
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#define CONFIG_FSL_PMIC_CS 0
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#define CONFIG_FSL_PMIC_CLK 1000000
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@@ -68,9 +68,9 @@
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#define CONFIG_MXC_GPIO
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/* PMIC Controller */
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#define CONFIG_PMIC
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#define CONFIG_PMIC_SPI
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#define CONFIG_PMIC_FSL
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#define CONFIG_POWER
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#define CONFIG_POWER_SPI
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#define CONFIG_POWER_FSL
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#define CONFIG_FSL_PMIC_BUS 1
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#define CONFIG_FSL_PMIC_CS 0
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#define CONFIG_FSL_PMIC_CLK 1000000
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@@ -69,9 +69,9 @@
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#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
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||||
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||||
/* PMIC Controller */
|
||||
#define CONFIG_PMIC
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#define CONFIG_PMIC_SPI
|
||||
#define CONFIG_PMIC_FSL
|
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#define CONFIG_POWER
|
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#define CONFIG_POWER_SPI
|
||||
#define CONFIG_POWER_FSL
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#define CONFIG_FSL_PMIC_BUS 1
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#define CONFIG_FSL_PMIC_CS 2
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#define CONFIG_FSL_PMIC_CLK 1000000
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@@ -65,9 +65,9 @@
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/*
|
||||
* PMIC Configs
|
||||
*/
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_I2C
|
||||
#define CONFIG_PMIC_FSL
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_POWER_FSL
|
||||
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
|
||||
#define CONFIG_RTC_MC13XXX
|
||||
|
||||
|
||||
@@ -127,9 +127,9 @@
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||||
#endif
|
||||
|
||||
/* SPI PMIC */
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_SPI
|
||||
#define CONFIG_PMIC_FSL
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_SPI
|
||||
#define CONFIG_POWER_FSL
|
||||
#define CONFIG_FSL_PMIC_BUS 0
|
||||
#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
|
||||
#define CONFIG_FSL_PMIC_CLK 25000000
|
||||
|
||||
@@ -69,9 +69,9 @@
|
||||
#define CONFIG_MXC_SPI
|
||||
|
||||
/* PMIC Controller */
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_SPI
|
||||
#define CONFIG_PMIC_FSL
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_SPI
|
||||
#define CONFIG_POWER_FSL
|
||||
#define CONFIG_FSL_PMIC_BUS 0
|
||||
#define CONFIG_FSL_PMIC_CS 0
|
||||
#define CONFIG_FSL_PMIC_CLK 2500000
|
||||
|
||||
@@ -55,9 +55,9 @@
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
|
||||
/* PMIC Configs */
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_I2C
|
||||
#define CONFIG_PMIC_FSL
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_POWER_FSL
|
||||
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8
|
||||
#define CONFIG_RTC_MC13XXX
|
||||
|
||||
|
||||
@@ -89,10 +89,10 @@
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
|
||||
/* PMIC Controller */
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_I2C
|
||||
#define CONFIG_DIALOG_PMIC
|
||||
#define CONFIG_PMIC_FSL
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_DIALOG_POWER
|
||||
#define CONFIG_POWER_FSL
|
||||
#define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
|
||||
#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
|
||||
|
||||
|
||||
@@ -58,9 +58,9 @@
|
||||
#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
|
||||
#define CONFIG_RTC_MC13XXX
|
||||
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_SPI
|
||||
#define CONFIG_PMIC_FSL
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_SPI
|
||||
#define CONFIG_POWER_FSL
|
||||
#define CONFIG_FSL_PMIC_BUS 1
|
||||
#define CONFIG_FSL_PMIC_CS 0
|
||||
#define CONFIG_FSL_PMIC_CLK 100000
|
||||
|
||||
@@ -215,9 +215,9 @@
|
||||
|
||||
#define CONFIG_SYS_CACHELINE_SIZE 64
|
||||
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_I2C
|
||||
#define CONFIG_PMIC_MAX8998
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_POWER_MAX8998
|
||||
|
||||
#include <asm/arch/gpio.h>
|
||||
/*
|
||||
|
||||
@@ -253,9 +253,9 @@
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_MAX_I2C_BUS 7
|
||||
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_I2C
|
||||
#define CONFIG_PMIC_MAX8998
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_POWER_MAX8998
|
||||
|
||||
#define CONFIG_USB_GADGET
|
||||
#define CONFIG_USB_GADGET_S3C_UDC_OTG
|
||||
|
||||
@@ -234,10 +234,16 @@
|
||||
#define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
|
||||
#define I2C_INIT multi_i2c_init()
|
||||
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_I2C
|
||||
#define CONFIG_PMIC_MAX8997
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_I2C
|
||||
#define CONFIG_POWER_MAX8997
|
||||
|
||||
#define CONFIG_POWER_FG
|
||||
#define CONFIG_POWER_FG_MAX17042
|
||||
#define CONFIG_POWER_MUIC
|
||||
#define CONFIG_POWER_MUIC_MAX8997
|
||||
#define CONFIG_POWER_BATTERY
|
||||
#define CONFIG_POWER_BATTERY_TRATS
|
||||
#define CONFIG_USB_GADGET
|
||||
#define CONFIG_USB_GADGET_S3C_UDC_OTG
|
||||
#define CONFIG_USB_GADGET_DUALSPEED
|
||||
|
||||
@@ -149,9 +149,9 @@
|
||||
#define CONFIG_MXC_GPIO
|
||||
|
||||
/* MC13783 connected to CSPI3 and SS0 */
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_SPI
|
||||
#define CONFIG_PMIC_FSL
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_SPI
|
||||
#define CONFIG_POWER_FSL
|
||||
|
||||
#define CONFIG_FSL_PMIC_BUS 2
|
||||
#define CONFIG_FSL_PMIC_CS 0
|
||||
|
||||
@@ -87,9 +87,9 @@
|
||||
#define CONFIG_ENV_IS_IN_SPI_FLASH
|
||||
|
||||
/* PMIC Controller */
|
||||
#define CONFIG_PMIC
|
||||
#define CONFIG_PMIC_SPI
|
||||
#define CONFIG_PMIC_FSL
|
||||
#define CONFIG_POWER
|
||||
#define CONFIG_POWER_SPI
|
||||
#define CONFIG_POWER_FSL
|
||||
#define CONFIG_FSL_PMIC_BUS 0
|
||||
#define CONFIG_FSL_PMIC_CS 0
|
||||
#define CONFIG_FSL_PMIC_CLK 2500000
|
||||
|
||||
38
include/power/battery.h
Normal file
38
include/power/battery.h
Normal file
@@ -0,0 +1,38 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Samsung Electronics
|
||||
* Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __POWER_BATTERY_H_
|
||||
#define __POWER_BATTERY_H_
|
||||
|
||||
struct battery {
|
||||
unsigned int version;
|
||||
unsigned int state_of_chrg;
|
||||
unsigned int time_to_empty;
|
||||
unsigned int capacity;
|
||||
unsigned int voltage_uV;
|
||||
|
||||
unsigned int state;
|
||||
};
|
||||
|
||||
int power_bat_init(unsigned char bus);
|
||||
#endif /* __POWER_BATTERY_H_ */
|
||||
90
include/power/fg_battery_cell_params.h
Normal file
90
include/power/fg_battery_cell_params.h
Normal file
@@ -0,0 +1,90 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Samsung Electronics
|
||||
* Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __FG_BATTERY_CELL_PARAMS_H_
|
||||
#define __FG_BATTERY_CELL_PARAMS_H_
|
||||
|
||||
#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TRATS)
|
||||
|
||||
/* Cell characteristics - Exynos4 TRATS development board */
|
||||
/* Shall be written to addr 0x80h */
|
||||
u16 cell_character0[16] = {
|
||||
0xA2A0,
|
||||
0xB6E0,
|
||||
0xB850,
|
||||
0xBAD0,
|
||||
0xBB20,
|
||||
0xBB70,
|
||||
0xBBC0,
|
||||
0xBC20,
|
||||
0xBC80,
|
||||
0xBCE0,
|
||||
0xBD80,
|
||||
0xBE20,
|
||||
0xC090,
|
||||
0xC420,
|
||||
0xC910,
|
||||
0xD070
|
||||
};
|
||||
|
||||
/* Shall be written to addr 0x90h */
|
||||
u16 cell_character1[16] = {
|
||||
0x0090,
|
||||
0x1A50,
|
||||
0x02F0,
|
||||
0x2060,
|
||||
0x2060,
|
||||
0x2E60,
|
||||
0x26A0,
|
||||
0x2DB0,
|
||||
0x2DB0,
|
||||
0x1870,
|
||||
0x2A20,
|
||||
0x16F0,
|
||||
0x08F0,
|
||||
0x0D40,
|
||||
0x08C0,
|
||||
0x08C0
|
||||
};
|
||||
|
||||
/* Shall be written to addr 0xA0h */
|
||||
u16 cell_character2[16] = {
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100,
|
||||
0x0100
|
||||
};
|
||||
#endif
|
||||
#endif /* __FG_BATTERY_CELL_PARAMS_H_ */
|
||||
74
include/power/max17042_fg.h
Normal file
74
include/power/max17042_fg.h
Normal file
@@ -0,0 +1,74 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Samsung Electronics
|
||||
* Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __MAX17042_FG_H_
|
||||
#define __MAX17042_FG_H_
|
||||
|
||||
/* MAX 17042 registers */
|
||||
enum {
|
||||
MAX17042_STATUS = 0x00,
|
||||
MAX17042_SOCREP = 0x06,
|
||||
MAX17042_VCELL = 0x09,
|
||||
MAX17042_CURRENT = 0x0A,
|
||||
MAX17042_AVG_CURRENT = 0x0B,
|
||||
MAX17042_SOCMIX = 0x0D,
|
||||
MAX17042_SOCAV = 0x0E,
|
||||
MAX17042_DESIGN_CAP = 0x18,
|
||||
MAX17042_AVG_VCELL = 0x19,
|
||||
MAX17042_CONFIG = 0x1D,
|
||||
MAX17042_VERSION = 0x21,
|
||||
MAX17042_LEARNCFG = 0x28,
|
||||
MAX17042_FILTERCFG = 0x29,
|
||||
MAX17042_RELAXCFG = 0x2A,
|
||||
MAX17042_MISCCFG = 0x2B,
|
||||
MAX17042_CGAIN = 0x2E,
|
||||
MAX17042_COFF = 0x2F,
|
||||
MAX17042_RCOMP0 = 0x38,
|
||||
MAX17042_TEMPCO = 0x39,
|
||||
MAX17042_FSTAT = 0x3D,
|
||||
MAX17042_MLOCKReg1 = 0x62,
|
||||
MAX17042_MLOCKReg2 = 0x63,
|
||||
MAX17042_MODEL1 = 0x80,
|
||||
MAX17042_MODEL2 = 0x90,
|
||||
MAX17042_MODEL3 = 0xA0,
|
||||
MAX17042_VFOCV = 0xFB,
|
||||
MAX17042_VFSOC = 0xFF,
|
||||
|
||||
FG_NUM_OF_REGS = 0x100,
|
||||
};
|
||||
|
||||
#define RCOMP0 0x0060
|
||||
#define TempCo 0x1015
|
||||
|
||||
|
||||
#define MAX17042_POR (1 << 1)
|
||||
|
||||
#define MODEL_UNLOCK1 0x0059
|
||||
#define MODEL_UNLOCK2 0x00c4
|
||||
#define MODEL_LOCK1 0x0000
|
||||
#define MODEL_LOCK2 0x0000
|
||||
|
||||
#define MAX17042_I2C_ADDR (0x6C >> 1)
|
||||
|
||||
int power_fg_init(unsigned char bus);
|
||||
#endif /* __MAX17042_FG_H_ */
|
||||
61
include/power/max8997_muic.h
Normal file
61
include/power/max8997_muic.h
Normal file
@@ -0,0 +1,61 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Samsung Electronics
|
||||
* Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __MAX8997_MUIC_H_
|
||||
#define __MAX8997_MUIC_H_
|
||||
|
||||
#include <power/power_chrg.h>
|
||||
|
||||
/* MAX8997_MUIC_STATUS2 */
|
||||
#define MAX8997_MUIC_CHG_NO 0x00
|
||||
#define MAX8997_MUIC_CHG_USB 0x01
|
||||
#define MAX8997_MUIC_CHG_USB_D 0x02
|
||||
#define MAX8997_MUIC_CHG_TA 0x03
|
||||
#define MAX8997_MUIC_CHG_TA_500 0x04
|
||||
#define MAX8997_MUIC_CHG_TA_1A 0x05
|
||||
#define MAX8997_MUIC_CHG_MASK 0x07
|
||||
|
||||
/* MAX 8997 MUIC registers */
|
||||
enum {
|
||||
MAX8997_MUIC_ID = 0x00,
|
||||
MAX8997_MUIC_INT1 = 0x01,
|
||||
MAX8997_MUIC_INT2 = 0x02,
|
||||
MAX8997_MUIC_INT3 = 0x03,
|
||||
MAX8997_MUIC_STATUS1 = 0x04,
|
||||
MAX8997_MUIC_STATUS2 = 0x05,
|
||||
MAX8997_MUIC_STATUS3 = 0x06,
|
||||
MAX8997_MUIC_INTMASK1 = 0x07,
|
||||
MAX8997_MUIC_INTMASK2 = 0x08,
|
||||
MAX8997_MUIC_INTMASK3 = 0x09,
|
||||
MAX8997_MUIC_CDETCTRL = 0x0A,
|
||||
MAX8997_MUIC_CONTROL1 = 0x0C,
|
||||
MAX8997_MUIC_CONTROL2 = 0x0D,
|
||||
MAX8997_MUIC_CONTROL3 = 0x0E,
|
||||
|
||||
MUIC_NUM_OF_REGS = 0x0F,
|
||||
};
|
||||
|
||||
#define MAX8997_MUIC_I2C_ADDR (0x4A >> 1)
|
||||
|
||||
int power_muic_init(unsigned int bus);
|
||||
#endif /* __MAX8997_MUIC_H_ */
|
||||
@@ -111,7 +111,7 @@ enum {
|
||||
MAX8997_REG_MBCCTRL6 = 0x55,
|
||||
MAX8997_REG_OTPCGHCVS = 0x56,
|
||||
|
||||
MAX8997_REG_SAFEOUTCTRL = 0x5a,
|
||||
MAX8997_REG_SAFEOUTCTRL = 0x5a,
|
||||
|
||||
MAX8997_REG_LBCNFG1 = 0x5e,
|
||||
MAX8997_REG_LBCNFG2 = 0x5f,
|
||||
@@ -171,9 +171,31 @@ enum {
|
||||
PMIC_NUM_OF_REGS = 0x9b,
|
||||
};
|
||||
|
||||
#define ACTDISSAFEO1 (1 << 4)
|
||||
#define ACTDISSAFEO2 (1 << 5)
|
||||
#define ENSAFEOUT1 (1 << 6)
|
||||
#define ENSAFEOUT2 (1 << 7)
|
||||
|
||||
#define ENBUCK (1 << 0)
|
||||
#define ACTIVE_DISCHARGE (1 << 3)
|
||||
#define GNSLCT (1 << 2)
|
||||
#define LDO_ADE (1 << 1)
|
||||
#define SAFEOUT_4_85V 0x00
|
||||
#define SAFEOUT_4_90V 0x01
|
||||
#define SAFEOUT_4_95V 0x02
|
||||
#define SAFEOUT_3_30V 0x03
|
||||
|
||||
/* Charger */
|
||||
enum {CHARGER_ENABLE, CHARGER_DISABLE};
|
||||
#define DETBAT (1 << 2)
|
||||
#define MBCICHFCSET (1 << 4)
|
||||
#define MBCHOSTEN (1 << 6)
|
||||
#define VCHGR_FC (1 << 7)
|
||||
|
||||
#define CHARGER_MIN_CURRENT 200
|
||||
#define CHARGER_MAX_CURRENT 950
|
||||
#define CHARGER_CURRENT_RESOLUTION 50
|
||||
|
||||
#define MAX8997_I2C_ADDR (0xCC >> 1)
|
||||
#define MAX8997_RTC_ADDR (0x0C >> 1)
|
||||
#define MAX8997_MUIC_ADDR (0x4A >> 1)
|
||||
@@ -187,4 +209,6 @@ enum {
|
||||
EN_LDO = (0x3 << 6),
|
||||
};
|
||||
|
||||
#define MAX8997_LDO_MAX_VAL 0x3F
|
||||
unsigned char max8997_reg_ldo(int uV);
|
||||
#endif /* __MAX8997_PMIC_H_ */
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2011 Samsung Electronics
|
||||
* Copyright (C) 2011-2012 Samsung Electronics
|
||||
* Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
@@ -24,9 +24,15 @@
|
||||
#ifndef __CORE_PMIC_H_
|
||||
#define __CORE_PMIC_H_
|
||||
|
||||
enum { PMIC_I2C, PMIC_SPI, };
|
||||
#include <common.h>
|
||||
#include <linux/list.h>
|
||||
#include <i2c.h>
|
||||
#include <power/power_chrg.h>
|
||||
|
||||
enum { PMIC_I2C, PMIC_SPI, PMIC_NONE};
|
||||
enum { I2C_PMIC, I2C_NUM, };
|
||||
enum { PMIC_READ, PMIC_WRITE, };
|
||||
enum { PMIC_SENSOR_BYTE_ORDER_LITTLE, PMIC_SENSOR_BYTE_ORDER_BIG, };
|
||||
|
||||
struct p_i2c {
|
||||
unsigned char addr;
|
||||
@@ -43,21 +49,52 @@ struct p_spi {
|
||||
u32 (*prepare_tx)(u32 reg, u32 *val, u32 write);
|
||||
};
|
||||
|
||||
struct pmic;
|
||||
struct power_fg {
|
||||
int (*fg_battery_check) (struct pmic *p, struct pmic *bat);
|
||||
int (*fg_battery_update) (struct pmic *p, struct pmic *bat);
|
||||
};
|
||||
|
||||
struct power_chrg {
|
||||
int (*chrg_type) (struct pmic *p);
|
||||
int (*chrg_bat_present) (struct pmic *p);
|
||||
int (*chrg_state) (struct pmic *p, int state, int current);
|
||||
};
|
||||
|
||||
struct power_battery {
|
||||
struct battery *bat;
|
||||
int (*battery_init) (struct pmic *bat, struct pmic *p1,
|
||||
struct pmic *p2, struct pmic *p3);
|
||||
int (*battery_charge) (struct pmic *bat);
|
||||
/* Keep info about power devices involved with battery operation */
|
||||
struct pmic *chrg, *fg, *muic;
|
||||
};
|
||||
|
||||
struct pmic {
|
||||
const char *name;
|
||||
unsigned char bus;
|
||||
unsigned char interface;
|
||||
unsigned char number_of_regs;
|
||||
unsigned char sensor_byte_order;
|
||||
unsigned int number_of_regs;
|
||||
union hw {
|
||||
struct p_i2c i2c;
|
||||
struct p_spi spi;
|
||||
} hw;
|
||||
|
||||
void (*low_power_mode) (void);
|
||||
struct power_battery *pbat;
|
||||
struct power_chrg *chrg;
|
||||
struct power_fg *fg;
|
||||
|
||||
struct pmic *parent;
|
||||
struct list_head list;
|
||||
};
|
||||
|
||||
int pmic_init(void);
|
||||
int pmic_dialog_init(void);
|
||||
int check_reg(u32 reg);
|
||||
struct pmic *get_pmic(void);
|
||||
int pmic_init(unsigned char bus);
|
||||
int pmic_dialog_init(unsigned char bus);
|
||||
int check_reg(struct pmic *p, u32 reg);
|
||||
struct pmic *pmic_alloc(void);
|
||||
struct pmic *pmic_get(const char *s);
|
||||
int pmic_probe(struct pmic *p);
|
||||
int pmic_reg_read(struct pmic *p, u32 reg, u32 *val);
|
||||
int pmic_reg_write(struct pmic *p, u32 reg, u32 val);
|
||||
43
include/power/power_chrg.h
Normal file
43
include/power/power_chrg.h
Normal file
@@ -0,0 +1,43 @@
|
||||
/*
|
||||
* Copyright (C) 2012 Samsung Electronics
|
||||
* Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __POWER_CHARGER_H_
|
||||
#define __POWER_CHARGER_H_
|
||||
|
||||
/* Type of available chargers */
|
||||
enum {
|
||||
CHARGER_NO = 0,
|
||||
CHARGER_TA,
|
||||
CHARGER_USB,
|
||||
CHARGER_TA_500,
|
||||
CHARGER_UNKNOWN,
|
||||
};
|
||||
|
||||
enum {
|
||||
UNKNOWN,
|
||||
EXT_SOURCE,
|
||||
CHARGE,
|
||||
NORMAL,
|
||||
};
|
||||
|
||||
#endif /* __POWER_CHARGER_H_ */
|
||||
Reference in New Issue
Block a user