Convert CONFIG_LBA48 et al to Kconfig
This converts the following to Kconfig: CONFIG_LBA48 CONFIG_SYS_64BIT_LBA Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
@@ -22,7 +22,6 @@
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#ifdef CONFIG_IDE
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/* ATA */
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# define CONFIG_IDE_PREINIT 1
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# undef CONFIG_LBA48
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#endif
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#ifdef CONFIG_DRIVER_DM9000
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@@ -262,13 +262,6 @@
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#endif
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#endif
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/*
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* SATA
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*/
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#ifdef CONFIG_FSL_SATA
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#define CONFIG_LBA48
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#endif
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/*
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* Environment
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*/
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@@ -472,12 +472,6 @@ extern unsigned long get_sdram_size(void);
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#endif /* CONFIG_TSEC_ENET */
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/* SATA */
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#ifdef CONFIG_FSL_SATA
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#define CONFIG_LBA48
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#endif /* #ifdef CONFIG_FSL_SATA */
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#ifdef CONFIG_MMC
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#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
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#endif
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@@ -336,12 +336,6 @@
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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#endif /* CONFIG_PCI */
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/* SATA */
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#ifdef CONFIG_FSL_SATA_V2
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#define CONFIG_LBA48
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#endif
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#ifdef CONFIG_FMAN_ENET
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#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2
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#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x3
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@@ -11,8 +11,6 @@
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#define CONFIG_PCIE3
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#define CONFIG_LBA48
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#define CONFIG_SYS_SRIO
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#define CONFIG_SRIO1 /* SRIO port 1 */
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#define CONFIG_SRIO2 /* SRIO port 2 */
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@@ -390,11 +390,6 @@
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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#endif /* CONFIG_PCI */
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/* SATA */
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#ifdef CONFIG_FSL_SATA_V2
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#define CONFIG_LBA48
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#endif
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/*
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* USB
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*/
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@@ -457,13 +457,6 @@
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#define SGMII_CARD_PORT4_PHY_ADDR 0x1F
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#endif
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/*
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* SATA
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*/
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#ifdef CONFIG_FSL_SATA_V2
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#define CONFIG_LBA48
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#endif
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/*
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* USB
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*/
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@@ -413,13 +413,6 @@
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#define AQR113C_PHY_ADDR2 0x08
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#endif
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/*
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* SATA
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*/
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#ifdef CONFIG_FSL_SATA_V2
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#define CONFIG_LBA48
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#endif
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/*
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* USB
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*/
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@@ -152,11 +152,6 @@
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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#endif /* CONFIG_PCI */
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/* SATA */
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#ifdef CONFIG_FSL_SATA_V2
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#define CONFIG_LBA48
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#endif
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/*
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* Environment
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*/
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@@ -425,11 +420,6 @@
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#define CORTINA_PHY_ADDR4 FM2_10GEC2_PHY_ADDR
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#endif
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/* SATA */
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#ifdef CONFIG_FSL_SATA_V2
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#define CONFIG_LBA48
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#endif
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/*
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* USB
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*/
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@@ -25,13 +25,6 @@
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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/*
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* SATA Configs
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*/
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_LBA48
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#endif
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/* Network */
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#define PHY_ANEG_TIMEOUT 15000 /* PHY needs longer aneg time */
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@@ -149,9 +149,6 @@
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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/* SATA */
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#define CONFIG_LBA48
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/* Boot */
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#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
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@@ -337,11 +337,6 @@
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#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
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#endif /* CONFIG_PCI */
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/* SATA */
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#ifdef CONFIG_FSL_SATA_V2
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#define CONFIG_LBA48
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#endif
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#ifdef CONFIG_FMAN_ENET
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#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x1c
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#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x1d
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@@ -22,9 +22,6 @@
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#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
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/* SATA support */
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#define CONFIG_LBA48
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/* PCIe support */
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_PCI_SCAN_SHOW
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@@ -33,9 +33,6 @@
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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/* SATA Configs */
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#define CONFIG_LBA48
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/* UART */
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#define CONFIG_MXC_UART_BASE UART1_BASE
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@@ -30,9 +30,4 @@
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#define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */
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#define CONFIG_PHY_BASE_ADR 0
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/*
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* SATA Driver configuration
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*/
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#define CONFIG_LBA48
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#endif /* _CONFIG_DREAMPLUG_H */
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@@ -101,8 +101,6 @@
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#define __io
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/* Data, registers and alternate blocks are at the same offset */
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/* Each 8-bit ATA register is aligned to a 4-bytes address */
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/* Controller supports 48-bits LBA addressing */
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#define CONFIG_LBA48
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/* A single bus, a single device */
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/* ATA registers base is at SATA controller base */
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/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
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@@ -17,11 +17,6 @@
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#include "mx6_common.h"
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#include <linux/sizes.h>
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/* SATA Configs */
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_LBA48
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#endif
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#ifdef CONFIG_CMD_NFS
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#define NETWORKBOOT \
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"setnetworkboot=" \
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@@ -44,7 +44,4 @@
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#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
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#define CONFIG_PHY_BASE_ADR 0
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/* SATA driver configuration */
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#define CONFIG_LBA48
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#endif /* _CONFIG_GOFLEXHOME_H */
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@@ -28,13 +28,6 @@
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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/*
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* SATA Configs
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*/
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_LBA48
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#endif
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/*
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* PCI express
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*/
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@@ -20,8 +20,6 @@
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_64BIT_LBA
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/* Environment data setup
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*/
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#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
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@@ -21,18 +21,6 @@
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#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
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#endif
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/*
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* SATA Driver configuration
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*/
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#ifdef CONFIG_SATA
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#define CONFIG_SYS_64BIT_LBA
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#define CONFIG_LBA48
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#if defined(CONFIG_NETSPACE_MAX_V2) || defined(CONFIG_D2NET_V2) || \
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defined(CONFIG_NET2BIG_V2)
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#endif
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#endif /* CONFIG_SATA */
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/*
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* Enable GPI0 support
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*/
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@@ -94,9 +94,4 @@
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#define CONFIG_PHY_BASE_ADR 7
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#endif /* CONFIG_CMD_NET */
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#ifdef CONFIG_SATA
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#define CONFIG_SYS_64BIT_LBA
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#define CONFIG_LBA48
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#endif
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#endif /* _CONFIG_LSXL_H */
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@@ -82,13 +82,6 @@
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#define CONFIG_MXC_USB_FLAGS 0
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#endif
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/*
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* SATA
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*/
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_LBA48
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#endif
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/*
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* LCD
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*/
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@@ -36,12 +36,6 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
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/*
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* SATA/SCSI/AHCI configuration
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*/
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#define CONFIG_LBA48
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#define CONFIG_SYS_64BIT_LBA
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 0) \
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@@ -31,12 +31,6 @@
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/* USB ethernet */
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/*
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* SATA/SCSI/AHCI configuration
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*/
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#define CONFIG_LBA48
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#define CONFIG_SYS_64BIT_LBA
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/*
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* PCI configuration
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*/
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@@ -100,10 +100,6 @@
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#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
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#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_LBA48
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#endif
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/* Framebuffer and LCD */
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#endif /* __CONFIG_H */
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@@ -16,11 +16,6 @@
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
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/* SATA Configuration */
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_LBA48
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#endif
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/* Framebuffer */
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#define CONFIG_IMX_HDMI
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#define CONFIG_IMX_VIDEO_SKIP
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@@ -19,13 +19,6 @@
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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/*
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* SATA Configs
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*/
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_LBA48
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#endif
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_MXC_PHYADDR 6
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@@ -59,9 +59,6 @@
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#define CONFIG_POWER_PFUZE100
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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/* SATA Configs */
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#define CONFIG_LBA48
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/* UART */
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#define CONFIG_MXC_UART_BASE UART2_BASE
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@@ -25,8 +25,4 @@
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#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
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#define CONFIG_PHY_BASE_ADR 1
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/* Support large HDDs for USB and SATA */
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#define CONFIG_LBA48
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#define CONFIG_SYS_64BIT_LBA
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#endif /* _CONFIG_NSA310S_H */
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@@ -7,15 +7,6 @@
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#ifndef __CONFIG_H__
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#define __CONFIG_H__
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/*
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* SATA/SCSI/AHCI configuration
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*/
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/* AHCI support Definitions */
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/** Enable 48-bit SATA addressing */
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#define CONFIG_LBA48
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/** Enable 64-bit addressing */
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#define CONFIG_SYS_64BIT_LBA
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#include "octeon_common.h"
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#endif /* __CONFIG_H__ */
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@@ -44,14 +44,6 @@
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/** Heap size for U-Boot */
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/* AHCI support Definitions */
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#ifdef CONFIG_DM_SCSI
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/** Enable 48-bit SATA addressing */
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# define CONFIG_LBA48
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/** Enable 64-bit addressing */
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# define CONFIG_SYS_64BIT_LBA
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#endif
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#define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192
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/** EMMC specific defines */
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@@ -112,8 +112,6 @@
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#define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */
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#define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */
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#define CONFIG_LBA48
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#define CONFIG_HWCONFIG
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/*
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* These can be toggled for performance analysis, otherwise use default.
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@@ -39,10 +39,4 @@
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#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
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#define CONFIG_PHY_BASE_ADR 0
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/*
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* Support large disk for SATA and USB
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*/
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#define CONFIG_SYS_64BIT_LBA
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#define CONFIG_LBA48
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#endif /* _CONFIG_POGO_V4_H */
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@@ -60,8 +60,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_LBA48
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/* RTC */
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#define CONFIG_RTC_PT7C4338
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@@ -27,10 +27,4 @@
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#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
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#define CONFIG_PHY_BASE_ADR 0
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/*
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* Support large disk for SATA and USB
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*/
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#define CONFIG_SYS_64BIT_LBA
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#define CONFIG_LBA48
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#endif /* _CONFIG_SHEEVAPLUG_H */
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@@ -75,10 +75,6 @@
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#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
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#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
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#ifdef CONFIG_AHCI
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#define CONFIG_SYS_64BIT_LBA
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#endif
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#ifdef CONFIG_NAND_SUNXI
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#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
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#define CONFIG_SYS_MAX_NAND_DEVICE 8
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@@ -31,12 +31,6 @@
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#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
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#endif
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/* SATA */
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_LBA48
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#define CONFIG_SYS_64BIT_LBA
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#endif
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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@@ -40,9 +40,6 @@
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"fdt_high=0x10000000\0" \
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"initrd_high=0x10000000\0"
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/* SATA support */
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#define CONFIG_LBA48
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/* FPGA programming support */
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#define CONFIG_FPGA_STRATIX_V
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@@ -14,9 +14,6 @@
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#define CONFIG_MXC_UART_BASE UART2_BASE
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/* SATA Configs */
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#define CONFIG_LBA48
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/* MMC Configuration */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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@@ -14,12 +14,6 @@
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* SATA Configs */
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#ifdef CONFIG_CMD_SATA
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#define CONFIG_LBA48
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#endif
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/* MMC Configuration */
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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@@ -16,13 +16,6 @@
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*/
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#define CONFIG_SYS_BOOTM_LEN (16 << 20)
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/* SATA AHCI storage */
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#ifdef CONFIG_SCSI_AHCI
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#define CONFIG_LBA48
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#define CONFIG_SYS_64BIT_LBA
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#endif
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/* Generic TPM interfaced through LPC bus */
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#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000
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