Convert CONFIG_BOARD_EARLY_INIT_F to Kconfig

This converts the following to Kconfig:
   CONFIG_BOARD_EARLY_INIT_F

Signed-off-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Simon Glass
2017-01-23 13:31:20 -07:00
committed by Tom Rini
parent a421192fb8
commit a5d67547dd
607 changed files with 459 additions and 290 deletions

View File

@@ -198,8 +198,6 @@ extern unsigned long get_sdram_size(void);
#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NAND_FTIM2
#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NAND_FTIM3
#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */
#define CONFIG_SYS_INIT_RAM_LOCK
#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */
#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000/* End of used area in RAM */

View File

@@ -373,7 +373,6 @@ combinations. this should be removed later
#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3
#endif
#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_SYS_INIT_RAM_LOCK

View File

@@ -21,8 +21,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_SYS_CLK_FREQ 33330000 /* external frequency to pll */
#define CONFIG_BAUDRATE 9600

View File

@@ -24,7 +24,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_CLK_FREQ 33330000 /* external frequency to pll */

View File

@@ -246,7 +246,6 @@
/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
#define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_BOARD_EARLY_INIT_R
/* Peripheral Bus Mapping */

View File

@@ -78,7 +78,6 @@
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */
#define CONFIG_SYS_IMMR 0xE0000000

View File

@@ -77,7 +77,6 @@
#define CONFIG_SYS_SICRH 0x00000000
#define CONFIG_SYS_SICRL 0x00000000 /* 3.3V, no delay */
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
#define CONFIG_HWCONFIG
/*

View File

@@ -72,7 +72,6 @@
*/
#define CONFIG_SYS_SICRL 0x00000000
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
#define CONFIG_BOARD_EARLY_INIT_R
/*

View File

@@ -44,8 +44,6 @@
#endif
#endif
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
#define CONFIG_SYS_IMMR 0xE0000000
#undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */

View File

@@ -97,7 +97,6 @@
*/
#define CONFIG_SYS_OBIR 0x31100000
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_HWCONFIG

View File

@@ -18,7 +18,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFE000000
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_HWCONFIG

View File

@@ -61,8 +61,6 @@
#define CONFIG_L2_CACHE /* toggle L2 cache */
#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_ENABLE_36BIT_PHYS 1
#ifdef CONFIG_PHYS_64BIT

View File

@@ -41,8 +41,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CONFIG_ENABLE_36BIT_PHYS 1
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */
#define CONFIG_SYS_MEMTEST_END 0x00400000

View File

@@ -54,7 +54,6 @@ extern unsigned long get_clock_freq(void);
*/
#define CONFIG_ENABLE_36BIT_PHYS 1
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_BOARD_EARLY_INIT_R 1
#define CONFIG_HWCONFIG

View File

@@ -61,7 +61,6 @@
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0)
#endif
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_MISC_INIT_R 1
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */

View File

@@ -504,7 +504,6 @@ extern unsigned long get_sdram_size(void);
#endif
#endif
#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_SYS_INIT_RAM_LOCK

View File

@@ -274,7 +274,6 @@
#endif /* CONFIG_NAND_FSL_ELBC */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_MISC_INIT_R
#define CONFIG_HWCONFIG

View File

@@ -109,7 +109,6 @@ extern unsigned long get_clock_freq(void);
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f function */
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
#define CONFIG_SYS_INIT_RAM_LOCK

View File

@@ -276,7 +276,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
#define CONFIG_MISC_INIT_R

View File

@@ -74,8 +74,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 1250000 }
#define CONFIG_BOARD_EARLY_INIT_F
/***********************************************************************
* Last Stage Init
***********************************************************************/

View File

@@ -81,7 +81,6 @@
***************************************************************/
#define SPD_EEPROM_ADDRESS 0x50
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
/**************************************************************
@@ -205,8 +204,6 @@
/* Size: 0=1MB, 1=2MB, 2=4MB, 3=8MB, 4=16MB, 5=32MB, 6=64MB, 7=128MB */
#define FLASH_SIZE_PRELIM 3 /* maximal flash FLASH size bank #0 */
#define CONFIG_BOARD_EARLY_INIT_F
/* Configuration Port location */
#define CONFIG_PORT_ADDR 0xF4000000
#define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000

View File

@@ -22,7 +22,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFFF80000
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_CLK_FREQ 33333400 /* external frequency to pll */

View File

@@ -13,7 +13,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFFFC0000
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_BOARD_TYPES 1 /* support board types */

View File

@@ -35,7 +35,6 @@
#define CONFIG_4xx_DCACHE /* enable dcache */
#endif
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_F 1
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_BOARD_TYPES 1 /* support board types */

View File

@@ -28,9 +28,6 @@
#define CONFIG_ENV_OVERWRITE
#define CONFIG_DEEP_SLEEP
#if defined(CONFIG_DEEP_SLEEP)
#define CONFIG_BOARD_EARLY_INIT_F
#endif
#define CONFIG_FSL_CAAM /* Enable SEC/CAAM */

View File

@@ -33,9 +33,6 @@
#ifdef CONFIG_ARCH_T1024
#define CONFIG_DEEP_SLEEP
#endif
#if defined(CONFIG_DEEP_SLEEP)
#define CONFIG_BOARD_EARLY_INIT_F
#endif
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg

View File

@@ -40,9 +40,6 @@
/* support deep sleep */
#define CONFIG_DEEP_SLEEP
#if defined(CONFIG_DEEP_SLEEP)
#define CONFIG_BOARD_EARLY_INIT_F
#endif
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xeff40000

View File

@@ -151,9 +151,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
/* support deep sleep */
#define CONFIG_DEEP_SLEEP
#if defined(CONFIG_DEEP_SLEEP)
#define CONFIG_BOARD_EARLY_INIT_F
#endif
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE 0xeff40000

View File

@@ -51,7 +51,6 @@
#ifdef CONFIG_FO300
#define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
#define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
#if 0
#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */

View File

@@ -41,7 +41,6 @@
#define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_8
/* board pre init: do not call, nothing to do */
#undef CONFIG_BOARD_EARLY_INIT_F
/* detect the number of flash banks */
#define CONFIG_BOARD_EARLY_INIT_R

View File

@@ -157,8 +157,6 @@
#define CONFIG_L2_CACHE
#define CONFIG_BTB
#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */
#define CONFIG_ENABLE_36BIT_PHYS
#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */

View File

@@ -20,7 +20,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFFFC8000
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
#define CONFIG_SYS_CLK_FREQ 33330000 /* external frequency to pll */

View File

@@ -32,7 +32,6 @@
#define CONFIG_SYS_CLK_FREQ ((in8(CONFIG_SYS_CPLD_BASE + 0) == 0x0c) ? \
66666666 : 33333000)
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_F 1 /* Call misc_init_f */
#define CONFIG_NO_SERIAL_EEPROM

View File

@@ -33,8 +33,6 @@
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART

View File

@@ -57,9 +57,6 @@
* we need to call board_early_init_f. This is taken care of in
* s_init when we have SPL used.
*/
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && !defined(CONFIG_SPL)
#define CONFIG_BOARD_EARLY_INIT_F
#endif
/* Now bring in the rest of the common code. */
#include <configs/ti_armv7_omap.h>

View File

@@ -20,8 +20,6 @@
#define CONFIG_IODELAY_RECALIBRATION
#endif
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_ENV_SIZE (64 << 10)

View File

@@ -7,8 +7,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_MHZ 200
#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)

View File

@@ -7,8 +7,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_MHZ 325
#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)

View File

@@ -36,7 +36,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_UART

View File

@@ -21,8 +21,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (64 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MXC_UART
/* MMC Configs */

View File

@@ -27,7 +27,6 @@
#undef CONFIG_SHOW_BOOT_PROGRESS
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_TMU_TIMER
#define CONFIG_SYS_DCACHE_OFF

View File

@@ -24,8 +24,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ENV_VARS_UBOOT_CONFIG
/* general purpose I/O */

View File

@@ -56,8 +56,6 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_BOARD_EARLY_INIT_F
/*
* Memory Configuration
*/

View File

@@ -42,7 +42,6 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */

View File

@@ -41,8 +41,6 @@
#define CONFIG_SYS_USE_NORFLASH
#endif
#define CONFIG_BOARD_EARLY_INIT_F
/*
* Hardware drivers
*/

View File

@@ -27,7 +27,6 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */

View File

@@ -27,7 +27,6 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
/* general purpose I/O */
#define CONFIG_AT91_GPIO

View File

@@ -23,7 +23,6 @@
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1

View File

@@ -23,7 +23,6 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */

View File

@@ -14,7 +14,6 @@
#define CONFIG_AT32AP7000
#define CONFIG_ATNGW100
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
/*

View File

@@ -16,7 +16,6 @@
#define CONFIG_AT32AP7000
#define CONFIG_ATNGW100MKII
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
/*

View File

@@ -94,7 +94,6 @@
#define CONFIG_BOOTP_GATEWAY
/* generic board */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
/*

View File

@@ -38,7 +38,6 @@
* This board might be of different versions so handle it
*/
#define CONFIG_BOARD_TYPES
#define CONFIG_BOARD_EARLY_INIT_F
/*
* NAND Flash configuration

View File

@@ -32,8 +32,6 @@
/* Reclaim some space. */
#undef CONFIG_SYS_LONGHELP
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
/*
* Please note that, if NAND support is enabled, the 2nd ethernet port
* can't be used because of pin multiplexing. So, if you want to use the

View File

@@ -78,7 +78,6 @@
/*
* Misc Settings
*/
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ICACHE_OFF
#define CONFIG_DCACHE_OFF
#define CONFIG_UART_CONSOLE 0

View File

@@ -135,7 +135,6 @@
/*
* Misc Settings
*/
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0

View File

@@ -158,7 +158,6 @@
/*
* Misc Settings
*/
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_SIZE_LIMIT $$(( 512 * 1024 ))
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 1

View File

@@ -132,7 +132,6 @@
/*
* Misc Settings
*/
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_UART_CONSOLE 0
#define CONFIG_CMD_SOFTSWITCH

View File

@@ -28,8 +28,6 @@
#define CONFIG_HOSTNAME bubinga
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
#define CONFIG_NO_SERIAL_EEPROM

View File

@@ -47,7 +47,6 @@
#define CONFIG_SYS_CLK_FREQ 66666667 /* external freq to pll */
#define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_early_init_r */
#define CONFIG_MISC_INIT_R /* Call misc_init_r */
#define CONFIG_BOARD_TYPES /* support board types */

View File

@@ -26,7 +26,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_UART

View File

@@ -102,7 +102,6 @@
* Misc Settings
*/
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 1
#define CONFIG_BOOTCOMMAND "run flashboot"

View File

@@ -34,7 +34,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_UART

View File

@@ -20,7 +20,6 @@
#define PHYS_SDRAM_SIZE SZ_512M
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */

View File

@@ -31,8 +31,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_VARS_UBOOT_CONFIG

View File

@@ -14,7 +14,6 @@
#include <configs/x86-common.h>
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \

View File

@@ -357,14 +357,12 @@
/*
* Board initialisation callbacks
*/
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_MISC_INIT_R
#define CONFIG_LAST_STAGE_INIT
#else /* CONFIG_TRAILBLAZER */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_LAST_STAGE_INIT

View File

@@ -285,7 +285,6 @@
#define CONFIG_SYS_FLASH_AMD_CHECK_DQ7
#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS}
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
#define CONFIG_MISC_INIT_R

View File

@@ -36,7 +36,6 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
#define CONFIG_BOARD_EARLY_INIT_F
/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */

View File

@@ -10,7 +10,6 @@
#include <configs/x86-common.h>
#define CONFIG_SYS_MONITOR_LEN (2 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SMSC_SIO1007

View File

@@ -14,7 +14,6 @@
#include <configs/x86-common.h>
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SMSC_LPC47M

View File

@@ -164,7 +164,6 @@
#define CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
#define CONFIG_MISC_INIT_R

View File

@@ -249,7 +249,6 @@
* U-Boot general configuration
*/
#define CONFIG_MISC_INIT_R
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)

View File

@@ -24,7 +24,6 @@
#if !defined(CONFIG_SPL_BUILD)
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif
#define CONFIG_BOARD_EARLY_INIT_F
/*
* Memory configurations

View File

@@ -14,7 +14,6 @@
#include <configs/x86-common.h>
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#ifndef CONFIG_INTERNAL_UART
/* Use BayTrail internal HS UART which is memory-mapped */

View File

@@ -19,7 +19,6 @@
#define CONFIG_HOSTNAME dlvsion-10g
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_MISC_INIT_R
#define CONFIG_LAST_STAGE_INIT

View File

@@ -19,7 +19,6 @@
#define CONFIG_HOSTNAME dlvision
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */
#define CONFIG_MISC_INIT_R /* call misc_init_r */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */

View File

@@ -15,7 +15,6 @@
#include <environment/ti/dfu.h>
#define CONFIG_DRA7XX
#define CONFIG_BOARD_EARLY_INIT_F
#ifdef CONFIG_SPL_BUILD
#define CONFIG_IODELAY_RECALIBRATION

View File

@@ -19,7 +19,6 @@
#define CONFIG_SYS_USE_NAND
#define CONFIG_DRIVER_TI_EMAC_USE_RMII
#define CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_PREBOOT
/*

View File

@@ -223,8 +223,6 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "ep93xx-ohci"
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x80020000
#define CONFIG_BOARD_EARLY_INIT_F
/* Define to disable flash configuration*/
/* #define CONFIG_EP93XX_NO_FLASH_CFG */

View File

@@ -19,8 +19,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MXC_UART
#ifdef CONFIG_SPL

View File

@@ -24,8 +24,6 @@
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MXC_UART
/* I2C Configs */

View File

@@ -18,7 +18,6 @@
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F
/* Keep L2 Cache Disabled */

View File

@@ -18,7 +18,6 @@
#include <linux/sizes.h>
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOARD_EARLY_INIT_F
/* Size of malloc() pool before and after relocation */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 << 20))

View File

@@ -31,7 +31,6 @@
#define CONFIG_SYS_TEXT_BASE 0xA0000000
/* This is required to setup the ESDC controller */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
#define CONFIG_REVISION_TAG

View File

@@ -14,7 +14,6 @@
#include <configs/x86-common.h>
#define CONFIG_SYS_MONITOR_LEN (1 << 20)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT
/* ns16550 UART is memory-mapped in Quark SoC */

View File

@@ -30,7 +30,6 @@
*/
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f*/
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
/*

View File

@@ -44,8 +44,6 @@
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MXC_GPIO
#define CONFIG_MXC_UART

View File

@@ -62,7 +62,6 @@
#define CONFIG_USART_BASE ATMEL_BASE_USART1
#define CONFIG_USART_ID 1
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
/* User serviceable stuff */

View File

@@ -39,7 +39,6 @@
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
/* Init Functions */
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
/* Driver Model */

View File

@@ -21,8 +21,6 @@
#define CONFIG_SUPPORT_RAW_INITRD
#define CONFIG_BOARD_EARLY_INIT_F
/* Physical Memory Map */
/* CONFIG_SYS_TEXT_BASE needs to align with where ATF loads bl33.bin */

View File

@@ -20,7 +20,6 @@
#define CONFIG_SYS_TEXT_BASE 0xFE000000
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_LAST_STAGE_INIT

View File

@@ -30,7 +30,6 @@
#define CONFIG_HOSTNAME icon
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F /* Call board_pre_init */
#define CONFIG_BOARD_EARLY_INIT_R /* Call board_early_init_r */
/*

View File

@@ -118,7 +118,6 @@
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM_1 0x80000000
#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_SYS_TEXT_BASE 0xA0000000
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1

View File

@@ -40,7 +40,6 @@
#define CONFIG_SYS_CLK_FREQ 66666667 /* external freq to pll */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
#define CONFIG_BOARD_TYPES 1 /* support board types */

View File

@@ -19,7 +19,6 @@
#define CONFIG_HOSTNAME io
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_MISC_INIT_R
#define CONFIG_LAST_STAGE_INIT

View File

@@ -38,7 +38,6 @@
#define CONFIG_HOSTNAME io64
#include "amcc-common.h"
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_MISC_INIT_R
#define CONFIG_LAST_STAGE_INIT

View File

@@ -22,7 +22,6 @@
/* Reclaim some space. */
#undef CONFIG_SYS_LONGHELP
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOARD_EARLY_INIT_R
#define CONFIG_LAST_STAGE_INIT

View File

@@ -198,7 +198,6 @@
* U-Boot general configuration
*/
#define CONFIG_MISC_INIT_R
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_BOOTFILE "uImage" /* Boot file name */
#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)

View File

@@ -28,7 +28,6 @@
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define CONFIG_BOARD_EARLY_INIT_R 1
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_HIGH_BATS 1 /* High BATs supported */

Some files were not shown because too many files have changed in this diff Show More