Convert CONFIG_SYS_I2C_SPEED et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_I2C_SPEED
   CONFIG_SYS_I2C_SLAVE

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2021-08-18 23:12:32 -04:00
parent 1edef7693b
commit a5752f8a25
171 changed files with 193 additions and 174 deletions

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@@ -223,8 +223,4 @@
#endif
#define CONFIG_NET_RETRY_COUNT 10
/* I2C configuration */
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 1
#endif /* ! __CONFIG_AM335X_SHC_H */

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@@ -39,7 +39,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_MXC_I2C3_SPEED 400000
/* MMC Configs */

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@@ -51,7 +51,6 @@
/* I2C Configuration */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_I2C_SPEED 400000
/* EEPROM */
#define EEPROM_I2C_BUS 0 /* I2C0 */
#define EEPROM_I2C_ADDR 0x50

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@@ -33,7 +33,6 @@
/* I2C configs */
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20

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@@ -170,7 +170,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_MXC_I2C3_SPEED 400000
/* SATA */

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@@ -25,9 +25,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 1
/* I2C configs */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1

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@@ -37,7 +37,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_MXC_I2C3_SPEED 400000
/* MMC Configs */

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@@ -26,7 +26,6 @@
/* I2C configs */
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_IPADDR 192.168.10.2
#define CONFIG_NETMASK 255.255.255.0

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@@ -45,7 +45,6 @@
#define CONFIG_SYS_I2C_PXA
#define CONFIG_PXA_STD_I2C
#define CONFIG_PXA_PWR_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#endif
/* LCD support */

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@@ -50,7 +50,6 @@
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
#endif
/* Miscellaneous configurable options */

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@@ -18,8 +18,6 @@
/* I2C */
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI

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@@ -12,8 +12,6 @@
/* I2C */
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
/*
* SATA/SCSI/AHCI configuration

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@@ -19,8 +19,6 @@
/* I2C */
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI

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@@ -37,11 +37,6 @@
#define CONFIG_DMA_LPC32XX
#endif
/*
* I2C
*/
#define CONFIG_SYS_I2C_SPEED 100000
/*
* GPIO
*/

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@@ -29,9 +29,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_FACTORYSET
/* Define own nand partitions */

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@@ -21,8 +21,6 @@
/* I2C */
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
/* PCIe support */
#ifndef CONFIG_SPL_BUILD

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@@ -154,8 +154,6 @@
*/
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MVTWSI_BASE0 ORION5X_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
#endif
/*

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@@ -30,7 +30,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
#define CONFIG_POWER

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@@ -25,7 +25,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* USB Configs */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */

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@@ -86,9 +86,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 100000
#define EEPROM_ADDR_DDR3 0x90
#define EEPROM_ADDR_CHIP 0x120

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@@ -46,7 +46,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_GSC 0
#define CONFIG_I2C_EDID

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@@ -178,8 +178,6 @@
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII

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@@ -128,9 +128,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* I2C */
#define CONFIG_SYS_I2C_SPEED 100000
/* FEC*/
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII

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@@ -94,8 +94,6 @@
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII

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@@ -94,7 +94,4 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* I2C */
#define CONFIG_SYS_I2C_SPEED 100000
#endif /* __IMX8MM_ICORE_MX8MM_H */

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@@ -112,9 +112,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* I2C */
#define CONFIG_SYS_I2C_SPEED 100000
/* FEC */
#define CONFIG_ETHPRIME "eth0"
#define CONFIG_FEC_XCV_TYPE RGMII

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@@ -93,6 +93,4 @@
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_SYS_I2C_SPEED 100000
#endif

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@@ -118,6 +118,4 @@
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_SYS_I2C_SPEED 100000
#endif

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@@ -138,9 +138,6 @@
#define CONFIG_MXC_GPIO
/* I2C Configs */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_OF_SYSTEM_SETUP
#ifndef CONFIG_SPL_BUILD

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@@ -183,9 +183,6 @@
#define CONFIG_MXC_GPIO
/* I2C Configs */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_OF_SYSTEM_SETUP
#ifndef CONFIG_SPL_BUILD

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@@ -192,7 +192,6 @@
* I2C
*/
#define CONFIG_SYS_I2C_INIT_BOARD
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_MAX_HOPS 1

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@@ -18,8 +18,6 @@
/* I2C */
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
/* SPI NOR flash default params, used by sf commands */

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@@ -55,7 +55,6 @@
* I2C
*/
#define CONFIG_I2C_MV
#define CONFIG_SYS_I2C_SLAVE 0x0
/*
* Environment

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@@ -55,7 +55,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1

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@@ -42,7 +42,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
#define CONFIG_POWER

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@@ -29,7 +29,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \

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@@ -21,7 +21,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \

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@@ -111,7 +111,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1

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@@ -145,7 +145,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* Network */
#define CONFIG_FEC_MXC

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@@ -41,7 +41,6 @@
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
#endif
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1

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@@ -38,7 +38,6 @@
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
#endif
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1

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@@ -22,7 +22,6 @@
/* I2C configs */
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1

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@@ -25,7 +25,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_EDID
/* MMC Configs */

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@@ -57,7 +57,6 @@
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_SPD_BUS_NUM 0
/* I2C EEPROM */

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@@ -38,7 +38,6 @@
/* I2C configs */
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_SPEED 100000
#endif
/* Miscellaneous configurable options */

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@@ -117,9 +117,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* I2C */
#define CONFIG_SYS_I2C_SPEED 100000
/* ENET1 */
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII

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@@ -115,7 +115,4 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
/* I2C */
#define CONFIG_SYS_I2C_SPEED 100000
#endif /* __PHYCORE_IMX8MP_H */

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@@ -128,7 +128,6 @@
/* I2C configs */
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
/* environment organization */
/* Environment starts at 768k = 768 * 1024 = 786432 */

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@@ -131,7 +131,6 @@
#define CONFIG_SYS_I2C_MXC_I2C2
#define CONFIG_SYS_I2C_MXC_I2C3
#define CONFIG_SYS_I2C_MXC_I2C4
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
#define CONFIG_POWER

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@@ -162,9 +162,6 @@
#define CONFIG_MXC_GPIO
/* I2C Configs */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_OF_SYSTEM_SETUP
#ifndef CONFIG_SPL_BUILD

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@@ -32,9 +32,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 1GB */
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_FACTORYSET
#ifndef CONFIG_SPL_BUILD

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@@ -34,9 +34,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 100000
#define EEPROM_ADDR_DDR3 0x90
#define EEPROM_ADDR_CHIP 0x120

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@@ -23,9 +23,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MiB */
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_FACTORYSET
/* Watchdog */

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@@ -194,15 +194,6 @@
/* I2C */
#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#endif
#endif
#if defined(CONFIG_VIDEO_LCD_PANEL_I2C)
/* We use pin names in Kconfig and sunxi_name_to_gpio() */
#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda

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@@ -25,8 +25,6 @@
/* I2C */
#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
#define CONFIG_I2C_MVTWSI_BASE1 MVEBU_TWSI1_BASE
#define CONFIG_SYS_I2C_SLAVE 0x0
#define CONFIG_SYS_I2C_SPEED 100000
/* USB/EHCI configuration */
#define CONFIG_EHCI_IS_TDI

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@@ -27,9 +27,6 @@
/* Physical Memory Map */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 100000
#define EEPROM_ADDR_DDR3 0x90
#define EEPROM_ADDR_CHIP 0x120

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@@ -36,7 +36,6 @@
/* I2C Configs */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 100000
/* I2C EEPROM (M24C64) */
#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS 5 /* 32 Bytes */

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@@ -60,7 +60,6 @@
* I2C
*/
#define CONFIG_I2C_MV
#define CONFIG_SYS_I2C_SLAVE 0x0
/* Environment in SPI NOR flash */

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@@ -73,7 +73,6 @@
/* I2C configs */
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
#define CONFIG_POWER

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@@ -110,7 +110,6 @@
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_SYS_I2C_SPEED 100000
/* ENET */
#define CONFIG_ETHPRIME "FEC"

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@@ -46,7 +46,6 @@
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
#define CONFIG_POWER

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@@ -56,7 +56,6 @@
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
#define CONFIG_POWER

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@@ -137,7 +137,6 @@
/* I2C configs */
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_SPEED 100000
/* environment organization */

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@@ -43,20 +43,6 @@
#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
/* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
/*
* I2C driver
*/
#define CONFIG_SYS_I2C_SPEED 350000
/*
* I2C EEPROM
*/
/*
* I2C RTC
*/
#define CONFIG_RTC_DS1374
/*

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@@ -26,7 +26,6 @@
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
#define CONFIG_SYS_I2C_SPEED 100000
/* Miscellaneous configurable options */

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@@ -746,16 +746,6 @@ extern struct i2c_bus_hose i2c_bus[];
# endif
#endif
/*
* Many boards/controllers/drivers don't support an I2C slave interface so
* provide a default slave address for them for use in common code. A real
* value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
* support a slave interface.
*/
#ifndef CONFIG_SYS_I2C_SLAVE
#define CONFIG_SYS_I2C_SLAVE 0xfe
#endif
/*
* Initialization, must be called once on start up, may be called
* repeatedly to change the speed and slave addresses.