dm: arm: ls1021a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C for SoC LS1021A Signed-off-by: Biwen Li <biwen.li@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
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@@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2016 Freescale Semiconductor, Inc.
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* Copyright 2019 NXP
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*/
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#ifndef __CONFIG_H
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@@ -97,7 +98,13 @@
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* I2C
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*/
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#define CONFIG_CMD_I2C
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#ifndef CONFIG_DM_I2C
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#define CONFIG_SYS_I2C
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#else
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#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
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#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
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#endif
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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@@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Copyright 2019 NXP
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*/
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#ifndef __CONFIG_H
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@@ -331,7 +332,12 @@ unsigned long get_board_ddr_clk(void);
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/*
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* I2C
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*/
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#ifndef CONFIG_DM_I2C
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#define CONFIG_SYS_I2C
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#else
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#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
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#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
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#endif
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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@@ -1,5 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0
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* Copyright 2016-2018 NXP Semiconductors
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* Copyright 2016-2019 NXP Semiconductors
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* Copyright 2019 Vladimir Oltean <olteanv@gmail.com>
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*/
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@@ -107,7 +107,12 @@
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#define CONFIG_BAUDRATE 115200
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/* I2C */
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#ifndef CONFIG_DM_I2C
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#define CONFIG_SYS_I2C
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#else
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#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
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#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
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#endif
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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@@ -1,6 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Copyright 2019 NXP
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*/
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#ifndef __CONFIG_H
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@@ -209,7 +210,12 @@
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/*
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* I2C
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*/
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#ifndef CONFIG_DM_I2C
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#define CONFIG_SYS_I2C
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#else
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#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
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#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
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#endif
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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@@ -446,6 +452,7 @@
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
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#undef CONFIG_DM_I2C
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#else
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
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#endif
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