From 398b1d57a6a56aada1f77198746a7dd1b038cd5d Mon Sep 17 00:00:00 2001 From: Arun Bhanu Date: Thu, 15 Apr 2010 18:27:17 +0800 Subject: [PATCH 01/76] microblaze: Add FDT support This patch adds FDT (flattened device tree) support to microblaze arch. Tested with Linux arch/microblaze kernels with and without compiled in FDT on Xilinx ML506 board. Signed-off-by: Arun Bhanu Signed-off-by: Michal Simek --- arch/microblaze/lib/bootm.c | 39 ++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-) diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index bce4774fe3..fef563b483 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -35,22 +35,51 @@ DECLARE_GLOBAL_DATA_PTR; int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) { /* First parameter is mapped to $r5 for kernel boot args */ - void (*theKernel) (char *); + void (*theKernel) (char *, ulong, ulong); char *commandline = getenv ("bootargs"); + ulong rd_data_start, rd_data_end; if ((flag != 0) && (flag != BOOTM_STATE_OS_GO)) return 1; - theKernel = (void (*)(char *))images->ep; + int ret; + + char *of_flat_tree = NULL; +#if defined(CONFIG_OF_LIBFDT) + ulong of_size = 0; + + /* find flattened device tree */ + ret = boot_get_fdt (flag, argc, argv, images, &of_flat_tree, &of_size); + if (ret) + return 1; +#endif + + theKernel = (void (*)(char *, ulong, ulong))images->ep; + + /* find ramdisk */ + ret = boot_get_ramdisk (argc, argv, images, IH_ARCH_MICROBLAZE, + &rd_data_start, &rd_data_end); + if (ret) + return 1; show_boot_progress (15); + if (!(ulong) of_flat_tree) + of_flat_tree = (char *)simple_strtoul (argv[3], NULL, 16); + #ifdef DEBUG - printf ("## Transferring control to Linux (at address %08lx) ...\n", - (ulong) theKernel); + printf ("## Transferring control to Linux (at address 0x%08lx) " \ + "ramdisk 0x%08lx, FDT 0x%08lx...\n", + (ulong) theKernel, rd_data_start, (ulong) of_flat_tree); #endif - theKernel (commandline); + /* + * Linux Kernel Parameters (passing device tree): + * r5: pointer to command line + * r6: pointer to ramdisk + * r7: pointer to the fdt, followed by the board info data + */ + theKernel (commandline, rd_data_start, (ulong) of_flat_tree); /* does not return */ return 1; From cc53690e05f47b4c25e0a528de50e024fc0164ad Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 16 Apr 2010 11:30:16 +0200 Subject: [PATCH 02/76] microblaze: Fix irq.S code It is ancient code. There is possible to save several instructions just if we use offset instead of addik Signed-off-by: Michal Simek --- arch/microblaze/cpu/irq.S | 182 +++++++++++++------------------------- 1 file changed, 62 insertions(+), 120 deletions(-) diff --git a/arch/microblaze/cpu/irq.S b/arch/microblaze/cpu/irq.S index e1fc19046c..47bba36f21 100644 --- a/arch/microblaze/cpu/irq.S +++ b/arch/microblaze/cpu/irq.S @@ -27,129 +27,71 @@ .text .global _interrupt_handler _interrupt_handler: - addi r1, r1, -4 - swi r2, r1, 0 - addi r1, r1, -4 - swi r3, r1, 0 - addi r1, r1, -4 - swi r4, r1, 0 - addi r1, r1, -4 - swi r5, r1, 0 - addi r1, r1, -4 - swi r6, r1, 0 - addi r1, r1, -4 - swi r7, r1, 0 - addi r1, r1, -4 - swi r8, r1, 0 - addi r1, r1, -4 - swi r9, r1, 0 - addi r1, r1, -4 - swi r10, r1, 0 - addi r1, r1, -4 - swi r11, r1, 0 - addi r1, r1, -4 - swi r12, r1, 0 - addi r1, r1, -4 - swi r13, r1, 0 - addi r1, r1, -4 - swi r14, r1, 0 - addi r1, r1, -4 - swi r15, r1, 0 - addi r1, r1, -4 - swi r16, r1, 0 - addi r1, r1, -4 - swi r17, r1, 0 - addi r1, r1, -4 - swi r18, r1, 0 - addi r1, r1, -4 - swi r19, r1, 0 - addi r1, r1, -4 - swi r20, r1, 0 - addi r1, r1, -4 - swi r21, r1, 0 - addi r1, r1, -4 - swi r22, r1, 0 - addi r1, r1, -4 - swi r23, r1, 0 - addi r1, r1, -4 - swi r24, r1, 0 - addi r1, r1, -4 - swi r25, r1, 0 - addi r1, r1, -4 - swi r26, r1, 0 - addi r1, r1, -4 - swi r27, r1, 0 - addi r1, r1, -4 - swi r28, r1, 0 - addi r1, r1, -4 - swi r29, r1, 0 - addi r1, r1, -4 - swi r30, r1, 0 - addi r1, r1, -4 - swi r31, r1, 0 + swi r2, r1, -4 + swi r3, r1, -8 + swi r4, r1, -12 + swi r5, r1, -16 + swi r6, r1, -20 + swi r7, r1, -24 + swi r8, r1, -28 + swi r9, r1, -32 + swi r10, r1, -36 + swi r11, r1, -40 + swi r12, r1, -44 + swi r13, r1, -48 + swi r14, r1, -52 + swi r15, r1, -56 + swi r16, r1, -60 + swi r17, r1, -64 + swi r18, r1, -68 + swi r19, r1, -72 + swi r20, r1, -76 + swi r21, r1, -80 + swi r22, r1, -84 + swi r23, r1, -88 + swi r24, r1, -92 + swi r25, r1, -96 + swi r26, r1, -100 + swi r27, r1, -104 + swi r28, r1, -108 + swi r29, r1, -112 + swi r30, r1, -116 + swi r31, r1, -120 + addik r1, r1, -124 brlid r15, interrupt_handler nop nop - lwi r31, r1, 0 - addi r1, r1, 4 - lwi r30, r1, 0 - addi r1, r1, 4 - lwi r29, r1, 0 - addi r1, r1, 4 - lwi r28, r1, 0 - addi r1, r1, 4 - lwi r27, r1, 0 - addi r1, r1, 4 - lwi r26, r1, 0 - addi r1, r1, 4 - lwi r25, r1, 0 - addi r1, r1, 4 - lwi r24, r1, 0 - addi r1, r1, 4 - lwi r23, r1, 0 - addi r1, r1, 4 - lwi r22, r1, 0 - addi r1, r1, 4 - lwi r21, r1, 0 - addi r1, r1, 4 - lwi r20, r1, 0 - addi r1, r1, 4 - lwi r19, r1, 0 - addi r1, r1, 4 - lwi r18, r1, 0 - addi r1, r1, 4 - lwi r17, r1, 0 - addi r1, r1, 4 - lwi r16, r1, 0 - addi r1, r1, 4 - lwi r15, r1, 0 - addi r1, r1, 4 - lwi r14, r1, 0 - addi r1, r1, 4 - lwi r13, r1, 0 - addi r1, r1, 4 - lwi r12, r1, 0 - addi r1, r1, 4 - lwi r11, r1, 0 - addi r1, r1, 4 - lwi r10, r1, 0 - addi r1, r1, 4 - lwi r9, r1, 0 - addi r1, r1, 4 - lwi r8, r1, 0 - addi r1, r1, 4 - lwi r7, r1, 0 - addi r1, r1, 4 - lwi r6, r1, 0 - addi r1, r1, 4 - lwi r5, r1, 0 - addi r1, r1, 4 - lwi r4, r1, 0 - addi r1, r1, 4 - lwi r3, r1, 0 - addi r1, r1, 4 - lwi r2, r1, 0 - addi r1, r1, 4 + addik r1, r1, 124 + lwi r31, r1, -120 + lwi r30, r1, -116 + lwi r29, r1, -112 + lwi r28, r1, -108 + lwi r27, r1, -104 + lwi r26, r1, -100 + lwi r25, r1, -96 + lwi r24, r1, -92 + lwi r23, r1, -88 + lwi r22, r1, -84 + lwi r21, r1, -80 + lwi r20, r1, -76 + lwi r19, r1, -72 + lwi r18, r1, -68 + lwi r17, r1, -64 + lwi r16, r1, -60 + lwi r15, r1, -56 + lwi r14, r1, -52 + lwi r13, r1, -48 + lwi r12, r1, -44 + lwi r11, r1, -40 + lwi r10, r1, -36 + lwi r9, r1, -32 + lwi r8, r1, -28 + lwi r7, r1, -24 + lwi r6, r1, -20 + lwi r5, r1, -16 + lwi r4, r1, -12 + lwi r3, r1, -8 + lwi r2, r1, -4 /* enable_interrupt */ #ifdef XILINX_USE_MSR_INSTR From 5bbcb6cf22b1121d8c3e56b0e1fb84366e903ac7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 16 Apr 2010 11:37:41 +0200 Subject: [PATCH 03/76] microblaze: Move timer initialization to board.c I would like to handle case where system doesn't contain intc that's why I need timer initialization out of intc code. Signed-off-by: Michal Simek --- arch/microblaze/cpu/interrupts.c | 6 ------ arch/microblaze/cpu/timer.c | 3 ++- arch/microblaze/lib/board.c | 7 +++++++ 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c index a6021c99c3..b8db68afd0 100644 --- a/arch/microblaze/cpu/interrupts.c +++ b/arch/microblaze/cpu/interrupts.c @@ -46,9 +46,6 @@ int disable_interrupts (void) } #ifdef CONFIG_SYS_INTC_0 -#ifdef CONFIG_SYS_TIMER_0 -extern void timer_init (void); -#endif #ifdef CONFIG_SYS_FSL_2 extern void fsl_init2 (void); #endif @@ -142,9 +139,6 @@ int interrupts_init (void) } /* initialize intc controller */ intc_init (); -#ifdef CONFIG_SYS_TIMER_0 - timer_init (); -#endif #ifdef CONFIG_SYS_FSL_2 fsl_init2 (); #endif diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c index a91eabc642..4936c628ab 100644 --- a/arch/microblaze/cpu/timer.c +++ b/arch/microblaze/cpu/timer.c @@ -60,7 +60,7 @@ void timer_isr (void *arg) tmr->control = tmr->control | TIMER_INTERRUPT; } -void timer_init (void) +int timer_init (void) { tmr->loadreg = CONFIG_SYS_TIMER_0_PRELOAD; tmr->control = TIMER_INTERRUPT | TIMER_RESET; @@ -68,6 +68,7 @@ void timer_init (void) TIMER_ENABLE | TIMER_ENABLE_INTR | TIMER_RELOAD | TIMER_DOWN_COUNT; reset_timer (); install_interrupt_handler (CONFIG_SYS_TIMER_0_IRQ, timer_isr, (void *)tmr); + return 0; } #endif #endif diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index d4baea930a..7dfa71c0fb 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -44,6 +44,10 @@ extern int interrupts_init (void); #if defined(CONFIG_CMD_NET) extern int eth_init (bd_t * bis); #endif +#ifdef CONFIG_SYS_TIMER_0 +extern int timer_init (void); +#endif + /* * All attempts to come up with a "common" initialization sequence @@ -67,6 +71,9 @@ init_fnc_t *init_sequence[] = { #endif #ifdef CONFIG_SYS_INTC_0 interrupts_init, +#endif +#ifdef CONFIG_SYS_TIMER_0 + timer_init, #endif NULL, }; From b26640971a7ba8800f0eb32af145ff0727fe21fe Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 16 Apr 2010 11:43:43 +0200 Subject: [PATCH 04/76] microblaze: Move FSL initialization to board.c Move FSL out of interrupt controller. Signed-off-by: Michal Simek --- arch/microblaze/cpu/interrupts.c | 7 ------- arch/microblaze/lib/board.c | 7 ++++++- board/xilinx/microblaze-generic/microblaze-generic.c | 7 +++---- 3 files changed, 9 insertions(+), 12 deletions(-) diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c index b8db68afd0..0fe9f5c610 100644 --- a/arch/microblaze/cpu/interrupts.c +++ b/arch/microblaze/cpu/interrupts.c @@ -46,10 +46,6 @@ int disable_interrupts (void) } #ifdef CONFIG_SYS_INTC_0 -#ifdef CONFIG_SYS_FSL_2 -extern void fsl_init2 (void); -#endif - static struct irq_action vecs[CONFIG_SYS_INTC_0_NUM]; @@ -139,9 +135,6 @@ int interrupts_init (void) } /* initialize intc controller */ intc_init (); -#ifdef CONFIG_SYS_FSL_2 - fsl_init2 (); -#endif enable_interrupts (); return 0; } diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index 7dfa71c0fb..1d44a64565 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -47,7 +47,9 @@ extern int eth_init (bd_t * bis); #ifdef CONFIG_SYS_TIMER_0 extern int timer_init (void); #endif - +#ifdef CONFIG_SYS_FSL_2 +extern void fsl_init2 (void); +#endif /* * All attempts to come up with a "common" initialization sequence @@ -74,6 +76,9 @@ init_fnc_t *init_sequence[] = { #endif #ifdef CONFIG_SYS_TIMER_0 timer_init, +#endif +#ifdef CONFIG_SYS_FSL_2 + fsl_init2, #endif NULL, }; diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index f388b775c2..838f1315b3 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -60,10 +60,9 @@ void fsl_isr2 (void *arg) { puts("*"); } -void fsl_init2 (void) { +int fsl_init2 (void) { puts("fsl_init2\n"); - install_interrupt_handler (FSL_INTR_2,\ - fsl_isr2,\ - NULL); + install_interrupt_handler (FSL_INTR_2, fsl_isr2, NULL); + return 0; } #endif From 8125c980cc282000cbddb415f8ddbebf96e4edb4 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 16 Apr 2010 11:51:59 +0200 Subject: [PATCH 05/76] microblaze: Fix interrupt handler code It is better to read ivr and react on it than do long parsing from two regs. Interrupt controller returs actual irq number. Signed-off-by: Michal Simek --- arch/microblaze/cpu/interrupts.c | 28 +++++++++++----------------- 1 file changed, 11 insertions(+), 17 deletions(-) diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c index 0fe9f5c610..7a9d022eee 100644 --- a/arch/microblaze/cpu/interrupts.c +++ b/arch/microblaze/cpu/interrupts.c @@ -141,8 +141,8 @@ int interrupts_init (void) void interrupt_handler (void) { - int irqs = (intc->isr & intc->ier); /* find active interrupt */ - int i = 1; + int irqs = intc->ivr; /* find active interrupt */ + int mask = 1; #ifdef DEBUG_INT int value; printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, @@ -150,23 +150,17 @@ void interrupt_handler (void) R14(value); printf ("Interrupt handler on %x line, r14 %x\n", irqs, value); #endif - struct irq_action *act = vecs; - while (irqs) { - if (irqs & 1) { + struct irq_action *act = vecs + irqs; + + intc->iar = mask << irqs; + #ifdef DEBUG_INT - printf - ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", - act->handler, act->count, act->arg); + printf + ("Jumping to interrupt handler rutine addr %x,count %x,arg %x\n", + act->handler, act->count, act->arg); #endif - act->handler (act->arg); - act->count++; - intc->iar = i; - return; - } - irqs >>= 1; - act++; - i <<= 1; - } + act->handler (act->arg); + act->count++; #ifdef DEBUG_INT printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr, From e6177b36b87d0ce627651e407b91245f16e5382e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 16 Apr 2010 11:55:01 +0200 Subject: [PATCH 06/76] microblaze: Change cache report messages It is more accurate to show that caches are OFF instead of FAIL. Signed-off-by: Michal Simek --- arch/microblaze/lib/board.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index 1d44a64565..41a1db6518 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -116,8 +116,8 @@ void board_init (void) } puts ("SDRAM :\n"); - printf ("\t\tIcache:%s\n", icache_status() ? "OK" : "FAIL"); - printf ("\t\tDcache:%s\n", dcache_status() ? "OK" : "FAIL"); + printf ("\t\tIcache:%s\n", icache_status() ? "ON" : "OFF"); + printf ("\t\tDcache:%s\n", dcache_status() ? "ON" : "OFF"); printf ("\tU-Boot Start:0x%08x\n", TEXT_BASE); #if defined(CONFIG_CMD_FLASH) From 9769b73f60fc0fb8de7ab16ff6300eae56505020 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 16 Apr 2010 11:57:35 +0200 Subject: [PATCH 07/76] microblaze: Change initialization sequence env_relocation should be called first. Added stdio_init too. Signed-off-by: Michal Simek --- arch/microblaze/lib/board.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c index 41a1db6518..3ff5c17d24 100644 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@ -30,6 +30,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -88,6 +89,7 @@ void board_init (void) bd_t *bd; init_fnc_t **init_fnc_ptr; gd = (gd_t *) CONFIG_SYS_GBL_DATA_OFFSET; + char *s; #if defined(CONFIG_CMD_FLASH) ulong flash_size = 0; #endif @@ -151,15 +153,22 @@ void board_init (void) } #endif + /* relocate environment function pointers etc. */ + env_relocate (); + + /* Initialize stdio devices */ + stdio_init (); + + if ((s = getenv ("loadaddr")) != NULL) { + load_addr = simple_strtoul (s, NULL, 16); + } + #if defined(CONFIG_CMD_NET) /* IP Address */ bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); eth_init (bd); #endif - /* relocate environment function pointers etc. */ - env_relocate (); - /* main_loop */ for (;;) { WATCHDOG_RESET (); From 70524883b0424277e5b3ff3768c0c5628b5fce44 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 16 Apr 2010 11:59:29 +0200 Subject: [PATCH 08/76] microblaze: Support system with WB cache WB cache use different instruction that WT cache but the major code is that same. That means that wdc.flush on system with WT cache do the same thing as before. You need newer toolchain with wdc.flush support. Signed-off-by: Michal Simek --- arch/microblaze/lib/cache.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/microblaze/lib/cache.c b/arch/microblaze/lib/cache.c index 4b2e8e3790..9b6b60f73c 100644 --- a/arch/microblaze/lib/cache.c +++ b/arch/microblaze/lib/cache.c @@ -34,7 +34,7 @@ void flush_cache (ulong addr, ulong size) #endif "nop;" #ifdef CONFIG_DCACHE - "wdc %0, r0;" + "wdc.flush %0, r0;" #endif "nop;" : From 9b4d90569028604bc491ea419187c31e4467bdca Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 16 Apr 2010 12:01:32 +0200 Subject: [PATCH 09/76] microblaze: Flush cache before jumping to kernel There is used max cache size on system which doesn't define cache size. Signed-off-by: Michal Simek --- arch/microblaze/lib/bootm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c index fef563b483..2227a81bb0 100644 --- a/arch/microblaze/lib/bootm.c +++ b/arch/microblaze/lib/bootm.c @@ -73,6 +73,14 @@ int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) (ulong) theKernel, rd_data_start, (ulong) of_flat_tree); #endif +#ifdef XILINX_USE_DCACHE +#ifdef XILINX_DCACHE_BYTE_SIZE + flush_cache(0, XILINX_DCACHE_BYTE_SIZE); +#else +#warning please rebuild BSPs and update configuration + flush_cache(0, 32768); +#endif +#endif /* * Linux Kernel Parameters (passing device tree): * r5: pointer to command line From 8ff972c6e99938f1a033e5500dccc9a37ce3406f Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 16 Apr 2010 12:56:33 +0200 Subject: [PATCH 10/76] microblaze: Consolidate cache code Merge cpu and lib cache code. Flush cache before disabling. Signed-off-by: Michal Simek --- arch/microblaze/cpu/cache.c | 28 +++++++++++++++++++++++ arch/microblaze/lib/Makefile | 1 - arch/microblaze/lib/cache.c | 43 ------------------------------------ 3 files changed, 28 insertions(+), 44 deletions(-) delete mode 100644 arch/microblaze/lib/cache.c diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c index 3b7c4d4f7f..d258a69382 100644 --- a/arch/microblaze/cpu/cache.c +++ b/arch/microblaze/cpu/cache.c @@ -50,6 +50,8 @@ void icache_enable (void) { } void icache_disable(void) { + /* we are not generate ICACHE size -> flush whole cache */ + flush_cache(0, 32768); MSRCLR(0x20); } @@ -58,5 +60,31 @@ void dcache_enable (void) { } void dcache_disable(void) { +#ifdef XILINX_USE_DCACHE +#ifdef XILINX_DCACHE_BYTE_SIZE + flush_cache(0, XILINX_DCACHE_BYTE_SIZE); +#else +#warning please rebuild BSPs and update configuration + flush_cache(0, 32768); +#endif +#endif MSRCLR(0x80); } + +void flush_cache (ulong addr, ulong size) +{ + int i; + for (i = 0; i < size; i += 4) + asm volatile ( +#ifdef CONFIG_ICACHE + "wic %0, r0;" +#endif + "nop;" +#ifdef CONFIG_DCACHE + "wdc.flush %0, r0;" +#endif + "nop;" + : + : "r" (addr + i) + : "memory"); +} diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile index 9b0f296e3f..817643795e 100644 --- a/arch/microblaze/lib/Makefile +++ b/arch/microblaze/lib/Makefile @@ -29,7 +29,6 @@ SOBJS-y += COBJS-y += board.o COBJS-y += bootm.o -COBJS-y += cache.o COBJS-y += time.o SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) diff --git a/arch/microblaze/lib/cache.c b/arch/microblaze/lib/cache.c deleted file mode 100644 index 9b6b60f73c..0000000000 --- a/arch/microblaze/lib/cache.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * (C) Copyright 2004 Atmark Techno, Inc. - * - * Yasushi SHOJI - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -void flush_cache (ulong addr, ulong size) -{ - int i; - for (i = 0; i < size; i += 4) - asm volatile ( -#ifdef CONFIG_ICACHE - "wic %0, r0;" -#endif - "nop;" -#ifdef CONFIG_DCACHE - "wdc.flush %0, r0;" -#endif - "nop;" - : - : "r" (addr + i) - : "memory"); -} From 254ab7bd464657600aba69d840406f9358f3e116 Mon Sep 17 00:00:00 2001 From: Scott McNutt Date: Fri, 16 Apr 2010 16:12:39 -0400 Subject: [PATCH 11/76] nios2: Move individual board linker scripts to common script in cpu tree. Signed-off-by: Scott McNutt --- arch/nios2/config.mk | 2 + .../ep1c20 => arch/nios2/cpu}/u-boot.lds | 2 +- board/altera/ep1s10/u-boot.lds | 135 ----------------- board/altera/ep1s40/u-boot.lds | 135 ----------------- board/psyent/pci5441/u-boot.lds | 136 ------------------ board/psyent/pk1c20/u-boot.lds | 136 ------------------ 6 files changed, 3 insertions(+), 543 deletions(-) rename {board/altera/ep1c20 => arch/nios2/cpu}/u-boot.lds (98%) delete mode 100644 board/altera/ep1s10/u-boot.lds delete mode 100644 board/altera/ep1s40/u-boot.lds delete mode 100644 board/psyent/pci5441/u-boot.lds delete mode 100644 board/psyent/pk1c20/u-boot.lds diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk index be40639280..f455982f3a 100644 --- a/arch/nios2/config.mk +++ b/arch/nios2/config.mk @@ -28,3 +28,5 @@ STANDALONE_LOAD_ADDR = 0x02000000 -L $(gcclibdir) PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__ PLATFORM_CPPFLAGS += -ffixed-r15 -G0 + +LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds diff --git a/board/altera/ep1c20/u-boot.lds b/arch/nios2/cpu/u-boot.lds similarity index 98% rename from board/altera/ep1c20/u-boot.lds rename to arch/nios2/cpu/u-boot.lds index b909e94f8f..fe4a2ebcc7 100644 --- a/board/altera/ep1c20/u-boot.lds +++ b/arch/nios2/cpu/u-boot.lds @@ -30,7 +30,7 @@ SECTIONS { .text : { - arch/nios/cpu2/start.o (.text) + arch/nios2/cpu/start.o (.text) *(.text) *(.text.*) *(.gnu.linkonce.t*) diff --git a/board/altera/ep1s10/u-boot.lds b/board/altera/ep1s10/u-boot.lds deleted file mode 100644 index b909e94f8f..0000000000 --- a/board/altera/ep1s10/u-boot.lds +++ /dev/null @@ -1,135 +0,0 @@ -/* - * (C) Copyright 2004, Psyent Corporation - * Scott McNutt - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -OUTPUT_FORMAT("elf32-littlenios2") -OUTPUT_ARCH(nios2) -ENTRY(_start) - -SECTIONS -{ - .text : - { - arch/nios/cpu2/start.o (.text) - *(.text) - *(.text.*) - *(.gnu.linkonce.t*) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - *(.gnu.linkonce.r*) - } - . = ALIGN (4); - _etext = .; - PROVIDE (etext = .); - - /* CMD TABLE - sandwich this in between text and data so - * the initialization code relocates the command table as - * well -- admittedly, this is just pure laziness ;-) - */ - __u_boot_cmd_start = .; - .u_boot_cmd : - { - *(.u_boot_cmd) - } - . = ALIGN(4); - __u_boot_cmd_end = .; - - /* INIT DATA sections - "Small" data (see the gcc -G option) - * is always gp-relative. Here we make all init data sections - * adjacent to simplify the startup code -- and provide - * the global pointer for gp-relative access. - */ - _data = .; - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - } - - . = ALIGN(16); - _gp = .; /* Global pointer addr */ - PROVIDE (gp = .); - - .sdata : - { - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - } - . = ALIGN(4); - - _edata = .; - PROVIDE (edata = .); - - /* UNINIT DATA - Small uninitialized data is first so it's - * adjacent to sdata and can be referenced via gp. The normal - * bss follows. We keep it adjacent to simplify init code. - */ - __bss_start = .; - .sbss (NOLOAD) : - { - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - } - . = ALIGN(4); - .bss (NOLOAD) : - { - *(.bss) - *(.bss.*) - *(.dynbss) - *(COMMON) - *(.scommon) - } - . = ALIGN(4); - _end = .; - PROVIDE (end = .); - - /* DEBUG -- symbol table, string table, etc. etc. - */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} diff --git a/board/altera/ep1s40/u-boot.lds b/board/altera/ep1s40/u-boot.lds deleted file mode 100644 index b909e94f8f..0000000000 --- a/board/altera/ep1s40/u-boot.lds +++ /dev/null @@ -1,135 +0,0 @@ -/* - * (C) Copyright 2004, Psyent Corporation - * Scott McNutt - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -OUTPUT_FORMAT("elf32-littlenios2") -OUTPUT_ARCH(nios2) -ENTRY(_start) - -SECTIONS -{ - .text : - { - arch/nios/cpu2/start.o (.text) - *(.text) - *(.text.*) - *(.gnu.linkonce.t*) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - *(.gnu.linkonce.r*) - } - . = ALIGN (4); - _etext = .; - PROVIDE (etext = .); - - /* CMD TABLE - sandwich this in between text and data so - * the initialization code relocates the command table as - * well -- admittedly, this is just pure laziness ;-) - */ - __u_boot_cmd_start = .; - .u_boot_cmd : - { - *(.u_boot_cmd) - } - . = ALIGN(4); - __u_boot_cmd_end = .; - - /* INIT DATA sections - "Small" data (see the gcc -G option) - * is always gp-relative. Here we make all init data sections - * adjacent to simplify the startup code -- and provide - * the global pointer for gp-relative access. - */ - _data = .; - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - } - - . = ALIGN(16); - _gp = .; /* Global pointer addr */ - PROVIDE (gp = .); - - .sdata : - { - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - } - . = ALIGN(4); - - _edata = .; - PROVIDE (edata = .); - - /* UNINIT DATA - Small uninitialized data is first so it's - * adjacent to sdata and can be referenced via gp. The normal - * bss follows. We keep it adjacent to simplify init code. - */ - __bss_start = .; - .sbss (NOLOAD) : - { - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - } - . = ALIGN(4); - .bss (NOLOAD) : - { - *(.bss) - *(.bss.*) - *(.dynbss) - *(COMMON) - *(.scommon) - } - . = ALIGN(4); - _end = .; - PROVIDE (end = .); - - /* DEBUG -- symbol table, string table, etc. etc. - */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} diff --git a/board/psyent/pci5441/u-boot.lds b/board/psyent/pci5441/u-boot.lds deleted file mode 100644 index f155800a64..0000000000 --- a/board/psyent/pci5441/u-boot.lds +++ /dev/null @@ -1,136 +0,0 @@ -/* - * (C) Copyright 2004, Psyent Corporation - * Scott McNutt - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -OUTPUT_FORMAT("elf32-littlenios2") -OUTPUT_ARCH(nios2) -ENTRY(_start) - -SECTIONS -{ - .text : - { - arch/nios/cpu2/start.o (.text) - *(.text) - *(.text.*) - *(.gnu.linkonce.t*) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - *(.gnu.linkonce.r*) - } - . = ALIGN (4); - _etext = .; - PROVIDE (etext = .); - - /* CMD TABLE - sandwich this in between text and data so - * the initialization code relocates the command table as - * well -- admittedly, this is just pure laziness ;-) - */ - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : - { - *(.u_boot_cmd) - } - . = ALIGN(4); - __u_boot_cmd_end = .; - - /* INIT DATA sections - "Small" data (see the gcc -G option) - * is always gp-relative. Here we make all init data sections - * adjacent to simplify the startup code -- and provide - * the global pointer for gp-relative access. - */ - _data = .; - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - } - - . = ALIGN(16); - _gp = .; /* Global pointer addr */ - PROVIDE (gp = .); - - .sdata : - { - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - } - . = ALIGN(4); - - _edata = .; - PROVIDE (edata = .); - - /* UNINIT DATA - Small uninitialized data is first so it's - * adjacent to sdata and can be referenced via gp. The normal - * bss follows. We keep it adjacent to simplify init code. - */ - __bss_start = .; - .sbss (NOLOAD) : - { - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - } - . = ALIGN(4); - .bss (NOLOAD) : - { - *(.bss) - *(.bss.*) - *(.dynbss) - *(COMMON) - *(.scommon) - } - . = ALIGN(4); - _end = .; - PROVIDE (end = .); - - /* DEBUG -- symbol table, string table, etc. etc. - */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} diff --git a/board/psyent/pk1c20/u-boot.lds b/board/psyent/pk1c20/u-boot.lds deleted file mode 100644 index f155800a64..0000000000 --- a/board/psyent/pk1c20/u-boot.lds +++ /dev/null @@ -1,136 +0,0 @@ -/* - * (C) Copyright 2004, Psyent Corporation - * Scott McNutt - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -OUTPUT_FORMAT("elf32-littlenios2") -OUTPUT_ARCH(nios2) -ENTRY(_start) - -SECTIONS -{ - .text : - { - arch/nios/cpu2/start.o (.text) - *(.text) - *(.text.*) - *(.gnu.linkonce.t*) - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - *(.gnu.linkonce.r*) - } - . = ALIGN (4); - _etext = .; - PROVIDE (etext = .); - - /* CMD TABLE - sandwich this in between text and data so - * the initialization code relocates the command table as - * well -- admittedly, this is just pure laziness ;-) - */ - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : - { - *(.u_boot_cmd) - } - . = ALIGN(4); - __u_boot_cmd_end = .; - - /* INIT DATA sections - "Small" data (see the gcc -G option) - * is always gp-relative. Here we make all init data sections - * adjacent to simplify the startup code -- and provide - * the global pointer for gp-relative access. - */ - _data = .; - .data : - { - *(.data) - *(.data.*) - *(.gnu.linkonce.d*) - } - - . = ALIGN(16); - _gp = .; /* Global pointer addr */ - PROVIDE (gp = .); - - .sdata : - { - *(.sdata) - *(.sdata.*) - *(.gnu.linkonce.s.*) - } - . = ALIGN(4); - - _edata = .; - PROVIDE (edata = .); - - /* UNINIT DATA - Small uninitialized data is first so it's - * adjacent to sdata and can be referenced via gp. The normal - * bss follows. We keep it adjacent to simplify init code. - */ - __bss_start = .; - .sbss (NOLOAD) : - { - *(.sbss) - *(.sbss.*) - *(.gnu.linkonce.sb.*) - *(.scommon) - } - . = ALIGN(4); - .bss (NOLOAD) : - { - *(.bss) - *(.bss.*) - *(.dynbss) - *(COMMON) - *(.scommon) - } - . = ALIGN(4); - _end = .; - PROVIDE (end = .); - - /* DEBUG -- symbol table, string table, etc. etc. - */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } -} From 26a33504a55e4882520f2e9da96ba6c22badb353 Mon Sep 17 00:00:00 2001 From: Richard Retanubun Date: Mon, 12 Apr 2010 15:08:17 -0400 Subject: [PATCH 12/76] fsl_i2c: Added a callpoint for i2c_board_late_init This patch adds a callpoint in i2c_init that allows board specific i2c board initialization (typically for i2c bus reset) that is called after i2c_init operations, allowing the i2c_board_late_init function to use the pre-configured i2c bus speed and slave address. --- README | 11 +++++++++++ drivers/i2c/fsl_i2c.c | 16 +++++++++++++--- include/i2c.h | 3 +++ 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/README b/README index 99320abadd..cf6b898249 100644 --- a/README +++ b/README @@ -1509,6 +1509,17 @@ The following options need to be configured: custom i2c_init_board() routine in boards/xxx/board.c is run early in the boot sequence. + CONFIG_SYS_I2C_BOARD_LATE_INIT + + An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is + defined a custom i2c_board_late_init() routine in + boards/xxx/board.c is run AFTER the operations in i2c_init() + is completed. This callpoint can be used to unreset i2c bus + using CPU i2c controller register accesses for CPUs whose i2c + controller provide such a method. It is called at the end of + i2c_init() to allow i2c_init operations to setup the i2c bus + controller on the CPU (e.g. setting bus speed & slave address). + CONFIG_I2CFAST (PPC405GP|PPC405EP only) This option enables configuration of bi_iic_fast[] flags diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 2241990f94..cb13deeea9 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -221,9 +221,10 @@ i2c_init(int speed, int slaveadd) unsigned int temp; #ifdef CONFIG_SYS_I2C_INIT_BOARD - /* call board specific i2c bus reset routine before accessing the */ - /* environment, which might be in a chip on that bus. For details */ - /* about this problem see doc/I2C_Edge_Conditions. */ + /* Call board specific i2c bus reset routine before accessing the + * environment, which might be in a chip on that bus. For details + * about this problem see doc/I2C_Edge_Conditions. + */ i2c_init_board(); #endif dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET); @@ -249,6 +250,15 @@ i2c_init(int speed, int slaveadd) writeb(0x0, &dev->sr); /* clear status register */ writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ #endif + +#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT + /* Call board specific i2c bus reset routine AFTER the bus has been + * initialized. Use either this callpoint or i2c_init_board; + * which is called before i2c_init operations. + * For details about this problem see doc/I2C_Edge_Conditions. + */ + i2c_board_late_init(); +#endif } static int diff --git a/include/i2c.h b/include/i2c.h index d828964256..cd23c8ac12 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -111,6 +111,9 @@ void i2c_init(int speed, int slaveaddr); #ifdef CONFIG_SYS_I2C_INIT_BOARD void i2c_init_board(void); #endif +#ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT +void i2c_board_late_init(void); +#endif #if defined(CONFIG_I2C_MUX) From cf6eb6da433179674571f9370566b1ec8989a41a Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Wed, 14 Apr 2010 13:57:18 +0200 Subject: [PATCH 13/76] ppc4xx: TLB init file cleanup This patch adds new macros, with frequently used combinations of the 4xx TLB access control and storage attibutes. Additionally the 4xx init.S files are updated to make use of these new macros. Resulting in easier to read TLB definitions. Additionally some init.S files are updated to use the mmu header for the TLB defines, instead of defining their own macros. Signed-off-by: Stefan Roese --- arch/ppc/include/asm/mmu.h | 5 +++ board/amcc/bamboo/init.S | 26 ++++++------ board/amcc/canyonlands/init.S | 48 +++++++++++----------- board/amcc/ebony/init.S | 12 +++--- board/amcc/katmai/init.S | 52 ++++++++++++------------ board/amcc/luan/init.S | 20 +++++----- board/amcc/ocotea/init.S | 12 +++--- board/amcc/redwood/init.S | 26 ++++++------ board/amcc/sequoia/init.S | 34 ++++++++-------- board/amcc/taishan/init.S | 61 ++++------------------------ board/amcc/yosemite/init.S | 69 +++++--------------------------- board/amcc/yucca/init.S | 58 +++++++++++++-------------- board/esd/du440/init.S | 30 +++++++------- board/esd/pmc440/init.S | 28 ++++++------- board/gdsys/gdppc440etx/init.S | 16 ++++---- board/gdsys/intip/init.S | 20 +++++----- board/korat/init.S | 22 +++++----- board/lwmon5/init.S | 30 +++++++------- board/netstal/hcu5/init.S | 30 +++++++------- board/pcs440ep/init.S | 65 +++++------------------------- board/prodrive/alpr/init.S | 71 ++++++--------------------------- board/prodrive/p3p440/init.S | 62 ++++------------------------ board/sandburst/karef/init.S | 66 +++++------------------------- board/sandburst/metrobox/init.S | 66 +++++------------------------- board/xes/xpedite1000/init.S | 60 ++++------------------------ 25 files changed, 313 insertions(+), 676 deletions(-) diff --git a/arch/ppc/include/asm/mmu.h b/arch/ppc/include/asm/mmu.h index ce7f081005..5166507f92 100644 --- a/arch/ppc/include/asm/mmu.h +++ b/arch/ppc/include/asm/mmu.h @@ -577,11 +577,16 @@ extern int num_tlb_entries; #define SA_M 0x00000200 /* Memory coherence */ #define SA_G 0x00000100 /* Guarded */ #define SA_E 0x00000080 /* Endian */ +/* Some additional macros for combinations often used */ +#define SA_IG (SA_I | SA_G) /* Access control */ #define AC_X 0x00000024 /* Execute */ #define AC_W 0x00000012 /* Write */ #define AC_R 0x00000009 /* Read */ +/* Some additional macros for combinations often used */ +#define AC_RW (AC_R | AC_W) +#define AC_RWX (AC_R | AC_W | AC_X) /* Some handy macros */ diff --git a/board/amcc/bamboo/init.S b/board/amcc/bamboo/init.S index 7439c805c2..6925921785 100644 --- a/board/amcc/bamboo/init.S +++ b/board/amcc/bamboo/init.S @@ -48,29 +48,29 @@ tlbtab: * speed up boot process. It is patched after relocation to enable SA_I */ #ifndef CONFIG_NAND_SPL - tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G) + tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G) #else - tlbentry(CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 0, AC_R|AC_W|AC_X|SA_G) - tlbentry(CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 0, AC_RWX | SA_G) + tlbentry(CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_IG) #endif /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G) + tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G) /* PCI base & peripherals */ - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I) - tlbentry(CONFIG_SYS_NAND_ADDR, SZ_4K, CONFIG_SYS_NAND_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I) + tlbentry(CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_RWX | SA_W|SA_I) + tlbentry(CONFIG_SYS_NAND_ADDR, SZ_4K, CONFIG_SYS_NAND_ADDR, 0, AC_RWX | SA_W|SA_I) /* PCI */ - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG) /* USB 2.0 Device */ - tlbentry(CONFIG_SYS_USB_DEVICE, SZ_1K, CONFIG_SYS_USB_DEVICE, 0, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_USB_DEVICE, SZ_1K, CONFIG_SYS_USB_DEVICE, 0, AC_RW | SA_IG) tlbtab_end @@ -81,7 +81,7 @@ tlbtab: */ #define TLB00 TLB0(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M) #define TLB01 TLB1(CONFIG_SYS_BOOT_BASE_ADDR, 0) -#define TLB02 TLB2(AC_R|AC_W|AC_X|SA_G|SA_I) +#define TLB02 TLB2(AC_RWX | SA_IG) .globl reconfig_tlb0 reconfig_tlb0: diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S index 993bec30ea..64d5d42293 100644 --- a/board/amcc/canyonlands/init.S +++ b/board/amcc/canyonlands/init.S @@ -47,11 +47,11 @@ tlbtab: * enable SA_I */ #ifndef CONFIG_NAND_SPL - tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_16M, CONFIG_SYS_BOOT_BASE_ADDR, 4, AC_R|AC_W|AC_X|SA_G) /* TLB 0 */ + tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_16M, CONFIG_SYS_BOOT_BASE_ADDR, 4, AC_RWX | SA_G) /* TLB 0 */ #else - tlbentry(CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 4, AC_R|AC_W|AC_X|SA_G) - tlbentry(CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry(256 << 20, SZ_256M, 256 << 20, 0, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 4, AC_RWX | SA_G) + tlbentry(CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_IG) + tlbentry(256 << 20, SZ_256M, 256 << 20, 0, AC_RWX | SA_IG) #endif /* @@ -62,51 +62,51 @@ tlbtab: #ifdef CONFIG_SYS_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G) + tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G) #endif - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x20000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x20000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_RW | SA_IG) /* PCIe UTL register */ - tlbentry(CONFIG_SYS_PCIE_BASE, SZ_16K, 0x08010000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCIE_BASE, SZ_16K, 0x08010000, 0xC, AC_RW | SA_IG) #if !defined(CONFIG_ARCHES) /* TLB-entry for NAND */ - tlbentry(CONFIG_SYS_NAND_ADDR, SZ_16M, CONFIG_SYS_NAND_ADDR, 4, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(CONFIG_SYS_NAND_ADDR, SZ_16M, CONFIG_SYS_NAND_ADDR, 4, AC_RWX | SA_IG) /* TLB-entry for CPLD */ - tlbentry(CONFIG_SYS_BCSR_BASE, SZ_1K, CONFIG_SYS_BCSR_BASE, 4, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_BCSR_BASE, SZ_1K, CONFIG_SYS_BCSR_BASE, 4, AC_RW | SA_IG) #else /* TLB-entry for FPGA */ - tlbentry(CONFIG_SYS_FPGA_BASE, SZ_16M, CONFIG_SYS_FPGA_BASE, 4, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_FPGA_BASE, SZ_16M, CONFIG_SYS_FPGA_BASE, 4, AC_RW | SA_IG) #endif /* TLB-entry for OCM */ - tlbentry(CONFIG_SYS_OCM_BASE, SZ_1M, 0x00000000, 4, AC_R|AC_W|AC_X|SA_I) + tlbentry(CONFIG_SYS_OCM_BASE, SZ_1M, 0x00000000, 4, AC_RWX | SA_I) /* TLB-entry for Local Configuration registers => peripherals */ - tlbentry(CONFIG_SYS_LOCAL_CONF_REGS, SZ_16M, CONFIG_SYS_LOCAL_CONF_REGS, 4, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(CONFIG_SYS_LOCAL_CONF_REGS, SZ_16M, CONFIG_SYS_LOCAL_CONF_REGS, 4, AC_RWX | SA_IG) /* AHB: Internal USB Peripherals (USB, SATA) */ - tlbentry(CONFIG_SYS_AHB_BASE, SZ_1M, 0xbff00000, 4, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(CONFIG_SYS_AHB_BASE, SZ_1M, 0xbff00000, 4, AC_RWX | SA_IG) #if defined(CONFIG_RAPIDIO) /* TLB-entries for RapidIO (SRIO) */ tlbentry(CONFIG_SYS_SRGPL0_REG_BAR, SZ_16M, CONFIG_SYS_SRGPL0_REG_BAR, - 0xD, AC_R|AC_W|SA_G|SA_I) + 0xD, AC_RW | SA_IG) tlbentry(CONFIG_SYS_SRGPL0_CFG_BAR, SZ_16M, CONFIG_SYS_SRGPL0_CFG_BAR, - 0xD, AC_R|AC_W|SA_G|SA_I) + 0xD, AC_RW | SA_IG) tlbentry(CONFIG_SYS_SRGPL0_MNT_BAR, SZ_16M, CONFIG_SYS_SRGPL0_MNT_BAR, - 0xD, AC_R|AC_W|SA_G|SA_I) + 0xD, AC_RW | SA_IG) tlbentry(CONFIG_SYS_I2ODMA_BASE, SZ_1K, 0x00100000, - 0x4, AC_R|AC_W|SA_G|SA_I) + 0x4, AC_RW | SA_IG) #endif tlbtab_end @@ -118,7 +118,7 @@ tlbtab: */ #define TLB00 TLB0(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M) #define TLB01 TLB1(CONFIG_SYS_BOOT_BASE_ADDR, 1) -#define TLB02 TLB2(AC_R|AC_W|AC_X|SA_G|SA_I) +#define TLB02 TLB2(AC_RWX | SA_IG) .globl reconfig_tlb0 reconfig_tlb0: diff --git a/board/amcc/ebony/init.S b/board/amcc/ebony/init.S index 153fa811c4..c91176367e 100644 --- a/board/amcc/ebony/init.S +++ b/board/amcc/ebony/init.S @@ -41,7 +41,7 @@ tlbtab: tlbtab_start - tlbentry(0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) /* * TLB entries for SDRAM are not needed on this platform. @@ -49,9 +49,9 @@ tlbtab: * routine. */ - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X) - tlbentry(CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X) - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_RWX) + tlbentry(CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_RWX) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG) tlbtab_end diff --git a/board/amcc/katmai/init.S b/board/amcc/katmai/init.S index 90598f63bc..59ccf2b6aa 100644 --- a/board/amcc/katmai/init.S +++ b/board/amcc/katmai/init.S @@ -51,7 +51,7 @@ tlbtabA: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_R|AC_W|AC_X|SA_G) + tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_RWX | SA_G) /* * TLB entries for SDRAM are not needed on this platform. @@ -59,20 +59,20 @@ tlbtabA: * routine. */ - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_R|AC_W|AC_X|SA_I) - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_RWX | SA_I) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE_BASE, SZ_16K, 0x20000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE_BASE, SZ_16K, 0x20000000, 0xC, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_CFGBASE, SZ_16M, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x50000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x90000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_XCFGBASE, SZ_1K, 0xD0000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x40000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x80000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_CFGBASE, SZ_16M, 0xC0000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x50000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x90000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_XCFGBASE, SZ_1K, 0xD0000000, 0xC, AC_RW | SA_IG) tlbtab_end /************************************************************************** @@ -91,7 +91,7 @@ tlbtabB: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_R|AC_W|AC_X|SA_G) + tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_RWX | SA_G) /* * TLB entries for SDRAM are not needed on this platform. @@ -99,20 +99,20 @@ tlbtabB: * routine. */ - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_R|AC_W|AC_X|SA_I) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_RWX | SA_I) - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_ACE_BASE, SZ_1K, CONFIG_SYS_ACE_BASE, 4,AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_ACE_BASE, SZ_1K, CONFIG_SYS_ACE_BASE, 4,AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_CFGBASE, SZ_16M, 0x40000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_XCFGBASE, SZ_1K, 0x50000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_CFGBASE, SZ_16M, 0x40000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_XCFGBASE, SZ_1K, 0x50000000, 0xD, AC_RW | SA_IG) tlbtab_end diff --git a/board/amcc/luan/init.S b/board/amcc/luan/init.S index 513b0fc560..06428d25ca 100644 --- a/board/amcc/luan/init.S +++ b/board/amcc/luan/init.S @@ -48,13 +48,13 @@ tlbtab: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry(0xfff00000, SZ_1M, 0xfff00000, 1, AC_R|AC_W|AC_X|SA_G) + tlbentry(0xfff00000, SZ_1M, 0xfff00000, 1, AC_RWX | SA_G) - tlbentry(0xffc00000, SZ_1M, 0xffc00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry(0xffd00000, SZ_1M, 0xffd00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry(0xffe00000, SZ_1M, 0xffe00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry(0xff900000, SZ_1M, 0xff900000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry(CONFIG_SYS_EPLD_BASE, SZ_256K, 0xff000000, 1, AC_R|AC_W|SA_G|SA_I) + tlbentry(0xffc00000, SZ_1M, 0xffc00000, 1, AC_RWX | SA_IG) + tlbentry(0xffd00000, SZ_1M, 0xffd00000, 1, AC_RWX | SA_IG) + tlbentry(0xffe00000, SZ_1M, 0xffe00000, 1, AC_RWX | SA_IG) + tlbentry(0xff900000, SZ_1M, 0xff900000, 1, AC_RWX | SA_IG) + tlbentry(CONFIG_SYS_EPLD_BASE, SZ_256K, 0xff000000, 1, AC_RW | SA_IG) /* * TLB entries for SDRAM are not needed on this platform. @@ -63,12 +63,12 @@ tlbtab: */ /* internal ram (l2 cache) */ - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_I) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX | SA_I) /* peripherals at f0000000 */ - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, CONFIG_SYS_PERIPHERAL_BASE, 1, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, CONFIG_SYS_PERIPHERAL_BASE, 1, AC_RW | SA_IG) /* PCI */ - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 9, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 9, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 9, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 9, AC_RW | SA_IG) tlbtab_end diff --git a/board/amcc/ocotea/init.S b/board/amcc/ocotea/init.S index e7c75dfac5..2ef11ccb4b 100644 --- a/board/amcc/ocotea/init.S +++ b/board/amcc/ocotea/init.S @@ -41,7 +41,7 @@ tlbtab: tlbtab_start - tlbentry(0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) /* * TLB entries for SDRAM are not needed on this platform. @@ -49,9 +49,9 @@ tlbtab: * routine. */ - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X) - tlbentry(CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X) - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_RWX) + tlbentry(CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_RWX) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG) tlbtab_end diff --git a/board/amcc/redwood/init.S b/board/amcc/redwood/init.S index 4da586918d..fb10520b82 100644 --- a/board/amcc/redwood/init.S +++ b/board/amcc/redwood/init.S @@ -45,7 +45,7 @@ tlbtab: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_R|AC_W|AC_X|SA_G) + tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_RWX | SA_G) /* * TLB entries for SDRAM are not needed on this platform. @@ -54,24 +54,24 @@ tlbtab: */ /* Although 512 KB, map 256k at a time */ - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_R|AC_W|AC_X|SA_I) - tlbentry(CONFIG_SYS_ISRAM_BASE + 0x40000, SZ_256K, 0x00040000, 4, AC_R|AC_W|AC_X|SA_I) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_RWX | SA_I) + tlbentry(CONFIG_SYS_ISRAM_BASE + 0x40000, SZ_256K, 0x00040000, 4, AC_RWX | SA_I) - tlbentry(CONFIG_SYS_OPER_FLASH, SZ_16M, 0xE7000000, 4,AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(CONFIG_SYS_OPER_FLASH, SZ_16M, 0xE7000000, 4,AC_RWX | SA_IG) /* * Peripheral base */ - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_16K, 0xEF600000, 4, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_16K, 0xEF600000, 4, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCIE0_XCFGBASE,SZ_16M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_XCFGBASE,SZ_16M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_XCFGBASE,SZ_16M, 0x20000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCIE0_XCFGBASE,SZ_16M, 0x00000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_XCFGBASE,SZ_16M, 0x10000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_XCFGBASE,SZ_16M, 0x20000000, 0xC, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCIE0_MEMBASE, SZ_256M, 0x00000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_MEMBASE, SZ_256M, 0x00000000, 0xE, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCIE0_MEMBASE, SZ_256M, 0x00000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_MEMBASE, SZ_256M, 0x00000000, 0xE, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCIE0_REGBASE, SZ_64K, 0x30000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_REGBASE, SZ_64K, 0x30010000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_REGBASE, SZ_64K, 0x30020000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCIE0_REGBASE, SZ_64K, 0x30000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_REGBASE, SZ_64K, 0x30010000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_REGBASE, SZ_64K, 0x30020000, 0xC, AC_RW | SA_IG) tlbtab_end diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S index f090070b4d..7139aaee4d 100644 --- a/board/amcc/sequoia/init.S +++ b/board/amcc/sequoia/init.S @@ -41,7 +41,7 @@ tlbtab: tlbtab_start /* vxWorks needs this as first entry for the Machine Check interrupt */ - tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( 0x40000000, SZ_256M, 0, 0, AC_RWX | SA_IG ) /* * The RAM-boot version skips the SDRAM TLB (identified by EPN=0). This @@ -51,49 +51,49 @@ tlbtab: #ifndef CONFIG_SYS_RAMBOOT /* TLB-entry for DDR SDRAM (Up to 2GB) */ #ifdef CONFIG_4xx_DCACHE - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_G) #else - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_IG ) #endif #endif /* CONFIG_SYS_RAMBOOT */ /* TLB-entry for EBC */ - tlbentry( CONFIG_SYS_BCSR_BASE, SZ_256M, CONFIG_SYS_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_BCSR_BASE, SZ_256M, CONFIG_SYS_BCSR_BASE, 1, AC_RWX | SA_IG ) /* BOOT_CS (FLASH) must be forth. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ #ifndef CONFIG_NAND_SPL - tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_RWX | SA_G ) #else - tlbentry( CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 1, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 1, AC_RWX | SA_G ) #endif #ifdef CONFIG_SYS_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G ) #endif /* TLB-entry for PCI Memory */ - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_RW | SA_IG ) /* TLB-entry for NAND */ - tlbentry( CONFIG_SYS_NAND_ADDR, SZ_1K, CONFIG_SYS_NAND_ADDR, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_NAND_ADDR, SZ_1K, CONFIG_SYS_NAND_ADDR, 1, AC_RWX | SA_IG ) /* TLB-entry for Internal Registers & OCM */ - tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_I ) + tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, AC_RWX | SA_I ) /*TLB-entry PCI registers*/ - tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RWX | SA_IG ) /* TLB-entry for peripherals */ - tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RWX | SA_IG) /* TLB-entry PCI IO Space - from sr@denx.de */ - tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_RWX | SA_IG) tlbtab_end @@ -104,7 +104,7 @@ tlbtab: */ #define TLB00 TLB0(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M) #define TLB01 TLB1(CONFIG_SYS_BOOT_BASE_ADDR, 1) -#define TLB02 TLB2(AC_R|AC_W|AC_X|SA_G|SA_I) +#define TLB02 TLB2(AC_RWX | SA_IG) .globl reconfig_tlb0 reconfig_tlb0: diff --git a/board/amcc/taishan/init.S b/board/amcc/taishan/init.S index 748ec0ab52..ac4e95df05 100644 --- a/board/amcc/taishan/init.S +++ b/board/amcc/taishan/init.S @@ -22,56 +22,9 @@ */ #include +#include #include -/* General */ -#define TLB_VALID 0x00000200 -#define _256M 0x10000000 - -/* Supported page sizes */ - -#define SZ_1K 0x00000000 -#define SZ_4K 0x00000010 -#define SZ_16K 0x00000020 -#define SZ_64K 0x00000030 -#define SZ_256K 0x00000040 -#define SZ_1M 0x00000050 -#define SZ_8M 0x00000060 -#define SZ_16M 0x00000070 -#define SZ_256M 0x00000090 - -/* Storage attributes */ -#define SA_W 0x00000800 /* Write-through */ -#define SA_I 0x00000400 /* Caching inhibited */ -#define SA_M 0x00000200 /* Memory coherence */ -#define SA_G 0x00000100 /* Guarded */ -#define SA_E 0x00000080 /* Endian */ - -/* Access control */ -#define AC_X 0x00000024 /* Execute */ -#define AC_W 0x00000012 /* Write */ -#define AC_R 0x00000009 /* Read */ - -/* Some handy macros */ - -#define EPN(e) ((e) & 0xfffffc00) -#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) ) -#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) ) -#define TLB2(a) ( (a)&0x00000fbf ) - -#define tlbtab_start\ - mflr r1 ;\ - bl 0f ; - -#define tlbtab_end\ - .long 0, 0, 0 ; \ -0: mflr r0 ; \ - mtlr r1 ; \ - blr ; - -#define tlbentry(epn,sz,rpn,erpn,attr)\ - .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) - /************************************************************************** * TLB TABLE * @@ -88,10 +41,10 @@ tlbtab: tlbtab_start - tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X ) - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) + tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) + tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) + tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX ) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG ) tlbtab_end diff --git a/board/amcc/yosemite/init.S b/board/amcc/yosemite/init.S index f9382365ca..ed3741c54a 100644 --- a/board/amcc/yosemite/init.S +++ b/board/amcc/yosemite/init.S @@ -20,56 +20,9 @@ */ #include +#include #include -/* General */ -#define TLB_VALID 0x00000200 - -/* Supported page sizes */ - -#define SZ_1K 0x00000000 -#define SZ_4K 0x00000010 -#define SZ_16K 0x00000020 -#define SZ_64K 0x00000030 -#define SZ_256K 0x00000040 -#define SZ_1M 0x00000050 -#define SZ_8M 0x00000060 -#define SZ_16M 0x00000070 -#define SZ_256M 0x00000090 - -/* Storage attributes */ -#define SA_W 0x00000800 /* Write-through */ -#define SA_I 0x00000400 /* Caching inhibited */ -#define SA_M 0x00000200 /* Memory coherence */ -#define SA_G 0x00000100 /* Guarded */ -#define SA_E 0x00000080 /* Endian */ - -/* Access control */ -#define AC_X 0x00000024 /* Execute */ -#define AC_W 0x00000012 /* Write */ -#define AC_R 0x00000009 /* Read */ - -/* Some handy macros */ - -#define EPN(e) ((e) & 0xfffffc00) -#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) ) -#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) ) -#define TLB2(a) ( (a)&0x00000fbf ) - -#define tlbtab_start\ - mflr r1 ;\ - bl 0f ; - -#define tlbtab_end\ - .long 0, 0, 0 ; \ -0: mflr r0 ; \ - mtlr r1 ; \ - blr ; - -#define tlbentry(epn,sz,rpn,erpn,attr)\ - .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) - - /************************************************************************** * TLB TABLE * @@ -91,22 +44,22 @@ tlbtab: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/) + tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G/*|SA_I*/) /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G ) - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I ) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_RWX | SA_W|SA_I ) /* PCI */ - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG ) /* USB 2.0 Device */ - tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_RW | SA_IG ) tlbtab_end diff --git a/board/amcc/yucca/init.S b/board/amcc/yucca/init.S index f51035ff68..b2ac3ca4a3 100644 --- a/board/amcc/yucca/init.S +++ b/board/amcc/yucca/init.S @@ -51,7 +51,7 @@ tlbtabA: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_R|AC_W|AC_X|SA_G) + tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_RWX | SA_G) /* * TLB entries for SDRAM are not needed on this platform. @@ -59,23 +59,23 @@ tlbtabA: * routine. */ - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_R|AC_W|AC_X|SA_I) - tlbentry(CONFIG_SYS_FPGA_BASE, SZ_1K, 0xE2000000, 4,AC_R|AC_W|SA_I) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_RWX | SA_I) + tlbentry(CONFIG_SYS_FPGA_BASE, SZ_1K, 0xE2000000, 4,AC_RW | SA_I) - tlbentry(CONFIG_SYS_OPER_FLASH, SZ_16M, 0xE7000000, 4,AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_OPER_FLASH, SZ_16M, 0xE7000000, 4,AC_RWX | SA_IG) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE_BASE, SZ_16K, 0x20000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE_BASE, SZ_16K, 0x20000000, 0xC, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_CFGBASE, SZ_16M, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x50000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x90000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_XCFGBASE, SZ_1K, 0xD0000000, 0xC, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x40000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x80000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_CFGBASE, SZ_16M, 0xC0000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x50000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x90000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_XCFGBASE, SZ_1K, 0xD0000000, 0xC, AC_RW | SA_IG) tlbtab_end /************************************************************************** @@ -94,7 +94,7 @@ tlbtabB: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_R|AC_W|AC_X|SA_G) + tlbentry(0xff000000, SZ_16M, 0xff000000, 4, AC_RWX | SA_G) /* * TLB entries for SDRAM are not needed on this platform. @@ -102,20 +102,20 @@ tlbtabB: * routine. */ - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_R|AC_W|AC_X|SA_I) - tlbentry(CONFIG_SYS_FPGA_BASE, SZ_1K, 0xE2000000, 4,AC_R|AC_W|SA_I) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x00000000, 4, AC_RWX | SA_I) + tlbentry(CONFIG_SYS_FPGA_BASE, SZ_1K, 0xE2000000, 4,AC_RW | SA_I) - tlbentry(CONFIG_SYS_OPER_FLASH, SZ_16M, 0xE7000000, 4,AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_OPER_FLASH, SZ_16M, 0xE7000000, 4,AC_RWX | SA_IG) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_4K, 0xF0000000, 4, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_CFGBASE, SZ_16M, 0x40000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCIE2_XCFGBASE, SZ_1K, 0x50000000, 0xD, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_CFGBASE, SZ_16M, 0x40000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCIE2_XCFGBASE, SZ_1K, 0x50000000, 0xD, AC_RW | SA_IG) tlbtab_end diff --git a/board/esd/du440/init.S b/board/esd/du440/init.S index afcf9c4a53..351095a48a 100644 --- a/board/esd/du440/init.S +++ b/board/esd/du440/init.S @@ -44,38 +44,38 @@ tlbtab: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_RWX | SA_G ) #ifdef CONFIG_SYS_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G ) #endif /* TLB-entry for PCI Memory */ - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_RW | SA_IG ) /* TLB-entry for PCI IO */ - tlbentry( CONFIG_SYS_PCI_IOBASE, SZ_64K, CONFIG_SYS_PCI_IOBASE, 1, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_IOBASE, SZ_64K, CONFIG_SYS_PCI_IOBASE, 1, AC_RW | SA_IG ) /* TLB-entries for EBC: CPLD, DUMEM, DUIO */ - tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_DUMEM_BASE, SZ_1M, CONFIG_SYS_DUMEM_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_DUIO_BASE, SZ_64K, CONFIG_SYS_DUIO_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_DUMEM_BASE, SZ_1M, CONFIG_SYS_DUMEM_BASE, 1, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_DUIO_BASE, SZ_64K, CONFIG_SYS_DUIO_BASE, 1, AC_RWX | SA_IG ) /* TLB-entry for NAND */ - tlbentry( CONFIG_SYS_NAND0_ADDR, SZ_1K, CONFIG_SYS_NAND0_ADDR, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_NAND1_ADDR, SZ_1K, CONFIG_SYS_NAND1_ADDR, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_NAND0_ADDR, SZ_1K, CONFIG_SYS_NAND0_ADDR, 1, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_NAND1_ADDR, SZ_1K, CONFIG_SYS_NAND1_ADDR, 1, AC_RWX | SA_IG ) /* TLB-entry for Internal Registers & OCM */ - tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_I ) + tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, AC_RWX | SA_I ) /* TLB-entry PCI registers */ - tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RWX | SA_IG ) /* TLB-entry for peripherals */ - tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RWX | SA_IG) tlbtab_end diff --git a/board/esd/pmc440/init.S b/board/esd/pmc440/init.S index d51cd0cf05..96f7206b30 100644 --- a/board/esd/pmc440/init.S +++ b/board/esd/pmc440/init.S @@ -44,23 +44,23 @@ tlbtab: * speed up boot process. It is patched after relocation to enable SA_I */ #ifndef CONFIG_NAND_SPL - tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_RWX | SA_G ) #else - tlbentry( CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 1, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_NAND_BOOT_SPL_SRC, SZ_4K, CONFIG_SYS_NAND_BOOT_SPL_SRC, 1, AC_RWX | SA_G ) #endif /* TLB entries for DDR2 SDRAM are generated dynamically */ #ifdef CONFIG_SYS_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G ) #endif /* TLB-entry for PCI Memory */ - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_RW | SA_IG ) /* TLB-entries for EBC */ /* PMC440 maps EBC to 0xef000000 which is handled by the peripheral @@ -68,22 +68,22 @@ tlbtab: * This dummy entry is only for convinience in order not to modify the * amount of entries. Currently OS/9 relies on this :-) */ - tlbentry( 0xc0000000, SZ_256M, 0xc0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( 0xc0000000, SZ_256M, 0xc0000000, 1, AC_RWX | SA_IG ) /* TLB-entry for NAND */ - tlbentry( CONFIG_SYS_NAND_ADDR, SZ_1K, CONFIG_SYS_NAND_ADDR, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_NAND_ADDR, SZ_1K, CONFIG_SYS_NAND_ADDR, 1, AC_RWX | SA_IG ) /* TLB-entry for Internal Registers & OCM */ - tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_I ) + tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, AC_RWX | SA_I ) /*TLB-entry PCI registers*/ - tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RWX | SA_IG ) /* TLB-entry for peripherals */ - tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RWX | SA_IG) /* TLB-entry PCI IO space */ - tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_RWX | SA_IG) /* TODO: what about high IO space */ tlbtab_end @@ -95,7 +95,7 @@ tlbtab: */ #define TLB00 TLB0(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M) #define TLB01 TLB1(CONFIG_SYS_BOOT_BASE_ADDR, 1) -#define TLB02 TLB2(AC_R|AC_W|AC_X|SA_G|SA_I) +#define TLB02 TLB2(AC_RWX | SA_IG) .globl reconfig_tlb0 reconfig_tlb0: diff --git a/board/gdsys/gdppc440etx/init.S b/board/gdsys/gdppc440etx/init.S index 0bbd45a625..ba750cb538 100644 --- a/board/gdsys/gdppc440etx/init.S +++ b/board/gdsys/gdppc440etx/init.S @@ -51,25 +51,25 @@ tlbtab: * the speed up boot process. It is patched after relocation to enable SA_I */ tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, - 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/) + 0, AC_RWX | SA_G/*|SA_I*/) /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, - 0, AC_R|AC_W|AC_X|SA_G ) + 0, AC_RWX | SA_G ) tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, - 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + 0, AC_RWX | SA_IG ) tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, - 0, AC_R|AC_W|SA_G|SA_I ) + 0, AC_RW | SA_IG ) /* PCI */ tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, - 0, AC_R|AC_W|SA_G|SA_I ) + 0, AC_RW | SA_IG ) tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, - 0, AC_R|AC_W|SA_G|SA_I ) + 0, AC_RW | SA_IG ) tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, - 0, AC_R|AC_W|SA_G|SA_I ) + 0, AC_RW | SA_IG ) tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, - 0, AC_R|AC_W|SA_G|SA_I ) + 0, AC_RW | SA_IG ) tlbtab_end diff --git a/board/gdsys/intip/init.S b/board/gdsys/intip/init.S index a8e8b6c1c2..5a819c2a30 100644 --- a/board/gdsys/intip/init.S +++ b/board/gdsys/intip/init.S @@ -51,7 +51,7 @@ tlbtab: * enable SA_I */ tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_16M, CONFIG_SYS_BOOT_BASE_ADDR, - 4, AC_R|AC_W|AC_X|SA_G) /* TLB 0 */ + 4, AC_RWX | SA_G) /* TLB 0 */ /* * TLB entries for SDRAM are not needed on this platform. @@ -62,36 +62,36 @@ tlbtab: #ifdef CONFIG_SYS_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, - 0, AC_R|AC_W|AC_X|SA_G) + 0, AC_RWX | SA_G) #endif tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC, - AC_R|AC_W|SA_G|SA_I) + AC_RW | SA_IG) tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x20000000, 0xC, - AC_R|AC_W|SA_G|SA_I) + AC_RW | SA_IG) /* TLB-entry for NVRAM */ tlbentry(CONFIG_SYS_NVRAM_BASE, SZ_1M, CONFIG_SYS_NVRAM_BASE, 4, - AC_R|AC_W|SA_G|SA_I) + AC_RW | SA_IG) /* TLB-entry for UART */ tlbentry(CONFIG_SYS_UART_BASE, SZ_16K, CONFIG_SYS_UART_BASE, 4, - AC_R|AC_W|SA_G|SA_I) + AC_RW | SA_IG) /* TLB-entry for IO */ tlbentry(CONFIG_SYS_IO_BASE, SZ_16K, CONFIG_SYS_IO_BASE, 4, - AC_R|AC_W|SA_G|SA_I) + AC_RW | SA_IG) /* TLB-entry for OCM */ tlbentry(CONFIG_SYS_OCM_BASE, SZ_1M, 0x00000000, 4, - AC_R|AC_W|AC_X|SA_I) + AC_RWX | SA_I) /* TLB-entry for Local Configuration registers => peripherals */ tlbentry(CONFIG_SYS_LOCAL_CONF_REGS, SZ_16M, CONFIG_SYS_LOCAL_CONF_REGS, - 4, AC_R|AC_W|AC_X|SA_G|SA_I) + 4, AC_RWX | SA_IG) /* AHB: Internal USB Peripherals (USB, SATA) */ tlbentry(CONFIG_SYS_AHB_BASE, SZ_1M, 0xbff00000, 4, - AC_R|AC_W|AC_X|SA_G|SA_I) + AC_RWX | SA_IG) tlbtab_end diff --git a/board/korat/init.S b/board/korat/init.S index c725bbbb44..bfc6bc1525 100644 --- a/board/korat/init.S +++ b/board/korat/init.S @@ -43,7 +43,7 @@ tlbtab: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry( 0xF0000000, SZ_256M, 0xF0000000, 1, AC_R|AC_W|AC_X|SA_G ) + tlbentry( 0xF0000000, SZ_256M, 0xF0000000, 1, AC_RWX | SA_G ) /* * TLB entries for SDRAM are not needed on this platform. They are @@ -53,37 +53,37 @@ tlbtab: #ifdef CONFIG_SYS_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, - AC_R|AC_W|AC_X|SA_G ) + AC_RWX | SA_G ) #endif /* TLB-entry for PCI Memory */ tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x00000000, SZ_256M, - CONFIG_SYS_PCI_MEMBASE + 0x00000000, 1, AC_R|AC_W|SA_G|SA_I ) + CONFIG_SYS_PCI_MEMBASE + 0x00000000, 1, AC_RW | SA_IG ) tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x10000000, SZ_256M, - CONFIG_SYS_PCI_MEMBASE + 0x10000000, 1, AC_R|AC_W|SA_G|SA_I ) + CONFIG_SYS_PCI_MEMBASE + 0x10000000, 1, AC_RW | SA_IG ) tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x20000000, SZ_256M, - CONFIG_SYS_PCI_MEMBASE + 0x20000000, 1, AC_R|AC_W|SA_G|SA_I ) + CONFIG_SYS_PCI_MEMBASE + 0x20000000, 1, AC_RW | SA_IG ) tlbentry( CONFIG_SYS_PCI_MEMBASE + 0x30000000, SZ_256M, - CONFIG_SYS_PCI_MEMBASE + 0x30000000, 1, AC_R|AC_W|SA_G|SA_I ) + CONFIG_SYS_PCI_MEMBASE + 0x30000000, 1, AC_RW | SA_IG ) /* TLB-entry for EBC */ - tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_CPLD_BASE, SZ_1K, CONFIG_SYS_CPLD_BASE, 1, AC_RW | SA_IG ) /* TLB-entry for Internal Registers & OCM */ /* I wonder why this must be executable -- lrj@acm.org 2007-10-08 */ - tlbentry( 0xE0000000, SZ_16M, 0xE0000000, 0, AC_R|AC_W|AC_X|SA_I ) + tlbentry( 0xE0000000, SZ_16M, 0xE0000000, 0, AC_RWX | SA_I ) /*TLB-entry PCI registers*/ - tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|SA_G|SA_I ) + tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RW | SA_IG ) /* TLB-entry for peripherals */ - tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|SA_G|SA_I) + tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RW | SA_IG) /* TLB-entry PCI IO Space - from sr@denx.de */ - tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_R|AC_W|SA_G|SA_I) + tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_RW | SA_IG) tlbtab_end diff --git a/board/lwmon5/init.S b/board/lwmon5/init.S index c714fb7ad9..8efc8a146e 100644 --- a/board/lwmon5/init.S +++ b/board/lwmon5/init.S @@ -47,7 +47,7 @@ tlbtab: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G) + tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 1, AC_RWX | SA_G) /* * TLB entries for SDRAM are not needed on this platform. @@ -57,34 +57,34 @@ tlbtab: #ifdef CONFIG_SYS_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G) + tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G) #endif /* TLB-entry for PCI Memory */ - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry(CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 1, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, AC_RW | SA_IG) /* TLB-entry for the FPGA Chip select 2 */ - tlbentry(CONFIG_SYS_FPGA_BASE_0, SZ_1M, CONFIG_SYS_FPGA_BASE_0, 1, AC_R|AC_W|AC_X|SA_I|SA_G) + tlbentry(CONFIG_SYS_FPGA_BASE_0, SZ_1M, CONFIG_SYS_FPGA_BASE_0, 1, AC_RWX | SA_I|SA_G) /* TLB-entry for the FPGA Chip select 3 */ - tlbentry(CONFIG_SYS_FPGA_BASE_1, SZ_1M, CONFIG_SYS_FPGA_BASE_1, 1,AC_R|AC_W|AC_X|SA_I|SA_G) + tlbentry(CONFIG_SYS_FPGA_BASE_1, SZ_1M, CONFIG_SYS_FPGA_BASE_1, 1,AC_RWX | SA_I|SA_G) /* TLB-entry for the LIME Controller */ - tlbentry(CONFIG_SYS_LIME_BASE_0, SZ_16M, CONFIG_SYS_LIME_BASE_0, 1, AC_R|AC_W|AC_X|SA_I|SA_G) - tlbentry(CONFIG_SYS_LIME_BASE_1, SZ_16M, CONFIG_SYS_LIME_BASE_1, 1, AC_R|AC_W|AC_X|SA_I|SA_G) - tlbentry(CONFIG_SYS_LIME_BASE_2, SZ_16M, CONFIG_SYS_LIME_BASE_2, 1, AC_R|AC_W|AC_X|SA_I|SA_G) - tlbentry(CONFIG_SYS_LIME_BASE_3, SZ_16M, CONFIG_SYS_LIME_BASE_3, 1, AC_R|AC_W|AC_X|SA_I|SA_G) + tlbentry(CONFIG_SYS_LIME_BASE_0, SZ_16M, CONFIG_SYS_LIME_BASE_0, 1, AC_RWX | SA_I|SA_G) + tlbentry(CONFIG_SYS_LIME_BASE_1, SZ_16M, CONFIG_SYS_LIME_BASE_1, 1, AC_RWX | SA_I|SA_G) + tlbentry(CONFIG_SYS_LIME_BASE_2, SZ_16M, CONFIG_SYS_LIME_BASE_2, 1, AC_RWX | SA_I|SA_G) + tlbentry(CONFIG_SYS_LIME_BASE_3, SZ_16M, CONFIG_SYS_LIME_BASE_3, 1, AC_RWX | SA_I|SA_G) /* TLB-entry for Internal Registers & OCM */ - tlbentry(0xe0000000, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_I) + tlbentry(0xe0000000, SZ_16M, 0xe0000000, 0, AC_RWX | SA_I) /*TLB-entry PCI registers*/ - tlbentry(0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RWX | SA_IG) /* TLB-entry for peripherals */ - tlbentry(0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry(0xEF000000, SZ_16M, 0xEF000000, 1, AC_RWX | SA_IG) tlbtab_end diff --git a/board/netstal/hcu5/init.S b/board/netstal/hcu5/init.S index 05b5e389c2..45e63dd3d4 100644 --- a/board/netstal/hcu5/init.S +++ b/board/netstal/hcu5/init.S @@ -40,13 +40,13 @@ tlbtab: tlbtab_start /* TLB#0: vxWorks needs this entry for the Machine Check interrupt, */ - tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( 0x40000000, SZ_256M, 0, 0, AC_RWX | SA_IG ) /* TLB#1: TLB-entry for DDR SDRAM (Up to 2GB) */ tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, - AC_R|AC_W|AC_X|SA_G|SA_I ) + AC_RWX | SA_IG ) /* TLB#2: TLB-entry for EBC */ - tlbentry( 0x80000000, SZ_256M, 0x80000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry( 0x80000000, SZ_256M, 0x80000000, 1, AC_RWX | SA_IG) /* * TLB#3: BOOT_CS (FLASH) must be forth. Before relocation SA_I can be @@ -54,7 +54,7 @@ tlbtab: * to enable SA_I */ tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_1M, CONFIG_SYS_BOOT_BASE_ADDR, 1, - AC_R|AC_W|AC_X|SA_G) + AC_RWX | SA_G) /* * TLB entries for SDRAM are not needed on this platform. @@ -64,43 +64,43 @@ tlbtab: /* TLB#4: */ tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 1, - AC_R|AC_W|SA_G|SA_I ) + AC_RW | SA_IG ) /* TLB#5: */ tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 1, - AC_R|AC_W|SA_G|SA_I ) + AC_RW | SA_IG ) /* TLB#6: */ tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 1, - AC_R|AC_W|SA_G|SA_I ) + AC_RW | SA_IG ) /* TLB-entry for Internal Registers & OCM */ /* TLB#7: */ tlbentry( 0xe0000000, SZ_16M, 0xe0000000, 0, - AC_R|AC_W|AC_X|SA_G|SA_I ) + AC_RWX | SA_IG ) /*TLB-entry PCI registers*/ /* TLB#8: */ - tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_RWX | SA_IG ) /* TLB-entry for peripherals */ /* TLB#9: */ - tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) + tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_RWX | SA_IG) /* CAN */ /* TLB#10: */ - tlbentry( CONFIG_SYS_CS_1, SZ_1K, CONFIG_SYS_CS_1, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_CS_1, SZ_1K, CONFIG_SYS_CS_1, 1, AC_RWX | SA_IG ) /* TLB#11: CPLD and IMC-Standard 32 MB */ - tlbentry( CONFIG_SYS_CS_2, SZ_16M, CONFIG_SYS_CS_2, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_CS_2, SZ_16M, CONFIG_SYS_CS_2, 1, AC_RWX | SA_IG ) /* TLB#12: */ tlbentry( CONFIG_SYS_CS_2 + 0x1000000, SZ_16M, CONFIG_SYS_CS_2 + 0x1000000, 1, - AC_R|AC_W|AC_X|SA_G|SA_I ) + AC_RWX | SA_IG ) /* IMC-Fast 32 MB */ /* TLB#13: */ - tlbentry( CONFIG_SYS_CS_3, SZ_16M, CONFIG_SYS_CS_3, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CONFIG_SYS_CS_3, SZ_16M, CONFIG_SYS_CS_3, 1, AC_RWX | SA_IG ) /* TLB#14: */ tlbentry( CONFIG_SYS_CS_3 + 0x1000000, SZ_16M, CONFIG_SYS_CS_3, 1, - AC_R|AC_W|AC_X|SA_G|SA_I ) + AC_RWX | SA_IG ) tlbtab_end diff --git a/board/pcs440ep/init.S b/board/pcs440ep/init.S index 25e7f4f70f..9745c14e5a 100644 --- a/board/pcs440ep/init.S +++ b/board/pcs440ep/init.S @@ -22,56 +22,9 @@ */ #include +#include #include -/* General */ -#define TLB_VALID 0x00000200 - -/* Supported page sizes */ - -#define SZ_1K 0x00000000 -#define SZ_4K 0x00000010 -#define SZ_16K 0x00000020 -#define SZ_64K 0x00000030 -#define SZ_256K 0x00000040 -#define SZ_1M 0x00000050 -#define SZ_8M 0x00000060 -#define SZ_16M 0x00000070 -#define SZ_256M 0x00000090 - -/* Storage attributes */ -#define SA_W 0x00000800 /* Write-through */ -#define SA_I 0x00000400 /* Caching inhibited */ -#define SA_M 0x00000200 /* Memory coherence */ -#define SA_G 0x00000100 /* Guarded */ -#define SA_E 0x00000080 /* Endian */ - -/* Access control */ -#define AC_X 0x00000024 /* Execute */ -#define AC_W 0x00000012 /* Write */ -#define AC_R 0x00000009 /* Read */ - -/* Some handy macros */ - -#define EPN(e) ((e) & 0xfffffc00) -#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) ) -#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) ) -#define TLB2(a) ( (a)&0x00000fbf ) - -#define tlbtab_start\ - mflr r1 ;\ - bl 0f ; - -#define tlbtab_end\ - .long 0, 0, 0 ; \ -0: mflr r0 ; \ - mtlr r1 ; \ - blr ; - -#define tlbentry(epn,sz,rpn,erpn,attr)\ - .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) - - /************************************************************************** * TLB TABLE * @@ -93,10 +46,10 @@ tlbtab: * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the * speed up boot process. It is patched after relocation to enable SA_I */ - tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/) + tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G/*|SA_I*/) /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G ) + tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G ) /* * TLB entries for SDRAM are not needed on this platform. @@ -104,15 +57,15 @@ tlbtab: * routine. */ - tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG ) /* PCI */ - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG ) /* USB 2.0 Device */ - tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_RW | SA_IG ) tlbtab_end diff --git a/board/prodrive/alpr/init.S b/board/prodrive/alpr/init.S index 4af7d13bf3..9f9812ad07 100644 --- a/board/prodrive/alpr/init.S +++ b/board/prodrive/alpr/init.S @@ -22,54 +22,9 @@ */ #include +#include #include -/* General */ -#define TLB_VALID 0x00000200 - -/* Supported page sizes */ -#define SZ_1K 0x00000000 -#define SZ_4K 0x00000010 -#define SZ_16K 0x00000020 -#define SZ_64K 0x00000030 -#define SZ_256K 0x00000040 -#define SZ_1M 0x00000050 -#define SZ_16M 0x00000070 -#define SZ_256M 0x00000090 - -/* Storage attributes */ -#define SA_W 0x00000800 /* Write-through */ -#define SA_I 0x00000400 /* Caching inhibited */ -#define SA_M 0x00000200 /* Memory coherence */ -#define SA_G 0x00000100 /* Guarded */ -#define SA_E 0x00000080 /* Endian */ - -/* Access control */ -#define AC_X 0x00000024 /* Execute */ -#define AC_W 0x00000012 /* Write */ -#define AC_R 0x00000009 /* Read */ - -/* Some handy macros */ - -#define EPN(e) ((e) & 0xfffffc00) -#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) ) -#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) ) -#define TLB2(a) ( (a)&0x00000fbf ) - -#define tlbtab_start\ - mflr r1 ;\ - bl 0f ; - -#define tlbtab_end\ - .long 0, 0, 0 ; \ -0: mflr r0 ; \ - mtlr r1 ; \ - blr ; - -#define tlbentry(epn,sz,rpn,erpn,attr)\ - .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) - - /************************************************************************** * TLB TABLE * @@ -86,27 +41,27 @@ tlbtab: tlbtab_start - tlbentry( 0xff000000, SZ_16M, 0xff000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X ) - tlbentry( CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X ) + tlbentry(0xff000000, SZ_16M, 0xff000000, 1, AC_RWX | SA_IG ) + tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_RWX) + tlbentry(CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_RWX) #ifdef CONFIG_4xx_DCACHE - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G) + tlbentry(CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_G) #else - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry(CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG) #endif #ifdef CONFIG_SYS_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G ) + tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G) #endif - tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) + tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG) /* PCI */ - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 3, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 3, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 3, AC_R|AC_W|SA_G|SA_I ) + tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 3, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 3, AC_RW | SA_IG) + tlbentry(CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 3, AC_RW | SA_IG) /* NAND */ - tlbentry( CONFIG_SYS_NAND_BASE, SZ_4K, CONFIG_SYS_NAND_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry(CONFIG_SYS_NAND_BASE, SZ_4K, CONFIG_SYS_NAND_BASE, 1, AC_RWX | SA_IG) tlbtab_end diff --git a/board/prodrive/p3p440/init.S b/board/prodrive/p3p440/init.S index 8c1a79c4b7..66acaf2713 100644 --- a/board/prodrive/p3p440/init.S +++ b/board/prodrive/p3p440/init.S @@ -24,55 +24,9 @@ */ #include +#include #include -/* General */ -#define TLB_VALID 0x00000200 - -/* Supported page sizes */ - -#define SZ_1K 0x00000000 -#define SZ_4K 0x00000010 -#define SZ_16K 0x00000020 -#define SZ_64K 0x00000030 -#define SZ_256K 0x00000040 -#define SZ_1M 0x00000050 -#define SZ_16M 0x00000070 -#define SZ_256M 0x00000090 - -/* Storage attributes */ -#define SA_W 0x00000800 /* Write-through */ -#define SA_I 0x00000400 /* Caching inhibited */ -#define SA_M 0x00000200 /* Memory coherence */ -#define SA_G 0x00000100 /* Guarded */ -#define SA_E 0x00000080 /* Endian */ - -/* Access control */ -#define AC_X 0x00000024 /* Execute */ -#define AC_W 0x00000012 /* Write */ -#define AC_R 0x00000009 /* Read */ - -/* Some handy macros */ - -#define EPN(e) ((e) & 0xfffffc00) -#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) ) -#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) ) -#define TLB2(a) ( (a)&0x00000fbf ) - -#define tlbtab_start\ - mflr r1 ;\ - bl 0f ; - -#define tlbtab_end\ - .long 0, 0, 0 ; \ -0: mflr r0 ; \ - mtlr r1 ; \ - blr ; - -#define tlbentry(epn,sz,rpn,erpn,attr)\ - .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) - - /************************************************************************** * TLB TABLE * @@ -89,11 +43,11 @@ tlbtab: tlbtab_start - tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_R|AC_W|AC_X ) - tlbentry( CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X ) - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) + tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) + tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) + tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_RWX ) + tlbentry( CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_RWX ) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG ) tlbtab_end diff --git a/board/sandburst/karef/init.S b/board/sandburst/karef/init.S index 3198dfdfa1..2bdae06f67 100644 --- a/board/sandburst/karef/init.S +++ b/board/sandburst/karef/init.S @@ -24,55 +24,9 @@ */ #include +#include #include -/* General */ -#define TLB_VALID 0x00000200 - -/* Supported page sizes */ - -#define SZ_1K 0x00000000 -#define SZ_4K 0x00000010 -#define SZ_16K 0x00000020 -#define SZ_64K 0x00000030 -#define SZ_256K 0x00000040 -#define SZ_1M 0x00000050 -#define SZ_16M 0x00000070 -#define SZ_256M 0x00000090 - -/* Storage attributes */ -#define SA_W 0x00000800 /* Write-through */ -#define SA_I 0x00000400 /* Caching inhibited */ -#define SA_M 0x00000200 /* Memory coherence */ -#define SA_G 0x00000100 /* Guarded */ -#define SA_E 0x00000080 /* Endian */ - -/* Access control */ -#define AC_X 0x00000024 /* Execute */ -#define AC_W 0x00000012 /* Write */ -#define AC_R 0x00000009 /* Read */ - -/* Some handy macros */ - -#define EPN(e) ((e) & 0xfffffc00) -#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) ) -#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) ) -#define TLB2(a) ( (a)&0x00000fbf ) - -#define tlbtab_start\ - mflr r1 ;\ - bl 0f ; - -#define tlbtab_end\ - .long 0, 0, 0 ; \ -0: mflr r0 ; \ - mtlr r1 ; \ - blr ; - -#define tlbentry(epn,sz,rpn,erpn,attr)\ - .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) - - /************************************************************************** * TLB TABLE * @@ -89,13 +43,13 @@ tlbtab: tlbtab_start - tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) + tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) + tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) + tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX | SA_IG) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG ) tlbtab_end diff --git a/board/sandburst/metrobox/init.S b/board/sandburst/metrobox/init.S index ccdec46ee5..fa78a3f4ba 100644 --- a/board/sandburst/metrobox/init.S +++ b/board/sandburst/metrobox/init.S @@ -22,55 +22,9 @@ */ #include +#include #include -/* General */ -#define TLB_VALID 0x00000200 - -/* Supported page sizes */ - -#define SZ_1K 0x00000000 -#define SZ_4K 0x00000010 -#define SZ_16K 0x00000020 -#define SZ_64K 0x00000030 -#define SZ_256K 0x00000040 -#define SZ_1M 0x00000050 -#define SZ_16M 0x00000070 -#define SZ_256M 0x00000090 - -/* Storage attributes */ -#define SA_W 0x00000800 /* Write-through */ -#define SA_I 0x00000400 /* Caching inhibited */ -#define SA_M 0x00000200 /* Memory coherence */ -#define SA_G 0x00000100 /* Guarded */ -#define SA_E 0x00000080 /* Endian */ - -/* Access control */ -#define AC_X 0x00000024 /* Execute */ -#define AC_W 0x00000012 /* Write */ -#define AC_R 0x00000009 /* Read */ - -/* Some handy macros */ - -#define EPN(e) ((e) & 0xfffffc00) -#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) ) -#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) ) -#define TLB2(a) ( (a)&0x00000fbf ) - -#define tlbtab_start\ - mflr r1 ;\ - bl 0f ; - -#define tlbtab_end\ - .long 0, 0, 0 ; \ -0: mflr r0 ; \ - mtlr r1 ; \ - blr ; - -#define tlbentry(epn,sz,rpn,erpn,attr)\ - .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) - - /************************************************************************** * TLB TABLE * @@ -87,13 +41,13 @@ tlbtab: tlbtab_start - tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) + tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) + tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) + tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX | SA_IG) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG ) tlbtab_end diff --git a/board/xes/xpedite1000/init.S b/board/xes/xpedite1000/init.S index 54371e276b..fa50c8e1ce 100644 --- a/board/xes/xpedite1000/init.S +++ b/board/xes/xpedite1000/init.S @@ -21,53 +21,9 @@ */ #include +#include #include -/* General */ -#define TLB_VALID 0x00000200 - -/* Supported page sizes */ -#define SZ_1K 0x00000000 -#define SZ_4K 0x00000010 -#define SZ_16K 0x00000020 -#define SZ_64K 0x00000030 -#define SZ_256K 0x00000040 -#define SZ_1M 0x00000050 -#define SZ_16M 0x00000070 -#define SZ_256M 0x00000090 - -/* Storage attributes */ -#define SA_W 0x00000800 /* Write-through */ -#define SA_I 0x00000400 /* Caching inhibited */ -#define SA_M 0x00000200 /* Memory coherence */ -#define SA_G 0x00000100 /* Guarded */ -#define SA_E 0x00000080 /* Endian */ - -/* Access control */ -#define AC_X 0x00000024 /* Execute */ -#define AC_W 0x00000012 /* Write */ -#define AC_R 0x00000009 /* Read */ - -/* Some handy macros */ -#define EPN(e) ((e) & 0xfffffc00) -#define TLB0(epn,sz) ((EPN((epn)) | (sz) | TLB_VALID )) -#define TLB1(rpn,erpn) (((rpn)&0xfffffc00) | (erpn)) -#define TLB2(a) ((a)&0x00000fbf) - -#define tlbtab_start \ - mflr r1; \ - bl 0f; - -#define tlbtab_end \ - .long 0, 0, 0; \ -0: mflr r0; \ - mtlr r1; \ - blr; - -#define tlbentry(epn,sz,rpn,erpn,attr)\ - .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr) - - /* * TLB TABLE * @@ -83,11 +39,11 @@ tlbtab: tlbtab_start - tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_R|AC_W|SA_G|SA_I) - tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I) - tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) + tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG) + tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) + tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX | SA_IG) + tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_RWX | SA_IG ) + tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG ) + tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG ) tlbtab_end From a47a12becf66f02a56da91c161e2edb625e9f20c Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Thu, 15 Apr 2010 16:07:28 +0200 Subject: [PATCH 14/76] Move arch/ppc to arch/powerpc As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese Acked-by: Wolfgang Denk Acked-by: Detlev Zundel Acked-by: Kim Phillips Cc: Peter Tyser Cc: Anatolij Gustschin --- MAKEALL | 14 +- Makefile | 606 +++++++++--------- README | 16 +- ..._platform-ppc.c => api_platform-powerpc.c} | 0 arch/{ppc => powerpc}/config.mk | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/Makefile | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/cache.S | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/config.mk | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/cpu.c | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/cpu_init.c | 0 .../cpu/74xx_7xx/interrupts.c | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/io.S | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/kgdb.S | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/speed.c | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/start.S | 0 arch/{ppc => powerpc}/cpu/74xx_7xx/traps.c | 2 +- arch/{ppc => powerpc}/cpu/mpc512x/Makefile | 0 .../cpu/mpc512x/asm-offsets.h | 2 +- arch/{ppc => powerpc}/cpu/mpc512x/config.mk | 2 +- arch/{ppc => powerpc}/cpu/mpc512x/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/cpu_init.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/diu.c | 0 .../cpu/mpc512x/fixed_sdram.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/i2c.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/ide.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/iim.c | 0 .../{ppc => powerpc}/cpu/mpc512x/interrupts.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/iopin.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/pci.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/serial.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/speed.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/start.S | 0 arch/{ppc => powerpc}/cpu/mpc512x/traps.c | 0 arch/{ppc => powerpc}/cpu/mpc512x/u-boot.lds | 2 +- arch/{ppc => powerpc}/cpu/mpc5xx/Makefile | 4 +- arch/{ppc => powerpc}/cpu/mpc5xx/config.mk | 2 +- arch/{ppc => powerpc}/cpu/mpc5xx/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc5xx/cpu_init.c | 0 arch/{ppc => powerpc}/cpu/mpc5xx/interrupts.c | 0 arch/{ppc => powerpc}/cpu/mpc5xx/serial.c | 0 arch/{ppc => powerpc}/cpu/mpc5xx/speed.c | 0 arch/{ppc => powerpc}/cpu/mpc5xx/spi.c | 0 arch/{ppc => powerpc}/cpu/mpc5xx/start.S | 0 arch/{ppc => powerpc}/cpu/mpc5xx/traps.c | 2 +- arch/{ppc => powerpc}/cpu/mpc5xx/u-boot.lds | 2 +- arch/{ppc => powerpc}/cpu/mpc5xxx/Makefile | 0 arch/{ppc => powerpc}/cpu/mpc5xxx/config.mk | 2 +- arch/{ppc => powerpc}/cpu/mpc5xxx/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc5xxx/cpu_init.c | 0 .../mpc5xxx/firmware_sc_task_bestcomm.impl.S | 0 arch/{ppc => powerpc}/cpu/mpc5xxx/i2c.c | 0 arch/{ppc => powerpc}/cpu/mpc5xxx/ide.c | 0 .../{ppc => powerpc}/cpu/mpc5xxx/interrupts.c | 2 +- arch/{ppc => powerpc}/cpu/mpc5xxx/io.S | 0 arch/{ppc => powerpc}/cpu/mpc5xxx/loadtask.c | 0 .../cpu/mpc5xxx/pci_mpc5200.c | 0 arch/{ppc => powerpc}/cpu/mpc5xxx/serial.c | 2 +- arch/{ppc => powerpc}/cpu/mpc5xxx/speed.c | 0 arch/{ppc => powerpc}/cpu/mpc5xxx/start.S | 2 +- arch/{ppc => powerpc}/cpu/mpc5xxx/traps.c | 2 +- .../cpu/mpc5xxx/u-boot-customlayout.lds | 8 +- arch/{ppc => powerpc}/cpu/mpc5xxx/u-boot.lds | 2 +- arch/{ppc => powerpc}/cpu/mpc5xxx/usb.c | 0 arch/{ppc => powerpc}/cpu/mpc5xxx/usb_ohci.c | 0 arch/{ppc => powerpc}/cpu/mpc5xxx/usb_ohci.h | 0 arch/{ppc => powerpc}/cpu/mpc8220/Makefile | 0 arch/{ppc => powerpc}/cpu/mpc8220/config.mk | 2 +- arch/{ppc => powerpc}/cpu/mpc8220/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/cpu_init.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/dma.h | 0 arch/{ppc => powerpc}/cpu/mpc8220/dramSetup.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/dramSetup.h | 0 arch/{ppc => powerpc}/cpu/mpc8220/fec.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/fec.h | 0 .../cpu/mpc8220/fec_dma_tasks.S | 0 arch/{ppc => powerpc}/cpu/mpc8220/i2c.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/i2cCore.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/i2cCore.h | 0 .../{ppc => powerpc}/cpu/mpc8220/interrupts.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/io.S | 0 arch/{ppc => powerpc}/cpu/mpc8220/loadtask.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/pci.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/speed.c | 0 arch/{ppc => powerpc}/cpu/mpc8220/start.S | 2 +- arch/{ppc => powerpc}/cpu/mpc8220/traps.c | 2 +- arch/{ppc => powerpc}/cpu/mpc8220/u-boot.lds | 2 +- arch/{ppc => powerpc}/cpu/mpc8220/uart.c | 0 arch/{ppc => powerpc}/cpu/mpc824x/.gitignore | 0 arch/{ppc => powerpc}/cpu/mpc824x/Makefile | 0 arch/{ppc => powerpc}/cpu/mpc824x/config.mk | 2 +- arch/{ppc => powerpc}/cpu/mpc824x/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc824x/cpu_init.c | 0 .../cpu/mpc824x/drivers/epic.h | 0 .../cpu/mpc824x/drivers/epic/README | 0 .../cpu/mpc824x/drivers/epic/epic.h | 0 .../cpu/mpc824x/drivers/epic/epic1.c | 0 .../cpu/mpc824x/drivers/epic/epic2.S | 0 .../cpu/mpc824x/drivers/epic/epicutil.S | 0 .../cpu/mpc824x/drivers/errors.h | 0 .../cpu/mpc824x/drivers/i2c/i2c.c | 0 .../cpu/mpc824x/drivers/i2c_export.h | 0 .../{ppc => powerpc}/cpu/mpc824x/interrupts.c | 0 arch/{ppc => powerpc}/cpu/mpc824x/pci.c | 2 +- arch/{ppc => powerpc}/cpu/mpc824x/speed.c | 0 arch/{ppc => powerpc}/cpu/mpc824x/start.S | 0 arch/{ppc => powerpc}/cpu/mpc824x/traps.c | 2 +- .../cpu/mpc824x}/u-boot.lds | 2 +- arch/{ppc => powerpc}/cpu/mpc8260/Makefile | 0 .../cpu/mpc8260/bedbug_603e.c | 0 arch/{ppc => powerpc}/cpu/mpc8260/commproc.c | 2 +- arch/{ppc => powerpc}/cpu/mpc8260/config.mk | 2 +- arch/{ppc => powerpc}/cpu/mpc8260/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc8260/cpu_init.c | 0 arch/{ppc => powerpc}/cpu/mpc8260/ether_fcc.c | 0 arch/{ppc => powerpc}/cpu/mpc8260/ether_scc.c | 0 arch/{ppc => powerpc}/cpu/mpc8260/i2c.c | 0 .../{ppc => powerpc}/cpu/mpc8260/interrupts.c | 4 +- arch/{ppc => powerpc}/cpu/mpc8260/kgdb.S | 0 arch/{ppc => powerpc}/cpu/mpc8260/pci.c | 0 .../{ppc => powerpc}/cpu/mpc8260/serial_scc.c | 0 .../{ppc => powerpc}/cpu/mpc8260/serial_smc.c | 2 +- arch/{ppc => powerpc}/cpu/mpc8260/speed.c | 0 arch/{ppc => powerpc}/cpu/mpc8260/speed.h | 0 arch/{ppc => powerpc}/cpu/mpc8260/spi.c | 0 arch/{ppc => powerpc}/cpu/mpc8260/start.S | 2 +- arch/{ppc => powerpc}/cpu/mpc8260/traps.c | 2 +- .../cpu/mpc8260}/u-boot.lds | 2 +- arch/{ppc => powerpc}/cpu/mpc83xx/Makefile | 0 arch/{ppc => powerpc}/cpu/mpc83xx/config.mk | 2 +- arch/{ppc => powerpc}/cpu/mpc83xx/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/cpu_init.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/ecc.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/fdt.c | 0 .../{ppc => powerpc}/cpu/mpc83xx/interrupts.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/nand_init.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/pci.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/pcie.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/qe_io.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/serdes.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/spd_sdram.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/speed.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/start.S | 2 +- arch/{ppc => powerpc}/cpu/mpc83xx/traps.c | 0 arch/{ppc => powerpc}/cpu/mpc83xx/u-boot.lds | 2 +- arch/{ppc => powerpc}/cpu/mpc85xx/Makefile | 0 arch/{ppc => powerpc}/cpu/mpc85xx/commproc.c | 2 +- arch/{ppc => powerpc}/cpu/mpc85xx/config.mk | 2 +- arch/{ppc => powerpc}/cpu/mpc85xx/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/cpu_init.c | 0 .../cpu/mpc85xx/cpu_init_early.c | 0 .../cpu/mpc85xx/cpu_init_nand.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/ddr-gen1.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/ddr-gen2.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/ddr-gen3.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/ether_fcc.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/fdt.c | 0 .../{ppc => powerpc}/cpu/mpc85xx/fixed_ivor.S | 0 .../{ppc => powerpc}/cpu/mpc85xx/interrupts.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/mp.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/mp.h | 0 .../cpu/mpc85xx/mpc8536_serdes.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/pci.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/qe_io.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/release.S | 0 arch/{ppc => powerpc}/cpu/mpc85xx/resetvec.S | 0 .../{ppc => powerpc}/cpu/mpc85xx/serial_scc.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/speed.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/start.S | 0 arch/{ppc => powerpc}/cpu/mpc85xx/tlb.c | 0 arch/{ppc => powerpc}/cpu/mpc85xx/traps.c | 2 +- .../cpu/mpc85xx/u-boot-nand.lds | 2 +- .../cpu/mpc85xx/u-boot-nand_spl.lds | 2 +- arch/{ppc => powerpc}/cpu/mpc85xx/u-boot.lds | 2 +- arch/{ppc => powerpc}/cpu/mpc86xx/Makefile | 0 arch/{ppc => powerpc}/cpu/mpc86xx/cache.S | 0 arch/{ppc => powerpc}/cpu/mpc86xx/config.mk | 0 arch/{ppc => powerpc}/cpu/mpc86xx/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc86xx/cpu_init.c | 0 arch/{ppc => powerpc}/cpu/mpc86xx/ddr-8641.c | 0 arch/{ppc => powerpc}/cpu/mpc86xx/fdt.c | 0 .../{ppc => powerpc}/cpu/mpc86xx/interrupts.c | 0 arch/{ppc => powerpc}/cpu/mpc86xx/mp.c | 0 arch/{ppc => powerpc}/cpu/mpc86xx/release.S | 0 arch/{ppc => powerpc}/cpu/mpc86xx/speed.c | 0 arch/{ppc => powerpc}/cpu/mpc86xx/start.S | 0 arch/{ppc => powerpc}/cpu/mpc86xx/traps.c | 0 arch/{ppc => powerpc}/cpu/mpc8xx/Makefile | 0 arch/{ppc => powerpc}/cpu/mpc8xx/bedbug_860.c | 0 arch/{ppc => powerpc}/cpu/mpc8xx/commproc.c | 0 arch/{ppc => powerpc}/cpu/mpc8xx/config.mk | 0 arch/{ppc => powerpc}/cpu/mpc8xx/cpu.c | 0 arch/{ppc => powerpc}/cpu/mpc8xx/cpu_init.c | 0 arch/{ppc => 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powerpc}/cpu/ppc4xx/config.mk | 2 +- arch/{ppc => powerpc}/cpu/ppc4xx/cpu.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/cpu_init.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/dcr.S | 0 .../cpu/ppc4xx/denali_data_eye.c | 2 +- .../cpu/ppc4xx/denali_spd_ddr2.c | 4 +- arch/{ppc => powerpc}/cpu/ppc4xx/ecc.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/ecc.h | 0 arch/{ppc => powerpc}/cpu/ppc4xx/fdt.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/gpio.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/interrupts.c | 0 .../{ppc => powerpc}/cpu/ppc4xx/iop480_uart.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/kgdb.S | 0 arch/{ppc => powerpc}/cpu/ppc4xx/miiphy.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/reginfo.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/resetvec.S | 0 arch/{ppc => powerpc}/cpu/ppc4xx/sdram.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/sdram.h | 0 arch/{ppc => powerpc}/cpu/ppc4xx/speed.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/start.S | 0 arch/{ppc => powerpc}/cpu/ppc4xx/tlb.c | 0 arch/{ppc => powerpc}/cpu/ppc4xx/traps.c | 2 +- arch/{ppc => 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.../include/asm/fsl_ddr_dimm_params.h | 0 .../include/asm/fsl_ddr_sdram.h | 0 arch/{ppc => powerpc}/include/asm/fsl_dma.h | 0 arch/{ppc => powerpc}/include/asm/fsl_i2c.h | 0 arch/{ppc => powerpc}/include/asm/fsl_law.h | 0 arch/{ppc => powerpc}/include/asm/fsl_lbc.h | 0 arch/{ppc => powerpc}/include/asm/fsl_pci.h | 0 .../{ppc => powerpc}/include/asm/fsl_serdes.h | 0 .../include/asm/global_data.h | 0 arch/{ppc => powerpc}/include/asm/gpio.h | 0 .../{ppc => powerpc}/include/asm/immap_512x.h | 0 .../{ppc => powerpc}/include/asm/immap_8220.h | 0 .../{ppc => powerpc}/include/asm/immap_8260.h | 0 .../{ppc => powerpc}/include/asm/immap_83xx.h | 0 .../{ppc => powerpc}/include/asm/immap_85xx.h | 0 .../{ppc => powerpc}/include/asm/immap_86xx.h | 0 arch/{ppc => powerpc}/include/asm/immap_qe.h | 0 arch/{ppc => powerpc}/include/asm/interrupt.h | 0 arch/{ppc => powerpc}/include/asm/io.h | 0 .../{ppc => powerpc}/include/asm/iopin_8260.h | 0 .../{ppc => powerpc}/include/asm/iopin_85xx.h | 0 arch/{ppc => powerpc}/include/asm/iopin_8xx.h | 0 arch/{ppc => powerpc}/include/asm/m8260_pci.h | 0 .../include/asm/mc146818rtc.h | 0 arch/{ppc => powerpc}/include/asm/mmu.h | 0 arch/{ppc => powerpc}/include/asm/mp.h | 0 arch/{ppc => powerpc}/include/asm/mpc512x.h | 0 .../include/asm/mpc8349_pci.h | 0 .../include/asm/mpc8xxx_spi.h | 0 arch/{ppc => powerpc}/include/asm/pci_io.h | 0 arch/{ppc => powerpc}/include/asm/pnp.h | 0 .../include/asm/posix_types.h | 0 .../{ppc => powerpc}/include/asm/ppc4xx-ebc.h | 0 .../include/asm/ppc4xx-isram.h | 0 .../include/asm/ppc4xx-sdram.h | 0 .../{ppc => powerpc}/include/asm/ppc4xx-uic.h | 0 .../include/asm/ppc4xx_config.h | 0 arch/{ppc => powerpc}/include/asm/processor.h | 0 arch/{ppc => powerpc}/include/asm/ptrace.h | 2 +- arch/{ppc => powerpc}/include/asm/residual.h | 0 .../{ppc => powerpc}/include/asm/sigcontext.h | 0 arch/{ppc => powerpc}/include/asm/signal.h | 0 .../{ppc => powerpc}/include/asm/status_led.h | 0 arch/{ppc => powerpc}/include/asm/string.h | 0 arch/{ppc => powerpc}/include/asm/types.h | 0 arch/{ppc => powerpc}/include/asm/u-boot.h | 0 arch/{ppc => powerpc}/include/asm/unaligned.h | 0 .../{ppc => powerpc}/include/asm/xilinx_irq.h | 0 arch/{ppc => powerpc}/lib/Makefile | 0 arch/{ppc => powerpc}/lib/bat_rw.c | 0 arch/{ppc => powerpc}/lib/board.c | 0 arch/{ppc => powerpc}/lib/bootm.c | 0 arch/{ppc => powerpc}/lib/cache.c | 0 arch/{ppc => powerpc}/lib/extable.c | 0 arch/{ppc => powerpc}/lib/interrupts.c | 0 arch/{ppc => powerpc}/lib/kgdb.c | 0 arch/{ppc => powerpc}/lib/ppccache.S | 0 arch/{ppc => powerpc}/lib/ppcstring.S | 0 arch/{ppc => powerpc}/lib/reloc.S | 0 arch/{ppc => powerpc}/lib/ticks.S | 0 arch/{ppc => powerpc}/lib/time.c | 0 board/LEOX/elpt860/u-boot.lds | 12 +- board/LEOX/elpt860/u-boot.lds.debug | 2 +- board/MAI/AmigaOneG3SE/u-boot.lds | 2 +- board/Marvell/common/ns16550.c | 2 +- board/Marvell/common/ns16550.h | 2 +- board/Marvell/db64360/mv_eth.c | 2 +- board/Marvell/db64360/u-boot.lds | 2 +- board/Marvell/db64460/mv_eth.c | 2 +- board/Marvell/db64460/u-boot.lds | 2 +- board/RPXClassic/u-boot.lds | 4 +- board/RPXClassic/u-boot.lds.debug | 2 +- board/RPXlite/u-boot.lds | 4 +- board/RPXlite/u-boot.lds.debug | 2 +- board/RPXlite_dw/u-boot.lds | 4 +- board/RPXlite_dw/u-boot.lds.debug | 2 +- board/RRvision/u-boot.lds | 10 +- board/adder/u-boot.lds | 2 +- board/amcc/acadia/u-boot-nand.lds | 2 +- board/amcc/bamboo/u-boot-nand.lds | 2 +- board/amcc/canyonlands/canyonlands.c | 2 +- board/amcc/canyonlands/u-boot-nand.lds | 2 +- board/amcc/katmai/katmai.c | 2 +- board/amcc/kilauea/u-boot-nand.lds | 2 +- board/amcc/luan/luan.c | 2 +- board/amcc/sequoia/sdram.c | 2 +- board/amcc/sequoia/u-boot-nand.lds | 2 +- board/amcc/sequoia/u-boot-ram.lds | 2 +- board/amcc/yucca/yucca.c | 2 +- board/amirix/ap1000/u-boot.lds | 16 +- board/bmw/ns16550.c | 2 +- board/bmw/ns16550.h | 2 +- board/c2mon/u-boot.lds | 4 +- board/c2mon/u-boot.lds.debug | 2 +- board/cm5200/u-boot.lds | 2 +- board/cogent/u-boot.lds.debug | 2 +- board/cray/L1/u-boot.lds.debug | 2 +- board/csb272/csb272.c | 2 +- board/csb472/csb472.c | 2 +- board/eltec/bab7xx/u-boot.lds | 2 +- board/eltec/elppc/u-boot.lds | 2 +- board/eltec/mhpc/u-boot.lds | 2 +- board/eltec/mhpc/u-boot.lds.debug | 2 +- board/emk/top860/u-boot.lds | 2 +- board/emk/top860/u-boot.lds.debug | 4 +- board/ep88x/u-boot.lds | 2 +- board/eric/eric.c | 2 +- board/esd/cpci750/mv_eth.c | 2 +- board/esd/cpci750/u-boot.lds | 2 +- board/esd/dasa_sim/u-boot.lds | 2 +- board/esd/pmc440/u-boot-nand.lds | 2 +- board/esteem192e/u-boot.lds | 4 +- board/etx094/u-boot.lds | 12 +- board/etx094/u-boot.lds.debug | 18 +- board/evb64260/u-boot.lds | 2 +- board/fads/u-boot.lds | 2 +- board/fads/u-boot.lds.debug | 4 +- board/flagadm/u-boot.lds | 2 +- board/flagadm/u-boot.lds.debug | 2 +- board/freescale/mpc7448hpc2/tsi108_init.c | 2 +- board/freescale/mpc7448hpc2/u-boot.lds | 2 +- board/freescale/mpc8610hpcd/u-boot.lds | 14 +- board/freescale/mpc8641hpcn/u-boot.lds | 14 +- board/gen860t/ioport.c | 2 +- board/gen860t/u-boot-flashenv.lds | 2 +- board/gen860t/u-boot.lds | 2 +- board/genietv/u-boot.lds | 4 +- board/genietv/u-boot.lds.debug | 4 +- board/gth/u-boot.lds | 2 +- board/hermes/u-boot.lds | 10 +- board/hermes/u-boot.lds.debug | 10 +- board/hmi1001/config.mk | 2 +- board/hymod/u-boot.lds | 4 +- board/hymod/u-boot.lds.debug | 2 +- board/icu862/u-boot.lds | 6 +- board/icu862/u-boot.lds.debug | 4 +- board/inka4x0/config.mk | 2 +- board/ip860/u-boot.lds | 10 +- board/ip860/u-boot.lds.debug | 10 +- board/ivm/u-boot.lds | 2 +- board/ivm/u-boot.lds.debug | 4 +- board/jse/jse.c | 6 +- board/jse/sdram.c | 2 +- board/keymile/common/keymile_hdlc_enet.c | 2 +- board/keymile/km8xx/km8xx_hdlc_enet.c | 2 +- board/keymile/km8xx/u-boot.lds | 10 +- board/keymile/mgcoge/mgcoge_hdlc_enet.c | 2 +- board/korat/u-boot-F7FC.lds | 4 +- board/kup/kup4k/u-boot.lds | 6 +- board/kup/kup4k/u-boot.lds.debug | 2 +- board/kup/kup4x/u-boot.lds | 6 +- board/kup/kup4x/u-boot.lds.debug | 2 +- board/lantec/u-boot.lds | 4 +- board/lantec/u-boot.lds.debug | 2 +- board/logicpd/zoom2/zoom2_serial.c | 2 +- board/lwmon/u-boot.lds | 2 +- board/lwmon/u-boot.lds.debug | 4 +- board/matrix_vision/mvsmr/u-boot.lds | 10 +- board/mbx8xx/u-boot.lds | 2 +- board/mbx8xx/u-boot.lds.debug | 4 +- board/mbx8xx/vpd.c | 2 +- board/ml2/u-boot.lds | 16 +- board/ml2/u-boot.lds.debug | 2 +- board/mousse/u-boot.lds | 6 +- board/mousse/u-boot.lds.ram | 2 +- board/mousse/u-boot.lds.rom | 4 +- board/mpl/pip405/u-boot.lds.debug | 2 +- board/mucmc52/config.mk | 2 +- board/munices/u-boot.lds | 2 +- board/nc650/u-boot.lds | 2 +- board/nc650/u-boot.lds.debug | 2 +- board/netphone/u-boot.lds | 10 +- board/netphone/u-boot.lds.debug | 2 +- board/netstal/hcu4/hcu4.c | 2 +- board/netstal/hcu5/README.txt | 16 +- board/netstal/hcu5/hcu5.c | 2 +- board/netstal/mcu25/mcu25.c | 2 +- board/netta/u-boot.lds | 10 +- board/netta/u-boot.lds.debug | 2 +- board/netta2/u-boot.lds | 10 +- board/netta2/u-boot.lds.debug | 2 +- board/netvia/u-boot.lds | 10 +- board/netvia/u-boot.lds.debug | 2 +- board/nx823/u-boot.lds | 2 +- board/nx823/u-boot.lds.debug | 2 +- board/pcippc2/u-boot.lds | 2 +- board/pcs440ep/pcs440ep.c | 2 +- board/ppmc7xx/u-boot.lds | 2 +- board/prodrive/p3mx/mv_eth.c | 2 +- board/prodrive/p3mx/u-boot.lds | 2 +- board/quantum/u-boot.lds | 4 +- board/quantum/u-boot.lds.debug | 2 +- board/r360mpi/u-boot.lds | 8 +- board/rbc823/u-boot.lds | 4 +- board/rmu/u-boot.lds | 4 +- board/rmu/u-boot.lds.debug | 2 +- board/rsdproto/u-boot.lds | 2 +- board/sandburst/common/ppc440gx_i2c.c | 2 +- board/sandburst/karef/u-boot.lds.debug | 16 +- board/sandburst/metrobox/u-boot.lds.debug | 16 +- board/sbc8641d/u-boot.lds | 14 +- board/sc3/u-boot.lds | 16 +- board/siemens/CCM/u-boot.lds | 4 +- board/siemens/CCM/u-boot.lds.debug | 2 +- board/siemens/IAD210/u-boot.lds | 8 +- board/siemens/pcu_e/u-boot.lds | 2 +- board/siemens/pcu_e/u-boot.lds.debug | 4 +- board/sixnet/u-boot.lds | 2 +- board/snmc/qs850/u-boot.lds | 10 +- board/snmc/qs860t/u-boot.lds | 10 +- board/spc1920/u-boot.lds | 10 +- board/spd8xx/u-boot.lds | 2 +- board/spd8xx/u-boot.lds.debug | 4 +- board/stx/stxssa/stxssa.c | 2 +- board/stx/stxxtc/u-boot.lds | 10 +- board/stx/stxxtc/u-boot.lds.debug | 2 +- board/svm_sc8xx/u-boot.lds | 10 +- board/svm_sc8xx/u-boot.lds.debug | 2 +- board/tqc/tqm8xx/u-boot.lds | 8 +- board/tqc/tqm8xx/u-boot.lds.debug | 2 +- board/uc100/u-boot.lds | 10 +- board/uc100/u-boot.lds.debug | 2 +- board/uc101/config.mk | 2 +- board/v37/u-boot.lds | 10 +- board/w7o/u-boot.lds.debug | 2 +- board/w7o/w7o.c | 2 +- board/westel/amx860/u-boot.lds | 4 +- board/westel/amx860/u-boot.lds.debug | 4 +- board/xes/xpedite1000/u-boot.lds.debug | 16 +- board/xes/xpedite5170/u-boot.lds | 14 +- board/xilinx/ppc405-generic/u-boot-rom.lds | 2 +- board/xilinx/ppc440-generic/u-boot-rom.lds | 2 +- common/kgdb.c | 2 +- doc/README.IPHASE4539 | 2 +- doc/README.PIP405 | 16 +- doc/README.POST | 4 +- doc/README.RPXlite | 2 +- doc/README.TQM8260 | 8 +- doc/README.alaska8220 | 38 +- doc/README.bedbug | 16 +- doc/README.mpc5xx | 8 +- doc/README.mpc85xxads | 4 +- drivers/pci/pci_auto.c | 2 +- drivers/qe/uec_phy.c | 2 +- drivers/serial/ns16550.c | 2 +- drivers/spi/mpc8xxx_spi.c | 2 +- examples/api/Makefile | 6 +- examples/standalone/mem_to_mem_idma2intr.c | 4 +- include/configs/aria.h | 2 +- include/configs/galaxy5200.h | 2 +- include/configs/kilauea.h | 2 +- include/configs/linkstation.h | 2 +- include/configs/quad100hd.h | 6 +- include/configs/sc3.h | 4 +- include/ns16550.h | 2 +- lib/div64.c | 2 +- nand_spl/board/amcc/acadia/Makefile | 8 +- nand_spl/board/amcc/bamboo/Makefile | 4 +- nand_spl/board/amcc/canyonlands/Makefile | 4 +- nand_spl/board/amcc/kilauea/Makefile | 10 +- nand_spl/board/amcc/sequoia/Makefile | 6 +- nand_spl/board/freescale/mpc8313erdb/Makefile | 10 +- nand_spl/board/freescale/mpc8315erdb/Makefile | 10 +- nand_spl/board/freescale/mpc8536ds/Makefile | 12 +- nand_spl/board/freescale/mpc8569mds/Makefile | 12 +- nand_spl/board/freescale/p1_p2_rdb/Makefile | 12 +- nand_spl/board/sheldon/simpc8313/Makefile | 10 +- post/cpu/ppc4xx/spr.c | 2 +- post/{lib_ppc => lib_powerpc}/Makefile | 2 +- post/{lib_ppc => lib_powerpc}/andi.c | 0 post/{lib_ppc => lib_powerpc}/asm.S | 0 post/{lib_ppc => lib_powerpc}/b.c | 0 post/{lib_ppc => lib_powerpc}/cmp.c | 0 post/{lib_ppc => lib_powerpc}/cmpi.c | 0 post/{lib_ppc => lib_powerpc}/complex.c | 0 post/{lib_ppc => lib_powerpc}/cpu.c | 0 post/{lib_ppc => lib_powerpc}/cpu_asm.h | 0 post/{lib_ppc => lib_powerpc}/cr.c | 0 .../{lib_ppc => lib_powerpc}/fpu/20001122-1.c | 0 .../{lib_ppc => lib_powerpc}/fpu/20010114-2.c | 0 .../{lib_ppc => lib_powerpc}/fpu/20010226-1.c | 0 post/{lib_ppc => lib_powerpc}/fpu/980619-1.c | 0 post/{lib_ppc => lib_powerpc}/fpu/Makefile | 2 +- post/{lib_ppc => lib_powerpc}/fpu/acc1.c | 0 .../fpu/compare-fp-1.c | 0 post/{lib_ppc => lib_powerpc}/fpu/fpu.c | 0 .../fpu/mul-subnormal-single-1.c | 0 post/{lib_ppc => lib_powerpc}/load.c | 0 post/{lib_ppc => lib_powerpc}/multi.c | 0 post/{lib_ppc => lib_powerpc}/rlwimi.c | 0 post/{lib_ppc => lib_powerpc}/rlwinm.c | 0 post/{lib_ppc => lib_powerpc}/rlwnm.c | 0 post/{lib_ppc => lib_powerpc}/srawi.c | 0 post/{lib_ppc => lib_powerpc}/store.c | 0 post/{lib_ppc => lib_powerpc}/string.c | 0 post/{lib_ppc => lib_powerpc}/three.c | 0 post/{lib_ppc => lib_powerpc}/threei.c | 0 post/{lib_ppc => lib_powerpc}/threex.c | 0 post/{lib_ppc => lib_powerpc}/two.c | 0 post/{lib_ppc => lib_powerpc}/twox.c | 0 579 files changed, 879 insertions(+), 877 deletions(-) rename api/{api_platform-ppc.c => api_platform-powerpc.c} (100%) rename arch/{ppc => powerpc}/config.mk (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/Makefile (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/cache.S (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/config.mk (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/io.S (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/kgdb.S (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/speed.c (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/start.S (100%) rename arch/{ppc => powerpc}/cpu/74xx_7xx/traps.c (99%) rename arch/{ppc => powerpc}/cpu/mpc512x/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/asm-offsets.h (87%) rename arch/{ppc => powerpc}/cpu/mpc512x/config.mk (94%) rename arch/{ppc => powerpc}/cpu/mpc512x/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/diu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/fixed_sdram.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/i2c.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/ide.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/iim.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/iopin.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/pci.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/serial.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/start.S (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/traps.c (100%) rename arch/{ppc => powerpc}/cpu/mpc512x/u-boot.lds (98%) rename arch/{ppc => powerpc}/cpu/mpc5xx/Makefile (93%) rename arch/{ppc => powerpc}/cpu/mpc5xx/config.mk (95%) rename arch/{ppc => powerpc}/cpu/mpc5xx/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xx/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xx/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xx/serial.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xx/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xx/spi.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xx/start.S (100%) rename arch/{ppc => powerpc}/cpu/mpc5xx/traps.c (99%) rename arch/{ppc => powerpc}/cpu/mpc5xx/u-boot.lds (98%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/config.mk (94%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/i2c.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/ide.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/interrupts.c (99%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/io.S (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/loadtask.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/pci_mpc5200.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/serial.c (99%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/start.S (99%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/traps.c (99%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/u-boot-customlayout.lds (94%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/u-boot.lds (98%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/usb.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/usb_ohci.c (100%) rename arch/{ppc => powerpc}/cpu/mpc5xxx/usb_ohci.h (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/config.mk (94%) rename arch/{ppc => powerpc}/cpu/mpc8220/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/dma.h (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/dramSetup.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/dramSetup.h (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/fec.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/fec.h (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/fec_dma_tasks.S (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/i2c.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/i2cCore.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/i2cCore.h (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/io.S (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/loadtask.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/pci.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8220/start.S (99%) rename arch/{ppc => powerpc}/cpu/mpc8220/traps.c (99%) rename arch/{ppc => powerpc}/cpu/mpc8220/u-boot.lds (98%) rename arch/{ppc => powerpc}/cpu/mpc8220/uart.c (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/.gitignore (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/config.mk (94%) rename arch/{ppc => powerpc}/cpu/mpc824x/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/drivers/epic.h (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/drivers/epic/README (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/drivers/epic/epic.h (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/drivers/epic/epic1.c (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/drivers/epic/epic2.S (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/drivers/epic/epicutil.S (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/drivers/errors.h (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/drivers/i2c/i2c.c (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/drivers/i2c_export.h (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/pci.c (97%) rename arch/{ppc => powerpc}/cpu/mpc824x/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/start.S (100%) rename arch/{ppc => powerpc}/cpu/mpc824x/traps.c (99%) rename arch/{ppc/cpu/mpc8260 => powerpc/cpu/mpc824x}/u-boot.lds (98%) rename arch/{ppc => powerpc}/cpu/mpc8260/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/bedbug_603e.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/commproc.c (98%) rename arch/{ppc => powerpc}/cpu/mpc8260/config.mk (94%) rename arch/{ppc => powerpc}/cpu/mpc8260/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/ether_fcc.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/ether_scc.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/i2c.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/interrupts.c (97%) rename arch/{ppc => powerpc}/cpu/mpc8260/kgdb.S (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/pci.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/serial_scc.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/serial_smc.c (99%) rename arch/{ppc => powerpc}/cpu/mpc8260/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/speed.h (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/spi.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8260/start.S (99%) rename arch/{ppc => powerpc}/cpu/mpc8260/traps.c (99%) rename arch/{ppc/cpu/mpc824x => powerpc/cpu/mpc8260}/u-boot.lds (98%) rename arch/{ppc => powerpc}/cpu/mpc83xx/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/config.mk (94%) rename arch/{ppc => powerpc}/cpu/mpc83xx/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/ecc.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/fdt.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/nand_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/pci.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/pcie.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/qe_io.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/serdes.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/spd_sdram.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/start.S (99%) rename arch/{ppc => powerpc}/cpu/mpc83xx/traps.c (100%) rename arch/{ppc => powerpc}/cpu/mpc83xx/u-boot.lds (98%) rename arch/{ppc => powerpc}/cpu/mpc85xx/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/commproc.c (98%) rename arch/{ppc => powerpc}/cpu/mpc85xx/config.mk (95%) rename arch/{ppc => powerpc}/cpu/mpc85xx/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/cpu_init_early.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/cpu_init_nand.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/ddr-gen1.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/ddr-gen2.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/ddr-gen3.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/ether_fcc.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/fdt.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/fixed_ivor.S (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/mp.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/mp.h (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/mpc8536_serdes.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/pci.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/qe_io.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/release.S (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/resetvec.S (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/serial_scc.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/start.S (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/tlb.c (100%) rename arch/{ppc => powerpc}/cpu/mpc85xx/traps.c (99%) rename arch/{ppc => powerpc}/cpu/mpc85xx/u-boot-nand.lds (98%) rename arch/{ppc => powerpc}/cpu/mpc85xx/u-boot-nand_spl.lds (99%) rename arch/{ppc => powerpc}/cpu/mpc85xx/u-boot.lds (98%) rename arch/{ppc => powerpc}/cpu/mpc86xx/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/cache.S (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/config.mk (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/ddr-8641.c (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/fdt.c (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/mp.c (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/release.S (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/start.S (100%) rename arch/{ppc => powerpc}/cpu/mpc86xx/traps.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/bedbug_860.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/commproc.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/config.mk (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/fdt.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/fec.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/fec.h (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/i2c.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/kgdb.S (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/lcd.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/plprcr_write.S (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/scc.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/serial.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/speed.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/spi.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/start.S (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/traps.c (99%) rename arch/{ppc => powerpc}/cpu/mpc8xx/upatch.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/video.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xx/wlkbd.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/cpu.c (96%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/Makefile (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/common_timing_params.h (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/ctrl_regs.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/ddr.h (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/ddr1_dimm_params.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/ddr2_dimm_params.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/ddr3_dimm_params.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/lc_common_dimm_params.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/main.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/options.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/ddr/util.c (100%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/fdt.c (93%) rename arch/{ppc => powerpc}/cpu/mpc8xxx/pci_cfg.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/40x_spd_sdram.c (99%) rename arch/{ppc => powerpc}/cpu/ppc4xx/44x_spd_ddr.c (99%) rename arch/{ppc => powerpc}/cpu/ppc4xx/44x_spd_ddr2.c (99%) rename arch/{ppc => powerpc}/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c (99%) rename arch/{ppc => powerpc}/cpu/ppc4xx/4xx_pci.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/4xx_pcie.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/4xx_uart.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/Makefile (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/bedbug_405.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/cache.S (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/cmd_chip_config.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/commproc.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/config.mk (95%) rename arch/{ppc => powerpc}/cpu/ppc4xx/cpu.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/cpu_init.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/dcr.S (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/denali_data_eye.c (99%) rename arch/{ppc => powerpc}/cpu/ppc4xx/denali_spd_ddr2.c (99%) rename arch/{ppc => powerpc}/cpu/ppc4xx/ecc.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/ecc.h (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/fdt.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/gpio.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/interrupts.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/iop480_uart.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/kgdb.S (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/miiphy.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/reginfo.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/resetvec.S (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/sdram.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/sdram.h (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/speed.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/start.S (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/tlb.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/traps.c (99%) rename arch/{ppc => powerpc}/cpu/ppc4xx/u-boot.lds (98%) rename arch/{ppc => powerpc}/cpu/ppc4xx/uic.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/usb.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/usb_ohci.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/usb_ohci.h (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/usbdev.c (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/usbdev.h (100%) rename arch/{ppc => powerpc}/cpu/ppc4xx/xilinx_irq.c (100%) rename arch/{ppc => powerpc}/include/asm/4xx_pci.h (100%) rename arch/{ppc => powerpc}/include/asm/4xx_pcie.h (100%) rename arch/{ppc => powerpc}/include/asm/5xx_immap.h (100%) rename arch/{ppc => powerpc}/include/asm/8xx_immap.h (100%) rename arch/{ppc => powerpc}/include/asm/atomic.h (100%) rename arch/{ppc => powerpc}/include/asm/bitops.h (100%) rename arch/{ppc => powerpc}/include/asm/byteorder.h (100%) rename arch/{ppc => powerpc}/include/asm/cache.h (100%) rename arch/{ppc => powerpc}/include/asm/config.h (100%) rename arch/{ppc => powerpc}/include/asm/cpm_8260.h (100%) rename arch/{ppc => powerpc}/include/asm/cpm_85xx.h (100%) rename arch/{ppc => powerpc}/include/asm/e300.h (100%) rename arch/{ppc => powerpc}/include/asm/errno.h (100%) rename arch/{ppc => powerpc}/include/asm/fsl_ddr_dimm_params.h (100%) rename arch/{ppc => powerpc}/include/asm/fsl_ddr_sdram.h (100%) rename arch/{ppc => powerpc}/include/asm/fsl_dma.h (100%) rename arch/{ppc => powerpc}/include/asm/fsl_i2c.h (100%) rename arch/{ppc => powerpc}/include/asm/fsl_law.h (100%) rename arch/{ppc => powerpc}/include/asm/fsl_lbc.h (100%) rename arch/{ppc => powerpc}/include/asm/fsl_pci.h (100%) rename arch/{ppc => powerpc}/include/asm/fsl_serdes.h (100%) rename arch/{ppc => powerpc}/include/asm/global_data.h (100%) rename arch/{ppc => powerpc}/include/asm/gpio.h (100%) rename arch/{ppc => powerpc}/include/asm/immap_512x.h (100%) rename arch/{ppc => powerpc}/include/asm/immap_8220.h (100%) rename arch/{ppc => powerpc}/include/asm/immap_8260.h (100%) rename arch/{ppc => powerpc}/include/asm/immap_83xx.h (100%) rename arch/{ppc => powerpc}/include/asm/immap_85xx.h (100%) rename arch/{ppc => powerpc}/include/asm/immap_86xx.h (100%) rename arch/{ppc => powerpc}/include/asm/immap_qe.h (100%) rename arch/{ppc => powerpc}/include/asm/interrupt.h (100%) rename arch/{ppc => powerpc}/include/asm/io.h (100%) rename arch/{ppc => powerpc}/include/asm/iopin_8260.h (100%) rename arch/{ppc => powerpc}/include/asm/iopin_85xx.h (100%) rename arch/{ppc => powerpc}/include/asm/iopin_8xx.h (100%) rename arch/{ppc => powerpc}/include/asm/m8260_pci.h (100%) rename arch/{ppc => powerpc}/include/asm/mc146818rtc.h (100%) rename arch/{ppc => powerpc}/include/asm/mmu.h (100%) rename arch/{ppc => powerpc}/include/asm/mp.h (100%) rename arch/{ppc => powerpc}/include/asm/mpc512x.h (100%) rename arch/{ppc => powerpc}/include/asm/mpc8349_pci.h (100%) rename arch/{ppc => powerpc}/include/asm/mpc8xxx_spi.h (100%) rename arch/{ppc => powerpc}/include/asm/pci_io.h (100%) rename arch/{ppc => powerpc}/include/asm/pnp.h (100%) rename arch/{ppc => powerpc}/include/asm/posix_types.h (100%) rename arch/{ppc => powerpc}/include/asm/ppc4xx-ebc.h (100%) rename arch/{ppc => powerpc}/include/asm/ppc4xx-isram.h (100%) rename arch/{ppc => powerpc}/include/asm/ppc4xx-sdram.h (100%) rename arch/{ppc => powerpc}/include/asm/ppc4xx-uic.h (100%) rename arch/{ppc => powerpc}/include/asm/ppc4xx_config.h (100%) rename arch/{ppc => powerpc}/include/asm/processor.h (100%) rename arch/{ppc => powerpc}/include/asm/ptrace.h (97%) rename arch/{ppc => powerpc}/include/asm/residual.h (100%) rename arch/{ppc => powerpc}/include/asm/sigcontext.h (100%) rename arch/{ppc => powerpc}/include/asm/signal.h (100%) rename arch/{ppc => powerpc}/include/asm/status_led.h (100%) rename arch/{ppc => powerpc}/include/asm/string.h (100%) rename arch/{ppc => powerpc}/include/asm/types.h (100%) rename arch/{ppc => powerpc}/include/asm/u-boot.h (100%) rename arch/{ppc => powerpc}/include/asm/unaligned.h (100%) rename arch/{ppc => powerpc}/include/asm/xilinx_irq.h (100%) rename arch/{ppc => powerpc}/lib/Makefile (100%) rename arch/{ppc => powerpc}/lib/bat_rw.c (100%) rename arch/{ppc => powerpc}/lib/board.c (100%) rename arch/{ppc => powerpc}/lib/bootm.c (100%) rename arch/{ppc => powerpc}/lib/cache.c (100%) rename arch/{ppc => powerpc}/lib/extable.c (100%) rename arch/{ppc => powerpc}/lib/interrupts.c (100%) rename arch/{ppc => powerpc}/lib/kgdb.c (100%) rename arch/{ppc => powerpc}/lib/ppccache.S (100%) rename arch/{ppc => powerpc}/lib/ppcstring.S (100%) rename arch/{ppc => powerpc}/lib/reloc.S (100%) rename arch/{ppc => powerpc}/lib/ticks.S (100%) rename arch/{ppc => powerpc}/lib/time.c (100%) rename post/{lib_ppc => lib_powerpc}/Makefile (98%) rename post/{lib_ppc => lib_powerpc}/andi.c (100%) rename post/{lib_ppc => lib_powerpc}/asm.S (100%) rename post/{lib_ppc => lib_powerpc}/b.c (100%) rename post/{lib_ppc => lib_powerpc}/cmp.c (100%) rename post/{lib_ppc => lib_powerpc}/cmpi.c (100%) rename post/{lib_ppc => lib_powerpc}/complex.c (100%) rename post/{lib_ppc => lib_powerpc}/cpu.c (100%) rename post/{lib_ppc => lib_powerpc}/cpu_asm.h (100%) rename post/{lib_ppc => lib_powerpc}/cr.c (100%) rename post/{lib_ppc => lib_powerpc}/fpu/20001122-1.c (100%) rename post/{lib_ppc => lib_powerpc}/fpu/20010114-2.c (100%) rename post/{lib_ppc => lib_powerpc}/fpu/20010226-1.c (100%) rename post/{lib_ppc => lib_powerpc}/fpu/980619-1.c (100%) rename post/{lib_ppc => lib_powerpc}/fpu/Makefile (97%) rename post/{lib_ppc => lib_powerpc}/fpu/acc1.c (100%) rename post/{lib_ppc => lib_powerpc}/fpu/compare-fp-1.c (100%) rename post/{lib_ppc => lib_powerpc}/fpu/fpu.c (100%) rename post/{lib_ppc => lib_powerpc}/fpu/mul-subnormal-single-1.c (100%) rename post/{lib_ppc => lib_powerpc}/load.c (100%) rename post/{lib_ppc => lib_powerpc}/multi.c (100%) rename post/{lib_ppc => lib_powerpc}/rlwimi.c (100%) rename post/{lib_ppc => lib_powerpc}/rlwinm.c (100%) rename post/{lib_ppc => lib_powerpc}/rlwnm.c (100%) rename post/{lib_ppc => lib_powerpc}/srawi.c (100%) rename post/{lib_ppc => lib_powerpc}/store.c (100%) rename post/{lib_ppc => lib_powerpc}/string.c (100%) rename post/{lib_ppc => lib_powerpc}/three.c (100%) rename post/{lib_ppc => lib_powerpc}/threei.c (100%) rename post/{lib_ppc => lib_powerpc}/threex.c (100%) rename post/{lib_ppc => lib_powerpc}/two.c (100%) rename post/{lib_ppc => lib_powerpc}/twox.c (100%) diff --git a/MAKEALL b/MAKEALL index fb1f7a3cee..4632750943 100755 --- a/MAKEALL +++ b/MAKEALL @@ -489,7 +489,7 @@ LIST_TSEC=" \ ${LIST_86xx} \ " -LIST_ppc=" \ +LIST_powerpc=" \ ${LIST_5xx} \ ${LIST_512x} \ ${LIST_5xxx} \ @@ -505,6 +505,12 @@ LIST_ppc=" \ ${LIST_7xx} \ " +# Alias "ppc" -> "powerpc" to not break compatibility with older scripts +# still using "ppc" instead of "powerpc" +LIST_ppc=" \ + ${LIST_powerpc} \ +" + ######################################################################### ## StrongARM Systems ######################################################################### @@ -949,8 +955,8 @@ LIST_sparc="gr_xc3s_1500 gr_cpci_ax2000 gr_ep2s60 grsim grsim_leon2" #----------------------------------------------------------------------- -#----- for now, just run PPC by default ----- -[ $# = 0 ] && set $LIST_ppc +#----- for now, just run PowerPC by default ----- +[ $# = 0 ] && set $LIST_powerpc #----------------------------------------------------------------------- @@ -1006,7 +1012,7 @@ do |microblaze \ |mips|mips_el \ |nios|nios2 \ - |ppc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx|TSEC \ + |ppc|powerpc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx|TSEC \ |sh|sh2|sh3|sh4 \ |sparc \ |x86|I486 \ diff --git a/Makefile b/Makefile index 0381c8110f..34f10ced18 100644 --- a/Makefile +++ b/Makefile @@ -133,10 +133,6 @@ unexport CDPATH ######################################################################### -ifeq ($(ARCH),powerpc) -ARCH = ppc -endif - # The "tools" are needed early, so put this first # Don't include stuff already done in $(LIBS) SUBDIRS = tools \ @@ -227,12 +223,12 @@ LIBS += drivers/qe/qe.a endif ifeq ($(CPU),mpc85xx) LIBS += drivers/qe/qe.a -LIBS += arch/ppc/cpu/mpc8xxx/ddr/libddr.a -LIBS += arch/ppc/cpu/mpc8xxx/lib8xxx.a +LIBS += arch/powerpc/cpu/mpc8xxx/ddr/libddr.a +LIBS += arch/powerpc/cpu/mpc8xxx/lib8xxx.a endif ifeq ($(CPU),mpc86xx) -LIBS += arch/ppc/cpu/mpc8xxx/ddr/libddr.a -LIBS += arch/ppc/cpu/mpc8xxx/lib8xxx.a +LIBS += arch/powerpc/cpu/mpc8xxx/ddr/libddr.a +LIBS += arch/powerpc/cpu/mpc8xxx/lib8xxx.a endif LIBS += drivers/rtc/librtc.a LIBS += drivers/serial/libserial.a @@ -491,29 +487,29 @@ unconfig: ######################################################################### canmb_config: unconfig - @$(MKCONFIG) -a canmb ppc mpc5xxx canmb + @$(MKCONFIG) -a canmb powerpc mpc5xxx canmb cmi_mpc5xx_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc5xx cmi + @$(MKCONFIG) $(@:_config=) powerpc mpc5xx cmi PATI_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc5xx pati mpl + @$(MKCONFIG) $(@:_config=) powerpc mpc5xx pati mpl ######################################################################### ## MPC5xxx Systems ######################################################################### aev_config: unconfig - @$(MKCONFIG) -a aev ppc mpc5xxx tqm5200 tqc + @$(MKCONFIG) -a aev powerpc mpc5xxx tqm5200 tqc BC3450_config: unconfig - @$(MKCONFIG) -a BC3450 ppc mpc5xxx bc3450 + @$(MKCONFIG) -a BC3450 powerpc mpc5xxx bc3450 cm5200_config: unconfig - @$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200 + @$(MKCONFIG) -a cm5200 powerpc mpc5xxx cm5200 cpci5200_config: unconfig - @$(MKCONFIG) -a cpci5200 ppc mpc5xxx cpci5200 esd + @$(MKCONFIG) -a cpci5200 powerpc mpc5xxx cpci5200 esd digsy_mtc_config \ digsy_mtc_LOWBOOT_config \ @@ -529,16 +525,16 @@ digsy_mtc_RAMBOOT_config: unconfig { echo "TEXT_BASE = 0x00100000" >$(obj)board/digsy_mtc/config.tmp ; \ echo "... with RAMBOOT configuration" ; \ } - @$(MKCONFIG) -a digsy_mtc ppc mpc5xxx digsy_mtc + @$(MKCONFIG) -a digsy_mtc powerpc mpc5xxx digsy_mtc galaxy5200_LOWBOOT_config \ galaxy5200_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h - @$(MKCONFIG) -a galaxy5200 ppc mpc5xxx galaxy5200 + @$(MKCONFIG) -a galaxy5200 powerpc mpc5xxx galaxy5200 hmi1001_config: unconfig - @$(MKCONFIG) hmi1001 ppc mpc5xxx hmi1001 + @$(MKCONFIG) hmi1001 powerpc mpc5xxx hmi1001 Lite5200_config \ Lite5200_LOWBOOT_config \ @@ -567,16 +563,16 @@ icecube_5200_DDR_LOWBOOT08_config: unconfig { echo "#define CONFIG_MPC5200_DDR" >>$(obj)include/config.h ; \ $(XECHO) "... DDR memory revision" ; \ } - @$(MKCONFIG) -a IceCube ppc mpc5xxx icecube + @$(MKCONFIG) -a IceCube powerpc mpc5xxx icecube jupiter_config: unconfig - @$(MKCONFIG) jupiter ppc mpc5xxx jupiter + @$(MKCONFIG) jupiter powerpc mpc5xxx jupiter inka4x0_config: unconfig - @$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0 + @$(MKCONFIG) inka4x0 powerpc mpc5xxx inka4x0 ipek01_config: unconfig - @$(MKCONFIG) -a ipek01 ppc mpc5xxx ipek01 + @$(MKCONFIG) -a ipek01 powerpc mpc5xxx ipek01 lite5200b_config \ lite5200b_PM_config \ @@ -594,7 +590,7 @@ lite5200b_LOWBOOT_config: unconfig { echo "TEXT_BASE = 0xFF000000" >$(obj)board/icecube/config.tmp ; \ $(XECHO) "... with LOWBOOT configuration" ; \ } - @$(MKCONFIG) -a IceCube ppc mpc5xxx icecube + @$(MKCONFIG) -a IceCube powerpc mpc5xxx icecube mcc200_config \ mcc200_SDRAM_config \ @@ -642,19 +638,19 @@ prs200_highboot_DDR_config: unconfig @[ -z "$(findstring prs200,$@)" ] || \ { echo "#define CONFIG_PRS200" >>$(obj)include/config.h ;\ } - @$(MKCONFIG) -n $@ -a mcc200 ppc mpc5xxx mcc200 + @$(MKCONFIG) -n $@ -a mcc200 powerpc mpc5xxx mcc200 mecp5200_config: unconfig - @$(MKCONFIG) mecp5200 ppc mpc5xxx mecp5200 esd + @$(MKCONFIG) mecp5200 powerpc mpc5xxx mecp5200 esd motionpro_config: unconfig - @$(MKCONFIG) motionpro ppc mpc5xxx motionpro + @$(MKCONFIG) motionpro powerpc mpc5xxx motionpro mucmc52_config: unconfig - @$(MKCONFIG) mucmc52 ppc mpc5xxx mucmc52 + @$(MKCONFIG) mucmc52 powerpc mpc5xxx mucmc52 munices_config: unconfig - @$(MKCONFIG) munices ppc mpc5xxx munices + @$(MKCONFIG) munices powerpc mpc5xxx munices MVBC_P_config: unconfig @mkdir -p $(obj)include @@ -662,15 +658,15 @@ MVBC_P_config: unconfig @ >$(obj)include/config.h @[ -z "$(findstring MVBC_P,$@)" ] || \ { echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h; } - @$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision + @$(MKCONFIG) -n $@ -a MVBC_P powerpc mpc5xxx mvbc_p matrix_vision MVSMR_config: unconfig @mkdir -p $(obj)include @mkdir -p $(obj)board/matrix_vision/mvsmr - @$(MKCONFIG) $(@:_config=) ppc mpc5xxx mvsmr matrix_vision + @$(MKCONFIG) $(@:_config=) powerpc mpc5xxx mvsmr matrix_vision o2dnt_config: unconfig - @$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt + @$(MKCONFIG) o2dnt powerpc mpc5xxx o2dnt pcm030_config \ pcm030_LOWBOOT_config: unconfig @@ -680,10 +676,10 @@ pcm030_LOWBOOT_config: unconfig { echo "TEXT_BASE = 0xFF000000" >$(obj)board/phytec/pcm030/config.tmp ; \ echo "... with LOWBOOT configuration" ; \ } - @$(MKCONFIG) -a pcm030 ppc mpc5xxx pcm030 phytec + @$(MKCONFIG) -a pcm030 powerpc mpc5xxx pcm030 phytec pf5200_config: unconfig - @$(MKCONFIG) pf5200 ppc mpc5xxx pf5200 esd + @$(MKCONFIG) pf5200 powerpc mpc5xxx pf5200 esd PM520_config \ PM520_DDR_config \ @@ -698,13 +694,13 @@ PM520_ROMBOOT_DDR_config: unconfig { echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \ $(XECHO) "... booting from 8-bit flash" ; \ } - @$(MKCONFIG) -a PM520 ppc mpc5xxx pm520 + @$(MKCONFIG) -a PM520 powerpc mpc5xxx pm520 smmaco4_config: unconfig - @$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200 tqc + @$(MKCONFIG) -a smmaco4 powerpc mpc5xxx tqm5200 tqc spieval_config: unconfig - @$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200 tqc + @$(MKCONFIG) -a spieval powerpc mpc5xxx tqm5200 tqc TB5200_B_config \ TB5200_config: unconfig @@ -713,14 +709,14 @@ TB5200_config: unconfig { echo "#define CONFIG_TQM5200_B" >>$(obj)include/config.h ; \ $(XECHO) "... with MPC5200B processor" ; \ } - @$(MKCONFIG) -n $@ -a TB5200 ppc mpc5xxx tqm5200 tqc + @$(MKCONFIG) -n $@ -a TB5200 powerpc mpc5xxx tqm5200 tqc MINI5200_config \ EVAL5200_config \ TOP5200_config: unconfig @mkdir -p $(obj)include @ echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a TOP5200 ppc mpc5xxx top5200 emk + @$(MKCONFIG) -n $@ -a TOP5200 powerpc mpc5xxx top5200 emk Total5200_config \ Total5200_lowboot_config \ @@ -740,7 +736,7 @@ Total5200_Rev2_lowboot_config: unconfig { echo "TEXT_BASE = 0xFE000000" >$(obj)board/total5200/config.tmp ; \ $(XECHO) "... with lowboot configuration" ; \ } - @$(MKCONFIG) -a Total5200 ppc mpc5xxx total5200 + @$(MKCONFIG) -a Total5200 powerpc mpc5xxx total5200 cam5200_config \ cam5200_niosflash_config \ @@ -786,23 +782,23 @@ TQM5200_STK100_config: unconfig @[ -z "$(findstring HIGHBOOT,$@)" ] || \ { echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \ } - @$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200 tqc + @$(MKCONFIG) -n $@ -a TQM5200 powerpc mpc5xxx tqm5200 tqc uc101_config: unconfig - @$(MKCONFIG) uc101 ppc mpc5xxx uc101 + @$(MKCONFIG) uc101 powerpc mpc5xxx uc101 v38b_config: unconfig - @$(MKCONFIG) -a v38b ppc mpc5xxx v38b + @$(MKCONFIG) -a v38b powerpc mpc5xxx v38b ######################################################################### ## MPC512x Systems ######################################################################### aria_config: unconfig - @$(MKCONFIG) -a aria ppc mpc512x aria davedenx + @$(MKCONFIG) -a aria powerpc mpc512x aria davedenx mecp5123_config: unconfig - @$(MKCONFIG) -a mecp5123 ppc mpc512x mecp5123 esd + @$(MKCONFIG) -a mecp5123 powerpc mpc512x mecp5123 esd mpc5121ads_config \ mpc5121ads_rev2_config \ @@ -811,7 +807,7 @@ mpc5121ads_rev2_config \ @if [ "$(findstring rev2,$@)" ] ; then \ echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \ fi - @$(MKCONFIG) -a mpc5121ads ppc mpc512x mpc5121ads freescale + @$(MKCONFIG) -a mpc5121ads powerpc mpc512x mpc5121ads freescale ######################################################################### ## MPC8xx Systems @@ -824,10 +820,10 @@ AdderII_config \ @mkdir -p $(obj)include $(if $(findstring AdderII,$@), \ @echo "#define CONFIG_MPC852T" > $(obj)include/config.h) - @$(MKCONFIG) -a Adder ppc mpc8xx adder + @$(MKCONFIG) -a Adder powerpc mpc8xx adder AdderUSB_config: unconfig - @$(MKCONFIG) -a AdderUSB ppc mpc8xx adder + @$(MKCONFIG) -a AdderUSB powerpc mpc8xx adder ADS860_config \ FADS823_config \ @@ -835,34 +831,34 @@ FADS850SAR_config \ MPC86xADS_config \ MPC885ADS_config \ FADS860T_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx fads + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx fads AMX860_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx amx860 westel + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx amx860 westel c2mon_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx c2mon + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx c2mon CCM_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx CCM siemens + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx CCM siemens cogent_mpc8xx_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx cogent + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx cogent ELPT860_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx elpt860 LEOX + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx elpt860 LEOX EP88x_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx ep88x + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx ep88x ESTEEM192E_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx esteem192e + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx esteem192e ETX094_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx etx094 + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx etx094 FLAGADM_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx flagadm + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx flagadm xtract_GEN860T = $(subst _SC,,$(subst _config,,$1)) @@ -873,22 +869,22 @@ GEN860T_config: unconfig { echo "#define CONFIG_SC" >>$(obj)include/config.h ; \ $(XECHO) "With reduced H/W feature set (SC)..." ; \ } - @$(MKCONFIG) -a $(call xtract_GEN860T,$@) ppc mpc8xx gen860t + @$(MKCONFIG) -a $(call xtract_GEN860T,$@) powerpc mpc8xx gen860t GENIETV_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx genietv + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx genietv GTH_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx gth + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx gth hermes_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx hermes + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx hermes HMI10_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx tqm8xx tqc IAD210_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx IAD210 siemens + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx IAD210 siemens xtract_ICU862 = $(subst _100MHz,,$(subst _config,,$1)) @@ -899,10 +895,10 @@ ICU862_config: unconfig { echo "#define CONFIG_100MHz" >>$(obj)include/config.h ; \ $(XECHO) "... with 100MHz system clock" ; \ } - @$(MKCONFIG) -a $(call xtract_ICU862,$@) ppc mpc8xx icu862 + @$(MKCONFIG) -a $(call xtract_ICU862,$@) powerpc mpc8xx icu862 IP860_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx ip860 + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx ip860 IVML24_256_config \ IVML24_128_config \ @@ -917,7 +913,7 @@ IVML24_config: unconfig @[ -z "$(findstring IVML24_256_config,$@)" ] || \ { echo "#define CONFIG_IVML24_64M" >>$(obj)include/config.h ; \ } - @$(MKCONFIG) -a IVML24 ppc mpc8xx ivm + @$(MKCONFIG) -a IVML24 powerpc mpc8xx ivm IVMS8_256_config \ IVMS8_128_config \ @@ -932,32 +928,32 @@ IVMS8_config: unconfig @[ -z "$(findstring IVMS8_256_config,$@)" ] || \ { echo "#define CONFIG_IVMS8_64M" >>$(obj)include/config.h ; \ } - @$(MKCONFIG) -a IVMS8 ppc mpc8xx ivm + @$(MKCONFIG) -a IVMS8 powerpc mpc8xx ivm kmsupx4_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx km8xx keymile + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx km8xx keymile KUP4K_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx kup4k kup + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx kup4k kup KUP4X_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx kup4x kup + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx kup4x kup LANTEC_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx lantec + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx lantec lwmon_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx lwmon + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx lwmon MBX_config \ MBX860T_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx mbx8xx + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx mbx8xx mgsuvd_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx km8xx keymile + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx km8xx keymile MHPC_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx mhpc eltec + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx mhpc eltec xtract_NETVIA = $(subst _V2,,$(subst _config,,$1)) @@ -972,7 +968,7 @@ NETVIA_config: unconfig { echo "#define CONFIG_NETVIA_VERSION 2" >>$(obj)include/config.h ; \ $(XECHO) "... Version 2" ; \ } - @$(MKCONFIG) -a $(call xtract_NETVIA,$@) ppc mpc8xx netvia + @$(MKCONFIG) -a $(call xtract_NETVIA,$@) powerpc mpc8xx netvia xtract_NETPHONE = $(subst _V2,,$(subst _config,,$1)) @@ -985,7 +981,7 @@ NETPHONE_config: unconfig @[ -z "$(findstring NETPHONE_V2_config,$@)" ] || \ { echo "#define CONFIG_NETPHONE_VERSION 2" >>$(obj)include/config.h ; \ } - @$(MKCONFIG) -a $(call xtract_NETPHONE,$@) ppc mpc8xx netphone + @$(MKCONFIG) -a $(call xtract_NETPHONE,$@) powerpc mpc8xx netphone xtract_NETTA = $(subst _SWAPHOOK,,$(subst _6412,,$(subst _ISDN,,$(subst _config,,$1)))) @@ -1016,7 +1012,7 @@ NETTA_config: unconfig @[ -n "$(findstring SWAPHOOK_,$@)" ] || \ { echo "#undef CONFIG_NETTA_SWAPHOOK" >>$(obj)include/config.h ; \ } - @$(MKCONFIG) -a $(call xtract_NETTA,$@) ppc mpc8xx netta + @$(MKCONFIG) -a $(call xtract_NETTA,$@) powerpc mpc8xx netta xtract_NETTA2 = $(subst _V2,,$(subst _config,,$1)) @@ -1029,7 +1025,7 @@ NETTA2_config: unconfig @[ -z "$(findstring NETTA2_V2_config,$@)" ] || \ { echo "#define CONFIG_NETTA2_VERSION 2" >>$(obj)include/config.h ; \ } - @$(MKCONFIG) -a $(call xtract_NETTA2,$@) ppc mpc8xx netta2 + @$(MKCONFIG) -a $(call xtract_NETTA2,$@) powerpc mpc8xx netta2 NC650_Rev1_config \ NC650_Rev2_config \ @@ -1045,37 +1041,37 @@ CP850_config: unconfig @[ -z "$(findstring Rev2,$@)" ] || \ { echo "#define CONFIG_IDS852_REV2 1" >>$(obj)include/config.h ; \ } - @$(MKCONFIG) -a NC650 ppc mpc8xx nc650 + @$(MKCONFIG) -a NC650 powerpc mpc8xx nc650 NX823_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx nx823 + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx nx823 pcu_e_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx pcu_e siemens + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx pcu_e siemens QS850_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx qs850 snmc + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx qs850 snmc QS823_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx qs850 snmc + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx qs850 snmc QS860T_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx qs860t snmc + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx qs860t snmc quantum_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx quantum + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx quantum R360MPI_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx r360mpi + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx r360mpi RBC823_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx rbc823 + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx rbc823 RPXClassic_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx RPXClassic + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx RPXClassic RPXlite_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx RPXlite + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx RPXlite RPXlite_DW_64_config \ RPXlite_DW_LCD_config \ @@ -1099,41 +1095,41 @@ RPXlite_DW_config: unconfig { echo "#define CONFIG_ENV_IS_IN_NVRAM" >>$(obj)include/config.h ; \ $(XECHO) "... with ENV in NVRAM ..."; \ } - @$(MKCONFIG) -a RPXlite_DW ppc mpc8xx RPXlite_dw + @$(MKCONFIG) -a RPXlite_DW powerpc mpc8xx RPXlite_dw rmu_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx rmu + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx rmu RRvision_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx RRvision + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx RRvision RRvision_LCD_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_LCD" >$(obj)include/config.h @echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h - @$(MKCONFIG) -a RRvision ppc mpc8xx RRvision + @$(MKCONFIG) -a RRvision powerpc mpc8xx RRvision SM850_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx tqm8xx tqc + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx tqm8xx tqc spc1920_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx spc1920 + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx spc1920 SPD823TS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx spd8xx + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx spd8xx stxxtc_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx stxxtc stx + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx stxxtc stx svm_sc8xx_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx svm_sc8xx + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx svm_sc8xx SXNI855T_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx sixnet + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx sixnet # EMK MPC8xx based modules TOP860_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx top860 emk + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx top860 emk # Play some tricks for configuration selection # Only 855 and 860 boards may come with FEC @@ -1164,28 +1160,28 @@ virtlab2_config: unconfig echo "#define CONFIG_NEC_NL6448BC20" >>$(obj)include/config.h ; \ $(XECHO) "... with LCD display" ; \ } - @$(MKCONFIG) -a $(call xtract_8xx,$@) ppc mpc8xx tqm8xx tqc + @$(MKCONFIG) -a $(call xtract_8xx,$@) powerpc mpc8xx tqm8xx tqc TTTech_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_LCD" >$(obj)include/config.h @echo "#define CONFIG_SHARP_LQ104V7DS01" >>$(obj)include/config.h - @$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc + @$(MKCONFIG) -a TQM823L powerpc mpc8xx tqm8xx tqc uc100_config : unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8xx uc100 + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx uc100 v37_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_LCD" >$(obj)include/config.h @echo "#define CONFIG_SHARP_LQ084V1DG21" >>$(obj)include/config.h - @$(MKCONFIG) $(@:_config=) ppc mpc8xx v37 + @$(MKCONFIG) $(@:_config=) powerpc mpc8xx v37 wtk_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_LCD" >$(obj)include/config.h @echo "#define CONFIG_SHARP_LQ065T9DR51U" >>$(obj)include/config.h - @$(MKCONFIG) -a TQM823L ppc mpc8xx tqm8xx tqc + @$(MKCONFIG) -a TQM823L powerpc mpc8xx tqm8xx tqc ######################################################################### ## PPC4xx Systems @@ -1193,50 +1189,50 @@ wtk_config: unconfig xtract_4xx = $(subst _25,,$(subst _33,,$(subst _BA,,$(subst _ME,,$(subst _HI,,$(subst _config,,$1)))))) acadia_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx acadia amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx acadia amcc acadia_nand_config: unconfig @mkdir -p $(obj)include $(obj)board/amcc/acadia @mkdir -p $(obj)nand_spl/board/amcc/acadia @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @$(MKCONFIG) -n $@ -a acadia ppc ppc4xx acadia amcc + @$(MKCONFIG) -n $@ -a acadia powerpc ppc4xx acadia amcc @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/acadia/config.tmp @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk ADCIOP_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx adciop esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx adciop esd alpr_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx alpr prodrive + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx alpr prodrive AP1000_config:unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx ap1000 amirix + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ap1000 amirix APC405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx apc405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx apc405 esd AR405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx ar405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ar405 esd ASH405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx ash405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ash405 esd bamboo_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx bamboo amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx bamboo amcc bamboo_nand_config: unconfig @mkdir -p $(obj)include $(obj)board/amcc/bamboo @mkdir -p $(obj)nand_spl/board/amcc/bamboo @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @$(MKCONFIG) -n $@ -a bamboo ppc ppc4xx bamboo amcc + @$(MKCONFIG) -n $@ -a bamboo powerpc ppc4xx bamboo amcc @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/bamboo/config.tmp @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk bubinga_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx bubinga amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx bubinga amcc CANBT_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx canbt esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx canbt esd # Arches, Canyonlands & Glacier use different U-Boot images arches_config \ @@ -1245,7 +1241,7 @@ glacier_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a canyonlands ppc ppc4xx canyonlands amcc + @$(MKCONFIG) -n $@ -a canyonlands powerpc ppc4xx canyonlands amcc canyonlands_nand_config \ glacier_nand_config: unconfig @@ -1254,7 +1250,7 @@ glacier_nand_config: unconfig @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h @echo "#define CONFIG_$$(echo $(subst ,,$(@:_nand_config=)) | \ tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h - @$(MKCONFIG) -n $@ -a canyonlands ppc ppc4xx canyonlands amcc + @$(MKCONFIG) -n $@ -a canyonlands powerpc ppc4xx canyonlands amcc @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/canyonlands/config.tmp @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk @@ -1272,53 +1268,53 @@ CATcenter_33_config: unconfig { echo "#define CONFIG_PPCHAMELEON_CLK_33" >> $(obj)include/config.h ; \ $(XECHO) "SysClk = 33MHz" ; \ } - @$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave + @$(MKCONFIG) -a $(call xtract_4xx,$@) powerpc ppc4xx PPChameleonEVB dave CMS700_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx cms700 esd CPCI2DP_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx cpci2dp esd CPCI405_config \ CPCI4052_config \ CPCI405DT_config \ CPCI405AB_config: unconfig @mkdir -p $(obj)board/esd/cpci405 - @$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx cpci405 esd CPCIISER4_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx cpciiser4 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx cpciiser4 esd CRAYL1_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx L1 cray + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx L1 cray csb272_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx csb272 + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx csb272 csb472_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx csb472 + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx csb472 DASA_SIM_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx dasa_sim esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx dasa_sim esd dlvision_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx dlvision gdsys + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx dlvision gdsys DP405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx dp405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx dp405 esd DU405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx du405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx du405 esd DU440_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx du440 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx du440 esd ebony_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx ebony amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ebony amcc ERIC_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx eric + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx eric fx12mm_flash_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic @@ -1327,7 +1323,7 @@ fx12mm_flash_config: unconfig > $(obj)board/avnet/fx12mm/config.tmp @echo "TEXT_BASE := 0xFFCB0000" \ >> $(obj)board/avnet/fx12mm/config.tmp - @$(MKCONFIG) fx12mm ppc ppc4xx fx12mm avnet + @$(MKCONFIG) fx12mm powerpc ppc4xx fx12mm avnet fx12mm_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic @@ -1336,27 +1332,27 @@ fx12mm_config: unconfig > $(obj)board/avnet/fx12mm/config.tmp @echo "TEXT_BASE := 0x03000000" \ >> $(obj)board/avnet/fx12mm/config.tmp - @$(MKCONFIG) fx12mm ppc ppc4xx fx12mm avnet + @$(MKCONFIG) fx12mm powerpc ppc4xx fx12mm avnet G2000_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx g2000 + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx g2000 gdppc440etx_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx gdppc440etx gdsys + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx gdppc440etx gdsys hcu4_config: unconfig @mkdir -p $(obj)board/netstal/common - @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu4 netstal + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx hcu4 netstal hcu5_config: unconfig @mkdir -p $(obj)board/netstal/common - @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu5 netstal + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx hcu5 netstal HH405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx hh405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx hh405 esd HUB405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx hub405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx hub405 esd # Compact-Center(codename intip) & DevCon-Center use different U-Boot images intip_config \ @@ -1364,61 +1360,61 @@ devconcenter_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a intip ppc ppc4xx intip gdsys + @$(MKCONFIG) -n $@ -a intip powerpc ppc4xx intip gdsys JSE_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx jse + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx jse KAREF_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx karef sandburst + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx karef sandburst katmai_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx katmai amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx katmai amcc # Kilauea & Haleakala images are identical (recognized via PVR) kilauea_config \ haleakala_config: unconfig - @$(MKCONFIG) -n $@ -a kilauea ppc ppc4xx kilauea amcc + @$(MKCONFIG) -n $@ -a kilauea powerpc ppc4xx kilauea amcc kilauea_nand_config \ haleakala_nand_config: unconfig @mkdir -p $(obj)include $(obj)board/amcc/kilauea @mkdir -p $(obj)nand_spl/board/amcc/kilauea @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @$(MKCONFIG) -n $@ -a kilauea ppc ppc4xx kilauea amcc + @$(MKCONFIG) -n $@ -a kilauea powerpc ppc4xx kilauea amcc @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/kilauea/config.tmp @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk korat_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx korat + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx korat luan_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx luan amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx luan amcc lwmon5_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx lwmon5 + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx lwmon5 makalu_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx makalu amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx makalu amcc mcu25_config: unconfig @mkdir -p $(obj)board/netstal/common - @$(MKCONFIG) $(@:_config=) ppc ppc4xx mcu25 netstal + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx mcu25 netstal METROBOX_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx metrobox sandburst + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx metrobox sandburst MIP405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx mip405 mpl + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx mip405 mpl MIP405T_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_MIP405T" >$(obj)include/config.h @$(XECHO) "Enable subset config for MIP405T" - @$(MKCONFIG) -a MIP405 ppc ppc4xx mip405 mpl + @$(MKCONFIG) -a MIP405 powerpc ppc4xx mip405 mpl ML2_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx ml2 + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ml2 ml507_flash_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic @@ -1427,7 +1423,7 @@ ml507_flash_config: unconfig > $(obj)board/xilinx/ml507/config.tmp @echo "TEXT_BASE := 0xFE360000" \ >> $(obj)board/xilinx/ml507/config.tmp - @$(MKCONFIG) ml507 ppc ppc4xx ml507 xilinx + @$(MKCONFIG) ml507 powerpc ppc4xx ml507 xilinx ml507_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic @@ -1436,41 +1432,41 @@ ml507_config: unconfig > $(obj)board/xilinx/ml507/config.tmp @echo "TEXT_BASE := 0x04000000" \ >> $(obj)board/xilinx/ml507/config.tmp - @$(MKCONFIG) ml507 ppc ppc4xx ml507 xilinx + @$(MKCONFIG) ml507 powerpc ppc4xx ml507 xilinx neo_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx neo gdsys + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx neo gdsys ocotea_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx ocotea amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ocotea amcc OCRTC_config \ ORSG_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx ocrtc esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx ocrtc esd p3p440_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx p3p440 prodrive + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx p3p440 prodrive PCI405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx pci405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pci405 esd pcs440ep_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx pcs440ep + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pcs440ep PIP405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx pip405 mpl + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pip405 mpl PLU405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx plu405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx plu405 esd PMC405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pmc405 esd PMC405DE_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc405de esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pmc405de esd PMC440_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc440 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx pmc440 esd PPChameleonEVB_config \ PPChameleonEVB_BA_25_config \ @@ -1500,26 +1496,26 @@ PPChameleonEVB_HI_33_config: unconfig { echo "#define CONFIG_PPCHAMELEON_CLK_33" >>$(obj)include/config.h ; \ $(XECHO) "SysClk = 33MHz" ; \ } - @$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave + @$(MKCONFIG) -a $(call xtract_4xx,$@) powerpc ppc4xx PPChameleonEVB dave quad100hd_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx quad100hd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx quad100hd redwood_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx redwood amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx redwood amcc sbc405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405 + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx sbc405 sc3_config:unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3 + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx sc3 sequoia_config \ rainier_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc + @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc sequoia_nand_config \ rainier_nand_config: unconfig @@ -1528,7 +1524,7 @@ rainier_nand_config: unconfig @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h - @$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc + @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk @@ -1538,16 +1534,16 @@ rainier_ramboot_config: unconfig @echo "#define CONFIG_SYS_RAMBOOT" > $(obj)include/config.h @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h - @$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc + @$(MKCONFIG) -n $@ -a sequoia powerpc ppc4xx sequoia amcc @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp @echo "LDSCRIPT = board/amcc/sequoia/u-boot-ram.lds" >> \ $(obj)board/amcc/sequoia/config.tmp taihu_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx taihu amcc taishan_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx taishan amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx taishan amcc v5fx30teval_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic @@ -1556,7 +1552,7 @@ v5fx30teval_config: unconfig > $(obj)board/avnet/v5fx30teval/config.tmp @echo "TEXT_BASE := 0x03000000" \ >> $(obj)board/avnet/v5fx30teval/config.tmp - @$(MKCONFIG) v5fx30teval ppc ppc4xx v5fx30teval avnet + @$(MKCONFIG) v5fx30teval powerpc ppc4xx v5fx30teval avnet v5fx30teval_flash_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic @@ -1565,25 +1561,25 @@ v5fx30teval_flash_config: unconfig > $(obj)board/avnet/v5fx30teval/config.tmp @echo "TEXT_BASE := 0xFF1C0000" \ >> $(obj)board/avnet/v5fx30teval/config.tmp - @$(MKCONFIG) v5fx30teval ppc ppc4xx v5fx30teval avnet + @$(MKCONFIG) v5fx30teval powerpc ppc4xx v5fx30teval avnet VOH405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx voh405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx voh405 esd VOM405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx vom405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx vom405 esd W7OLMC_config \ W7OLMG_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx w7o + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx w7o # Walnut & Sycamore images are identical (recognized via PVR) walnut_config \ sycamore_config: unconfig - @$(MKCONFIG) -n $@ -a walnut ppc ppc4xx walnut amcc + @$(MKCONFIG) -n $@ -a walnut powerpc ppc4xx walnut amcc WUH405_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx wuh405 esd + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx wuh405 esd xilinx-ppc405-generic_flash_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic @@ -1591,7 +1587,7 @@ xilinx-ppc405-generic_flash_config: unconfig > $(obj)board/xilinx/ppc405-generic/config.tmp @echo "TEXT_BASE := 0xFE360000" \ >> $(obj)board/xilinx/ppc405-generic/config.tmp - @$(MKCONFIG) xilinx-ppc405-generic ppc ppc4xx ppc405-generic xilinx + @$(MKCONFIG) xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx xilinx-ppc405-generic_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc405-generic @@ -1599,7 +1595,7 @@ xilinx-ppc405-generic_config: unconfig > $(obj)board/xilinx/ppc405-generic/config.tmp @echo "TEXT_BASE := 0x04000000" \ >> $(obj)board/xilinx/ppc405-generic/config.tmp - @$(MKCONFIG) xilinx-ppc405-generic ppc ppc4xx ppc405-generic xilinx + @$(MKCONFIG) xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx xilinx-ppc440-generic_flash_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic @@ -1607,7 +1603,7 @@ xilinx-ppc440-generic_flash_config: unconfig > $(obj)board/xilinx/ppc440-generic/config.tmp @echo "TEXT_BASE := 0xFE360000" \ >> $(obj)board/xilinx/ppc440-generic/config.tmp - @$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx + @$(MKCONFIG) xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx xilinx-ppc440-generic_config: unconfig @mkdir -p $(obj)include $(obj)board/xilinx/ppc440-generic @@ -1615,23 +1611,23 @@ xilinx-ppc440-generic_config: unconfig > $(obj)board/xilinx/ppc440-generic/config.tmp @echo "TEXT_BASE := 0x04000000" \ >> $(obj)board/xilinx/ppc440-generic/config.tmp - @$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx + @$(MKCONFIG) xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx XPEDITE1000_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx xpedite1000 xes + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx xpedite1000 xes yosemite_config \ yellowstone_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \ tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h - @$(MKCONFIG) -n $@ -a yosemite ppc ppc4xx yosemite amcc + @$(MKCONFIG) -n $@ -a yosemite powerpc ppc4xx yosemite amcc yucca_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx yucca amcc + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx yucca amcc zeus_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc ppc4xx zeus + @$(MKCONFIG) $(@:_config=) powerpc ppc4xx zeus ######################################################################### ## MPC8220 Systems @@ -1639,10 +1635,10 @@ zeus_config: unconfig Alaska8220_config \ Yukon8220_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8220 alaska + @$(MKCONFIG) $(@:_config=) powerpc mpc8220 alaska sorcery_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8220 sorcery + @$(MKCONFIG) $(@:_config=) powerpc mpc8220 sorcery ######################################################################### ## MPC824x Systems @@ -1650,17 +1646,17 @@ sorcery_config: unconfig xtract_82xx = $(subst _BIGFLASH,,$(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))) A3000_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x a3000 + @$(MKCONFIG) $(@:_config=) powerpc mpc824x a3000 barco_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x barco + @$(MKCONFIG) $(@:_config=) powerpc mpc824x barco BMW_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x bmw + @$(MKCONFIG) $(@:_config=) powerpc mpc824x bmw CPC45_config \ CPC45_ROMBOOT_config: unconfig - @$(MKCONFIG) $(call xtract_82xx,$@) ppc mpc824x cpc45 + @$(MKCONFIG) $(call xtract_82xx,$@) powerpc mpc824x cpc45 @cd $(obj)include ; \ if [ "$(findstring _ROMBOOT_,$@)" ] ; then \ echo "CONFIG_BOOT_ROM = y" >> config.mk ; \ @@ -1672,19 +1668,19 @@ CPC45_ROMBOOT_config: unconfig echo "export CONFIG_BOOT_ROM" >> config.mk; CU824_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x cu824 + @$(MKCONFIG) $(@:_config=) powerpc mpc824x cu824 debris_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x debris etin + @$(MKCONFIG) $(@:_config=) powerpc mpc824x debris etin eXalion_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x eXalion + @$(MKCONFIG) $(@:_config=) powerpc mpc824x eXalion HIDDEN_DRAGON_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x hidden_dragon + @$(MKCONFIG) $(@:_config=) powerpc mpc824x hidden_dragon kvme080_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x kvme080 etin + @$(MKCONFIG) $(@:_config=) powerpc mpc824x kvme080 etin # HDLAN is broken ATM. Should be fixed as soon as hardware is available and as # time permits. @@ -1696,48 +1692,48 @@ linkstation_HGLAN_config: unconfig *HGLAN*) echo "#define CONFIG_HGLAN 1" >$(obj)include/config.h; ;; \ *HDLAN*) echo "#define CONFIG_HLAN 1" >$(obj)include/config.h; ;; \ esac - @$(MKCONFIG) -n $@ -a linkstation ppc mpc824x linkstation + @$(MKCONFIG) -n $@ -a linkstation powerpc mpc824x linkstation MOUSSE_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x mousse + @$(MKCONFIG) $(@:_config=) powerpc mpc824x mousse MUSENKI_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x musenki + @$(MKCONFIG) $(@:_config=) powerpc mpc824x musenki MVBLUE_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x mvblue + @$(MKCONFIG) $(@:_config=) powerpc mpc824x mvblue OXC_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x oxc + @$(MKCONFIG) $(@:_config=) powerpc mpc824x oxc PN62_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x pn62 + @$(MKCONFIG) $(@:_config=) powerpc mpc824x pn62 Sandpoint8240_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x sandpoint + @$(MKCONFIG) $(@:_config=) powerpc mpc824x sandpoint Sandpoint8245_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x sandpoint + @$(MKCONFIG) $(@:_config=) powerpc mpc824x sandpoint sbc8240_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x sbc8240 + @$(MKCONFIG) $(@:_config=) powerpc mpc824x sbc8240 utx8245_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc824x utx8245 + @$(MKCONFIG) $(@:_config=) powerpc mpc824x utx8245 ######################################################################### ## MPC8260 Systems ######################################################################### atc_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 atc + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 atc cogent_mpc8260_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 cogent + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 cogent CPU86_config \ CPU86_ROMBOOT_config: unconfig - @$(MKCONFIG) $(call xtract_82xx,$@) ppc mpc8260 cpu86 + @$(MKCONFIG) $(call xtract_82xx,$@) powerpc mpc8260 cpu86 @cd $(obj)include ; \ if [ "$(findstring _ROMBOOT_,$@)" ] ; then \ echo "CONFIG_BOOT_ROM = y" >> config.mk ; \ @@ -1750,7 +1746,7 @@ CPU86_ROMBOOT_config: unconfig CPU87_config \ CPU87_ROMBOOT_config: unconfig - @$(MKCONFIG) $(call xtract_82xx,$@) ppc mpc8260 cpu87 + @$(MKCONFIG) $(call xtract_82xx,$@) powerpc mpc8260 cpu87 @cd $(obj)include ; \ if [ "$(findstring _ROMBOOT_,$@)" ] ; then \ echo "CONFIG_BOOT_ROM = y" >> config.mk ; \ @@ -1763,25 +1759,25 @@ CPU87_ROMBOOT_config: unconfig ep8248_config \ ep8248E_config : unconfig - @$(MKCONFIG) ep8248 ppc mpc8260 ep8248 + @$(MKCONFIG) ep8248 powerpc mpc8260 ep8248 ep8260_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 ep8260 + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 ep8260 ep82xxm_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 ep82xxm + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 ep82xxm gw8260_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 gw8260 + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 gw8260 hymod_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 hymod + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 hymod IDS8247_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 ids8247 + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 ids8247 IPHASE4539_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 iphase4539 + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 iphase4539 ISPAN_config \ ISPAN_REVB_config: unconfig @@ -1789,10 +1785,10 @@ ISPAN_REVB_config: unconfig @if [ "$(findstring _REVB_,$@)" ] ; then \ echo "#define CONFIG_SYS_REV_B" > $(obj)include/config.h ; \ fi - @$(MKCONFIG) -a ISPAN ppc mpc8260 ispan + @$(MKCONFIG) -a ISPAN powerpc mpc8260 ispan mgcoge_config : unconfig - @$(MKCONFIG) mgcoge ppc mpc8260 mgcoge keymile + @$(MKCONFIG) mgcoge powerpc mpc8260 mgcoge keymile MPC8260ADS_config \ MPC8260ADS_lowboot_config \ @@ -1824,10 +1820,10 @@ PQ2FADS-ZU_66MHz_lowboot_config \ { echo "TEXT_BASE = 0xFF800000" >$(obj)board/freescale/mpc8260ads/config.tmp ; \ $(XECHO) "... with lowboot configuration" ; \ } - @$(MKCONFIG) -a MPC8260ADS ppc mpc8260 mpc8260ads freescale + @$(MKCONFIG) -a MPC8260ADS powerpc mpc8260 mpc8260ads freescale MPC8266ADS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 mpc8266ads freescale + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 mpc8266ads freescale muas3001_dev_config \ muas3001_config : unconfig @@ -1836,7 +1832,7 @@ muas3001_config : unconfig @if [ "$(findstring dev,$@)" ] ; then \ echo "#define CONFIG_MUAS_DEV_BOARD" > $(obj)include/config.h ; \ fi - @$(MKCONFIG) -a muas3001 ppc mpc8260 muas3001 + @$(MKCONFIG) -a muas3001 powerpc mpc8260 muas3001 # PM825/PM826 default configuration: small (= 8 MB) Flash / boot from 64-bit flash PM825_config \ @@ -1872,7 +1868,7 @@ PM826_ROMBOOT_BIGFLASH_config: unconfig echo "TEXT_BASE = 0xFF000000" >$(obj)board/pm826/config.tmp ; \ fi; \ fi - @$(MKCONFIG) -a PM826 ppc mpc8260 pm826 + @$(MKCONFIG) -a PM826 powerpc mpc8260 pm826 PM828_config \ PM828_PCI_config \ @@ -1889,32 +1885,32 @@ PM828_ROMBOOT_PCI_config: unconfig echo "#define CONFIG_BOOT_ROM" >>$(obj)include/config.h ; \ echo "TEXT_BASE = 0xFF800000" >$(obj)board/pm826/config.tmp ; \ fi - @$(MKCONFIG) -a PM828 ppc mpc8260 pm828 + @$(MKCONFIG) -a PM828 powerpc mpc8260 pm828 ppmc8260_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 ppmc8260 + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 ppmc8260 Rattler8248_config \ Rattler_config: unconfig @mkdir -p $(obj)include $(if $(findstring 8248,$@), \ @echo "#define CONFIG_MPC8248" > $(obj)include/config.h) - @$(MKCONFIG) -a Rattler ppc mpc8260 rattler + @$(MKCONFIG) -a Rattler powerpc mpc8260 rattler RPXsuper_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 rpxsuper + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 rpxsuper rsdproto_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 rsdproto + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 rsdproto sacsng_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 sacsng + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 sacsng sbc8260_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 sbc8260 + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 sbc8260 SCM_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 SCM siemens + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 SCM siemens TQM8255_AA_config \ TQM8260_AA_config \ @@ -1960,19 +1956,19 @@ TQM8265_AA_config: unconfig echo "#undef CONFIG_BUSMODE_60x" >>$(obj)include/config.h ; \ $(XECHO) "... without 60x Bus Mode" ; \ fi - @$(MKCONFIG) -a TQM8260 ppc mpc8260 tqm8260 tqc + @$(MKCONFIG) -a TQM8260 powerpc mpc8260 tqm8260 tqc TQM8272_config: unconfig - @$(MKCONFIG) TQM8272 ppc mpc8260 tqm8272 tqc + @$(MKCONFIG) TQM8272 powerpc mpc8260 tqm8272 tqc VoVPN-GW_66MHz_config \ VoVPN-GW_100MHz_config: unconfig @mkdir -p $(obj)include @echo "#define CONFIG_CLKIN_$(word 2,$(subst _, ,$@))" > $(obj)include/config.h - @$(MKCONFIG) -a VoVPN-GW ppc mpc8260 vovpn-gw funkwerk + @$(MKCONFIG) -a VoVPN-GW powerpc mpc8260 vovpn-gw funkwerk ZPC1900_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc8260 zpc1900 + @$(MKCONFIG) $(@:_config=) powerpc mpc8260 zpc1900 ######################################################################### ## Coldfire @@ -2229,7 +2225,7 @@ TASREG_config : unconfig ######################################################################### kmeter1_config: unconfig - @$(MKCONFIG) kmeter1 ppc mpc83xx kmeter1 keymile + @$(MKCONFIG) kmeter1 powerpc mpc83xx kmeter1 keymile MPC8313ERDB_33_config \ MPC8313ERDB_66_config \ @@ -2250,17 +2246,17 @@ MPC8313ERDB_NAND_66_config: unconfig echo "TEXT_BASE = 0x00100000" > $(obj)board/freescale/mpc8313erdb/config.tmp ; \ echo "#define CONFIG_NAND_U_BOOT" >>$(obj)include/config.h ; \ fi ; - @$(MKCONFIG) -a MPC8313ERDB ppc mpc83xx mpc8313erdb freescale + @$(MKCONFIG) -a MPC8313ERDB powerpc mpc83xx mpc8313erdb freescale @if [ "$(findstring _NAND_,$@)" ] ; then \ echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk ; \ fi ; MPC8315ERDB_NAND_config \ MPC8315ERDB_config: unconfig - @$(MKCONFIG) -t $(@:_config=) MPC8315ERDB ppc mpc83xx mpc8315erdb freescale + @$(MKCONFIG) -t $(@:_config=) MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale MPC8323ERDB_config: unconfig - @$(MKCONFIG) -a MPC8323ERDB ppc mpc83xx mpc8323erdb freescale + @$(MKCONFIG) -a MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale MPC832XEMDS_config \ MPC832XEMDS_HOST_33_config \ @@ -2292,10 +2288,10 @@ MPC832XEMDS_ATM_config: unconfig echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \ echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \ fi ; - @$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds freescale + @$(MKCONFIG) -a MPC832XEMDS powerpc mpc83xx mpc832xemds freescale MPC8349EMDS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc83xx mpc8349emds freescale + @$(MKCONFIG) $(@:_config=) powerpc mpc83xx mpc8349emds freescale MPC8349ITX_config \ MPC8349ITX_LOWBOOT_config \ @@ -2309,7 +2305,7 @@ MPC8349ITXGP_config: unconfig @if [ "$(findstring LOWBOOT,$@)" ] ; then \ echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \ fi - @$(MKCONFIG) -a -n $(@:_config=) MPC8349ITX ppc mpc83xx mpc8349itx freescale + @$(MKCONFIG) -a -n $(@:_config=) MPC8349ITX powerpc mpc83xx mpc8349itx freescale MPC8360EMDS_config \ MPC8360EMDS_HOST_33_config \ @@ -2341,7 +2337,7 @@ MPC8360EMDS_ATM_config: unconfig echo "#define CONFIG_PQ_MDS_PIB 1" >>$(obj)include/config.h ; \ echo "#define CONFIG_PQ_MDS_PIB_ATM 1" >>$(obj)include/config.h ; \ fi ; - @$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds freescale + @$(MKCONFIG) -a MPC8360EMDS powerpc mpc83xx mpc8360emds freescale MPC8360ERDK_33_config \ MPC8360ERDK_66_config \ @@ -2351,7 +2347,7 @@ MPC8360ERDK_config: unconfig $(XECHO) -n "... CLKIN 33MHz " ; \ echo "#define CONFIG_CLKIN_33MHZ" >>$(obj)include/config.h ;\ fi ; - @$(MKCONFIG) -a MPC8360ERDK ppc mpc83xx mpc8360erdk freescale + @$(MKCONFIG) -a MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale MPC837XEMDS_config \ MPC837XEMDS_HOST_config: unconfig @@ -2360,18 +2356,18 @@ MPC837XEMDS_HOST_config: unconfig $(XECHO) -n "... PCI HOST " ; \ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \ fi ; - @$(MKCONFIG) -a MPC837XEMDS ppc mpc83xx mpc837xemds freescale + @$(MKCONFIG) -a MPC837XEMDS powerpc mpc83xx mpc837xemds freescale MPC837XERDB_config: unconfig - @$(MKCONFIG) -a MPC837XERDB ppc mpc83xx mpc837xerdb freescale + @$(MKCONFIG) -a MPC837XERDB powerpc mpc83xx mpc837xerdb freescale MVBLM7_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7 matrix_vision + @$(MKCONFIG) $(@:_config=) powerpc mpc83xx mvblm7 matrix_vision sbc8349_config \ sbc8349_PCI_33_config \ sbc8349_PCI_66_config: unconfig - @$(MKCONFIG) -t $(@:_config=) sbc8349 ppc mpc83xx sbc8349 + @$(MKCONFIG) -t $(@:_config=) sbc8349 powerpc mpc83xx sbc8349 SIMPC8313_LP_config \ SIMPC8313_SP_config: unconfig @@ -2385,15 +2381,15 @@ SIMPC8313_SP_config: unconfig $(XECHO) -n "...Small Page NAND..." ; \ echo "#define CONFIG_NAND_SP" >> $(obj)include/config.h ; \ fi ; - @$(MKCONFIG) -a SIMPC8313 ppc mpc83xx simpc8313 sheldon + @$(MKCONFIG) -a SIMPC8313 powerpc mpc83xx simpc8313 sheldon @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk TQM834x_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc + @$(MKCONFIG) $(@:_config=) powerpc mpc83xx tqm834x tqc caddy2_config \ vme8349_config: unconfig - @$(MKCONFIG) -t $(@:_config=) vme8349 ppc mpc83xx vme8349 esd + @$(MKCONFIG) -t $(@:_config=) vme8349 powerpc mpc83xx vme8349 esd edb9301_config \ edb9302_config \ @@ -2410,17 +2406,17 @@ edb9315a_config: unconfig ######################################################################### ATUM8548_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx atum8548 + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx atum8548 MPC8536DS_NAND_config \ MPC8536DS_SDCARD_config \ MPC8536DS_SPIFLASH_config \ MPC8536DS_36BIT_config \ MPC8536DS_config: unconfig - @$(MKCONFIG) -t $(@:_config=) MPC8536DS ppc mpc85xx mpc8536ds freescale + @$(MKCONFIG) -t $(@:_config=) MPC8536DS powerpc mpc85xx mpc8536ds freescale MPC8540ADS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8540ads freescale + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx mpc8540ads freescale MPC8540EVAL_config \ MPC8540EVAL_33_config \ @@ -2440,10 +2436,10 @@ MPC8540EVAL_66_slave_config: unconfig else \ $(XECHO) " host" ; \ fi - @$(MKCONFIG) -a MPC8540EVAL ppc mpc85xx mpc8540eval + @$(MKCONFIG) -a MPC8540EVAL powerpc mpc85xx mpc8540eval MPC8560ADS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8560ads freescale + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx mpc8560ads freescale MPC8541CDS_legacy_config \ MPC8541CDS_config: unconfig @@ -2452,10 +2448,10 @@ MPC8541CDS_config: unconfig echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ $(XECHO) "... legacy" ; \ fi - @$(MKCONFIG) -a MPC8541CDS ppc mpc85xx mpc8541cds freescale + @$(MKCONFIG) -a MPC8541CDS powerpc mpc85xx mpc8541cds freescale MPC8544DS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8544ds freescale + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx mpc8544ds freescale MPC8548CDS_legacy_config \ MPC8548CDS_config: unconfig @@ -2464,7 +2460,7 @@ MPC8548CDS_config: unconfig echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ $(XECHO) "... legacy" ; \ fi - @$(MKCONFIG) -a MPC8548CDS ppc mpc85xx mpc8548cds freescale + @$(MKCONFIG) -a MPC8548CDS powerpc mpc85xx mpc8548cds freescale MPC8555CDS_legacy_config \ MPC8555CDS_config: unconfig @@ -2473,23 +2469,23 @@ MPC8555CDS_config: unconfig echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \ $(XECHO) "... legacy" ; \ fi - @$(MKCONFIG) -a MPC8555CDS ppc mpc85xx mpc8555cds freescale + @$(MKCONFIG) -a MPC8555CDS powerpc mpc85xx mpc8555cds freescale MPC8568MDS_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8568mds freescale + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx mpc8568mds freescale MPC8569MDS_ATM_config \ MPC8569MDS_NAND_config \ MPC8569MDS_config: unconfig - @$(MKCONFIG) -t $(@:_config=) MPC8569MDS ppc mpc85xx mpc8569mds freescale + @$(MKCONFIG) -t $(@:_config=) MPC8569MDS powerpc mpc85xx mpc8569mds freescale MPC8572DS_36BIT_config \ MPC8572DS_config: unconfig - @$(MKCONFIG) -t $(@:_config=) MPC8572DS ppc mpc85xx mpc8572ds freescale + @$(MKCONFIG) -t $(@:_config=) MPC8572DS powerpc mpc85xx mpc8572ds freescale P2020DS_36BIT_config \ P2020DS_config: unconfig - @$(MKCONFIG) -t $(@:_config=) P2020DS ppc mpc85xx p2020ds freescale + @$(MKCONFIG) -t $(@:_config=) P2020DS powerpc mpc85xx p2020ds freescale P1011RDB_config \ P1011RDB_NAND_config \ @@ -2507,36 +2503,36 @@ P2020RDB_config \ P2020RDB_NAND_config \ P2020RDB_SDCARD_config \ P2020RDB_SPIFLASH_config: unconfig - @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB ppc mpc85xx p1_p2_rdb freescale + @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB powerpc mpc85xx p1_p2_rdb freescale PM854_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx pm854 + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx pm854 PM856_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx pm856 + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx pm856 sbc8540_config \ sbc8540_33_config \ sbc8540_66_config: unconfig - @$(MKCONFIG) -t $(@:_config=) SBC8540 ppc mpc85xx sbc8560 + @$(MKCONFIG) -t $(@:_config=) SBC8540 powerpc mpc85xx sbc8560 sbc8548_config \ sbc8548_PCI_33_config \ sbc8548_PCI_66_config \ sbc8548_PCI_33_PCIE_config \ sbc8548_PCI_66_PCIE_config: unconfig - @$(MKCONFIG) -t $(@:_config=) sbc8548 ppc mpc85xx sbc8548 + @$(MKCONFIG) -t $(@:_config=) sbc8548 powerpc mpc85xx sbc8548 sbc8560_config \ sbc8560_33_config \ sbc8560_66_config: unconfig - @$(MKCONFIG) -t $(@:_config=) sbc8560 ppc mpc85xx sbc8560 + @$(MKCONFIG) -t $(@:_config=) sbc8560 powerpc mpc85xx sbc8560 socrates_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx socrates + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx socrates stxgp3_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx stxgp3 stx + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx stxgp3 stx stxssa_config \ stxssa_4M_config: unconfig @@ -2545,7 +2541,7 @@ stxssa_4M_config: unconfig echo "#define CONFIG_STXSSA_4M" >>$(obj)include/config.h ; \ $(XECHO) "... with 4 MiB flash memory" ; \ fi - @$(MKCONFIG) -a stxssa ppc mpc85xx stxssa stx + @$(MKCONFIG) -a stxssa powerpc mpc85xx stxssa stx TQM8540_config \ TQM8541_config \ @@ -2562,21 +2558,21 @@ TQM8560_config: unconfig echo "#define CONFIG_$${BTYPE}">>$(obj)include/config.h; \ echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \ echo "#define CONFIG_BOARDNAME \"$${BTYPE}\"">>$(obj)include/config.h; - @$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx tqc + @$(MKCONFIG) -a TQM85xx powerpc mpc85xx tqm85xx tqc @echo "CONFIG_$(@:_config=) = y">>$(obj)include/config.mk; XPEDITE5200_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5200 xes + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx xpedite5200 xes XPEDITE5370_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc85xx xpedite5370 xes + @$(MKCONFIG) $(@:_config=) powerpc mpc85xx xpedite5370 xes ######################################################################### ## MPC86xx Systems ######################################################################### MPC8610HPCD_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc86xx mpc8610hpcd freescale + @$(MKCONFIG) $(@:_config=) powerpc mpc86xx mpc8610hpcd freescale MPC8641HPCN_36BIT_config \ MPC8641HPCN_config: unconfig @@ -2585,45 +2581,45 @@ MPC8641HPCN_config: unconfig echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \ $(XECHO) "... enabling 36-bit physical addressing." ; \ fi - @$(MKCONFIG) -a MPC8641HPCN ppc mpc86xx mpc8641hpcn freescale + @$(MKCONFIG) -a MPC8641HPCN powerpc mpc86xx mpc8641hpcn freescale sbc8641d_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc86xx sbc8641d + @$(MKCONFIG) $(@:_config=) powerpc mpc86xx sbc8641d XPEDITE5170_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc mpc86xx xpedite5170 xes + @$(MKCONFIG) $(@:_config=) powerpc mpc86xx xpedite5170 xes ######################################################################### ## 74xx/7xx Systems ######################################################################### AmigaOneG3SE_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx AmigaOneG3SE MAI + @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx AmigaOneG3SE MAI BAB7xx_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx bab7xx eltec + @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx bab7xx eltec CPCI750_config: unconfig - @$(MKCONFIG) CPCI750 ppc 74xx_7xx cpci750 esd + @$(MKCONFIG) CPCI750 powerpc 74xx_7xx cpci750 esd DB64360_config: unconfig - @$(MKCONFIG) DB64360 ppc 74xx_7xx db64360 Marvell + @$(MKCONFIG) DB64360 powerpc 74xx_7xx db64360 Marvell DB64460_config: unconfig - @$(MKCONFIG) DB64460 ppc 74xx_7xx db64460 Marvell + @$(MKCONFIG) DB64460 powerpc 74xx_7xx db64460 Marvell ELPPC_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx elppc eltec + @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx elppc eltec EVB64260_config \ EVB64260_750CX_config: unconfig - @$(MKCONFIG) EVB64260 ppc 74xx_7xx evb64260 + @$(MKCONFIG) EVB64260 powerpc 74xx_7xx evb64260 mpc7448hpc2_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx mpc7448hpc2 freescale + @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx mpc7448hpc2 freescale P3G4_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260 + @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx evb64260 p3m750_config \ p3m7448_config: unconfig @@ -2633,17 +2629,17 @@ p3m7448_config: unconfig else \ echo "#define CONFIG_P3M7448" >>$(obj)include/config.h ; \ fi - @$(MKCONFIG) -a p3mx ppc 74xx_7xx p3mx prodrive + @$(MKCONFIG) -a p3mx powerpc 74xx_7xx p3mx prodrive PCIPPC2_config \ PCIPPC6_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2 + @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx pcippc2 ppmc7xx_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx + @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx ppmc7xx ZUMA_config: unconfig - @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260 + @$(MKCONFIG) $(@:_config=) powerpc 74xx_7xx evb64260 #======================================================================== # ARM @@ -3768,7 +3764,7 @@ clobber: clean @rm -f $(obj)u-boot.kwb @rm -f $(obj)u-boot.imx @rm -f $(obj)tools/{env/crc32.c,inca-swap-bytes} - @rm -f $(obj)arch/ppc/cpu/mpc824x/bedbug_603e.c + @rm -f $(obj)arch/powerpc/cpu/mpc824x/bedbug_603e.c @rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm @[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f @[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f diff --git a/README b/README index 99320abadd..4a50557f6d 100644 --- a/README +++ b/README @@ -183,7 +183,7 @@ Directory Hierarchy: /nios2 Files generic to Altera NIOS2 architecture /cpu CPU specific files /lib Architecture specific library files - /ppc Files generic to PowerPC architecture + /powerpc Files generic to PowerPC architecture /cpu CPU specific files /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs /mpc5xx Files specific to Freescale MPC5xx CPUs @@ -1417,7 +1417,7 @@ The following options need to be configured: the CPU's i2c node address). Now, the u-boot i2c code for the mpc8xx - (arch/ppc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node + (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node and so its address should therefore be cleared to 0 (See, eg, MPC823e User's Manual p.16-473). So, set CONFIG_SYS_I2C_SLAVE to 0. @@ -1966,7 +1966,7 @@ Legacy uImage format: 15 arch//lib/bootm.c All preparation done, transferring control to OS - -30 arch/ppc/lib/board.c Fatal error, hang the system + -30 arch/powerpc/lib/board.c Fatal error, hang the system -31 post/post.c POST test failed, detected by post_output_backlog() -32 post/post.c POST test failed, detected by post_run_single() @@ -2727,7 +2727,7 @@ Low Level (hardware related) configuration options: CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL, CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE, CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only) - Overrides the default PCI memory map in arch/ppc/cpu/mpc8260/pci.c if set. + Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set. - CONFIG_PCI_DISABLE_PCIE: Disable PCI-Express on systems where it is supported but not @@ -3373,7 +3373,7 @@ configure the Linux device drivers for use with your target hardware (no, we don't intend to provide a full virtual machine interface to Linux :-). -But now you can ignore ALL boot loader code (in arch/ppc/mbxboot). +But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot). Just make sure your machine specific header file (for instance include/asm-ppc/tqm8xx.h) includes the same definition of the Board @@ -3471,7 +3471,7 @@ So a typical call to build a U-Boot image would read: -> tools/mkimage -n '2.4.4 kernel for TQM850L' \ > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \ - > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux.gz \ + > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \ > examples/uImage.TQM850L Image Name: 2.4.4 kernel for TQM850L Created: Wed Jul 19 02:34:59 2000 @@ -3495,10 +3495,10 @@ speed for memory and install an UNCOMPRESSED image instead: this needs more space in Flash, but boots much faster since it does not need to be uncompressed: - -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux.gz + -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz -> tools/mkimage -n '2.4.4 kernel for TQM850L' \ > -A ppc -O linux -T kernel -C none -a 0 -e 0 \ - > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux \ + > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \ > examples/uImage.TQM850L-uncompressed Image Name: 2.4.4 kernel for TQM850L Created: Wed Jul 19 02:34:59 2000 diff --git a/api/api_platform-ppc.c b/api/api_platform-powerpc.c similarity index 100% rename from api/api_platform-ppc.c rename to api/api_platform-powerpc.c diff --git a/arch/ppc/config.mk b/arch/powerpc/config.mk similarity index 100% rename from arch/ppc/config.mk rename to arch/powerpc/config.mk diff --git a/arch/ppc/cpu/74xx_7xx/Makefile b/arch/powerpc/cpu/74xx_7xx/Makefile similarity index 100% rename from arch/ppc/cpu/74xx_7xx/Makefile rename to arch/powerpc/cpu/74xx_7xx/Makefile diff --git a/arch/ppc/cpu/74xx_7xx/cache.S b/arch/powerpc/cpu/74xx_7xx/cache.S similarity index 100% rename from arch/ppc/cpu/74xx_7xx/cache.S rename to arch/powerpc/cpu/74xx_7xx/cache.S diff --git a/arch/ppc/cpu/74xx_7xx/config.mk b/arch/powerpc/cpu/74xx_7xx/config.mk similarity index 100% rename from arch/ppc/cpu/74xx_7xx/config.mk rename to arch/powerpc/cpu/74xx_7xx/config.mk diff --git a/arch/ppc/cpu/74xx_7xx/cpu.c b/arch/powerpc/cpu/74xx_7xx/cpu.c similarity index 100% rename from arch/ppc/cpu/74xx_7xx/cpu.c rename to arch/powerpc/cpu/74xx_7xx/cpu.c diff --git a/arch/ppc/cpu/74xx_7xx/cpu_init.c b/arch/powerpc/cpu/74xx_7xx/cpu_init.c similarity index 100% rename from arch/ppc/cpu/74xx_7xx/cpu_init.c rename to arch/powerpc/cpu/74xx_7xx/cpu_init.c diff --git a/arch/ppc/cpu/74xx_7xx/interrupts.c b/arch/powerpc/cpu/74xx_7xx/interrupts.c similarity index 100% rename from arch/ppc/cpu/74xx_7xx/interrupts.c rename to arch/powerpc/cpu/74xx_7xx/interrupts.c diff --git a/arch/ppc/cpu/74xx_7xx/io.S b/arch/powerpc/cpu/74xx_7xx/io.S similarity index 100% rename from arch/ppc/cpu/74xx_7xx/io.S rename to arch/powerpc/cpu/74xx_7xx/io.S diff --git a/arch/ppc/cpu/74xx_7xx/kgdb.S b/arch/powerpc/cpu/74xx_7xx/kgdb.S similarity index 100% rename from arch/ppc/cpu/74xx_7xx/kgdb.S rename to arch/powerpc/cpu/74xx_7xx/kgdb.S diff --git a/arch/ppc/cpu/74xx_7xx/speed.c b/arch/powerpc/cpu/74xx_7xx/speed.c similarity index 100% rename from arch/ppc/cpu/74xx_7xx/speed.c rename to arch/powerpc/cpu/74xx_7xx/speed.c diff --git a/arch/ppc/cpu/74xx_7xx/start.S b/arch/powerpc/cpu/74xx_7xx/start.S similarity index 100% rename from arch/ppc/cpu/74xx_7xx/start.S rename to arch/powerpc/cpu/74xx_7xx/start.S diff --git a/arch/ppc/cpu/74xx_7xx/traps.c b/arch/powerpc/cpu/74xx_7xx/traps.c similarity index 99% rename from arch/ppc/cpu/74xx_7xx/traps.c rename to arch/powerpc/cpu/74xx_7xx/traps.c index 1d5dd017ef..5073b0516d 100644 --- a/arch/ppc/cpu/74xx_7xx/traps.c +++ b/arch/powerpc/cpu/74xx_7xx/traps.c @@ -1,5 +1,5 @@ /* - * linux/arch/ppc/kernel/traps.c + * linux/arch/powerpc/kernel/traps.c * * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * diff --git a/arch/ppc/cpu/mpc512x/Makefile b/arch/powerpc/cpu/mpc512x/Makefile similarity index 100% rename from arch/ppc/cpu/mpc512x/Makefile rename to arch/powerpc/cpu/mpc512x/Makefile diff --git a/arch/ppc/cpu/mpc512x/asm-offsets.h b/arch/powerpc/cpu/mpc512x/asm-offsets.h similarity index 87% rename from arch/ppc/cpu/mpc512x/asm-offsets.h rename to arch/powerpc/cpu/mpc512x/asm-offsets.h index 5873fe05ec..957d4be2d2 100644 --- a/arch/ppc/cpu/mpc512x/asm-offsets.h +++ b/arch/powerpc/cpu/mpc512x/asm-offsets.h @@ -1,5 +1,5 @@ /* - * needed for arch/ppc/cpu/mpc512x/start.S + * needed for arch/powerpc/cpu/mpc512x/start.S * * These should be auto-generated */ diff --git a/arch/ppc/cpu/mpc512x/config.mk b/arch/powerpc/cpu/mpc512x/config.mk similarity index 94% rename from arch/ppc/cpu/mpc512x/config.mk rename to arch/powerpc/cpu/mpc512x/config.mk index b6727dcd21..b29edb1b38 100644 --- a/arch/ppc/cpu/mpc512x/config.mk +++ b/arch/powerpc/cpu/mpc512x/config.mk @@ -26,4 +26,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \ # Use default linker script. # A board port can override this setting in board/*/config.mk -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc512x/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc512x/u-boot.lds diff --git a/arch/ppc/cpu/mpc512x/cpu.c b/arch/powerpc/cpu/mpc512x/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc512x/cpu.c rename to arch/powerpc/cpu/mpc512x/cpu.c diff --git a/arch/ppc/cpu/mpc512x/cpu_init.c b/arch/powerpc/cpu/mpc512x/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc512x/cpu_init.c rename to arch/powerpc/cpu/mpc512x/cpu_init.c diff --git a/arch/ppc/cpu/mpc512x/diu.c b/arch/powerpc/cpu/mpc512x/diu.c similarity index 100% rename from arch/ppc/cpu/mpc512x/diu.c rename to arch/powerpc/cpu/mpc512x/diu.c diff --git a/arch/ppc/cpu/mpc512x/fixed_sdram.c b/arch/powerpc/cpu/mpc512x/fixed_sdram.c similarity index 100% rename from arch/ppc/cpu/mpc512x/fixed_sdram.c rename to arch/powerpc/cpu/mpc512x/fixed_sdram.c diff --git a/arch/ppc/cpu/mpc512x/i2c.c b/arch/powerpc/cpu/mpc512x/i2c.c similarity index 100% rename from arch/ppc/cpu/mpc512x/i2c.c rename to arch/powerpc/cpu/mpc512x/i2c.c diff --git a/arch/ppc/cpu/mpc512x/ide.c b/arch/powerpc/cpu/mpc512x/ide.c similarity index 100% rename from arch/ppc/cpu/mpc512x/ide.c rename to arch/powerpc/cpu/mpc512x/ide.c diff --git a/arch/ppc/cpu/mpc512x/iim.c b/arch/powerpc/cpu/mpc512x/iim.c similarity index 100% rename from arch/ppc/cpu/mpc512x/iim.c rename to arch/powerpc/cpu/mpc512x/iim.c diff --git a/arch/ppc/cpu/mpc512x/interrupts.c b/arch/powerpc/cpu/mpc512x/interrupts.c similarity index 100% rename from arch/ppc/cpu/mpc512x/interrupts.c rename to arch/powerpc/cpu/mpc512x/interrupts.c diff --git a/arch/ppc/cpu/mpc512x/iopin.c b/arch/powerpc/cpu/mpc512x/iopin.c similarity index 100% rename from arch/ppc/cpu/mpc512x/iopin.c rename to arch/powerpc/cpu/mpc512x/iopin.c diff --git a/arch/ppc/cpu/mpc512x/pci.c b/arch/powerpc/cpu/mpc512x/pci.c similarity index 100% rename from arch/ppc/cpu/mpc512x/pci.c rename to arch/powerpc/cpu/mpc512x/pci.c diff --git a/arch/ppc/cpu/mpc512x/serial.c b/arch/powerpc/cpu/mpc512x/serial.c similarity index 100% rename from arch/ppc/cpu/mpc512x/serial.c rename to arch/powerpc/cpu/mpc512x/serial.c diff --git a/arch/ppc/cpu/mpc512x/speed.c b/arch/powerpc/cpu/mpc512x/speed.c similarity index 100% rename from arch/ppc/cpu/mpc512x/speed.c rename to arch/powerpc/cpu/mpc512x/speed.c diff --git a/arch/ppc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S similarity index 100% rename from arch/ppc/cpu/mpc512x/start.S rename to arch/powerpc/cpu/mpc512x/start.S diff --git a/arch/ppc/cpu/mpc512x/traps.c b/arch/powerpc/cpu/mpc512x/traps.c similarity index 100% rename from arch/ppc/cpu/mpc512x/traps.c rename to arch/powerpc/cpu/mpc512x/traps.c diff --git a/arch/ppc/cpu/mpc512x/u-boot.lds b/arch/powerpc/cpu/mpc512x/u-boot.lds similarity index 98% rename from arch/ppc/cpu/mpc512x/u-boot.lds rename to arch/powerpc/cpu/mpc512x/u-boot.lds index fbc2026d53..c71679960c 100644 --- a/arch/ppc/cpu/mpc512x/u-boot.lds +++ b/arch/powerpc/cpu/mpc512x/u-boot.lds @@ -49,7 +49,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc512x/start.o (.text) + arch/powerpc/cpu/mpc512x/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/arch/ppc/cpu/mpc5xx/Makefile b/arch/powerpc/cpu/mpc5xx/Makefile similarity index 93% rename from arch/ppc/cpu/mpc5xx/Makefile rename to arch/powerpc/cpu/mpc5xx/Makefile index f2ebb9a123..80c53203e9 100644 --- a/arch/ppc/cpu/mpc5xx/Makefile +++ b/arch/powerpc/cpu/mpc5xx/Makefile @@ -25,11 +25,11 @@ # # -# File: arch/ppc/cpu/mpc5xx/Makefile +# File: arch/powerpc/cpu/mpc5xx/Makefile # # Discription: Makefile to build mpc5xx cpu configuration. # Will include top config.mk which itselfs -# uses the definitions made in arch/ppc/cpu/mpc5xx/config.mk +# uses the definitions made in arch/powerpc/cpu/mpc5xx/config.mk # diff --git a/arch/ppc/cpu/mpc5xx/config.mk b/arch/powerpc/cpu/mpc5xx/config.mk similarity index 95% rename from arch/ppc/cpu/mpc5xx/config.mk rename to arch/powerpc/cpu/mpc5xx/config.mk index e0b0ce1fd5..5f9285df49 100644 --- a/arch/ppc/cpu/mpc5xx/config.mk +++ b/arch/powerpc/cpu/mpc5xx/config.mk @@ -33,4 +33,4 @@ PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_5xx -ffixed-r2 -mpowerpc -msoft-float # Use default linker script. Board port can override in board/*/config.mk -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xx/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xx/u-boot.lds diff --git a/arch/ppc/cpu/mpc5xx/cpu.c b/arch/powerpc/cpu/mpc5xx/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc5xx/cpu.c rename to arch/powerpc/cpu/mpc5xx/cpu.c diff --git a/arch/ppc/cpu/mpc5xx/cpu_init.c b/arch/powerpc/cpu/mpc5xx/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc5xx/cpu_init.c rename to arch/powerpc/cpu/mpc5xx/cpu_init.c diff --git a/arch/ppc/cpu/mpc5xx/interrupts.c b/arch/powerpc/cpu/mpc5xx/interrupts.c similarity index 100% rename from arch/ppc/cpu/mpc5xx/interrupts.c rename to arch/powerpc/cpu/mpc5xx/interrupts.c diff --git a/arch/ppc/cpu/mpc5xx/serial.c b/arch/powerpc/cpu/mpc5xx/serial.c similarity index 100% rename from arch/ppc/cpu/mpc5xx/serial.c rename to arch/powerpc/cpu/mpc5xx/serial.c diff --git a/arch/ppc/cpu/mpc5xx/speed.c b/arch/powerpc/cpu/mpc5xx/speed.c similarity index 100% rename from arch/ppc/cpu/mpc5xx/speed.c rename to arch/powerpc/cpu/mpc5xx/speed.c diff --git a/arch/ppc/cpu/mpc5xx/spi.c b/arch/powerpc/cpu/mpc5xx/spi.c similarity index 100% rename from arch/ppc/cpu/mpc5xx/spi.c rename to arch/powerpc/cpu/mpc5xx/spi.c diff --git a/arch/ppc/cpu/mpc5xx/start.S b/arch/powerpc/cpu/mpc5xx/start.S similarity index 100% rename from arch/ppc/cpu/mpc5xx/start.S rename to arch/powerpc/cpu/mpc5xx/start.S diff --git a/arch/ppc/cpu/mpc5xx/traps.c b/arch/powerpc/cpu/mpc5xx/traps.c similarity index 99% rename from arch/ppc/cpu/mpc5xx/traps.c rename to arch/powerpc/cpu/mpc5xx/traps.c index 6882c21a41..e3ce11b2b3 100644 --- a/arch/ppc/cpu/mpc5xx/traps.c +++ b/arch/powerpc/cpu/mpc5xx/traps.c @@ -1,5 +1,5 @@ /* - * linux/arch/ppc/kernel/traps.c + * linux/arch/powerpc/kernel/traps.c * * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * diff --git a/arch/ppc/cpu/mpc5xx/u-boot.lds b/arch/powerpc/cpu/mpc5xx/u-boot.lds similarity index 98% rename from arch/ppc/cpu/mpc5xx/u-boot.lds rename to arch/powerpc/cpu/mpc5xx/u-boot.lds index 55190c72d9..d5e5dc1787 100644 --- a/arch/ppc/cpu/mpc5xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc5xx/u-boot.lds @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc5xx/start.o (.text) + arch/powerpc/cpu/mpc5xx/start.o (.text) *(.text) *(.got1) diff --git a/arch/ppc/cpu/mpc5xxx/Makefile b/arch/powerpc/cpu/mpc5xxx/Makefile similarity index 100% rename from arch/ppc/cpu/mpc5xxx/Makefile rename to arch/powerpc/cpu/mpc5xxx/Makefile diff --git a/arch/ppc/cpu/mpc5xxx/config.mk b/arch/powerpc/cpu/mpc5xxx/config.mk similarity index 94% rename from arch/ppc/cpu/mpc5xxx/config.mk rename to arch/powerpc/cpu/mpc5xxx/config.mk index 9a64cb623d..7ef8a4708a 100644 --- a/arch/ppc/cpu/mpc5xxx/config.mk +++ b/arch/powerpc/cpu/mpc5xxx/config.mk @@ -27,4 +27,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 \ -mstring -mcpu=603e -mmultiple # Use default linker script. Board port can override in board/*/config.mk -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot.lds diff --git a/arch/ppc/cpu/mpc5xxx/cpu.c b/arch/powerpc/cpu/mpc5xxx/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc5xxx/cpu.c rename to arch/powerpc/cpu/mpc5xxx/cpu.c diff --git a/arch/ppc/cpu/mpc5xxx/cpu_init.c b/arch/powerpc/cpu/mpc5xxx/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc5xxx/cpu_init.c rename to arch/powerpc/cpu/mpc5xxx/cpu_init.c diff --git a/arch/ppc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S b/arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S similarity index 100% rename from arch/ppc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S rename to arch/powerpc/cpu/mpc5xxx/firmware_sc_task_bestcomm.impl.S diff --git a/arch/ppc/cpu/mpc5xxx/i2c.c b/arch/powerpc/cpu/mpc5xxx/i2c.c similarity index 100% rename from arch/ppc/cpu/mpc5xxx/i2c.c rename to arch/powerpc/cpu/mpc5xxx/i2c.c diff --git a/arch/ppc/cpu/mpc5xxx/ide.c b/arch/powerpc/cpu/mpc5xxx/ide.c similarity index 100% rename from arch/ppc/cpu/mpc5xxx/ide.c rename to arch/powerpc/cpu/mpc5xxx/ide.c diff --git a/arch/ppc/cpu/mpc5xxx/interrupts.c b/arch/powerpc/cpu/mpc5xxx/interrupts.c similarity index 99% rename from arch/ppc/cpu/mpc5xxx/interrupts.c rename to arch/powerpc/cpu/mpc5xxx/interrupts.c index 6035771eeb..16eee3a480 100644 --- a/arch/ppc/cpu/mpc5xxx/interrupts.c +++ b/arch/powerpc/cpu/mpc5xxx/interrupts.c @@ -27,7 +27,7 @@ * MA 02111-1307 USA */ -/* this section was ripped out of arch/ppc/syslib/mpc52xx_pic.c in the +/* this section was ripped out of arch/powerpc/syslib/mpc52xx_pic.c in the * Linux 2.6 source with the following copyright. * * Based on (well, mostly copied from) the code from the 2.4 kernel by diff --git a/arch/ppc/cpu/mpc5xxx/io.S b/arch/powerpc/cpu/mpc5xxx/io.S similarity index 100% rename from arch/ppc/cpu/mpc5xxx/io.S rename to arch/powerpc/cpu/mpc5xxx/io.S diff --git a/arch/ppc/cpu/mpc5xxx/loadtask.c b/arch/powerpc/cpu/mpc5xxx/loadtask.c similarity index 100% rename from arch/ppc/cpu/mpc5xxx/loadtask.c rename to arch/powerpc/cpu/mpc5xxx/loadtask.c diff --git a/arch/ppc/cpu/mpc5xxx/pci_mpc5200.c b/arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c similarity index 100% rename from arch/ppc/cpu/mpc5xxx/pci_mpc5200.c rename to arch/powerpc/cpu/mpc5xxx/pci_mpc5200.c diff --git a/arch/ppc/cpu/mpc5xxx/serial.c b/arch/powerpc/cpu/mpc5xxx/serial.c similarity index 99% rename from arch/ppc/cpu/mpc5xxx/serial.c rename to arch/powerpc/cpu/mpc5xxx/serial.c index 66759887c6..59a877a8f9 100644 --- a/arch/ppc/cpu/mpc5xxx/serial.c +++ b/arch/powerpc/cpu/mpc5xxx/serial.c @@ -21,7 +21,7 @@ * MA 02111-1307 USA * * Hacked for MPC8260 by Murray.Jensen@cmst.csiro.au, 19-Oct-00, with - * changes based on the file arch/ppc/mbxboot/m8260_tty.c from the + * changes based on the file arch/powerpc/mbxboot/m8260_tty.c from the * Linux/PPC sources (m8260_tty.c had no copyright info in it). * * Martin Krause, 8 Jun 2006 diff --git a/arch/ppc/cpu/mpc5xxx/speed.c b/arch/powerpc/cpu/mpc5xxx/speed.c similarity index 100% rename from arch/ppc/cpu/mpc5xxx/speed.c rename to arch/powerpc/cpu/mpc5xxx/speed.c diff --git a/arch/ppc/cpu/mpc5xxx/start.S b/arch/powerpc/cpu/mpc5xxx/start.S similarity index 99% rename from arch/ppc/cpu/mpc5xxx/start.S rename to arch/powerpc/cpu/mpc5xxx/start.S index ba49944210..8b9f09b39d 100644 --- a/arch/ppc/cpu/mpc5xxx/start.S +++ b/arch/powerpc/cpu/mpc5xxx/start.S @@ -442,7 +442,7 @@ init_5xxx_core: /* */ /* bits 15-19 correspond to addresses 0x00000000 to 0x0001F000 */ /* incrementing by 0x1000 each time. The code below is sort of */ - /* based on code in "flush_tlbs" from arch/ppc/kernel/head.S */ + /* based on code in "flush_tlbs" from arch/powerpc/kernel/head.S */ /* */ /*--------------------------------------------------------------*/ diff --git a/arch/ppc/cpu/mpc5xxx/traps.c b/arch/powerpc/cpu/mpc5xxx/traps.c similarity index 99% rename from arch/ppc/cpu/mpc5xxx/traps.c rename to arch/powerpc/cpu/mpc5xxx/traps.c index 934a2f2ab0..5972f34579 100644 --- a/arch/ppc/cpu/mpc5xxx/traps.c +++ b/arch/powerpc/cpu/mpc5xxx/traps.c @@ -1,5 +1,5 @@ /* - * linux/arch/ppc/kernel/traps.c + * linux/arch/powerpc/kernel/traps.c * * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * diff --git a/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds b/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds similarity index 94% rename from arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds rename to arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds index 81ebde987f..ecffc1b32f 100644 --- a/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds +++ b/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc5xxx/start.o (.text) - arch/ppc/cpu/mpc5xxx/traps.o (.text) + arch/powerpc/cpu/mpc5xxx/start.o (.text) + arch/powerpc/cpu/mpc5xxx/traps.o (.text) lib/crc32.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/arch/ppc/cpu/mpc5xxx/u-boot.lds b/arch/powerpc/cpu/mpc5xxx/u-boot.lds similarity index 98% rename from arch/ppc/cpu/mpc5xxx/u-boot.lds rename to arch/powerpc/cpu/mpc5xxx/u-boot.lds index 64ef481297..ea4060d482 100644 --- a/arch/ppc/cpu/mpc5xxx/u-boot.lds +++ b/arch/powerpc/cpu/mpc5xxx/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc5xxx/start.o (.text) + arch/powerpc/cpu/mpc5xxx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/arch/ppc/cpu/mpc5xxx/usb.c b/arch/powerpc/cpu/mpc5xxx/usb.c similarity index 100% rename from arch/ppc/cpu/mpc5xxx/usb.c rename to arch/powerpc/cpu/mpc5xxx/usb.c diff --git a/arch/ppc/cpu/mpc5xxx/usb_ohci.c b/arch/powerpc/cpu/mpc5xxx/usb_ohci.c similarity index 100% rename from arch/ppc/cpu/mpc5xxx/usb_ohci.c rename to arch/powerpc/cpu/mpc5xxx/usb_ohci.c diff --git a/arch/ppc/cpu/mpc5xxx/usb_ohci.h b/arch/powerpc/cpu/mpc5xxx/usb_ohci.h similarity index 100% rename from arch/ppc/cpu/mpc5xxx/usb_ohci.h rename to arch/powerpc/cpu/mpc5xxx/usb_ohci.h diff --git a/arch/ppc/cpu/mpc8220/Makefile b/arch/powerpc/cpu/mpc8220/Makefile similarity index 100% rename from arch/ppc/cpu/mpc8220/Makefile rename to arch/powerpc/cpu/mpc8220/Makefile diff --git a/arch/ppc/cpu/mpc8220/config.mk b/arch/powerpc/cpu/mpc8220/config.mk similarity index 94% rename from arch/ppc/cpu/mpc8220/config.mk rename to arch/powerpc/cpu/mpc8220/config.mk index e2ebf38bd5..e706883938 100644 --- a/arch/ppc/cpu/mpc8220/config.mk +++ b/arch/powerpc/cpu/mpc8220/config.mk @@ -27,4 +27,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 \ -mstring -mcpu=603e -mmultiple # Use default linker script. Board port can override in board/*/config.mk -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc8220/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc8220/u-boot.lds diff --git a/arch/ppc/cpu/mpc8220/cpu.c b/arch/powerpc/cpu/mpc8220/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc8220/cpu.c rename to arch/powerpc/cpu/mpc8220/cpu.c diff --git a/arch/ppc/cpu/mpc8220/cpu_init.c b/arch/powerpc/cpu/mpc8220/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc8220/cpu_init.c rename to arch/powerpc/cpu/mpc8220/cpu_init.c diff --git a/arch/ppc/cpu/mpc8220/dma.h b/arch/powerpc/cpu/mpc8220/dma.h similarity index 100% rename from arch/ppc/cpu/mpc8220/dma.h rename to arch/powerpc/cpu/mpc8220/dma.h diff --git a/arch/ppc/cpu/mpc8220/dramSetup.c b/arch/powerpc/cpu/mpc8220/dramSetup.c similarity index 100% rename from arch/ppc/cpu/mpc8220/dramSetup.c rename to arch/powerpc/cpu/mpc8220/dramSetup.c diff --git a/arch/ppc/cpu/mpc8220/dramSetup.h b/arch/powerpc/cpu/mpc8220/dramSetup.h similarity index 100% rename from arch/ppc/cpu/mpc8220/dramSetup.h rename to arch/powerpc/cpu/mpc8220/dramSetup.h diff --git a/arch/ppc/cpu/mpc8220/fec.c b/arch/powerpc/cpu/mpc8220/fec.c similarity index 100% rename from arch/ppc/cpu/mpc8220/fec.c rename to arch/powerpc/cpu/mpc8220/fec.c diff --git a/arch/ppc/cpu/mpc8220/fec.h b/arch/powerpc/cpu/mpc8220/fec.h similarity index 100% rename from arch/ppc/cpu/mpc8220/fec.h rename to arch/powerpc/cpu/mpc8220/fec.h diff --git a/arch/ppc/cpu/mpc8220/fec_dma_tasks.S b/arch/powerpc/cpu/mpc8220/fec_dma_tasks.S similarity index 100% rename from arch/ppc/cpu/mpc8220/fec_dma_tasks.S rename to arch/powerpc/cpu/mpc8220/fec_dma_tasks.S diff --git a/arch/ppc/cpu/mpc8220/i2c.c b/arch/powerpc/cpu/mpc8220/i2c.c similarity index 100% rename from arch/ppc/cpu/mpc8220/i2c.c rename to arch/powerpc/cpu/mpc8220/i2c.c diff --git a/arch/ppc/cpu/mpc8220/i2cCore.c b/arch/powerpc/cpu/mpc8220/i2cCore.c similarity index 100% rename from arch/ppc/cpu/mpc8220/i2cCore.c rename to arch/powerpc/cpu/mpc8220/i2cCore.c diff --git a/arch/ppc/cpu/mpc8220/i2cCore.h b/arch/powerpc/cpu/mpc8220/i2cCore.h similarity index 100% rename from arch/ppc/cpu/mpc8220/i2cCore.h rename to arch/powerpc/cpu/mpc8220/i2cCore.h diff --git a/arch/ppc/cpu/mpc8220/interrupts.c b/arch/powerpc/cpu/mpc8220/interrupts.c similarity index 100% rename from arch/ppc/cpu/mpc8220/interrupts.c rename to arch/powerpc/cpu/mpc8220/interrupts.c diff --git a/arch/ppc/cpu/mpc8220/io.S b/arch/powerpc/cpu/mpc8220/io.S similarity index 100% rename from arch/ppc/cpu/mpc8220/io.S rename to arch/powerpc/cpu/mpc8220/io.S diff --git a/arch/ppc/cpu/mpc8220/loadtask.c b/arch/powerpc/cpu/mpc8220/loadtask.c similarity index 100% rename from arch/ppc/cpu/mpc8220/loadtask.c rename to arch/powerpc/cpu/mpc8220/loadtask.c diff --git a/arch/ppc/cpu/mpc8220/pci.c b/arch/powerpc/cpu/mpc8220/pci.c similarity index 100% rename from arch/ppc/cpu/mpc8220/pci.c rename to arch/powerpc/cpu/mpc8220/pci.c diff --git a/arch/ppc/cpu/mpc8220/speed.c b/arch/powerpc/cpu/mpc8220/speed.c similarity index 100% rename from arch/ppc/cpu/mpc8220/speed.c rename to arch/powerpc/cpu/mpc8220/speed.c diff --git a/arch/ppc/cpu/mpc8220/start.S b/arch/powerpc/cpu/mpc8220/start.S similarity index 99% rename from arch/ppc/cpu/mpc8220/start.S rename to arch/powerpc/cpu/mpc8220/start.S index e28999d322..3d79d8ec0d 100644 --- a/arch/ppc/cpu/mpc8220/start.S +++ b/arch/powerpc/cpu/mpc8220/start.S @@ -419,7 +419,7 @@ init_8220_core: /* */ /* bits 15-19 correspond to addresses 0x00000000 to 0x0001F000 */ /* incrementing by 0x1000 each time. The code below is sort of */ - /* based on code in "flush_tlbs" from arch/ppc/kernel/head.S */ + /* based on code in "flush_tlbs" from arch/powerpc/kernel/head.S */ /* */ /*--------------------------------------------------------------*/ diff --git a/arch/ppc/cpu/mpc8220/traps.c b/arch/powerpc/cpu/mpc8220/traps.c similarity index 99% rename from arch/ppc/cpu/mpc8220/traps.c rename to arch/powerpc/cpu/mpc8220/traps.c index 456578001b..13894c9050 100644 --- a/arch/ppc/cpu/mpc8220/traps.c +++ b/arch/powerpc/cpu/mpc8220/traps.c @@ -1,5 +1,5 @@ /* - * linux/arch/ppc/kernel/traps.c + * linux/arch/powerpc/kernel/traps.c * * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * diff --git a/arch/ppc/cpu/mpc8220/u-boot.lds b/arch/powerpc/cpu/mpc8220/u-boot.lds similarity index 98% rename from arch/ppc/cpu/mpc8220/u-boot.lds rename to arch/powerpc/cpu/mpc8220/u-boot.lds index 8c5d3071f9..31a7a0e4ef 100644 --- a/arch/ppc/cpu/mpc8220/u-boot.lds +++ b/arch/powerpc/cpu/mpc8220/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8220/start.o (.text) + arch/powerpc/cpu/mpc8220/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/arch/ppc/cpu/mpc8220/uart.c b/arch/powerpc/cpu/mpc8220/uart.c similarity index 100% rename from arch/ppc/cpu/mpc8220/uart.c rename to arch/powerpc/cpu/mpc8220/uart.c diff --git a/arch/ppc/cpu/mpc824x/.gitignore b/arch/powerpc/cpu/mpc824x/.gitignore similarity index 100% rename from arch/ppc/cpu/mpc824x/.gitignore rename to arch/powerpc/cpu/mpc824x/.gitignore diff --git a/arch/ppc/cpu/mpc824x/Makefile b/arch/powerpc/cpu/mpc824x/Makefile similarity index 100% rename from arch/ppc/cpu/mpc824x/Makefile rename to arch/powerpc/cpu/mpc824x/Makefile diff --git a/arch/ppc/cpu/mpc824x/config.mk b/arch/powerpc/cpu/mpc824x/config.mk similarity index 94% rename from arch/ppc/cpu/mpc824x/config.mk rename to arch/powerpc/cpu/mpc824x/config.mk index 31ecd20d9f..27c287351b 100644 --- a/arch/ppc/cpu/mpc824x/config.mk +++ b/arch/powerpc/cpu/mpc824x/config.mk @@ -26,4 +26,4 @@ PLATFORM_RELFLAGS += -fPIC -meabi PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -mstring -mcpu=603e -msoft-float # Use default linker script. Board port can override in board/*/config.mk -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc824x/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc824x/u-boot.lds diff --git a/arch/ppc/cpu/mpc824x/cpu.c b/arch/powerpc/cpu/mpc824x/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc824x/cpu.c rename to arch/powerpc/cpu/mpc824x/cpu.c diff --git a/arch/ppc/cpu/mpc824x/cpu_init.c b/arch/powerpc/cpu/mpc824x/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc824x/cpu_init.c rename to arch/powerpc/cpu/mpc824x/cpu_init.c diff --git a/arch/ppc/cpu/mpc824x/drivers/epic.h b/arch/powerpc/cpu/mpc824x/drivers/epic.h similarity index 100% rename from arch/ppc/cpu/mpc824x/drivers/epic.h rename to arch/powerpc/cpu/mpc824x/drivers/epic.h diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/README b/arch/powerpc/cpu/mpc824x/drivers/epic/README similarity index 100% rename from arch/ppc/cpu/mpc824x/drivers/epic/README rename to arch/powerpc/cpu/mpc824x/drivers/epic/README diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/epic.h b/arch/powerpc/cpu/mpc824x/drivers/epic/epic.h similarity index 100% rename from arch/ppc/cpu/mpc824x/drivers/epic/epic.h rename to arch/powerpc/cpu/mpc824x/drivers/epic/epic.h diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/epic1.c b/arch/powerpc/cpu/mpc824x/drivers/epic/epic1.c similarity index 100% rename from arch/ppc/cpu/mpc824x/drivers/epic/epic1.c rename to arch/powerpc/cpu/mpc824x/drivers/epic/epic1.c diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/epic2.S b/arch/powerpc/cpu/mpc824x/drivers/epic/epic2.S similarity index 100% rename from arch/ppc/cpu/mpc824x/drivers/epic/epic2.S rename to arch/powerpc/cpu/mpc824x/drivers/epic/epic2.S diff --git a/arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S b/arch/powerpc/cpu/mpc824x/drivers/epic/epicutil.S similarity index 100% rename from arch/ppc/cpu/mpc824x/drivers/epic/epicutil.S rename to arch/powerpc/cpu/mpc824x/drivers/epic/epicutil.S diff --git a/arch/ppc/cpu/mpc824x/drivers/errors.h b/arch/powerpc/cpu/mpc824x/drivers/errors.h similarity index 100% rename from arch/ppc/cpu/mpc824x/drivers/errors.h rename to arch/powerpc/cpu/mpc824x/drivers/errors.h diff --git a/arch/ppc/cpu/mpc824x/drivers/i2c/i2c.c b/arch/powerpc/cpu/mpc824x/drivers/i2c/i2c.c similarity index 100% rename from arch/ppc/cpu/mpc824x/drivers/i2c/i2c.c rename to arch/powerpc/cpu/mpc824x/drivers/i2c/i2c.c diff --git a/arch/ppc/cpu/mpc824x/drivers/i2c_export.h b/arch/powerpc/cpu/mpc824x/drivers/i2c_export.h similarity index 100% rename from arch/ppc/cpu/mpc824x/drivers/i2c_export.h rename to arch/powerpc/cpu/mpc824x/drivers/i2c_export.h diff --git a/arch/ppc/cpu/mpc824x/interrupts.c b/arch/powerpc/cpu/mpc824x/interrupts.c similarity index 100% rename from arch/ppc/cpu/mpc824x/interrupts.c rename to arch/powerpc/cpu/mpc824x/interrupts.c diff --git a/arch/ppc/cpu/mpc824x/pci.c b/arch/powerpc/cpu/mpc824x/pci.c similarity index 97% rename from arch/ppc/cpu/mpc824x/pci.c rename to arch/powerpc/cpu/mpc824x/pci.c index cf9cf41ae5..72aaec7b51 100644 --- a/arch/ppc/cpu/mpc824x/pci.c +++ b/arch/powerpc/cpu/mpc824x/pci.c @@ -1,5 +1,5 @@ /* - * arch/ppc/kernel/mpc10x_common.c + * arch/powerpc/kernel/mpc10x_common.c * * Common routines for the Motorola SPS MPC106, MPC107 and MPC8240 Host bridge, * Mem ctlr, EPIC, etc. diff --git a/arch/ppc/cpu/mpc824x/speed.c b/arch/powerpc/cpu/mpc824x/speed.c similarity index 100% rename from arch/ppc/cpu/mpc824x/speed.c rename to arch/powerpc/cpu/mpc824x/speed.c diff --git a/arch/ppc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S similarity index 100% rename from arch/ppc/cpu/mpc824x/start.S rename to arch/powerpc/cpu/mpc824x/start.S diff --git a/arch/ppc/cpu/mpc824x/traps.c b/arch/powerpc/cpu/mpc824x/traps.c similarity index 99% rename from arch/ppc/cpu/mpc824x/traps.c rename to arch/powerpc/cpu/mpc824x/traps.c index 0a7243020b..163b983340 100644 --- a/arch/ppc/cpu/mpc824x/traps.c +++ b/arch/powerpc/cpu/mpc824x/traps.c @@ -1,5 +1,5 @@ /* - * linux/arch/ppc/kernel/traps.c + * linux/arch/powerpc/kernel/traps.c * * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * diff --git a/arch/ppc/cpu/mpc8260/u-boot.lds b/arch/powerpc/cpu/mpc824x/u-boot.lds similarity index 98% rename from arch/ppc/cpu/mpc8260/u-boot.lds rename to arch/powerpc/cpu/mpc824x/u-boot.lds index 988784416f..d1fcd7c47d 100644 --- a/arch/ppc/cpu/mpc8260/u-boot.lds +++ b/arch/powerpc/cpu/mpc824x/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8260/start.o (.text) + arch/powerpc/cpu/mpc824x/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/arch/ppc/cpu/mpc8260/Makefile b/arch/powerpc/cpu/mpc8260/Makefile similarity index 100% rename from arch/ppc/cpu/mpc8260/Makefile rename to arch/powerpc/cpu/mpc8260/Makefile diff --git a/arch/ppc/cpu/mpc8260/bedbug_603e.c b/arch/powerpc/cpu/mpc8260/bedbug_603e.c similarity index 100% rename from arch/ppc/cpu/mpc8260/bedbug_603e.c rename to arch/powerpc/cpu/mpc8260/bedbug_603e.c diff --git a/arch/ppc/cpu/mpc8260/commproc.c b/arch/powerpc/cpu/mpc8260/commproc.c similarity index 98% rename from arch/ppc/cpu/mpc8260/commproc.c rename to arch/powerpc/cpu/mpc8260/commproc.c index 94f6bc224f..111a67c98c 100644 --- a/arch/ppc/cpu/mpc8260/commproc.c +++ b/arch/powerpc/cpu/mpc8260/commproc.c @@ -1,5 +1,5 @@ /* - * This file is based on "arch/ppc/8260_io/commproc.c" - here is it's + * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's * copyright notice: * * General Purpose functions for the global management of the diff --git a/arch/ppc/cpu/mpc8260/config.mk b/arch/powerpc/cpu/mpc8260/config.mk similarity index 94% rename from arch/ppc/cpu/mpc8260/config.mk rename to arch/powerpc/cpu/mpc8260/config.mk index 51bb9faf25..a9bb6887a0 100644 --- a/arch/ppc/cpu/mpc8260/config.mk +++ b/arch/powerpc/cpu/mpc8260/config.mk @@ -27,4 +27,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 \ -mstring -mcpu=603e -mmultiple # Use default linker script. Board port can override in board/*/config.mk -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc8260/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc8260/u-boot.lds diff --git a/arch/ppc/cpu/mpc8260/cpu.c b/arch/powerpc/cpu/mpc8260/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc8260/cpu.c rename to arch/powerpc/cpu/mpc8260/cpu.c diff --git a/arch/ppc/cpu/mpc8260/cpu_init.c b/arch/powerpc/cpu/mpc8260/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc8260/cpu_init.c rename to arch/powerpc/cpu/mpc8260/cpu_init.c diff --git a/arch/ppc/cpu/mpc8260/ether_fcc.c b/arch/powerpc/cpu/mpc8260/ether_fcc.c similarity index 100% rename from arch/ppc/cpu/mpc8260/ether_fcc.c rename to arch/powerpc/cpu/mpc8260/ether_fcc.c diff --git a/arch/ppc/cpu/mpc8260/ether_scc.c b/arch/powerpc/cpu/mpc8260/ether_scc.c similarity index 100% rename from arch/ppc/cpu/mpc8260/ether_scc.c rename to arch/powerpc/cpu/mpc8260/ether_scc.c diff --git a/arch/ppc/cpu/mpc8260/i2c.c b/arch/powerpc/cpu/mpc8260/i2c.c similarity index 100% rename from arch/ppc/cpu/mpc8260/i2c.c rename to arch/powerpc/cpu/mpc8260/i2c.c diff --git a/arch/ppc/cpu/mpc8260/interrupts.c b/arch/powerpc/cpu/mpc8260/interrupts.c similarity index 97% rename from arch/ppc/cpu/mpc8260/interrupts.c rename to arch/powerpc/cpu/mpc8260/interrupts.c index a7700c4b65..2606c60d45 100644 --- a/arch/ppc/cpu/mpc8260/interrupts.c +++ b/arch/powerpc/cpu/mpc8260/interrupts.c @@ -44,7 +44,7 @@ static struct irq_action irq_handlers[NR_IRQS]; static ulong ppc_cached_irq_mask[NR_MASK_WORDS]; /****************************************************************************/ -/* this section was ripped out of arch/ppc/kernel/ppc8260_pic.c in the */ +/* this section was ripped out of arch/powerpc/kernel/ppc8260_pic.c in the */ /* Linux/PPC 2.4.x source. There was no copyright notice in that file. */ /* The 8260 internal interrupt controller. It is usually @@ -137,7 +137,7 @@ static int m8260_get_irq (struct pt_regs *regs) return irq; } -/* end of code ripped out of arch/ppc/kernel/ppc8260_pic.c */ +/* end of code ripped out of arch/powerpc/kernel/ppc8260_pic.c */ /****************************************************************************/ int interrupt_init_cpu (unsigned *decrementer_count) diff --git a/arch/ppc/cpu/mpc8260/kgdb.S b/arch/powerpc/cpu/mpc8260/kgdb.S similarity index 100% rename from arch/ppc/cpu/mpc8260/kgdb.S rename to arch/powerpc/cpu/mpc8260/kgdb.S diff --git a/arch/ppc/cpu/mpc8260/pci.c b/arch/powerpc/cpu/mpc8260/pci.c similarity index 100% rename from arch/ppc/cpu/mpc8260/pci.c rename to arch/powerpc/cpu/mpc8260/pci.c diff --git a/arch/ppc/cpu/mpc8260/serial_scc.c b/arch/powerpc/cpu/mpc8260/serial_scc.c similarity index 100% rename from arch/ppc/cpu/mpc8260/serial_scc.c rename to arch/powerpc/cpu/mpc8260/serial_scc.c diff --git a/arch/ppc/cpu/mpc8260/serial_smc.c b/arch/powerpc/cpu/mpc8260/serial_smc.c similarity index 99% rename from arch/ppc/cpu/mpc8260/serial_smc.c rename to arch/powerpc/cpu/mpc8260/serial_smc.c index fbb3fb0420..7b6eaba09a 100644 --- a/arch/ppc/cpu/mpc8260/serial_smc.c +++ b/arch/powerpc/cpu/mpc8260/serial_smc.c @@ -21,7 +21,7 @@ * MA 02111-1307 USA * * Hacked for MPC8260 by Murray.Jensen@cmst.csiro.au, 19-Oct-00, with - * changes based on the file arch/ppc/mbxboot/m8260_tty.c from the + * changes based on the file arch/powerpc/mbxboot/m8260_tty.c from the * Linux/PPC sources (m8260_tty.c had no copyright info in it). */ diff --git a/arch/ppc/cpu/mpc8260/speed.c b/arch/powerpc/cpu/mpc8260/speed.c similarity index 100% rename from arch/ppc/cpu/mpc8260/speed.c rename to arch/powerpc/cpu/mpc8260/speed.c diff --git a/arch/ppc/cpu/mpc8260/speed.h b/arch/powerpc/cpu/mpc8260/speed.h similarity index 100% rename from arch/ppc/cpu/mpc8260/speed.h rename to arch/powerpc/cpu/mpc8260/speed.h diff --git a/arch/ppc/cpu/mpc8260/spi.c b/arch/powerpc/cpu/mpc8260/spi.c similarity index 100% rename from arch/ppc/cpu/mpc8260/spi.c rename to arch/powerpc/cpu/mpc8260/spi.c diff --git a/arch/ppc/cpu/mpc8260/start.S b/arch/powerpc/cpu/mpc8260/start.S similarity index 99% rename from arch/ppc/cpu/mpc8260/start.S rename to arch/powerpc/cpu/mpc8260/start.S index 1fc70bc5e4..a43504276b 100644 --- a/arch/ppc/cpu/mpc8260/start.S +++ b/arch/powerpc/cpu/mpc8260/start.S @@ -576,7 +576,7 @@ init_8260_core: /* */ /* bits 15-19 correspond to addresses 0x00000000 to 0x0001F000 */ /* incrementing by 0x1000 each time. The code below is sort of */ - /* based on code in "flush_tlbs" from arch/ppc/kernel/head.S */ + /* based on code in "flush_tlbs" from arch/powerpc/kernel/head.S */ /* */ /*--------------------------------------------------------------*/ diff --git a/arch/ppc/cpu/mpc8260/traps.c b/arch/powerpc/cpu/mpc8260/traps.c similarity index 99% rename from arch/ppc/cpu/mpc8260/traps.c rename to arch/powerpc/cpu/mpc8260/traps.c index d216f71f94..c116cdf69d 100644 --- a/arch/ppc/cpu/mpc8260/traps.c +++ b/arch/powerpc/cpu/mpc8260/traps.c @@ -1,5 +1,5 @@ /* - * linux/arch/ppc/kernel/traps.c + * linux/arch/powerpc/kernel/traps.c * * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * diff --git a/arch/ppc/cpu/mpc824x/u-boot.lds b/arch/powerpc/cpu/mpc8260/u-boot.lds similarity index 98% rename from arch/ppc/cpu/mpc824x/u-boot.lds rename to arch/powerpc/cpu/mpc8260/u-boot.lds index 8a6d5084ec..b8681e706d 100644 --- a/arch/ppc/cpu/mpc824x/u-boot.lds +++ b/arch/powerpc/cpu/mpc8260/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc824x/start.o (.text) + arch/powerpc/cpu/mpc8260/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/arch/ppc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile similarity index 100% rename from arch/ppc/cpu/mpc83xx/Makefile rename to arch/powerpc/cpu/mpc83xx/Makefile diff --git a/arch/ppc/cpu/mpc83xx/config.mk b/arch/powerpc/cpu/mpc83xx/config.mk similarity index 94% rename from arch/ppc/cpu/mpc83xx/config.mk rename to arch/powerpc/cpu/mpc83xx/config.mk index 8596f6a5e7..8a3a8c1b98 100644 --- a/arch/ppc/cpu/mpc83xx/config.mk +++ b/arch/powerpc/cpu/mpc83xx/config.mk @@ -26,4 +26,4 @@ PLATFORM_CPPFLAGS += -DCONFIG_MPC83xx -DCONFIG_E300 \ -ffixed-r2 -msoft-float # Use default linker script. Board port can override in board/*/config.mk -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc83xx/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc83xx/u-boot.lds diff --git a/arch/ppc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/cpu.c rename to arch/powerpc/cpu/mpc83xx/cpu.c diff --git a/arch/ppc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/cpu_init.c rename to arch/powerpc/cpu/mpc83xx/cpu_init.c diff --git a/arch/ppc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/ecc.c rename to arch/powerpc/cpu/mpc83xx/ecc.c diff --git a/arch/ppc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/fdt.c rename to arch/powerpc/cpu/mpc83xx/fdt.c diff --git a/arch/ppc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/interrupts.c rename to arch/powerpc/cpu/mpc83xx/interrupts.c diff --git a/arch/ppc/cpu/mpc83xx/nand_init.c b/arch/powerpc/cpu/mpc83xx/nand_init.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/nand_init.c rename to arch/powerpc/cpu/mpc83xx/nand_init.c diff --git a/arch/ppc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/pci.c rename to arch/powerpc/cpu/mpc83xx/pci.c diff --git a/arch/ppc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/pcie.c rename to arch/powerpc/cpu/mpc83xx/pcie.c diff --git a/arch/ppc/cpu/mpc83xx/qe_io.c b/arch/powerpc/cpu/mpc83xx/qe_io.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/qe_io.c rename to arch/powerpc/cpu/mpc83xx/qe_io.c diff --git a/arch/ppc/cpu/mpc83xx/serdes.c b/arch/powerpc/cpu/mpc83xx/serdes.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/serdes.c rename to arch/powerpc/cpu/mpc83xx/serdes.c diff --git a/arch/ppc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/spd_sdram.c rename to arch/powerpc/cpu/mpc83xx/spd_sdram.c diff --git a/arch/ppc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/speed.c rename to arch/powerpc/cpu/mpc83xx/speed.c diff --git a/arch/ppc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S similarity index 99% rename from arch/ppc/cpu/mpc83xx/start.S rename to arch/powerpc/cpu/mpc83xx/start.S index 68bb6209c3..a7c80792de 100644 --- a/arch/ppc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -720,7 +720,7 @@ setup_bats: * * bits 15-19 correspond to addresses 0x00000000 to 0x0001F000 * incrementing by 0x1000 each time. The code below is sort of - * based on code in "flush_tlbs" from arch/ppc/kernel/head.S + * based on code in "flush_tlbs" from arch/powerpc/kernel/head.S * */ lis r3, 0 diff --git a/arch/ppc/cpu/mpc83xx/traps.c b/arch/powerpc/cpu/mpc83xx/traps.c similarity index 100% rename from arch/ppc/cpu/mpc83xx/traps.c rename to arch/powerpc/cpu/mpc83xx/traps.c diff --git a/arch/ppc/cpu/mpc83xx/u-boot.lds b/arch/powerpc/cpu/mpc83xx/u-boot.lds similarity index 98% rename from arch/ppc/cpu/mpc83xx/u-boot.lds rename to arch/powerpc/cpu/mpc83xx/u-boot.lds index 157cef676e..0b74a13fb1 100644 --- a/arch/ppc/cpu/mpc83xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc83xx/u-boot.lds @@ -50,7 +50,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc83xx/start.o (.text) + arch/powerpc/cpu/mpc83xx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/arch/ppc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile similarity index 100% rename from arch/ppc/cpu/mpc85xx/Makefile rename to arch/powerpc/cpu/mpc85xx/Makefile diff --git a/arch/ppc/cpu/mpc85xx/commproc.c b/arch/powerpc/cpu/mpc85xx/commproc.c similarity index 98% rename from arch/ppc/cpu/mpc85xx/commproc.c rename to arch/powerpc/cpu/mpc85xx/commproc.c index 594aace4b1..f0fd1cbc38 100644 --- a/arch/ppc/cpu/mpc85xx/commproc.c +++ b/arch/powerpc/cpu/mpc85xx/commproc.c @@ -2,7 +2,7 @@ * Adapted for Motorola MPC8560 chips * Xianghua Xiao * - * This file is based on "arch/ppc/8260_io/commproc.c" - here is it's + * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's * copyright notice: * * General Purpose functions for the global management of the diff --git a/arch/ppc/cpu/mpc85xx/config.mk b/arch/powerpc/cpu/mpc85xx/config.mk similarity index 95% rename from arch/ppc/cpu/mpc85xx/config.mk rename to arch/powerpc/cpu/mpc85xx/config.mk index ffb813dc39..f07d9209a7 100644 --- a/arch/ppc/cpu/mpc85xx/config.mk +++ b/arch/powerpc/cpu/mpc85xx/config.mk @@ -32,4 +32,4 @@ PLATFORM_CPPFLAGS +=$(call cc-option,-mspe=yes) PLATFORM_CPPFLAGS +=$(call cc-option,-mno-spe) # Use default linker script. Board port can override in board/*/config.mk -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc85xx/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc85xx/u-boot.lds diff --git a/arch/ppc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/cpu.c rename to arch/powerpc/cpu/mpc85xx/cpu.c diff --git a/arch/ppc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/cpu_init.c rename to arch/powerpc/cpu/mpc85xx/cpu_init.c diff --git a/arch/ppc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/cpu_init_early.c rename to arch/powerpc/cpu/mpc85xx/cpu_init_early.c diff --git a/arch/ppc/cpu/mpc85xx/cpu_init_nand.c b/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/cpu_init_nand.c rename to arch/powerpc/cpu/mpc85xx/cpu_init_nand.c diff --git a/arch/ppc/cpu/mpc85xx/ddr-gen1.c b/arch/powerpc/cpu/mpc85xx/ddr-gen1.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/ddr-gen1.c rename to arch/powerpc/cpu/mpc85xx/ddr-gen1.c diff --git a/arch/ppc/cpu/mpc85xx/ddr-gen2.c b/arch/powerpc/cpu/mpc85xx/ddr-gen2.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/ddr-gen2.c rename to arch/powerpc/cpu/mpc85xx/ddr-gen2.c diff --git a/arch/ppc/cpu/mpc85xx/ddr-gen3.c b/arch/powerpc/cpu/mpc85xx/ddr-gen3.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/ddr-gen3.c rename to arch/powerpc/cpu/mpc85xx/ddr-gen3.c diff --git a/arch/ppc/cpu/mpc85xx/ether_fcc.c b/arch/powerpc/cpu/mpc85xx/ether_fcc.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/ether_fcc.c rename to arch/powerpc/cpu/mpc85xx/ether_fcc.c diff --git a/arch/ppc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/fdt.c rename to arch/powerpc/cpu/mpc85xx/fdt.c diff --git a/arch/ppc/cpu/mpc85xx/fixed_ivor.S b/arch/powerpc/cpu/mpc85xx/fixed_ivor.S similarity index 100% rename from arch/ppc/cpu/mpc85xx/fixed_ivor.S rename to arch/powerpc/cpu/mpc85xx/fixed_ivor.S diff --git a/arch/ppc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/interrupts.c rename to arch/powerpc/cpu/mpc85xx/interrupts.c diff --git a/arch/ppc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/mp.c rename to arch/powerpc/cpu/mpc85xx/mp.c diff --git a/arch/ppc/cpu/mpc85xx/mp.h b/arch/powerpc/cpu/mpc85xx/mp.h similarity index 100% rename from arch/ppc/cpu/mpc85xx/mp.h rename to arch/powerpc/cpu/mpc85xx/mp.h diff --git a/arch/ppc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/mpc8536_serdes.c rename to arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c diff --git a/arch/ppc/cpu/mpc85xx/pci.c b/arch/powerpc/cpu/mpc85xx/pci.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/pci.c rename to arch/powerpc/cpu/mpc85xx/pci.c diff --git a/arch/ppc/cpu/mpc85xx/qe_io.c b/arch/powerpc/cpu/mpc85xx/qe_io.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/qe_io.c rename to arch/powerpc/cpu/mpc85xx/qe_io.c diff --git a/arch/ppc/cpu/mpc85xx/release.S b/arch/powerpc/cpu/mpc85xx/release.S similarity index 100% rename from arch/ppc/cpu/mpc85xx/release.S rename to arch/powerpc/cpu/mpc85xx/release.S diff --git a/arch/ppc/cpu/mpc85xx/resetvec.S b/arch/powerpc/cpu/mpc85xx/resetvec.S similarity index 100% rename from arch/ppc/cpu/mpc85xx/resetvec.S rename to arch/powerpc/cpu/mpc85xx/resetvec.S diff --git a/arch/ppc/cpu/mpc85xx/serial_scc.c b/arch/powerpc/cpu/mpc85xx/serial_scc.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/serial_scc.c rename to arch/powerpc/cpu/mpc85xx/serial_scc.c diff --git a/arch/ppc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/speed.c rename to arch/powerpc/cpu/mpc85xx/speed.c diff --git a/arch/ppc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S similarity index 100% rename from arch/ppc/cpu/mpc85xx/start.S rename to arch/powerpc/cpu/mpc85xx/start.S diff --git a/arch/ppc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c similarity index 100% rename from arch/ppc/cpu/mpc85xx/tlb.c rename to arch/powerpc/cpu/mpc85xx/tlb.c diff --git a/arch/ppc/cpu/mpc85xx/traps.c b/arch/powerpc/cpu/mpc85xx/traps.c similarity index 99% rename from arch/ppc/cpu/mpc85xx/traps.c rename to arch/powerpc/cpu/mpc85xx/traps.c index 10108d86e3..7e96664333 100644 --- a/arch/ppc/cpu/mpc85xx/traps.c +++ b/arch/powerpc/cpu/mpc85xx/traps.c @@ -1,5 +1,5 @@ /* - * linux/arch/ppc/kernel/traps.c + * linux/arch/powerpc/kernel/traps.c * * Copyright 2007 Freescale Semiconductor. * Copyright (C) 2003 Motorola diff --git a/arch/ppc/cpu/mpc85xx/u-boot-nand.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds similarity index 98% rename from arch/ppc/cpu/mpc85xx/u-boot-nand.lds rename to arch/powerpc/cpu/mpc85xx/u-boot-nand.lds index b9240f22a7..5fd3e6c8ee 100644 --- a/arch/ppc/cpu/mpc85xx/u-boot-nand.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand.lds @@ -117,7 +117,7 @@ SECTIONS .bootpg ADDR(.text) - 0x1000 : { - arch/ppc/cpu/mpc85xx/start.o (.bootpg) + arch/powerpc/cpu/mpc85xx/start.o (.bootpg) } :text = 0xffff . = ADDR(.text) + 0x80000; diff --git a/arch/ppc/cpu/mpc85xx/u-boot-nand_spl.lds b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds similarity index 99% rename from arch/ppc/cpu/mpc85xx/u-boot-nand_spl.lds rename to arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds index fef3e42e09..7d9cee98e5 100644 --- a/arch/ppc/cpu/mpc85xx/u-boot-nand_spl.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot-nand_spl.lds @@ -29,7 +29,7 @@ SECTIONS . = 0xfff00000; .text : { *(.text) - } + } _etext = .; .reloc : { diff --git a/arch/ppc/cpu/mpc85xx/u-boot.lds b/arch/powerpc/cpu/mpc85xx/u-boot.lds similarity index 98% rename from arch/ppc/cpu/mpc85xx/u-boot.lds rename to arch/powerpc/cpu/mpc85xx/u-boot.lds index 9698bf405a..c88b1f35b9 100644 --- a/arch/ppc/cpu/mpc85xx/u-boot.lds +++ b/arch/powerpc/cpu/mpc85xx/u-boot.lds @@ -121,7 +121,7 @@ SECTIONS .bootpg RESET_VECTOR_ADDRESS - 0xffc : { - arch/ppc/cpu/mpc85xx/start.o (.bootpg) + arch/powerpc/cpu/mpc85xx/start.o (.bootpg) } :text = 0xffff .resetvec RESET_VECTOR_ADDRESS : diff --git a/arch/ppc/cpu/mpc86xx/Makefile b/arch/powerpc/cpu/mpc86xx/Makefile similarity index 100% rename from arch/ppc/cpu/mpc86xx/Makefile rename to arch/powerpc/cpu/mpc86xx/Makefile diff --git a/arch/ppc/cpu/mpc86xx/cache.S b/arch/powerpc/cpu/mpc86xx/cache.S similarity index 100% rename from arch/ppc/cpu/mpc86xx/cache.S rename to arch/powerpc/cpu/mpc86xx/cache.S diff --git a/arch/ppc/cpu/mpc86xx/config.mk b/arch/powerpc/cpu/mpc86xx/config.mk similarity index 100% rename from arch/ppc/cpu/mpc86xx/config.mk rename to arch/powerpc/cpu/mpc86xx/config.mk diff --git a/arch/ppc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc86xx/cpu.c rename to arch/powerpc/cpu/mpc86xx/cpu.c diff --git a/arch/ppc/cpu/mpc86xx/cpu_init.c b/arch/powerpc/cpu/mpc86xx/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc86xx/cpu_init.c rename to arch/powerpc/cpu/mpc86xx/cpu_init.c diff --git a/arch/ppc/cpu/mpc86xx/ddr-8641.c b/arch/powerpc/cpu/mpc86xx/ddr-8641.c similarity index 100% rename from arch/ppc/cpu/mpc86xx/ddr-8641.c rename to arch/powerpc/cpu/mpc86xx/ddr-8641.c diff --git a/arch/ppc/cpu/mpc86xx/fdt.c b/arch/powerpc/cpu/mpc86xx/fdt.c similarity index 100% rename from arch/ppc/cpu/mpc86xx/fdt.c rename to arch/powerpc/cpu/mpc86xx/fdt.c diff --git a/arch/ppc/cpu/mpc86xx/interrupts.c b/arch/powerpc/cpu/mpc86xx/interrupts.c similarity index 100% rename from arch/ppc/cpu/mpc86xx/interrupts.c rename to arch/powerpc/cpu/mpc86xx/interrupts.c diff --git a/arch/ppc/cpu/mpc86xx/mp.c b/arch/powerpc/cpu/mpc86xx/mp.c similarity index 100% rename from arch/ppc/cpu/mpc86xx/mp.c rename to arch/powerpc/cpu/mpc86xx/mp.c diff --git a/arch/ppc/cpu/mpc86xx/release.S b/arch/powerpc/cpu/mpc86xx/release.S similarity index 100% rename from arch/ppc/cpu/mpc86xx/release.S rename to arch/powerpc/cpu/mpc86xx/release.S diff --git a/arch/ppc/cpu/mpc86xx/speed.c b/arch/powerpc/cpu/mpc86xx/speed.c similarity index 100% rename from arch/ppc/cpu/mpc86xx/speed.c rename to arch/powerpc/cpu/mpc86xx/speed.c diff --git a/arch/ppc/cpu/mpc86xx/start.S b/arch/powerpc/cpu/mpc86xx/start.S similarity index 100% rename from arch/ppc/cpu/mpc86xx/start.S rename to arch/powerpc/cpu/mpc86xx/start.S diff --git a/arch/ppc/cpu/mpc86xx/traps.c b/arch/powerpc/cpu/mpc86xx/traps.c similarity index 100% rename from arch/ppc/cpu/mpc86xx/traps.c rename to arch/powerpc/cpu/mpc86xx/traps.c diff --git a/arch/ppc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile similarity index 100% rename from arch/ppc/cpu/mpc8xx/Makefile rename to arch/powerpc/cpu/mpc8xx/Makefile diff --git a/arch/ppc/cpu/mpc8xx/bedbug_860.c b/arch/powerpc/cpu/mpc8xx/bedbug_860.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/bedbug_860.c rename to arch/powerpc/cpu/mpc8xx/bedbug_860.c diff --git a/arch/ppc/cpu/mpc8xx/commproc.c b/arch/powerpc/cpu/mpc8xx/commproc.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/commproc.c rename to arch/powerpc/cpu/mpc8xx/commproc.c diff --git a/arch/ppc/cpu/mpc8xx/config.mk b/arch/powerpc/cpu/mpc8xx/config.mk similarity index 100% rename from arch/ppc/cpu/mpc8xx/config.mk rename to arch/powerpc/cpu/mpc8xx/config.mk diff --git a/arch/ppc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/cpu.c rename to arch/powerpc/cpu/mpc8xx/cpu.c diff --git a/arch/ppc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/cpu_init.c rename to arch/powerpc/cpu/mpc8xx/cpu_init.c diff --git a/arch/ppc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/fdt.c rename to arch/powerpc/cpu/mpc8xx/fdt.c diff --git a/arch/ppc/cpu/mpc8xx/fec.c b/arch/powerpc/cpu/mpc8xx/fec.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/fec.c rename to arch/powerpc/cpu/mpc8xx/fec.c diff --git a/arch/ppc/cpu/mpc8xx/fec.h b/arch/powerpc/cpu/mpc8xx/fec.h similarity index 100% rename from arch/ppc/cpu/mpc8xx/fec.h rename to arch/powerpc/cpu/mpc8xx/fec.h diff --git a/arch/ppc/cpu/mpc8xx/i2c.c b/arch/powerpc/cpu/mpc8xx/i2c.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/i2c.c rename to arch/powerpc/cpu/mpc8xx/i2c.c diff --git a/arch/ppc/cpu/mpc8xx/interrupts.c b/arch/powerpc/cpu/mpc8xx/interrupts.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/interrupts.c rename to arch/powerpc/cpu/mpc8xx/interrupts.c diff --git a/arch/ppc/cpu/mpc8xx/kgdb.S b/arch/powerpc/cpu/mpc8xx/kgdb.S similarity index 100% rename from arch/ppc/cpu/mpc8xx/kgdb.S rename to arch/powerpc/cpu/mpc8xx/kgdb.S diff --git a/arch/ppc/cpu/mpc8xx/lcd.c b/arch/powerpc/cpu/mpc8xx/lcd.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/lcd.c rename to arch/powerpc/cpu/mpc8xx/lcd.c diff --git a/arch/ppc/cpu/mpc8xx/plprcr_write.S b/arch/powerpc/cpu/mpc8xx/plprcr_write.S similarity index 100% rename from arch/ppc/cpu/mpc8xx/plprcr_write.S rename to arch/powerpc/cpu/mpc8xx/plprcr_write.S diff --git a/arch/ppc/cpu/mpc8xx/scc.c b/arch/powerpc/cpu/mpc8xx/scc.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/scc.c rename to arch/powerpc/cpu/mpc8xx/scc.c diff --git a/arch/ppc/cpu/mpc8xx/serial.c b/arch/powerpc/cpu/mpc8xx/serial.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/serial.c rename to arch/powerpc/cpu/mpc8xx/serial.c diff --git a/arch/ppc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/speed.c rename to arch/powerpc/cpu/mpc8xx/speed.c diff --git a/arch/ppc/cpu/mpc8xx/spi.c b/arch/powerpc/cpu/mpc8xx/spi.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/spi.c rename to arch/powerpc/cpu/mpc8xx/spi.c diff --git a/arch/ppc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S similarity index 100% rename from arch/ppc/cpu/mpc8xx/start.S rename to arch/powerpc/cpu/mpc8xx/start.S diff --git a/arch/ppc/cpu/mpc8xx/traps.c b/arch/powerpc/cpu/mpc8xx/traps.c similarity index 99% rename from arch/ppc/cpu/mpc8xx/traps.c rename to arch/powerpc/cpu/mpc8xx/traps.c index 6efe8e0ea7..343dced31f 100644 --- a/arch/ppc/cpu/mpc8xx/traps.c +++ b/arch/powerpc/cpu/mpc8xx/traps.c @@ -1,5 +1,5 @@ /* - * linux/arch/ppc/kernel/traps.c + * linux/arch/powerpc/kernel/traps.c * * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * diff --git a/arch/ppc/cpu/mpc8xx/upatch.c b/arch/powerpc/cpu/mpc8xx/upatch.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/upatch.c rename to arch/powerpc/cpu/mpc8xx/upatch.c diff --git a/arch/ppc/cpu/mpc8xx/video.c b/arch/powerpc/cpu/mpc8xx/video.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/video.c rename to arch/powerpc/cpu/mpc8xx/video.c diff --git a/arch/ppc/cpu/mpc8xx/wlkbd.c b/arch/powerpc/cpu/mpc8xx/wlkbd.c similarity index 100% rename from arch/ppc/cpu/mpc8xx/wlkbd.c rename to arch/powerpc/cpu/mpc8xx/wlkbd.c diff --git a/arch/ppc/cpu/mpc8xxx/Makefile b/arch/powerpc/cpu/mpc8xxx/Makefile similarity index 100% rename from arch/ppc/cpu/mpc8xxx/Makefile rename to arch/powerpc/cpu/mpc8xxx/Makefile diff --git a/arch/ppc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c similarity index 96% rename from arch/ppc/cpu/mpc8xxx/cpu.c rename to arch/powerpc/cpu/mpc8xxx/cpu.c index fef062b224..22f3423723 100644 --- a/arch/ppc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -1,8 +1,8 @@ /* * Copyright 2009-2010 Freescale Semiconductor, Inc. * - * This file is derived from arch/ppc/cpu/mpc85xx/cpu.c and - * arch/ppc/cpu/mpc86xx/cpu.c. Basically this file contains + * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and + * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains * cpu specific common code for 85xx/86xx processors. * See file CREDITS for list of people who contributed to this * project. diff --git a/arch/ppc/cpu/mpc8xxx/ddr/Makefile b/arch/powerpc/cpu/mpc8xxx/ddr/Makefile similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/Makefile rename to arch/powerpc/cpu/mpc8xxx/ddr/Makefile diff --git a/arch/ppc/cpu/mpc8xxx/ddr/common_timing_params.h b/arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/common_timing_params.h rename to arch/powerpc/cpu/mpc8xxx/ddr/common_timing_params.h diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/ctrl_regs.c rename to arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ddr.h b/arch/powerpc/cpu/mpc8xxx/ddr/ddr.h similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/ddr.h rename to arch/powerpc/cpu/mpc8xxx/ddr/ddr.h diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c rename to arch/powerpc/cpu/mpc8xxx/ddr/ddr1_dimm_params.c diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c rename to arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c diff --git a/arch/ppc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c rename to arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c diff --git a/arch/ppc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c rename to arch/powerpc/cpu/mpc8xxx/ddr/lc_common_dimm_params.c diff --git a/arch/ppc/cpu/mpc8xxx/ddr/main.c b/arch/powerpc/cpu/mpc8xxx/ddr/main.c similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/main.c rename to arch/powerpc/cpu/mpc8xxx/ddr/main.c diff --git a/arch/ppc/cpu/mpc8xxx/ddr/options.c b/arch/powerpc/cpu/mpc8xxx/ddr/options.c similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/options.c rename to arch/powerpc/cpu/mpc8xxx/ddr/options.c diff --git a/arch/ppc/cpu/mpc8xxx/ddr/util.c b/arch/powerpc/cpu/mpc8xxx/ddr/util.c similarity index 100% rename from arch/ppc/cpu/mpc8xxx/ddr/util.c rename to arch/powerpc/cpu/mpc8xxx/ddr/util.c diff --git a/arch/ppc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c similarity index 93% rename from arch/ppc/cpu/mpc8xxx/fdt.c rename to arch/powerpc/cpu/mpc8xxx/fdt.c index e68d6f336b..ccefaf5716 100644 --- a/arch/ppc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -1,8 +1,8 @@ /* * Copyright 2009 Freescale Semiconductor, Inc. * - * This file is derived from arch/ppc/cpu/mpc85xx/cpu.c and - * arch/ppc/cpu/mpc86xx/cpu.c. Basically this file contains + * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and + * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains * cpu specific common code for 85xx/86xx processors. * See file CREDITS for list of people who contributed to this * project. diff --git a/arch/ppc/cpu/mpc8xxx/pci_cfg.c b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c similarity index 100% rename from arch/ppc/cpu/mpc8xxx/pci_cfg.c rename to arch/powerpc/cpu/mpc8xxx/pci_cfg.c diff --git a/arch/ppc/cpu/ppc4xx/40x_spd_sdram.c b/arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c similarity index 99% rename from arch/ppc/cpu/ppc4xx/40x_spd_sdram.c rename to arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c index 595d5687d6..f65cd886a5 100644 --- a/arch/ppc/cpu/ppc4xx/40x_spd_sdram.c +++ b/arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c @@ -1,5 +1,5 @@ /* - * arch/ppc/cpu/ppc4xx/40x_spd_sdram.c + * arch/powerpc/cpu/ppc4xx/40x_spd_sdram.c * This SPD SDRAM detection code supports IBM/AMCC PPC44x cpu with a * SDRAM controller. Those are all current 405 PPC's. * diff --git a/arch/ppc/cpu/ppc4xx/44x_spd_ddr.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c similarity index 99% rename from arch/ppc/cpu/ppc4xx/44x_spd_ddr.c rename to arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c index 9d1994f99e..005315be8c 100644 --- a/arch/ppc/cpu/ppc4xx/44x_spd_ddr.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c @@ -1,5 +1,5 @@ /* - * arch/ppc/cpu/ppc4xx/44x_spd_ddr.c + * arch/powerpc/cpu/ppc4xx/44x_spd_ddr.c * This SPD DDR detection code supports IBM/AMCC PPC44x cpu with a * DDR controller. Those are 440GP/GX/EP/GR. * diff --git a/arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c similarity index 99% rename from arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c rename to arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c index ea6c2ac770..faddee98b7 100644 --- a/arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c @@ -1,5 +1,5 @@ /* - * arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c + * arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c * This SPD SDRAM detection code supports AMCC PPC44x cpu's with a * DDR2 controller (non Denali Core). Those currently are: * diff --git a/arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c similarity index 99% rename from arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c rename to arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c index 72630716c9..aed0ed7569 100644 --- a/arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c @@ -1,5 +1,5 @@ /* - * arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c + * arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c * This SPD SDRAM detection code supports AMCC PPC44x cpu's with a * DDR2 controller (non Denali Core). Those currently are: * diff --git a/arch/ppc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/4xx_pci.c rename to arch/powerpc/cpu/ppc4xx/4xx_pci.c diff --git a/arch/ppc/cpu/ppc4xx/4xx_pcie.c b/arch/powerpc/cpu/ppc4xx/4xx_pcie.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/4xx_pcie.c rename to arch/powerpc/cpu/ppc4xx/4xx_pcie.c diff --git a/arch/ppc/cpu/ppc4xx/4xx_uart.c b/arch/powerpc/cpu/ppc4xx/4xx_uart.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/4xx_uart.c rename to arch/powerpc/cpu/ppc4xx/4xx_uart.c diff --git a/arch/ppc/cpu/ppc4xx/Makefile b/arch/powerpc/cpu/ppc4xx/Makefile similarity index 100% rename from arch/ppc/cpu/ppc4xx/Makefile rename to arch/powerpc/cpu/ppc4xx/Makefile diff --git a/arch/ppc/cpu/ppc4xx/bedbug_405.c b/arch/powerpc/cpu/ppc4xx/bedbug_405.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/bedbug_405.c rename to arch/powerpc/cpu/ppc4xx/bedbug_405.c diff --git a/arch/ppc/cpu/ppc4xx/cache.S b/arch/powerpc/cpu/ppc4xx/cache.S similarity index 100% rename from arch/ppc/cpu/ppc4xx/cache.S rename to arch/powerpc/cpu/ppc4xx/cache.S diff --git a/arch/ppc/cpu/ppc4xx/cmd_chip_config.c b/arch/powerpc/cpu/ppc4xx/cmd_chip_config.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/cmd_chip_config.c rename to arch/powerpc/cpu/ppc4xx/cmd_chip_config.c diff --git a/arch/ppc/cpu/ppc4xx/commproc.c b/arch/powerpc/cpu/ppc4xx/commproc.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/commproc.c rename to arch/powerpc/cpu/ppc4xx/commproc.c diff --git a/arch/ppc/cpu/ppc4xx/config.mk b/arch/powerpc/cpu/ppc4xx/config.mk similarity index 95% rename from arch/ppc/cpu/ppc4xx/config.mk rename to arch/powerpc/cpu/ppc4xx/config.mk index ea4d707842..5bda710e26 100644 --- a/arch/ppc/cpu/ppc4xx/config.mk +++ b/arch/powerpc/cpu/ppc4xx/config.mk @@ -34,4 +34,4 @@ PLATFORM_CPPFLAGS += -Wa,-m405 -mcpu=405 endif # Use default linker script. Board port can override in board/*/config.mk -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/ppc4xx/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/ppc4xx/u-boot.lds diff --git a/arch/ppc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/cpu.c rename to arch/powerpc/cpu/ppc4xx/cpu.c diff --git a/arch/ppc/cpu/ppc4xx/cpu_init.c b/arch/powerpc/cpu/ppc4xx/cpu_init.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/cpu_init.c rename to arch/powerpc/cpu/ppc4xx/cpu_init.c diff --git a/arch/ppc/cpu/ppc4xx/dcr.S b/arch/powerpc/cpu/ppc4xx/dcr.S similarity index 100% rename from arch/ppc/cpu/ppc4xx/dcr.S rename to arch/powerpc/cpu/ppc4xx/dcr.S diff --git a/arch/ppc/cpu/ppc4xx/denali_data_eye.c b/arch/powerpc/cpu/ppc4xx/denali_data_eye.c similarity index 99% rename from arch/ppc/cpu/ppc4xx/denali_data_eye.c rename to arch/powerpc/cpu/ppc4xx/denali_data_eye.c index 15a9b4f3ec..03b8d3c614 100644 --- a/arch/ppc/cpu/ppc4xx/denali_data_eye.c +++ b/arch/powerpc/cpu/ppc4xx/denali_data_eye.c @@ -1,5 +1,5 @@ /* - * arch/ppc/cpu/ppc4xx/denali_data_eye.c + * arch/powerpc/cpu/ppc4xx/denali_data_eye.c * Extracted from board/amcc/sequoia/sdram.c by Larry Johnson . * * (C) Copyright 2006 diff --git a/arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c similarity index 99% rename from arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c rename to arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c index 72f76cd2fa..080ea0af4c 100644 --- a/arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c @@ -1,12 +1,12 @@ /* - * arch/ppc/cpu/ppc4xx/denali_spd_ddr2.c + * arch/powerpc/cpu/ppc4xx/denali_spd_ddr2.c * This SPD SDRAM detection code supports AMCC PPC44x CPUs with a Denali-core * DDR2 controller, specifically the 440EPx/GRx. * * (C) Copyright 2007-2008 * Larry Johnson, lrj@acm.org. * - * Based primarily on arch/ppc/cpu/ppc4xx/4xx_spd_ddr2.c, which is... + * Based primarily on arch/powerpc/cpu/ppc4xx/4xx_spd_ddr2.c, which is... * * (C) Copyright 2007 * Stefan Roese, DENX Software Engineering, sr@denx.de. diff --git a/arch/ppc/cpu/ppc4xx/ecc.c b/arch/powerpc/cpu/ppc4xx/ecc.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/ecc.c rename to arch/powerpc/cpu/ppc4xx/ecc.c diff --git a/arch/ppc/cpu/ppc4xx/ecc.h b/arch/powerpc/cpu/ppc4xx/ecc.h similarity index 100% rename from arch/ppc/cpu/ppc4xx/ecc.h rename to arch/powerpc/cpu/ppc4xx/ecc.h diff --git a/arch/ppc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/fdt.c rename to arch/powerpc/cpu/ppc4xx/fdt.c diff --git a/arch/ppc/cpu/ppc4xx/gpio.c b/arch/powerpc/cpu/ppc4xx/gpio.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/gpio.c rename to arch/powerpc/cpu/ppc4xx/gpio.c diff --git a/arch/ppc/cpu/ppc4xx/interrupts.c b/arch/powerpc/cpu/ppc4xx/interrupts.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/interrupts.c rename to arch/powerpc/cpu/ppc4xx/interrupts.c diff --git a/arch/ppc/cpu/ppc4xx/iop480_uart.c b/arch/powerpc/cpu/ppc4xx/iop480_uart.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/iop480_uart.c rename to arch/powerpc/cpu/ppc4xx/iop480_uart.c diff --git a/arch/ppc/cpu/ppc4xx/kgdb.S b/arch/powerpc/cpu/ppc4xx/kgdb.S similarity index 100% rename from arch/ppc/cpu/ppc4xx/kgdb.S rename to arch/powerpc/cpu/ppc4xx/kgdb.S diff --git a/arch/ppc/cpu/ppc4xx/miiphy.c b/arch/powerpc/cpu/ppc4xx/miiphy.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/miiphy.c rename to arch/powerpc/cpu/ppc4xx/miiphy.c diff --git a/arch/ppc/cpu/ppc4xx/reginfo.c b/arch/powerpc/cpu/ppc4xx/reginfo.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/reginfo.c rename to arch/powerpc/cpu/ppc4xx/reginfo.c diff --git a/arch/ppc/cpu/ppc4xx/resetvec.S b/arch/powerpc/cpu/ppc4xx/resetvec.S similarity index 100% rename from arch/ppc/cpu/ppc4xx/resetvec.S rename to arch/powerpc/cpu/ppc4xx/resetvec.S diff --git a/arch/ppc/cpu/ppc4xx/sdram.c b/arch/powerpc/cpu/ppc4xx/sdram.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/sdram.c rename to arch/powerpc/cpu/ppc4xx/sdram.c diff --git a/arch/ppc/cpu/ppc4xx/sdram.h b/arch/powerpc/cpu/ppc4xx/sdram.h similarity index 100% rename from arch/ppc/cpu/ppc4xx/sdram.h rename to arch/powerpc/cpu/ppc4xx/sdram.h diff --git a/arch/ppc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/speed.c rename to arch/powerpc/cpu/ppc4xx/speed.c diff --git a/arch/ppc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S similarity index 100% rename from arch/ppc/cpu/ppc4xx/start.S rename to arch/powerpc/cpu/ppc4xx/start.S diff --git a/arch/ppc/cpu/ppc4xx/tlb.c b/arch/powerpc/cpu/ppc4xx/tlb.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/tlb.c rename to arch/powerpc/cpu/ppc4xx/tlb.c diff --git a/arch/ppc/cpu/ppc4xx/traps.c b/arch/powerpc/cpu/ppc4xx/traps.c similarity index 99% rename from arch/ppc/cpu/ppc4xx/traps.c rename to arch/powerpc/cpu/ppc4xx/traps.c index 42e422157c..1616772f0f 100644 --- a/arch/ppc/cpu/ppc4xx/traps.c +++ b/arch/powerpc/cpu/ppc4xx/traps.c @@ -1,5 +1,5 @@ /* - * linux/arch/ppc/kernel/traps.c + * linux/arch/powerpc/kernel/traps.c * * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) * diff --git a/arch/ppc/cpu/ppc4xx/u-boot.lds b/arch/powerpc/cpu/ppc4xx/u-boot.lds similarity index 98% rename from arch/ppc/cpu/ppc4xx/u-boot.lds rename to arch/powerpc/cpu/ppc4xx/u-boot.lds index 3704d8a695..eca1f9dd82 100644 --- a/arch/ppc/cpu/ppc4xx/u-boot.lds +++ b/arch/powerpc/cpu/ppc4xx/u-boot.lds @@ -124,7 +124,7 @@ SECTIONS #ifdef CONFIG_440 .bootpg RESET_VECTOR_ADDRESS - 0xffc : { - arch/ppc/cpu/ppc4xx/start.o (.bootpg) + arch/powerpc/cpu/ppc4xx/start.o (.bootpg) /* * PPC440 board need a board specific object with the diff --git a/arch/ppc/cpu/ppc4xx/uic.c b/arch/powerpc/cpu/ppc4xx/uic.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/uic.c rename to arch/powerpc/cpu/ppc4xx/uic.c diff --git a/arch/ppc/cpu/ppc4xx/usb.c b/arch/powerpc/cpu/ppc4xx/usb.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/usb.c rename to arch/powerpc/cpu/ppc4xx/usb.c diff --git a/arch/ppc/cpu/ppc4xx/usb_ohci.c b/arch/powerpc/cpu/ppc4xx/usb_ohci.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/usb_ohci.c rename to arch/powerpc/cpu/ppc4xx/usb_ohci.c diff --git a/arch/ppc/cpu/ppc4xx/usb_ohci.h b/arch/powerpc/cpu/ppc4xx/usb_ohci.h similarity index 100% rename from arch/ppc/cpu/ppc4xx/usb_ohci.h rename to arch/powerpc/cpu/ppc4xx/usb_ohci.h diff --git a/arch/ppc/cpu/ppc4xx/usbdev.c b/arch/powerpc/cpu/ppc4xx/usbdev.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/usbdev.c rename to arch/powerpc/cpu/ppc4xx/usbdev.c diff --git a/arch/ppc/cpu/ppc4xx/usbdev.h b/arch/powerpc/cpu/ppc4xx/usbdev.h similarity index 100% rename from arch/ppc/cpu/ppc4xx/usbdev.h rename to arch/powerpc/cpu/ppc4xx/usbdev.h diff --git a/arch/ppc/cpu/ppc4xx/xilinx_irq.c b/arch/powerpc/cpu/ppc4xx/xilinx_irq.c similarity index 100% rename from arch/ppc/cpu/ppc4xx/xilinx_irq.c rename to arch/powerpc/cpu/ppc4xx/xilinx_irq.c diff --git a/arch/ppc/include/asm/4xx_pci.h b/arch/powerpc/include/asm/4xx_pci.h similarity index 100% rename from arch/ppc/include/asm/4xx_pci.h rename to arch/powerpc/include/asm/4xx_pci.h diff --git a/arch/ppc/include/asm/4xx_pcie.h b/arch/powerpc/include/asm/4xx_pcie.h similarity index 100% rename from arch/ppc/include/asm/4xx_pcie.h rename to arch/powerpc/include/asm/4xx_pcie.h diff --git a/arch/ppc/include/asm/5xx_immap.h b/arch/powerpc/include/asm/5xx_immap.h similarity index 100% rename from arch/ppc/include/asm/5xx_immap.h rename to arch/powerpc/include/asm/5xx_immap.h diff --git a/arch/ppc/include/asm/8xx_immap.h b/arch/powerpc/include/asm/8xx_immap.h similarity index 100% rename from arch/ppc/include/asm/8xx_immap.h rename to arch/powerpc/include/asm/8xx_immap.h diff --git a/arch/ppc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h similarity index 100% rename from arch/ppc/include/asm/atomic.h rename to arch/powerpc/include/asm/atomic.h diff --git a/arch/ppc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h similarity index 100% rename from arch/ppc/include/asm/bitops.h rename to arch/powerpc/include/asm/bitops.h diff --git a/arch/ppc/include/asm/byteorder.h b/arch/powerpc/include/asm/byteorder.h similarity index 100% rename from arch/ppc/include/asm/byteorder.h rename to arch/powerpc/include/asm/byteorder.h diff --git a/arch/ppc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h similarity index 100% rename from arch/ppc/include/asm/cache.h rename to arch/powerpc/include/asm/cache.h diff --git a/arch/ppc/include/asm/config.h b/arch/powerpc/include/asm/config.h similarity index 100% rename from arch/ppc/include/asm/config.h rename to arch/powerpc/include/asm/config.h diff --git a/arch/ppc/include/asm/cpm_8260.h b/arch/powerpc/include/asm/cpm_8260.h similarity index 100% rename from arch/ppc/include/asm/cpm_8260.h rename to arch/powerpc/include/asm/cpm_8260.h diff --git a/arch/ppc/include/asm/cpm_85xx.h b/arch/powerpc/include/asm/cpm_85xx.h similarity index 100% rename from arch/ppc/include/asm/cpm_85xx.h rename to arch/powerpc/include/asm/cpm_85xx.h diff --git a/arch/ppc/include/asm/e300.h b/arch/powerpc/include/asm/e300.h similarity index 100% rename from arch/ppc/include/asm/e300.h rename to arch/powerpc/include/asm/e300.h diff --git a/arch/ppc/include/asm/errno.h b/arch/powerpc/include/asm/errno.h similarity index 100% rename from arch/ppc/include/asm/errno.h rename to arch/powerpc/include/asm/errno.h diff --git a/arch/ppc/include/asm/fsl_ddr_dimm_params.h b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h similarity index 100% rename from arch/ppc/include/asm/fsl_ddr_dimm_params.h rename to arch/powerpc/include/asm/fsl_ddr_dimm_params.h diff --git a/arch/ppc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h similarity index 100% rename from arch/ppc/include/asm/fsl_ddr_sdram.h rename to arch/powerpc/include/asm/fsl_ddr_sdram.h diff --git a/arch/ppc/include/asm/fsl_dma.h b/arch/powerpc/include/asm/fsl_dma.h similarity index 100% rename from arch/ppc/include/asm/fsl_dma.h rename to arch/powerpc/include/asm/fsl_dma.h diff --git a/arch/ppc/include/asm/fsl_i2c.h b/arch/powerpc/include/asm/fsl_i2c.h similarity index 100% rename from arch/ppc/include/asm/fsl_i2c.h rename to arch/powerpc/include/asm/fsl_i2c.h diff --git a/arch/ppc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h similarity index 100% rename from arch/ppc/include/asm/fsl_law.h rename to arch/powerpc/include/asm/fsl_law.h diff --git a/arch/ppc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h similarity index 100% rename from arch/ppc/include/asm/fsl_lbc.h rename to arch/powerpc/include/asm/fsl_lbc.h diff --git a/arch/ppc/include/asm/fsl_pci.h b/arch/powerpc/include/asm/fsl_pci.h similarity index 100% rename from arch/ppc/include/asm/fsl_pci.h rename to arch/powerpc/include/asm/fsl_pci.h diff --git a/arch/ppc/include/asm/fsl_serdes.h b/arch/powerpc/include/asm/fsl_serdes.h similarity index 100% rename from arch/ppc/include/asm/fsl_serdes.h rename to arch/powerpc/include/asm/fsl_serdes.h diff --git a/arch/ppc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h similarity index 100% rename from arch/ppc/include/asm/global_data.h rename to arch/powerpc/include/asm/global_data.h diff --git a/arch/ppc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h similarity index 100% rename from arch/ppc/include/asm/gpio.h rename to arch/powerpc/include/asm/gpio.h diff --git a/arch/ppc/include/asm/immap_512x.h b/arch/powerpc/include/asm/immap_512x.h similarity index 100% rename from arch/ppc/include/asm/immap_512x.h rename to arch/powerpc/include/asm/immap_512x.h diff --git a/arch/ppc/include/asm/immap_8220.h b/arch/powerpc/include/asm/immap_8220.h similarity index 100% rename from arch/ppc/include/asm/immap_8220.h rename to arch/powerpc/include/asm/immap_8220.h diff --git a/arch/ppc/include/asm/immap_8260.h b/arch/powerpc/include/asm/immap_8260.h similarity index 100% rename from arch/ppc/include/asm/immap_8260.h rename to arch/powerpc/include/asm/immap_8260.h diff --git a/arch/ppc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h similarity index 100% rename from arch/ppc/include/asm/immap_83xx.h rename to arch/powerpc/include/asm/immap_83xx.h diff --git a/arch/ppc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h similarity index 100% rename from arch/ppc/include/asm/immap_85xx.h rename to arch/powerpc/include/asm/immap_85xx.h diff --git a/arch/ppc/include/asm/immap_86xx.h b/arch/powerpc/include/asm/immap_86xx.h similarity index 100% rename from arch/ppc/include/asm/immap_86xx.h rename to arch/powerpc/include/asm/immap_86xx.h diff --git a/arch/ppc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h similarity index 100% rename from arch/ppc/include/asm/immap_qe.h rename to arch/powerpc/include/asm/immap_qe.h diff --git a/arch/ppc/include/asm/interrupt.h b/arch/powerpc/include/asm/interrupt.h similarity index 100% rename from arch/ppc/include/asm/interrupt.h rename to arch/powerpc/include/asm/interrupt.h diff --git a/arch/ppc/include/asm/io.h b/arch/powerpc/include/asm/io.h similarity index 100% rename from arch/ppc/include/asm/io.h rename to arch/powerpc/include/asm/io.h diff --git a/arch/ppc/include/asm/iopin_8260.h b/arch/powerpc/include/asm/iopin_8260.h similarity index 100% rename from arch/ppc/include/asm/iopin_8260.h rename to arch/powerpc/include/asm/iopin_8260.h diff --git a/arch/ppc/include/asm/iopin_85xx.h b/arch/powerpc/include/asm/iopin_85xx.h similarity index 100% rename from arch/ppc/include/asm/iopin_85xx.h rename to arch/powerpc/include/asm/iopin_85xx.h diff --git a/arch/ppc/include/asm/iopin_8xx.h b/arch/powerpc/include/asm/iopin_8xx.h similarity index 100% rename from arch/ppc/include/asm/iopin_8xx.h rename to arch/powerpc/include/asm/iopin_8xx.h diff --git a/arch/ppc/include/asm/m8260_pci.h b/arch/powerpc/include/asm/m8260_pci.h similarity index 100% rename from arch/ppc/include/asm/m8260_pci.h rename to arch/powerpc/include/asm/m8260_pci.h diff --git a/arch/ppc/include/asm/mc146818rtc.h b/arch/powerpc/include/asm/mc146818rtc.h similarity index 100% rename from arch/ppc/include/asm/mc146818rtc.h rename to arch/powerpc/include/asm/mc146818rtc.h diff --git a/arch/ppc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h similarity index 100% rename from arch/ppc/include/asm/mmu.h rename to arch/powerpc/include/asm/mmu.h diff --git a/arch/ppc/include/asm/mp.h b/arch/powerpc/include/asm/mp.h similarity index 100% rename from arch/ppc/include/asm/mp.h rename to arch/powerpc/include/asm/mp.h diff --git a/arch/ppc/include/asm/mpc512x.h b/arch/powerpc/include/asm/mpc512x.h similarity index 100% rename from arch/ppc/include/asm/mpc512x.h rename to arch/powerpc/include/asm/mpc512x.h diff --git a/arch/ppc/include/asm/mpc8349_pci.h b/arch/powerpc/include/asm/mpc8349_pci.h similarity index 100% rename from arch/ppc/include/asm/mpc8349_pci.h rename to arch/powerpc/include/asm/mpc8349_pci.h diff --git a/arch/ppc/include/asm/mpc8xxx_spi.h b/arch/powerpc/include/asm/mpc8xxx_spi.h similarity index 100% rename from arch/ppc/include/asm/mpc8xxx_spi.h rename to arch/powerpc/include/asm/mpc8xxx_spi.h diff --git a/arch/ppc/include/asm/pci_io.h b/arch/powerpc/include/asm/pci_io.h similarity index 100% rename from arch/ppc/include/asm/pci_io.h rename to arch/powerpc/include/asm/pci_io.h diff --git a/arch/ppc/include/asm/pnp.h b/arch/powerpc/include/asm/pnp.h similarity index 100% rename from arch/ppc/include/asm/pnp.h rename to arch/powerpc/include/asm/pnp.h diff --git a/arch/ppc/include/asm/posix_types.h b/arch/powerpc/include/asm/posix_types.h similarity index 100% rename from arch/ppc/include/asm/posix_types.h rename to arch/powerpc/include/asm/posix_types.h diff --git a/arch/ppc/include/asm/ppc4xx-ebc.h b/arch/powerpc/include/asm/ppc4xx-ebc.h similarity index 100% rename from arch/ppc/include/asm/ppc4xx-ebc.h rename to arch/powerpc/include/asm/ppc4xx-ebc.h diff --git a/arch/ppc/include/asm/ppc4xx-isram.h b/arch/powerpc/include/asm/ppc4xx-isram.h similarity index 100% rename from arch/ppc/include/asm/ppc4xx-isram.h rename to arch/powerpc/include/asm/ppc4xx-isram.h diff --git a/arch/ppc/include/asm/ppc4xx-sdram.h b/arch/powerpc/include/asm/ppc4xx-sdram.h similarity index 100% rename from arch/ppc/include/asm/ppc4xx-sdram.h rename to arch/powerpc/include/asm/ppc4xx-sdram.h diff --git a/arch/ppc/include/asm/ppc4xx-uic.h b/arch/powerpc/include/asm/ppc4xx-uic.h similarity index 100% rename from arch/ppc/include/asm/ppc4xx-uic.h rename to arch/powerpc/include/asm/ppc4xx-uic.h diff --git a/arch/ppc/include/asm/ppc4xx_config.h b/arch/powerpc/include/asm/ppc4xx_config.h similarity index 100% rename from arch/ppc/include/asm/ppc4xx_config.h rename to arch/powerpc/include/asm/ppc4xx_config.h diff --git a/arch/ppc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h similarity index 100% rename from arch/ppc/include/asm/processor.h rename to arch/powerpc/include/asm/processor.h diff --git a/arch/ppc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h similarity index 97% rename from arch/ppc/include/asm/ptrace.h rename to arch/powerpc/include/asm/ptrace.h index 196613b9f1..cf09edf156 100644 --- a/arch/ppc/include/asm/ptrace.h +++ b/arch/powerpc/include/asm/ptrace.h @@ -14,7 +14,7 @@ * that the overall structure is a multiple of 16 bytes in length. * * Note that the offsets of the fields in this struct correspond with - * the PT_* values below. This simplifies arch/ppc/kernel/ptrace.c. + * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c. */ #include diff --git a/arch/ppc/include/asm/residual.h b/arch/powerpc/include/asm/residual.h similarity index 100% rename from arch/ppc/include/asm/residual.h rename to arch/powerpc/include/asm/residual.h diff --git a/arch/ppc/include/asm/sigcontext.h b/arch/powerpc/include/asm/sigcontext.h similarity index 100% rename from arch/ppc/include/asm/sigcontext.h rename to arch/powerpc/include/asm/sigcontext.h diff --git a/arch/ppc/include/asm/signal.h b/arch/powerpc/include/asm/signal.h similarity index 100% rename from arch/ppc/include/asm/signal.h rename to arch/powerpc/include/asm/signal.h diff --git a/arch/ppc/include/asm/status_led.h b/arch/powerpc/include/asm/status_led.h similarity index 100% rename from arch/ppc/include/asm/status_led.h rename to arch/powerpc/include/asm/status_led.h diff --git a/arch/ppc/include/asm/string.h b/arch/powerpc/include/asm/string.h similarity index 100% rename from arch/ppc/include/asm/string.h rename to arch/powerpc/include/asm/string.h diff --git a/arch/ppc/include/asm/types.h b/arch/powerpc/include/asm/types.h similarity index 100% rename from arch/ppc/include/asm/types.h rename to arch/powerpc/include/asm/types.h diff --git a/arch/ppc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h similarity index 100% rename from arch/ppc/include/asm/u-boot.h rename to arch/powerpc/include/asm/u-boot.h diff --git a/arch/ppc/include/asm/unaligned.h b/arch/powerpc/include/asm/unaligned.h similarity index 100% rename from arch/ppc/include/asm/unaligned.h rename to arch/powerpc/include/asm/unaligned.h diff --git a/arch/ppc/include/asm/xilinx_irq.h b/arch/powerpc/include/asm/xilinx_irq.h similarity index 100% rename from arch/ppc/include/asm/xilinx_irq.h rename to arch/powerpc/include/asm/xilinx_irq.h diff --git a/arch/ppc/lib/Makefile b/arch/powerpc/lib/Makefile similarity index 100% rename from arch/ppc/lib/Makefile rename to arch/powerpc/lib/Makefile diff --git a/arch/ppc/lib/bat_rw.c b/arch/powerpc/lib/bat_rw.c similarity index 100% rename from arch/ppc/lib/bat_rw.c rename to arch/powerpc/lib/bat_rw.c diff --git a/arch/ppc/lib/board.c b/arch/powerpc/lib/board.c similarity index 100% rename from arch/ppc/lib/board.c rename to arch/powerpc/lib/board.c diff --git a/arch/ppc/lib/bootm.c b/arch/powerpc/lib/bootm.c similarity index 100% rename from arch/ppc/lib/bootm.c rename to arch/powerpc/lib/bootm.c diff --git a/arch/ppc/lib/cache.c b/arch/powerpc/lib/cache.c similarity index 100% rename from arch/ppc/lib/cache.c rename to arch/powerpc/lib/cache.c diff --git a/arch/ppc/lib/extable.c b/arch/powerpc/lib/extable.c similarity index 100% rename from arch/ppc/lib/extable.c rename to arch/powerpc/lib/extable.c diff --git a/arch/ppc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c similarity index 100% rename from arch/ppc/lib/interrupts.c rename to arch/powerpc/lib/interrupts.c diff --git a/arch/ppc/lib/kgdb.c b/arch/powerpc/lib/kgdb.c similarity index 100% rename from arch/ppc/lib/kgdb.c rename to arch/powerpc/lib/kgdb.c diff --git a/arch/ppc/lib/ppccache.S b/arch/powerpc/lib/ppccache.S similarity index 100% rename from arch/ppc/lib/ppccache.S rename to arch/powerpc/lib/ppccache.S diff --git a/arch/ppc/lib/ppcstring.S b/arch/powerpc/lib/ppcstring.S similarity index 100% rename from arch/ppc/lib/ppcstring.S rename to arch/powerpc/lib/ppcstring.S diff --git a/arch/ppc/lib/reloc.S b/arch/powerpc/lib/reloc.S similarity index 100% rename from arch/ppc/lib/reloc.S rename to arch/powerpc/lib/reloc.S diff --git a/arch/ppc/lib/ticks.S b/arch/powerpc/lib/ticks.S similarity index 100% rename from arch/ppc/lib/ticks.S rename to arch/powerpc/lib/ticks.S diff --git a/arch/ppc/lib/time.c b/arch/powerpc/lib/time.c similarity index 100% rename from arch/ppc/lib/time.c rename to arch/powerpc/lib/time.c diff --git a/board/LEOX/elpt860/u-boot.lds b/board/LEOX/elpt860/u-boot.lds index e26792cc2f..1efdf7dc32 100644 --- a/board/LEOX/elpt860/u-boot.lds +++ b/board/LEOX/elpt860/u-boot.lds @@ -64,17 +64,17 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) lib/string.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/extable.o (.text) - arch/ppc/lib/time.o (.text) - arch/ppc/lib/ticks.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/extable.o (.text) + arch/powerpc/lib/time.o (.text) + arch/powerpc/lib/ticks.o (.text) . = env_offset; common/env_embedded.o (.text) diff --git a/board/LEOX/elpt860/u-boot.lds.debug b/board/LEOX/elpt860/u-boot.lds.debug index 707ff7a6b0..287fc2015d 100644 --- a/board/LEOX/elpt860/u-boot.lds.debug +++ b/board/LEOX/elpt860/u-boot.lds.debug @@ -64,7 +64,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/MAI/AmigaOneG3SE/u-boot.lds b/board/MAI/AmigaOneG3SE/u-boot.lds index 1f55c6571d..e86ac56ad6 100644 --- a/board/MAI/AmigaOneG3SE/u-boot.lds +++ b/board/MAI/AmigaOneG3SE/u-boot.lds @@ -59,7 +59,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ common/env_embedded.o(.text) diff --git a/board/Marvell/common/ns16550.c b/board/Marvell/common/ns16550.c index 7fbf28a609..7839b68d42 100644 --- a/board/Marvell/common/ns16550.c +++ b/board/Marvell/common/ns16550.c @@ -1,6 +1,6 @@ /* * COM1 NS16550 support - * originally from linux source (arch/ppc/boot/ns16550.c) + * originally from linux source (arch/powerpc/boot/ns16550.c) * modified to use CONFIG_SYS_ISA_MEM and new defines * * further modified by Josh Huber to support diff --git a/board/Marvell/common/ns16550.h b/board/Marvell/common/ns16550.h index b9691ab5af..0a2951bce7 100644 --- a/board/Marvell/common/ns16550.h +++ b/board/Marvell/common/ns16550.h @@ -1,6 +1,6 @@ /* * NS16550 Serial Port - * originally from linux source (arch/ppc/boot/ns16550.h) + * originally from linux source (arch/powerpc/boot/ns16550.h) * modified slightly to * have addresses as offsets from CONFIG_SYS_ISA_BASE * added a few more definitions diff --git a/board/Marvell/db64360/mv_eth.c b/board/Marvell/db64360/mv_eth.c index dfc0bf7d30..d1ac0c5c58 100644 --- a/board/Marvell/db64360/mv_eth.c +++ b/board/Marvell/db64360/mv_eth.c @@ -1061,7 +1061,7 @@ bool db64360_eth_start (struct eth_device *dev) *************************************************************************/ /* * based on Linux code - * arch/ppc/galileo/EVB64360/mv64360_eth.c - Driver for MV64360X ethernet ports + * arch/powerpc/galileo/EVB64360/mv64360_eth.c - Driver for MV64360X ethernet ports * Copyright (C) 2002 rabeeh@galileo.co.il * This program is free software; you can redistribute it and/or diff --git a/board/Marvell/db64360/u-boot.lds b/board/Marvell/db64360/u-boot.lds index 6dff003dc1..29dcc09100 100644 --- a/board/Marvell/db64360/u-boot.lds +++ b/board/Marvell/db64360/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/Marvell/db64460/mv_eth.c b/board/Marvell/db64460/mv_eth.c index 0458164ef1..58b63a314b 100644 --- a/board/Marvell/db64460/mv_eth.c +++ b/board/Marvell/db64460/mv_eth.c @@ -1060,7 +1060,7 @@ bool db64460_eth_start (struct eth_device *dev) *************************************************************************/ /* * based on Linux code - * arch/ppc/galileo/EVB64460/mv64460_eth.c - Driver for MV64460X ethernet ports + * arch/powerpc/galileo/EVB64460/mv64460_eth.c - Driver for MV64460X ethernet ports * Copyright (C) 2002 rabeeh@galileo.co.il * This program is free software; you can redistribute it and/or diff --git a/board/Marvell/db64460/u-boot.lds b/board/Marvell/db64460/u-boot.lds index 6dff003dc1..29dcc09100 100644 --- a/board/Marvell/db64460/u-boot.lds +++ b/board/Marvell/db64460/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/RPXClassic/u-boot.lds b/board/RPXClassic/u-boot.lds index f7de95dc87..3f92a9dc43 100644 --- a/board/RPXClassic/u-boot.lds +++ b/board/RPXClassic/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/RPXClassic/u-boot.lds.debug b/board/RPXClassic/u-boot.lds.debug index 57cc305868..c21890542f 100644 --- a/board/RPXClassic/u-boot.lds.debug +++ b/board/RPXClassic/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/RPXlite/u-boot.lds b/board/RPXlite/u-boot.lds index f7de95dc87..3f92a9dc43 100644 --- a/board/RPXlite/u-boot.lds +++ b/board/RPXlite/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/RPXlite/u-boot.lds.debug b/board/RPXlite/u-boot.lds.debug index 57cc305868..c21890542f 100644 --- a/board/RPXlite/u-boot.lds.debug +++ b/board/RPXlite/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/RPXlite_dw/u-boot.lds b/board/RPXlite_dw/u-boot.lds index a2db9a6288..6bff2a800b 100644 --- a/board/RPXlite_dw/u-boot.lds +++ b/board/RPXlite_dw/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/RPXlite_dw/u-boot.lds.debug b/board/RPXlite_dw/u-boot.lds.debug index 723f562911..a78d0b76be 100644 --- a/board/RPXlite_dw/u-boot.lds.debug +++ b/board/RPXlite_dw/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/RRvision/u-boot.lds b/board/RRvision/u-boot.lds index b323768fb0..e426247c90 100644 --- a/board/RRvision/u-boot.lds +++ b/board/RRvision/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = env_offset; common/env_embedded.o (.ppcenv) diff --git a/board/adder/u-boot.lds b/board/adder/u-boot.lds index 018bcf1a26..dc6dd7ae66 100644 --- a/board/adder/u-boot.lds +++ b/board/adder/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds index bfca582715..e256b198d6 100644 --- a/board/amcc/acadia/u-boot-nand.lds +++ b/board/amcc/acadia/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds index bfca582715..e256b198d6 100644 --- a/board/amcc/bamboo/u-boot-nand.lds +++ b/board/amcc/bamboo/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index 71a5701916..23874d2667 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR; #define BOARD_ARCHES 4 /* - * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with + * Override the default functions in arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c with * board specific values. */ #if defined(CONFIG_ARCHES) diff --git a/board/amcc/canyonlands/u-boot-nand.lds b/board/amcc/canyonlands/u-boot-nand.lds index b04b05e38a..c71f0b7c0a 100644 --- a/board/amcc/canyonlands/u-boot-nand.lds +++ b/board/amcc/canyonlands/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x20000); diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c index 15291f96b5..0bbc75e7cf 100644 --- a/board/amcc/katmai/katmai.c +++ b/board/amcc/katmai/katmai.c @@ -249,7 +249,7 @@ int checkboard (void) } /* - * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with + * Override the default functions in arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c with * board specific values. */ u32 ddr_wrdtr(u32 default_val) { diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds index bfca582715..e256b198d6 100644 --- a/board/amcc/kilauea/u-boot-nand.lds +++ b/board/amcc/kilauea/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c index 6542565f08..4e12e9af12 100644 --- a/board/amcc/luan/luan.c +++ b/board/amcc/luan/luan.c @@ -119,7 +119,7 @@ int checkboard(void) } /* - * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with + * Override the default functions in arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c with * board specific values. */ u32 ddr_clktr(u32 default_val) { diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c index b5c7d6d506..cabeceb97a 100644 --- a/board/amcc/sequoia/sdram.c +++ b/board/amcc/sequoia/sdram.c @@ -40,7 +40,7 @@ extern int denali_wait_for_dlllock(void); extern void denali_core_search_data_eye(void); #if defined(CONFIG_NAND_SPL) -/* Using arch/ppc/cpu/ppc4xx/speed.c to calculate the bus frequency is too big +/* Using arch/powerpc/cpu/ppc4xx/speed.c to calculate the bus frequency is too big * for the 4k NAND boot image so define bus_frequency to 133MHz here * which is save for the refresh counter setup. */ diff --git a/board/amcc/sequoia/u-boot-nand.lds b/board/amcc/sequoia/u-boot-nand.lds index 8a71bfa44e..cf4229a22e 100644 --- a/board/amcc/sequoia/u-boot-nand.lds +++ b/board/amcc/sequoia/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/amcc/sequoia/u-boot-ram.lds b/board/amcc/sequoia/u-boot-ram.lds index c6a321e400..63e87c9886 100644 --- a/board/amcc/sequoia/u-boot-ram.lds +++ b/board/amcc/sequoia/u-boot-ram.lds @@ -50,7 +50,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) *(.text) *(.got1) diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c index 241f484491..0d23929903 100644 --- a/board/amcc/yucca/yucca.c +++ b/board/amcc/yucca/yucca.c @@ -555,7 +555,7 @@ int checkboard (void) } /* - * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with + * Override the default functions in arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c with * board specific values. */ static int ppc440spe_rev_a(void) diff --git a/board/amirix/ap1000/u-boot.lds b/board/amirix/ap1000/u-boot.lds index faeefe8bdd..bebcded619 100644 --- a/board/amirix/ap1000/u-boot.lds +++ b/board/amirix/ap1000/u-boot.lds @@ -55,17 +55,17 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) board/amirix/ap1000/init.o (.text) - arch/ppc/cpu/ppc4xx/kgdb.o (.text) - arch/ppc/cpu/ppc4xx/traps.o (.text) - arch/ppc/cpu/ppc4xx/interrupts.o (.text) - arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) - arch/ppc/cpu/ppc4xx/cpu_init.o (.text) - arch/ppc/cpu/ppc4xx/speed.o (.text) + arch/powerpc/cpu/ppc4xx/kgdb.o (.text) + arch/powerpc/cpu/ppc4xx/traps.o (.text) + arch/powerpc/cpu/ppc4xx/interrupts.o (.text) + arch/powerpc/cpu/ppc4xx/4xx_uart.o (.text) + arch/powerpc/cpu/ppc4xx/cpu_init.o (.text) + arch/powerpc/cpu/ppc4xx/speed.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) /* . = env_offset;*/ diff --git a/board/bmw/ns16550.c b/board/bmw/ns16550.c index 7250591030..be455bbefe 100644 --- a/board/bmw/ns16550.c +++ b/board/bmw/ns16550.c @@ -1,6 +1,6 @@ /* * COM1 NS16550 support - * originally from linux source (arch/ppc/boot/ns16550.c) + * originally from linux source (arch/powerpc/boot/ns16550.c) * modified to use CONFIG_SYS_ISA_MEM and new defines */ diff --git a/board/bmw/ns16550.h b/board/bmw/ns16550.h index 210aea4b2f..8aa251d32a 100644 --- a/board/bmw/ns16550.h +++ b/board/bmw/ns16550.h @@ -1,6 +1,6 @@ /* * NS16550 Serial Port - * originally from linux source (arch/ppc/boot/ns16550.h) + * originally from linux source (arch/powerpc/boot/ns16550.h) * modified slightly to * have addresses as offsets from CONFIG_SYS_ISA_BASE * added a few more definitions diff --git a/board/c2mon/u-boot.lds b/board/c2mon/u-boot.lds index 5bd5a75c61..36dd55dee4 100644 --- a/board/c2mon/u-boot.lds +++ b/board/c2mon/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/c2mon/u-boot.lds.debug b/board/c2mon/u-boot.lds.debug index e62f6be5aa..99098bffbe 100644 --- a/board/c2mon/u-boot.lds.debug +++ b/board/c2mon/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/cm5200/u-boot.lds b/board/cm5200/u-boot.lds index 30a37d9fb2..2d8492e6ff 100644 --- a/board/cm5200/u-boot.lds +++ b/board/cm5200/u-boot.lds @@ -50,7 +50,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc5xxx/start.o (.text) + arch/powerpc/cpu/mpc5xxx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/board/cogent/u-boot.lds.debug b/board/cogent/u-boot.lds.debug index 57cc305868..c21890542f 100644 --- a/board/cogent/u-boot.lds.debug +++ b/board/cogent/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/cray/L1/u-boot.lds.debug b/board/cray/L1/u-boot.lds.debug index 09c0191e5f..0e9cdcf81d 100644 --- a/board/cray/L1/u-boot.lds.debug +++ b/board/cray/L1/u-boot.lds.debug @@ -59,7 +59,7 @@ SECTIONS common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) common/env_embedded.o(.text) diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c index 5a00afe402..1ed3e1b6a4 100644 --- a/board/csb272/csb272.c +++ b/board/csb272/csb272.c @@ -129,7 +129,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in arch/ppc/cpu/ppc4xx + * in arch/powerpc/cpu/ppc4xx */ sdram_init(); diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c index 996a67b4ed..c138b0d9e8 100644 --- a/board/csb472/csb472.c +++ b/board/csb472/csb472.c @@ -97,7 +97,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in arch/ppc/cpu/ppc4xx + * in arch/powerpc/cpu/ppc4xx */ sdram_init(); diff --git a/board/eltec/bab7xx/u-boot.lds b/board/eltec/bab7xx/u-boot.lds index 6dff003dc1..29dcc09100 100644 --- a/board/eltec/bab7xx/u-boot.lds +++ b/board/eltec/bab7xx/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/eltec/elppc/u-boot.lds b/board/eltec/elppc/u-boot.lds index 6dff003dc1..29dcc09100 100644 --- a/board/eltec/elppc/u-boot.lds +++ b/board/eltec/elppc/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/eltec/mhpc/u-boot.lds b/board/eltec/mhpc/u-boot.lds index dc370eacf2..9fe9758c47 100644 --- a/board/eltec/mhpc/u-boot.lds +++ b/board/eltec/mhpc/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) diff --git a/board/eltec/mhpc/u-boot.lds.debug b/board/eltec/mhpc/u-boot.lds.debug index e62f6be5aa..99098bffbe 100644 --- a/board/eltec/mhpc/u-boot.lds.debug +++ b/board/eltec/mhpc/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/emk/top860/u-boot.lds b/board/emk/top860/u-boot.lds index 3fb6d12692..4f986f72c1 100644 --- a/board/emk/top860/u-boot.lds +++ b/board/emk/top860/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) diff --git a/board/emk/top860/u-boot.lds.debug b/board/emk/top860/u-boot.lds.debug index 3229a23a3e..0f536f3142 100644 --- a/board/emk/top860/u-boot.lds.debug +++ b/board/emk/top860/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/ep88x/u-boot.lds b/board/ep88x/u-boot.lds index f9579a6430..172caa5569 100644 --- a/board/ep88x/u-boot.lds +++ b/board/ep88x/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/board/eric/eric.c b/board/eric/eric.c index 96c0b8385d..d431204939 100644 --- a/board/eric/eric.c +++ b/board/eric/eric.c @@ -132,7 +132,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in arch/ppc/cpu/ppc4xx + * in arch/powerpc/cpu/ppc4xx */ sdram_init(); diff --git a/board/esd/cpci750/mv_eth.c b/board/esd/cpci750/mv_eth.c index 1c215277cf..dedf73455d 100644 --- a/board/esd/cpci750/mv_eth.c +++ b/board/esd/cpci750/mv_eth.c @@ -1062,7 +1062,7 @@ bool db64360_eth_start (struct eth_device *dev) *************************************************************************/ /* * based on Linux code - * arch/ppc/galileo/EVB64360/mv64360_eth.c - Driver for MV64360X ethernet ports + * arch/powerpc/galileo/EVB64360/mv64360_eth.c - Driver for MV64360X ethernet ports * Copyright (C) 2002 rabeeh@galileo.co.il * This program is free software; you can redistribute it and/or diff --git a/board/esd/cpci750/u-boot.lds b/board/esd/cpci750/u-boot.lds index 6dff003dc1..29dcc09100 100644 --- a/board/esd/cpci750/u-boot.lds +++ b/board/esd/cpci750/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/esd/dasa_sim/u-boot.lds b/board/esd/dasa_sim/u-boot.lds index 3d33d0f022..0e1d625a1b 100644 --- a/board/esd/dasa_sim/u-boot.lds +++ b/board/esd/dasa_sim/u-boot.lds @@ -57,7 +57,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/esd/pmc440/u-boot-nand.lds b/board/esd/pmc440/u-boot-nand.lds index 8a71bfa44e..cf4229a22e 100644 --- a/board/esd/pmc440/u-boot-nand.lds +++ b/board/esd/pmc440/u-boot-nand.lds @@ -53,7 +53,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) /* Align to next NAND block */ . = ALIGN(0x4000); diff --git a/board/esteem192e/u-boot.lds b/board/esteem192e/u-boot.lds index 4490f19a1f..5b6a9c0a1f 100644 --- a/board/esteem192e/u-boot.lds +++ b/board/esteem192e/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/etx094/u-boot.lds b/board/etx094/u-boot.lds index 94b13422af..28ac825c19 100644 --- a/board/etx094/u-boot.lds +++ b/board/etx094/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) - arch/ppc/cpu/mpc8xx/interrupts.o (.text) - arch/ppc/cpu/mpc8xx/serial.o (.text) - arch/ppc/cpu/mpc8xx/cpu_init.o (.text) - arch/ppc/cpu/mpc8xx/speed.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/interrupts.o (.text) + arch/powerpc/cpu/mpc8xx/serial.o (.text) + arch/powerpc/cpu/mpc8xx/cpu_init.o (.text) + arch/powerpc/cpu/mpc8xx/speed.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/etx094/u-boot.lds.debug b/board/etx094/u-boot.lds.debug index 458d4e076c..be05d8fdcc 100644 --- a/board/etx094/u-boot.lds.debug +++ b/board/etx094/u-boot.lds.debug @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) - arch/ppc/cpu/mpc8xx/interrupts.o (.text) - arch/ppc/cpu/mpc8xx/cpu.o (.text) - arch/ppc/cpu/mpc8xx/cpu_init.o (.text) - arch/ppc/cpu/mpc8xx/speed.o (.text) - arch/ppc/cpu/mpc8xx/serial.o (.text) - arch/ppc/lib/extable.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/interrupts.o (.text) + arch/powerpc/cpu/mpc8xx/cpu.o (.text) + arch/powerpc/cpu/mpc8xx/cpu_init.o (.text) + arch/powerpc/cpu/mpc8xx/speed.o (.text) + arch/powerpc/cpu/mpc8xx/serial.o (.text) + arch/powerpc/lib/extable.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/string.o (.text) lib/crc32.o (.text) common/dlmalloc.o (.text) diff --git a/board/evb64260/u-boot.lds b/board/evb64260/u-boot.lds index 6dff003dc1..29dcc09100 100644 --- a/board/evb64260/u-boot.lds +++ b/board/evb64260/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/fads/u-boot.lds b/board/fads/u-boot.lds index d6476cdb71..100c9804da 100644 --- a/board/fads/u-boot.lds +++ b/board/fads/u-boot.lds @@ -50,7 +50,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) /*. = DEFINED(env_offset) ? env_offset : .;*/ common/env_embedded.o (.ppcenv) diff --git a/board/fads/u-boot.lds.debug b/board/fads/u-boot.lds.debug index 61c0d68d78..a7a67a9276 100644 --- a/board/fads/u-boot.lds.debug +++ b/board/fads/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/flagadm/u-boot.lds b/board/flagadm/u-boot.lds index fbfba6ec9a..0da55d9791 100644 --- a/board/flagadm/u-boot.lds +++ b/board/flagadm/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) diff --git a/board/flagadm/u-boot.lds.debug b/board/flagadm/u-boot.lds.debug index e62f6be5aa..99098bffbe 100644 --- a/board/flagadm/u-boot.lds.debug +++ b/board/flagadm/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/freescale/mpc7448hpc2/tsi108_init.c b/board/freescale/mpc7448hpc2/tsi108_init.c index c6a3ade2c3..e1c63f8e37 100644 --- a/board/freescale/mpc7448hpc2/tsi108_init.c +++ b/board/freescale/mpc7448hpc2/tsi108_init.c @@ -323,7 +323,7 @@ int board_early_init_r (void) * We will over-ride the env_init called in board_init_f * This is really a work-around because, the HLP bank 1 * where NVRAM resides is not visible during board_init_f - * (arch/ppc/lib/board.c) + * (arch/powerpc/lib/board.c) * Alternatively, we could use the I2C EEPROM at start-up to configure * and enable all HLP banks and not just HLP 0 as is being done for * Taiga Rev. 2. diff --git a/board/freescale/mpc7448hpc2/u-boot.lds b/board/freescale/mpc7448hpc2/u-boot.lds index c4266cec50..3b3fb3a5c3 100644 --- a/board/freescale/mpc7448hpc2/u-boot.lds +++ b/board/freescale/mpc7448hpc2/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/freescale/mpc8610hpcd/u-boot.lds b/board/freescale/mpc8610hpcd/u-boot.lds index 1f9f8eb949..9c98b2a3cf 100644 --- a/board/freescale/mpc8610hpcd/u-boot.lds +++ b/board/freescale/mpc8610hpcd/u-boot.lds @@ -50,15 +50,15 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc86xx/start.o (.text) - arch/ppc/cpu/mpc86xx/traps.o (.text) - arch/ppc/cpu/mpc86xx/interrupts.o (.text) - arch/ppc/cpu/mpc86xx/cpu_init.o (.text) - arch/ppc/cpu/mpc86xx/cpu.o (.text) - arch/ppc/cpu/mpc86xx/speed.o (.text) + arch/powerpc/cpu/mpc86xx/start.o (.text) + arch/powerpc/cpu/mpc86xx/traps.o (.text) + arch/powerpc/cpu/mpc86xx/interrupts.o (.text) + arch/powerpc/cpu/mpc86xx/cpu_init.o (.text) + arch/powerpc/cpu/mpc86xx/cpu.o (.text) + arch/powerpc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) *(.text) *(.got1) diff --git a/board/freescale/mpc8641hpcn/u-boot.lds b/board/freescale/mpc8641hpcn/u-boot.lds index d7c65ce217..5bf0f2d46b 100644 --- a/board/freescale/mpc8641hpcn/u-boot.lds +++ b/board/freescale/mpc8641hpcn/u-boot.lds @@ -50,15 +50,15 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc86xx/start.o (.text) - arch/ppc/cpu/mpc86xx/traps.o (.text) - arch/ppc/cpu/mpc86xx/interrupts.o (.text) - arch/ppc/cpu/mpc86xx/cpu_init.o (.text) - arch/ppc/cpu/mpc86xx/cpu.o (.text) - arch/ppc/cpu/mpc86xx/speed.o (.text) + arch/powerpc/cpu/mpc86xx/start.o (.text) + arch/powerpc/cpu/mpc86xx/traps.o (.text) + arch/powerpc/cpu/mpc86xx/interrupts.o (.text) + arch/powerpc/cpu/mpc86xx/cpu_init.o (.text) + arch/powerpc/cpu/mpc86xx/cpu.o (.text) + arch/powerpc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) drivers/bios_emulator/atibios.o (.text) *(.text) diff --git a/board/gen860t/ioport.c b/board/gen860t/ioport.c index 146573e1df..8d4692533f 100644 --- a/board/gen860t/ioport.c +++ b/board/gen860t/ioport.c @@ -197,7 +197,7 @@ const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = { /* * Configure the MPC8XX I/O ports per the ioport configuration table - * (taken from ./arch/ppc/cpu/mpc8260/cpu_init.c) + * (taken from ./arch/powerpc/cpu/mpc8260/cpu_init.c) */ void config_mpc8xx_ioports (volatile immap_t * immr) { diff --git a/board/gen860t/u-boot-flashenv.lds b/board/gen860t/u-boot-flashenv.lds index 0e129253e7..35e92d1114 100644 --- a/board/gen860t/u-boot-flashenv.lds +++ b/board/gen860t/u-boot-flashenv.lds @@ -55,7 +55,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) } diff --git a/board/gen860t/u-boot.lds b/board/gen860t/u-boot.lds index d184379dbc..a4c3032116 100644 --- a/board/gen860t/u-boot.lds +++ b/board/gen860t/u-boot.lds @@ -54,7 +54,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) } diff --git a/board/genietv/u-boot.lds b/board/genietv/u-boot.lds index 22ada9ae1d..bcfdd87af4 100644 --- a/board/genietv/u-boot.lds +++ b/board/genietv/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/genietv/u-boot.lds.debug b/board/genietv/u-boot.lds.debug index e5aa625b5c..60936aaf34 100644 --- a/board/genietv/u-boot.lds.debug +++ b/board/genietv/u-boot.lds.debug @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/gth/u-boot.lds b/board/gth/u-boot.lds index 0e68e14142..4145a91c74 100644 --- a/board/gth/u-boot.lds +++ b/board/gth/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o(.text) + arch/powerpc/cpu/mpc8xx/start.o(.text) *(.text) common/env_embedded.o(.text) *(.got1) diff --git a/board/hermes/u-boot.lds b/board/hermes/u-boot.lds index 23e3e3bc5e..e121d65f7b 100644 --- a/board/hermes/u-boot.lds +++ b/board/hermes/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/cpu/mpc8xx/interrupts.o (.text) - arch/ppc/lib/time.o (.text) - arch/ppc/lib/ticks.o (.text) - arch/ppc/lib/cache.o (.text) + arch/powerpc/cpu/mpc8xx/interrupts.o (.text) + arch/powerpc/lib/time.o (.text) + arch/powerpc/lib/ticks.o (.text) + arch/powerpc/lib/cache.o (.text) lib/crc32.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/hermes/u-boot.lds.debug b/board/hermes/u-boot.lds.debug index 47e3927ec6..7038ebc1dc 100644 --- a/board/hermes/u-boot.lds.debug +++ b/board/hermes/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/lib/ppcstring.o (.text) - arch/ppc/cpu/mpc8xx/interrupts.o (.text) - arch/ppc/lib/time.o (.text) - arch/ppc/lib/ticks.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/lib/ppcstring.o (.text) + arch/powerpc/cpu/mpc8xx/interrupts.o (.text) + arch/powerpc/lib/time.o (.text) + arch/powerpc/lib/ticks.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/hmi1001/config.mk b/board/hmi1001/config.mk index aebf30411e..8ccf33e15c 100644 --- a/board/hmi1001/config.mk +++ b/board/hmi1001/config.mk @@ -39,4 +39,4 @@ TEXT_BASE = 0xFFF00000 endif PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds index 7086ced348..0897715a94 100644 --- a/board/hymod/u-boot.lds +++ b/board/hymod/u-boot.lds @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8260/start.o (.text) + arch/powerpc/cpu/mpc8260/start.o (.text) /* common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/hymod/u-boot.lds.debug b/board/hymod/u-boot.lds.debug index 57cc305868..c21890542f 100644 --- a/board/hymod/u-boot.lds.debug +++ b/board/hymod/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/icu862/u-boot.lds b/board/icu862/u-boot.lds index d6837005f6..7c5278adae 100644 --- a/board/icu862/u-boot.lds +++ b/board/icu862/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) /* - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/icu862/u-boot.lds.debug b/board/icu862/u-boot.lds.debug index b331d5afc1..9c1e3ecd8a 100644 --- a/board/icu862/u-boot.lds.debug +++ b/board/icu862/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/inka4x0/config.mk b/board/inka4x0/config.mk index 761efa1d17..9f6fb3b680 100644 --- a/board/inka4x0/config.mk +++ b/board/inka4x0/config.mk @@ -39,4 +39,4 @@ TEXT_BASE = 0xFFE00000 endif PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds diff --git a/board/ip860/u-boot.lds b/board/ip860/u-boot.lds index d856042373..4ac77c2985 100644 --- a/board/ip860/u-boot.lds +++ b/board/ip860/u-boot.lds @@ -55,12 +55,12 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) - arch/ppc/cpu/mpc8xx/interrupts.o (.text) - arch/ppc/lib/time.o (.text) - arch/ppc/lib/ticks.o (.text) + arch/powerpc/lib/ppcstring.o (.text) + arch/powerpc/cpu/mpc8xx/interrupts.o (.text) + arch/powerpc/lib/time.o (.text) + arch/powerpc/lib/ticks.o (.text) /** . = env_offset; common/env_embedded.o(.text) diff --git a/board/ip860/u-boot.lds.debug b/board/ip860/u-boot.lds.debug index dd39b9ac79..0c0bbb8f5d 100644 --- a/board/ip860/u-boot.lds.debug +++ b/board/ip860/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/lib/ppcstring.o (.text) - arch/ppc/cpu/mpc8xx/interrupts.o (.text) - arch/ppc/lib/time.o (.text) - arch/ppc/lib/ticks.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/lib/ppcstring.o (.text) + arch/powerpc/cpu/mpc8xx/interrupts.o (.text) + arch/powerpc/lib/time.o (.text) + arch/powerpc/lib/ticks.o (.text) /** . = env_offset; common/env_embedded.o(.text) diff --git a/board/ivm/u-boot.lds b/board/ivm/u-boot.lds index 767408b52b..b6e08843fa 100644 --- a/board/ivm/u-boot.lds +++ b/board/ivm/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/ivm/u-boot.lds.debug b/board/ivm/u-boot.lds.debug index 5ec82f441d..6bcf167a0a 100644 --- a/board/ivm/u-boot.lds.debug +++ b/board/ivm/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/jse/jse.c b/board/jse/jse.c index e4c7b9dd94..fb39c84169 100644 --- a/board/jse/jse.c +++ b/board/jse/jse.c @@ -26,7 +26,7 @@ /* * This function is run very early, out of flash, and before devices are - * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue + * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue * of being in the init_sequence array. * * The SDRAM has been initialized already -- start.S:start called @@ -85,7 +85,7 @@ int board_pre_init (void) #endif /* - * This function is also called by arch/ppc/lib/board.c:board_init_f (it is + * This function is also called by arch/powerpc/lib/board.c:board_init_f (it is * also in the init_sequence array) but later. Many more things are * configured, but we are still running from flash. */ @@ -149,7 +149,7 @@ int checkboard (void) /* **** No more functions called by board_init_f. **** */ /* - * This function is called by arch/ppc/lib/board.c:board_init_r. At this + * This function is called by arch/powerpc/lib/board.c:board_init_r. At this * point, basic setup is done, U-Boot has been moved into SDRAM and * PCI has been set up. From here we done late setup. */ diff --git a/board/jse/sdram.c b/board/jse/sdram.c index a12ebde236..02eb6f2c3c 100644 --- a/board/jse/sdram.c +++ b/board/jse/sdram.c @@ -27,7 +27,7 @@ /* * this is even after checkboard. It returns the size of the SDRAM * that we have installed. This function is called by board_init_f - * in arch/ppc/lib/board.c to initialize the memory and return what I + * in arch/powerpc/lib/board.c to initialize the memory and return what I * found. */ phys_size_t initdram (int board_type) diff --git a/board/keymile/common/keymile_hdlc_enet.c b/board/keymile/common/keymile_hdlc_enet.c index ceddaf752e..ce5e4d6a45 100644 --- a/board/keymile/common/keymile_hdlc_enet.c +++ b/board/keymile/common/keymile_hdlc_enet.c @@ -2,7 +2,7 @@ * (C) Copyright 2008 * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. * - * Based in part on arch/ppc/cpu/mpc8260/ether_scc.c. + * Based in part on arch/powerpc/cpu/mpc8260/ether_scc.c. * * See file CREDITS for list of people who contributed to this * project. diff --git a/board/keymile/km8xx/km8xx_hdlc_enet.c b/board/keymile/km8xx/km8xx_hdlc_enet.c index 543deafb9e..04782884e4 100644 --- a/board/keymile/km8xx/km8xx_hdlc_enet.c +++ b/board/keymile/km8xx/km8xx_hdlc_enet.c @@ -2,7 +2,7 @@ * (C) Copyright 2008 * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. * - * Based in part on arch/ppc/cpu/mpc8xx/scc.c. + * Based in part on arch/powerpc/cpu/mpc8xx/scc.c. * * See file CREDITS for list of people who contributed to this * project. diff --git a/board/keymile/km8xx/u-boot.lds b/board/keymile/km8xx/u-boot.lds index 19936bd4b1..cba9c6c681 100644 --- a/board/keymile/km8xx/u-boot.lds +++ b/board/keymile/km8xx/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/keymile/mgcoge/mgcoge_hdlc_enet.c b/board/keymile/mgcoge/mgcoge_hdlc_enet.c index 6b8e7eaf7e..98f68a6608 100644 --- a/board/keymile/mgcoge/mgcoge_hdlc_enet.c +++ b/board/keymile/mgcoge/mgcoge_hdlc_enet.c @@ -2,7 +2,7 @@ * (C) Copyright 2008 * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. * - * Based in part on arch/ppc/cpu/mpc8260/ether_scc.c. + * Based in part on arch/powerpc/cpu/mpc8260/ether_scc.c. * * See file CREDITS for list of people who contributed to this * project. diff --git a/board/korat/u-boot-F7FC.lds b/board/korat/u-boot-F7FC.lds index e483394539..4d73180cd1 100644 --- a/board/korat/u-boot-F7FC.lds +++ b/board/korat/u-boot-F7FC.lds @@ -33,7 +33,7 @@ SECTIONS .bootpg 0xF7FBF000 : { - arch/ppc/cpu/ppc4xx/start.o (.bootpg) + arch/powerpc/cpu/ppc4xx/start.o (.bootpg) } = 0xffff /* Read-only sections, merged into text segment: */ @@ -65,7 +65,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) *(.text) *(.got1) diff --git a/board/kup/kup4k/u-boot.lds b/board/kup/kup4k/u-boot.lds index 18cecaf510..369ef19a47 100644 --- a/board/kup/kup4k/u-boot.lds +++ b/board/kup/kup4k/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) /* - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/kup/kup4k/u-boot.lds.debug b/board/kup/kup4k/u-boot.lds.debug index 723f562911..a78d0b76be 100644 --- a/board/kup/kup4k/u-boot.lds.debug +++ b/board/kup/kup4k/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/kup/kup4x/u-boot.lds b/board/kup/kup4x/u-boot.lds index 18cecaf510..369ef19a47 100644 --- a/board/kup/kup4x/u-boot.lds +++ b/board/kup/kup4x/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) /* - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/kup/kup4x/u-boot.lds.debug b/board/kup/kup4x/u-boot.lds.debug index 723f562911..a78d0b76be 100644 --- a/board/kup/kup4x/u-boot.lds.debug +++ b/board/kup/kup4x/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/lantec/u-boot.lds b/board/lantec/u-boot.lds index 160f5cf386..9fd4d1c61c 100644 --- a/board/lantec/u-boot.lds +++ b/board/lantec/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/lantec/u-boot.lds.debug b/board/lantec/u-boot.lds.debug index 172482f880..deea7e29fc 100644 --- a/board/lantec/u-boot.lds.debug +++ b/board/lantec/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/logicpd/zoom2/zoom2_serial.c b/board/logicpd/zoom2/zoom2_serial.c index cfbad13478..fcfe6247d0 100644 --- a/board/logicpd/zoom2/zoom2_serial.c +++ b/board/logicpd/zoom2/zoom2_serial.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA * - * This file was adapted from arch/ppc/cpu/mpc5xxx/serial.c + * This file was adapted from arch/powerpc/cpu/mpc5xxx/serial.c * */ diff --git a/board/lwmon/u-boot.lds b/board/lwmon/u-boot.lds index ff2f56640b..b871958f1b 100644 --- a/board/lwmon/u-boot.lds +++ b/board/lwmon/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/lwmon/u-boot.lds.debug b/board/lwmon/u-boot.lds.debug index fcf2cbb96d..131ad23c77 100644 --- a/board/lwmon/u-boot.lds.debug +++ b/board/lwmon/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/matrix_vision/mvsmr/u-boot.lds b/board/matrix_vision/mvsmr/u-boot.lds index cfbb6ef398..3e917a99c2 100644 --- a/board/matrix_vision/mvsmr/u-boot.lds +++ b/board/matrix_vision/mvsmr/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS { /* WARNING - the following is hand-optimized to fit within */ /* the first two sectors (=8KB) of our S29GL flash chip */ - cpu/mpc5xxx/start.o (.text) - cpu/mpc5xxx/traps.o (.text) - lib_generic/crc32.o (.text) - lib_ppc/cache.o (.text) - lib_ppc/time.o (.text) + arch/powerpc/cpu/mpc5xxx/start.o (.text) + arch/powerpc/cpu/mpc5xxx/traps.o (.text) + lib/crc32.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) /* This is only needed to force failure if size of above code will ever */ /* increase and grow into reserved space. */ diff --git a/board/mbx8xx/u-boot.lds b/board/mbx8xx/u-boot.lds index 3572f1ad32..f883e7f024 100644 --- a/board/mbx8xx/u-boot.lds +++ b/board/mbx8xx/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) diff --git a/board/mbx8xx/u-boot.lds.debug b/board/mbx8xx/u-boot.lds.debug index 61c0d68d78..a7a67a9276 100644 --- a/board/mbx8xx/u-boot.lds.debug +++ b/board/mbx8xx/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/mbx8xx/vpd.c b/board/mbx8xx/vpd.c index 3bc251d12d..1c99fd6c75 100644 --- a/board/mbx8xx/vpd.c +++ b/board/mbx8xx/vpd.c @@ -3,7 +3,7 @@ * Sysgo Real-Time Solutions, GmbH * Marius Groeger * - * Code in faintly related to linux/arch/ppc/8xx_io: + * Code in faintly related to linux/arch/powerpc/8xx_io: * MPC8xx CPM I2C interface. Copyright (c) 1999 Dan Malek (dmalek@jlc.net). * * This file implements functions to read the MBX's Vital Product Data diff --git a/board/ml2/u-boot.lds b/board/ml2/u-boot.lds index e382283ea2..950f857976 100644 --- a/board/ml2/u-boot.lds +++ b/board/ml2/u-boot.lds @@ -55,17 +55,17 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) board/ml2/init.o (.text) - arch/ppc/cpu/ppc4xx/kgdb.o (.text) - arch/ppc/cpu/ppc4xx/traps.o (.text) - arch/ppc/cpu/ppc4xx/interrupts.o (.text) - arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) - arch/ppc/cpu/ppc4xx/cpu_init.o (.text) - arch/ppc/cpu/ppc4xx/speed.o (.text) + arch/powerpc/cpu/ppc4xx/kgdb.o (.text) + arch/powerpc/cpu/ppc4xx/traps.o (.text) + arch/powerpc/cpu/ppc4xx/interrupts.o (.text) + arch/powerpc/cpu/ppc4xx/4xx_uart.o (.text) + arch/powerpc/cpu/ppc4xx/cpu_init.o (.text) + arch/powerpc/cpu/ppc4xx/speed.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) /* . = env_offset;*/ diff --git a/board/ml2/u-boot.lds.debug b/board/ml2/u-boot.lds.debug index 09c0191e5f..0e9cdcf81d 100644 --- a/board/ml2/u-boot.lds.debug +++ b/board/ml2/u-boot.lds.debug @@ -59,7 +59,7 @@ SECTIONS common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) common/env_embedded.o(.text) diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds index ed5492d45e..0116dde4df 100644 --- a/board/mousse/u-boot.lds +++ b/board/mousse/u-boot.lds @@ -52,9 +52,9 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc824x/start.o (.text) - arch/ppc/lib/board.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/cpu/mpc824x/start.o (.text) + arch/powerpc/lib/board.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/mousse/u-boot.lds.ram b/board/mousse/u-boot.lds.ram index d3169489b5..449d0645e4 100644 --- a/board/mousse/u-boot.lds.ram +++ b/board/mousse/u-boot.lds.ram @@ -37,7 +37,7 @@ SECTIONS PROVIDE(_f_init_rom = .); .init : { - arch/ppc/cpu/mpc824x/start.o (.text) + arch/powerpc/cpu/mpc824x/start.o (.text) *(.init) } > ram _init_size = SIZEOF(.init); diff --git a/board/mousse/u-boot.lds.rom b/board/mousse/u-boot.lds.rom index 2721fdc6f8..4f42b329d8 100644 --- a/board/mousse/u-boot.lds.rom +++ b/board/mousse/u-boot.lds.rom @@ -52,9 +52,9 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc824x/start.o (.text) + arch/powerpc/cpu/mpc824x/start.o (.text) common/board.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/mpl/pip405/u-boot.lds.debug b/board/mpl/pip405/u-boot.lds.debug index 09c0191e5f..0e9cdcf81d 100644 --- a/board/mpl/pip405/u-boot.lds.debug +++ b/board/mpl/pip405/u-boot.lds.debug @@ -59,7 +59,7 @@ SECTIONS common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) common/env_embedded.o(.text) diff --git a/board/mucmc52/config.mk b/board/mucmc52/config.mk index 4e9ee73e6a..6850728331 100644 --- a/board/mucmc52/config.mk +++ b/board/mucmc52/config.mk @@ -42,4 +42,4 @@ TEXT_BASE = 0xFFF00000 endif PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot.lds diff --git a/board/munices/u-boot.lds b/board/munices/u-boot.lds index 2cd6d3c1ad..4e27bc947d 100644 --- a/board/munices/u-boot.lds +++ b/board/munices/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc5xxx/start.o (.text) + arch/powerpc/cpu/mpc5xxx/start.o (.text) *(.text) *(.got1) . = ALIGN(16); diff --git a/board/nc650/u-boot.lds b/board/nc650/u-boot.lds index 90ca165c44..e89a9bc9cd 100644 --- a/board/nc650/u-boot.lds +++ b/board/nc650/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) } diff --git a/board/nc650/u-boot.lds.debug b/board/nc650/u-boot.lds.debug index 1405b1730b..770adf7891 100644 --- a/board/nc650/u-boot.lds.debug +++ b/board/nc650/u-boot.lds.debug @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) *(.text) *(.got1) } diff --git a/board/netphone/u-boot.lds b/board/netphone/u-boot.lds index d6e2404f9a..77aebe6b49 100644 --- a/board/netphone/u-boot.lds +++ b/board/netphone/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/netphone/u-boot.lds.debug b/board/netphone/u-boot.lds.debug index ec479b1533..df7b6adba4 100644 --- a/board/netphone/u-boot.lds.debug +++ b/board/netphone/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c index 1c99405bea..6fd6138223 100644 --- a/board/netstal/hcu4/hcu4.c +++ b/board/netstal/hcu4/hcu4.c @@ -34,7 +34,7 @@ DECLARE_GLOBAL_DATA_PTR; /* * This function is run very early, out of flash, and before devices are - * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue + * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue * of being in the init_sequence array. * * The SDRAM has been initialized already -- start.S:start called diff --git a/board/netstal/hcu5/README.txt b/board/netstal/hcu5/README.txt index 0be51925c1..c5737d043a 100644 --- a/board/netstal/hcu5/README.txt +++ b/board/netstal/hcu5/README.txt @@ -83,11 +83,11 @@ System-LEDs ??? (Analog zu HCU4 ???) Startup sequence ---------------- -(arch/ppc/cpu/ppc4xx/resetvec.S) +(arch/powerpc/cpu/ppc4xx/resetvec.S) depending on configs option call _start_440 _start_pci oder _start -(arch/ppc/cpu/ppc4xx/start.S) +(arch/powerpc/cpu/ppc4xx/start.S) _start_440: initialize register like @@ -109,7 +109,7 @@ _start: call cpu_init_f /* run low-level CPU init code (from Flash) */ call cpu_init_f - board_init_f: (arch/ppc/lib\board.c) + board_init_f: (arch/powerpc/lib\board.c) init_sequence defines a list of function to be called board_early_init_f: (board/netstal/hcu5/hcu5.c) We are using Bootstrap-Option A @@ -136,18 +136,18 @@ _start: * - board info struct Save local variables to board info struct call relocate_code() does not return - relocate_code: (arch/ppc/cpu/ppc4xx/start.S) + relocate_code: (arch/powerpc/cpu/ppc4xx/start.S) ------------------------------------------------------- From now on our copy is in RAM and we will run from there, starting with board_init_r ------------------------------------------------------- - board_init_r: (arch/ppc/lib\board.c) + board_init_r: (arch/powerpc/lib\board.c) setup bd function pointers trap_init flash_init: (board/netstal/hcu5/flash.c) /* setup for u-boot erase, update */ setup bd flash info - cpu_init_r: (arch/ppc/cpu/ppc4xx/cpu_init.c) + cpu_init_r: (arch/powerpc/cpu/ppc4xx/cpu_init.c) peripheral chip select in using defines like CONFIG_SYS_EBC_PB0A, CONFIG_SYS_EBC_PB0C from hcu5.h mem_malloc_init @@ -161,8 +161,8 @@ From now on our copy is in RAM and we will run from there, Most of the HW specific code for the HCU5 may be found in include/configs/hcu5.h board/netstal/hcu5/* -arch/ppc/cpu/ppc4xx/* -arch/ppc/lib/* +arch/powerpc/cpu/ppc4xx/* +arch/powerpc/lib/* include/ppc440.h Drivers for serial etc are found under drivers/ diff --git a/board/netstal/hcu5/hcu5.c b/board/netstal/hcu5/hcu5.c index 90433fe82d..5eb8efc524 100644 --- a/board/netstal/hcu5/hcu5.c +++ b/board/netstal/hcu5/hcu5.c @@ -49,7 +49,7 @@ extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* * This function is run very early, out of flash, and before devices are - * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue + * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue * of being in the init_sequence array. * * The SDRAM has been initialized already -- start.S:start called diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c index 87bc45edb4..ed28e209fa 100644 --- a/board/netstal/mcu25/mcu25.c +++ b/board/netstal/mcu25/mcu25.c @@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR; /* * This function is run very early, out of flash, and before devices are - * initialized. It is called by arch/ppc/lib/board.c:board_init_f by virtue + * initialized. It is called by arch/powerpc/lib/board.c:board_init_f by virtue * of being in the init_sequence array. * * The SDRAM has been initialized already -- start.S:start called diff --git a/board/netta/u-boot.lds b/board/netta/u-boot.lds index c4df378c97..9001767ef7 100644 --- a/board/netta/u-boot.lds +++ b/board/netta/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/netta/u-boot.lds.debug b/board/netta/u-boot.lds.debug index ec479b1533..df7b6adba4 100644 --- a/board/netta/u-boot.lds.debug +++ b/board/netta/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/netta2/u-boot.lds b/board/netta2/u-boot.lds index c4df378c97..9001767ef7 100644 --- a/board/netta2/u-boot.lds +++ b/board/netta2/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/netta2/u-boot.lds.debug b/board/netta2/u-boot.lds.debug index ec479b1533..df7b6adba4 100644 --- a/board/netta2/u-boot.lds.debug +++ b/board/netta2/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/netvia/u-boot.lds b/board/netvia/u-boot.lds index 6683361ea4..d05f80bb36 100644 --- a/board/netvia/u-boot.lds +++ b/board/netvia/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/netvia/u-boot.lds.debug b/board/netvia/u-boot.lds.debug index cef1a428bd..58202dc9f5 100644 --- a/board/netvia/u-boot.lds.debug +++ b/board/netvia/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/nx823/u-boot.lds b/board/nx823/u-boot.lds index dc370eacf2..9fe9758c47 100644 --- a/board/nx823/u-boot.lds +++ b/board/nx823/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) diff --git a/board/nx823/u-boot.lds.debug b/board/nx823/u-boot.lds.debug index e62f6be5aa..99098bffbe 100644 --- a/board/nx823/u-boot.lds.debug +++ b/board/nx823/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/pcippc2/u-boot.lds b/board/pcippc2/u-boot.lds index b2be328124..87d8c67949 100644 --- a/board/pcippc2/u-boot.lds +++ b/board/pcippc2/u-boot.lds @@ -59,7 +59,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c index bed385c44b..a6885d6895 100644 --- a/board/pcs440ep/pcs440ep.c +++ b/board/pcs440ep/pcs440ep.c @@ -148,7 +148,7 @@ int board_early_init_f(void) mtdcr(EBC0_CFGDATA, reg | 0x04000000); /* Set ATC */ /*-------------------------------------------------------------------- - * GPIO's are alreay setup in arch/ppc/cpu/ppc4xx/cpu_init.c + * GPIO's are alreay setup in arch/powerpc/cpu/ppc4xx/cpu_init.c * via define from board config file. *-------------------------------------------------------------------*/ diff --git a/board/ppmc7xx/u-boot.lds b/board/ppmc7xx/u-boot.lds index aae1057160..604d0d305d 100644 --- a/board/ppmc7xx/u-boot.lds +++ b/board/ppmc7xx/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/prodrive/p3mx/mv_eth.c b/board/prodrive/p3mx/mv_eth.c index 8203b3cbf1..8fcc1551e5 100644 --- a/board/prodrive/p3mx/mv_eth.c +++ b/board/prodrive/p3mx/mv_eth.c @@ -1137,7 +1137,7 @@ bool db64460_eth_start (struct eth_device *dev) *************************************************************************/ /* * based on Linux code - * arch/ppc/galileo/EVB64460/mv64460_eth.c - Driver for MV64460X ethernet ports + * arch/powerpc/galileo/EVB64460/mv64460_eth.c - Driver for MV64460X ethernet ports * Copyright (C) 2002 rabeeh@galileo.co.il * This program is free software; you can redistribute it and/or diff --git a/board/prodrive/p3mx/u-boot.lds b/board/prodrive/p3mx/u-boot.lds index 6dff003dc1..29dcc09100 100644 --- a/board/prodrive/p3mx/u-boot.lds +++ b/board/prodrive/p3mx/u-boot.lds @@ -56,7 +56,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/74xx_7xx/start.o (.text) + arch/powerpc/cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ diff --git a/board/quantum/u-boot.lds b/board/quantum/u-boot.lds index f7de95dc87..3f92a9dc43 100644 --- a/board/quantum/u-boot.lds +++ b/board/quantum/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/quantum/u-boot.lds.debug b/board/quantum/u-boot.lds.debug index a2b7bc70d9..f212fab28a 100644 --- a/board/quantum/u-boot.lds.debug +++ b/board/quantum/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/r360mpi/u-boot.lds b/board/r360mpi/u-boot.lds index 4fc18fcf2d..3cf0ba4bff 100644 --- a/board/r360mpi/u-boot.lds +++ b/board/r360mpi/u-boot.lds @@ -55,10 +55,10 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/cpu_init.o (.text) - arch/ppc/cpu/mpc8xx/interrupts.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/cpu_init.o (.text) + arch/powerpc/cpu/mpc8xx/interrupts.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) /*** . = env_offset; common/env_embedded.o (.text) diff --git a/board/rbc823/u-boot.lds b/board/rbc823/u-boot.lds index 2161501fff..f188b979a3 100644 --- a/board/rbc823/u-boot.lds +++ b/board/rbc823/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/rmu/u-boot.lds b/board/rmu/u-boot.lds index f7de95dc87..3f92a9dc43 100644 --- a/board/rmu/u-boot.lds +++ b/board/rmu/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/rmu/u-boot.lds.debug b/board/rmu/u-boot.lds.debug index a2b7bc70d9..f212fab28a 100644 --- a/board/rmu/u-boot.lds.debug +++ b/board/rmu/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds index 0c51d48127..7763c7fed7 100644 --- a/board/rsdproto/u-boot.lds +++ b/board/rsdproto/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8260/start.o (.text) + arch/powerpc/cpu/mpc8260/start.o (.text) *(.text) *(.got1) /*. = env_offset; */ diff --git a/board/sandburst/common/ppc440gx_i2c.c b/board/sandburst/common/ppc440gx_i2c.c index 007f875f0f..d286714919 100644 --- a/board/sandburst/common/ppc440gx_i2c.c +++ b/board/sandburst/common/ppc440gx_i2c.c @@ -21,7 +21,7 @@ */ /* - * Ported from arch/ppc/cpu/ppc4xx/i2c.c by AS HARNOIS by + * Ported from arch/powerpc/cpu/ppc4xx/i2c.c by AS HARNOIS by * Travis B. Sawyer * Sandburst Corporation. */ diff --git a/board/sandburst/karef/u-boot.lds.debug b/board/sandburst/karef/u-boot.lds.debug index c174398537..6b31b1e7ce 100644 --- a/board/sandburst/karef/u-boot.lds.debug +++ b/board/sandburst/karef/u-boot.lds.debug @@ -56,18 +56,18 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) board/sandburst/karef/init.o (.text) - arch/ppc/cpu/ppc4xx/kgdb.o (.text) - arch/ppc/cpu/ppc4xx/traps.o (.text) - arch/ppc/cpu/ppc4xx/interrupts.o (.text) - arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) - arch/ppc/cpu/ppc4xx/cpu_init.o (.text) - arch/ppc/cpu/ppc4xx/speed.o (.text) + arch/powerpc/cpu/ppc4xx/kgdb.o (.text) + arch/powerpc/cpu/ppc4xx/traps.o (.text) + arch/powerpc/cpu/ppc4xx/interrupts.o (.text) + arch/powerpc/cpu/ppc4xx/4xx_uart.o (.text) + arch/powerpc/cpu/ppc4xx/cpu_init.o (.text) + arch/powerpc/cpu/ppc4xx/speed.o (.text) drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) /* common/env_embedded.o(.text) */ diff --git a/board/sandburst/metrobox/u-boot.lds.debug b/board/sandburst/metrobox/u-boot.lds.debug index 845841607c..2fb3ad97dc 100644 --- a/board/sandburst/metrobox/u-boot.lds.debug +++ b/board/sandburst/metrobox/u-boot.lds.debug @@ -56,18 +56,18 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) board/sandburst/metrobox/init.o (.text) - arch/ppc/cpu/ppc4xx/kgdb.o (.text) - arch/ppc/cpu/ppc4xx/traps.o (.text) - arch/ppc/cpu/ppc4xx/interrupts.o (.text) - arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) - arch/ppc/cpu/ppc4xx/cpu_init.o (.text) - arch/ppc/cpu/ppc4xx/speed.o (.text) + arch/powerpc/cpu/ppc4xx/kgdb.o (.text) + arch/powerpc/cpu/ppc4xx/traps.o (.text) + arch/powerpc/cpu/ppc4xx/interrupts.o (.text) + arch/powerpc/cpu/ppc4xx/4xx_uart.o (.text) + arch/powerpc/cpu/ppc4xx/cpu_init.o (.text) + arch/powerpc/cpu/ppc4xx/speed.o (.text) drivers/net/4xx_enet.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) /* common/env_embedded.o(.text) */ diff --git a/board/sbc8641d/u-boot.lds b/board/sbc8641d/u-boot.lds index 2f8730bf2b..4cea3b30f0 100644 --- a/board/sbc8641d/u-boot.lds +++ b/board/sbc8641d/u-boot.lds @@ -50,15 +50,15 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc86xx/start.o (.text) - arch/ppc/cpu/mpc86xx/traps.o (.text) - arch/ppc/cpu/mpc86xx/interrupts.o (.text) - arch/ppc/cpu/mpc86xx/cpu_init.o (.text) - arch/ppc/cpu/mpc86xx/cpu.o (.text) - arch/ppc/cpu/mpc86xx/speed.o (.text) + arch/powerpc/cpu/mpc86xx/start.o (.text) + arch/powerpc/cpu/mpc86xx/traps.o (.text) + arch/powerpc/cpu/mpc86xx/interrupts.o (.text) + arch/powerpc/cpu/mpc86xx/cpu_init.o (.text) + arch/powerpc/cpu/mpc86xx/cpu.o (.text) + arch/powerpc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) *(.text) *(.got1) diff --git a/board/sc3/u-boot.lds b/board/sc3/u-boot.lds index 573fbee937..9b1a39bc84 100644 --- a/board/sc3/u-boot.lds +++ b/board/sc3/u-boot.lds @@ -60,17 +60,17 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) board/sc3/init.o (.text) - arch/ppc/cpu/ppc4xx/kgdb.o (.text) - arch/ppc/cpu/ppc4xx/traps.o (.text) - arch/ppc/cpu/ppc4xx/interrupts.o (.text) - arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) - arch/ppc/cpu/ppc4xx/cpu_init.o (.text) - arch/ppc/cpu/ppc4xx/speed.o (.text) + arch/powerpc/cpu/ppc4xx/kgdb.o (.text) + arch/powerpc/cpu/ppc4xx/traps.o (.text) + arch/powerpc/cpu/ppc4xx/interrupts.o (.text) + arch/powerpc/cpu/ppc4xx/4xx_uart.o (.text) + arch/powerpc/cpu/ppc4xx/cpu_init.o (.text) + arch/powerpc/cpu/ppc4xx/speed.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) /* . = env_offset;*/ diff --git a/board/siemens/CCM/u-boot.lds b/board/siemens/CCM/u-boot.lds index 5bd5a75c61..36dd55dee4 100644 --- a/board/siemens/CCM/u-boot.lds +++ b/board/siemens/CCM/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/siemens/CCM/u-boot.lds.debug b/board/siemens/CCM/u-boot.lds.debug index 460a983215..7e066b11e5 100644 --- a/board/siemens/CCM/u-boot.lds.debug +++ b/board/siemens/CCM/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/siemens/IAD210/u-boot.lds b/board/siemens/IAD210/u-boot.lds index 904d45fccc..a9b00cafae 100644 --- a/board/siemens/IAD210/u-boot.lds +++ b/board/siemens/IAD210/u-boot.lds @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) - arch/ppc/cpu/mpc8xx/interrupts.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/ppcstring.o (.text) + arch/powerpc/cpu/mpc8xx/interrupts.o (.text) + arch/powerpc/lib/time.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/siemens/pcu_e/u-boot.lds b/board/siemens/pcu_e/u-boot.lds index ff2f56640b..b871958f1b 100644 --- a/board/siemens/pcu_e/u-boot.lds +++ b/board/siemens/pcu_e/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/siemens/pcu_e/u-boot.lds.debug b/board/siemens/pcu_e/u-boot.lds.debug index fcf2cbb96d..131ad23c77 100644 --- a/board/siemens/pcu_e/u-boot.lds.debug +++ b/board/siemens/pcu_e/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/sixnet/u-boot.lds b/board/sixnet/u-boot.lds index c3e7f501cb..43a8e20f04 100644 --- a/board/sixnet/u-boot.lds +++ b/board/sixnet/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/snmc/qs850/u-boot.lds b/board/snmc/qs850/u-boot.lds index f2154c429b..1c008959fd 100644 --- a/board/snmc/qs850/u-boot.lds +++ b/board/snmc/qs850/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/snmc/qs860t/u-boot.lds b/board/snmc/qs860t/u-boot.lds index f2154c429b..1c008959fd 100644 --- a/board/snmc/qs860t/u-boot.lds +++ b/board/snmc/qs860t/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/spc1920/u-boot.lds b/board/spc1920/u-boot.lds index c000746c54..3631018116 100644 --- a/board/spc1920/u-boot.lds +++ b/board/spc1920/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/spd8xx/u-boot.lds b/board/spd8xx/u-boot.lds index c4d83574d6..8667774283 100644 --- a/board/spd8xx/u-boot.lds +++ b/board/spd8xx/u-boot.lds @@ -52,7 +52,7 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/env_embedded.o(.text) *(.text) *(.got1) diff --git a/board/spd8xx/u-boot.lds.debug b/board/spd8xx/u-boot.lds.debug index 61c0d68d78..a7a67a9276 100644 --- a/board/spd8xx/u-boot.lds.debug +++ b/board/spd8xx/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/stx/stxssa/stxssa.c b/board/stx/stxssa/stxssa.c index 678ec5850f..0b2584c6b1 100644 --- a/board/stx/stxssa/stxssa.c +++ b/board/stx/stxssa/stxssa.c @@ -259,7 +259,7 @@ board_early_init_f(void) #endif /* Why is the phy reset done _after_ the ethernet - * initialization in arch/ppc/lib/board.c? + * initialization in arch/powerpc/lib/board.c? * Do it here so it's done before the TSECs are used. */ reset_phy(); diff --git a/board/stx/stxxtc/u-boot.lds b/board/stx/stxxtc/u-boot.lds index c4df378c97..9001767ef7 100644 --- a/board/stx/stxxtc/u-boot.lds +++ b/board/stx/stxxtc/u-boot.lds @@ -52,15 +52,15 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.text) diff --git a/board/stx/stxxtc/u-boot.lds.debug b/board/stx/stxxtc/u-boot.lds.debug index ec479b1533..df7b6adba4 100644 --- a/board/stx/stxxtc/u-boot.lds.debug +++ b/board/stx/stxxtc/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/svm_sc8xx/u-boot.lds b/board/svm_sc8xx/u-boot.lds index 90270954e4..59f1844885 100644 --- a/board/svm_sc8xx/u-boot.lds +++ b/board/svm_sc8xx/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) . = env_offset; common/env_embedded.o (.ppcenv) diff --git a/board/svm_sc8xx/u-boot.lds.debug b/board/svm_sc8xx/u-boot.lds.debug index a2b7bc70d9..f212fab28a 100644 --- a/board/svm_sc8xx/u-boot.lds.debug +++ b/board/svm_sc8xx/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/tqc/tqm8xx/u-boot.lds b/board/tqc/tqm8xx/u-boot.lds index a2277c260d..32a3e2bf02 100644 --- a/board/tqc/tqm8xx/u-boot.lds +++ b/board/tqc/tqm8xx/u-boot.lds @@ -55,14 +55,14 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) + arch/powerpc/lib/cache.o (.text) . = DEFINED(env_offset) ? env_offset : .; common/env_embedded.o (.ppcenv) diff --git a/board/tqc/tqm8xx/u-boot.lds.debug b/board/tqc/tqm8xx/u-boot.lds.debug index 57cc305868..c21890542f 100644 --- a/board/tqc/tqm8xx/u-boot.lds.debug +++ b/board/tqc/tqm8xx/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/uc100/u-boot.lds b/board/uc100/u-boot.lds index f67b1d9c19..0d8f605946 100644 --- a/board/uc100/u-boot.lds +++ b/board/uc100/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) common/env_embedded.o (.text) diff --git a/board/uc100/u-boot.lds.debug b/board/uc100/u-boot.lds.debug index 84b338a75d..a7caa8d90a 100644 --- a/board/uc100/u-boot.lds.debug +++ b/board/uc100/u-boot.lds.debug @@ -55,7 +55,7 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) diff --git a/board/uc101/config.mk b/board/uc101/config.mk index aebf30411e..8ccf33e15c 100644 --- a/board/uc101/config.mk +++ b/board/uc101/config.mk @@ -39,4 +39,4 @@ TEXT_BASE = 0xFFF00000 endif PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board -LDSCRIPT := $(SRCTREE)/arch/ppc/cpu/mpc5xxx/u-boot-customlayout.lds +LDSCRIPT := $(SRCTREE)/arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds diff --git a/board/v37/u-boot.lds b/board/v37/u-boot.lds index bc47060f25..9bdc97fe4e 100644 --- a/board/v37/u-boot.lds +++ b/board/v37/u-boot.lds @@ -55,15 +55,15 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) - arch/ppc/cpu/mpc8xx/traps.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/traps.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) - arch/ppc/lib/cache.o (.text) - arch/ppc/lib/time.o (.text) + arch/powerpc/lib/cache.o (.text) + arch/powerpc/lib/time.o (.text) /* . = env_offset; diff --git a/board/w7o/u-boot.lds.debug b/board/w7o/u-boot.lds.debug index 369c15a18c..5ff67d13d4 100644 --- a/board/w7o/u-boot.lds.debug +++ b/board/w7o/u-boot.lds.debug @@ -59,7 +59,7 @@ SECTIONS common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) common/env_embedded.o(.text) diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c index 96a12d73e5..5c84e65a09 100644 --- a/board/w7o/w7o.c +++ b/board/w7o/w7o.c @@ -157,7 +157,7 @@ phys_size_t initdram (int board_type) /* * ToDo: Move the asm init routine sdram_init() to this C file, * or even better use some common ppc4xx code available - * in arch/ppc/cpu/ppc4xx + * in arch/powerpc/cpu/ppc4xx */ sdram_init(); diff --git a/board/westel/amx860/u-boot.lds b/board/westel/amx860/u-boot.lds index 5bd5a75c61..36dd55dee4 100644 --- a/board/westel/amx860/u-boot.lds +++ b/board/westel/amx860/u-boot.lds @@ -55,9 +55,9 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) - arch/ppc/lib/ppcstring.o (.text) + arch/powerpc/lib/ppcstring.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) lib/zlib.o (.text) diff --git a/board/westel/amx860/u-boot.lds.debug b/board/westel/amx860/u-boot.lds.debug index b331d5afc1..9c1e3ecd8a 100644 --- a/board/westel/amx860/u-boot.lds.debug +++ b/board/westel/amx860/u-boot.lds.debug @@ -55,11 +55,11 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/mpc8xx/start.o (.text) + arch/powerpc/cpu/mpc8xx/start.o (.text) common/dlmalloc.o (.text) lib/vsprintf.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) . = env_offset; common/env_embedded.o(.text) diff --git a/board/xes/xpedite1000/u-boot.lds.debug b/board/xes/xpedite1000/u-boot.lds.debug index c3f6fefb45..a7475785fa 100644 --- a/board/xes/xpedite1000/u-boot.lds.debug +++ b/board/xes/xpedite1000/u-boot.lds.debug @@ -55,17 +55,17 @@ SECTIONS /* WARNING - the following is hand-optimized to fit within */ /* the sector layout of our flash chips! XXX FIXME XXX */ - arch/ppc/cpu/ppc4xx/start.o (.text) + arch/powerpc/cpu/ppc4xx/start.o (.text) board/xes/xpedite1000/init.o (.text) - arch/ppc/cpu/ppc4xx/kgdb.o (.text) - arch/ppc/cpu/ppc4xx/traps.o (.text) - arch/ppc/cpu/ppc4xx/interrupts.o (.text) - arch/ppc/cpu/ppc4xx/4xx_uart.o (.text) - arch/ppc/cpu/ppc4xx/cpu_init.o (.text) - arch/ppc/cpu/ppc4xx/speed.o (.text) + arch/powerpc/cpu/ppc4xx/kgdb.o (.text) + arch/powerpc/cpu/ppc4xx/traps.o (.text) + arch/powerpc/cpu/ppc4xx/interrupts.o (.text) + arch/powerpc/cpu/ppc4xx/4xx_uart.o (.text) + arch/powerpc/cpu/ppc4xx/cpu_init.o (.text) + arch/powerpc/cpu/ppc4xx/speed.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) /* common/env_embedded.o(.text) */ diff --git a/board/xes/xpedite5170/u-boot.lds b/board/xes/xpedite5170/u-boot.lds index 2f8730bf2b..4cea3b30f0 100644 --- a/board/xes/xpedite5170/u-boot.lds +++ b/board/xes/xpedite5170/u-boot.lds @@ -50,15 +50,15 @@ SECTIONS .plt : { *(.plt) } .text : { - arch/ppc/cpu/mpc86xx/start.o (.text) - arch/ppc/cpu/mpc86xx/traps.o (.text) - arch/ppc/cpu/mpc86xx/interrupts.o (.text) - arch/ppc/cpu/mpc86xx/cpu_init.o (.text) - arch/ppc/cpu/mpc86xx/cpu.o (.text) - arch/ppc/cpu/mpc86xx/speed.o (.text) + arch/powerpc/cpu/mpc86xx/start.o (.text) + arch/powerpc/cpu/mpc86xx/traps.o (.text) + arch/powerpc/cpu/mpc86xx/interrupts.o (.text) + arch/powerpc/cpu/mpc86xx/cpu_init.o (.text) + arch/powerpc/cpu/mpc86xx/cpu.o (.text) + arch/powerpc/cpu/mpc86xx/speed.o (.text) common/dlmalloc.o (.text) lib/crc32.o (.text) - arch/ppc/lib/extable.o (.text) + arch/powerpc/lib/extable.o (.text) lib/zlib.o (.text) *(.text) *(.got1) diff --git a/board/xilinx/ppc405-generic/u-boot-rom.lds b/board/xilinx/ppc405-generic/u-boot-rom.lds index 8fafbd59c0..65d0e4dfd8 100644 --- a/board/xilinx/ppc405-generic/u-boot-rom.lds +++ b/board/xilinx/ppc405-generic/u-boot-rom.lds @@ -33,7 +33,7 @@ SECTIONS .bootpg 0xFFFFF000 : { - arch/ppc/cpu/ppc4xx/start.o (.bootpg) + arch/powerpc/cpu/ppc4xx/start.o (.bootpg) } = 0xffff /* Read-only sections, merged into text segment: */ diff --git a/board/xilinx/ppc440-generic/u-boot-rom.lds b/board/xilinx/ppc440-generic/u-boot-rom.lds index 0cbed8ea57..b8f8bedb81 100644 --- a/board/xilinx/ppc440-generic/u-boot-rom.lds +++ b/board/xilinx/ppc440-generic/u-boot-rom.lds @@ -33,7 +33,7 @@ SECTIONS .bootpg 0xFFFFF000 : { - arch/ppc/cpu/ppc4xx/start.o (.bootpg) + arch/powerpc/cpu/ppc4xx/start.o (.bootpg) } = 0xffff /* Read-only sections, merged into text segment: */ diff --git a/common/kgdb.c b/common/kgdb.c index 0531452a23..9e3b64c379 100644 --- a/common/kgdb.c +++ b/common/kgdb.c @@ -1,4 +1,4 @@ -/* taken from arch/ppc/kernel/ppc-stub.c */ +/* taken from arch/powerpc/kernel/ppc-stub.c */ /**************************************************************************** diff --git a/doc/README.IPHASE4539 b/doc/README.IPHASE4539 index b804e069a1..c5146d9b18 100644 --- a/doc/README.IPHASE4539 +++ b/doc/README.IPHASE4539 @@ -333,7 +333,7 @@ Linux: $ make oldconfig $ make dep $ make uImage - $ cp -p arch/ppc/mbxboot/uImage /tftpboot + $ cp -p arch/powerpc/mbxboot/uImage /tftpboot Load uImage via tftp and boot it. diff --git a/doc/README.PIP405 b/doc/README.PIP405 index e8a654128d..012db1c5f7 100644 --- a/doc/README.PIP405 +++ b/doc/README.PIP405 @@ -17,11 +17,11 @@ Changed files: added console settings from environment - common/devices.c added ISA keyboard init - common/main.c corrected the read of bootdelay -- arch/ppc/cpu/ppc4xx/405gp_pci.c excluded file from PIP405 -- arch/ppc/cpu/ppc4xx/i2c.c added 16bit read write I2C support +- arch/powerpc/cpu/ppc4xx/405gp_pci.c excluded file from PIP405 +- arch/powerpc/cpu/ppc4xx/i2c.c added 16bit read write I2C support added page write -- arch/ppc/cpu/ppc4xx/speed.c added get_PCI_freq -- arch/ppc/cpu/ppc4xx/start.S added CONFIG_IDENT_STRING +- arch/powerpc/cpu/ppc4xx/speed.c added get_PCI_freq +- arch/powerpc/cpu/ppc4xx/start.S added CONFIG_IDENT_STRING - disk/Makefile added part_iso for CD support - disk/part.c changed to work with block device description added ISO CD support @@ -275,7 +275,7 @@ Added the config variable CONFIG_IDENT_STRING which will be added to the "U_BOOT_VERSION __TIME__ DATE___ " String, to allows to identify intermidiate and custom versions. Changed files: -- arch/ppc/cpu/ppc4xx/start.s +- arch/powerpc/cpu/ppc4xx/start.s Firmware Image: --------------- @@ -288,11 +288,11 @@ Changed files: Correct PCI Frequency for PPC405: --------------------------------- -Added function (in arch/ppc/cpu/ppc4xx/speed.c) to get the PCI frequency for PPC405 CPU. +Added function (in arch/powerpc/cpu/ppc4xx/speed.c) to get the PCI frequency for PPC405 CPU. The PCI Frequency will now be set correct in the board description in common/board.c. (was set to the busfreq before). Changed files: -- arch/ppc/cpu/ppc4xx/speed.c +- arch/powerpc/cpu/ppc4xx/speed.c - common/board.c I2C Stuff: @@ -301,7 +301,7 @@ Added defined(CONFIG_PIP405) at several points in common/cmd_i2c.c. Added 16bit read/write support for I2C (PPC405), and page write to I2C EEPROM if defined CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE. Changed files: -- arch/ppc/cpu/ppc4xx/i2c.c +- arch/powerpc/cpu/ppc4xx/i2c.c - common/cmd_i2c.c Environment / Console: diff --git a/doc/README.POST b/doc/README.POST index 0d5e20e977..eeb218d39c 100644 --- a/doc/README.POST +++ b/doc/README.POST @@ -713,7 +713,7 @@ use external loopback for testing. That will need appropriate reconfiguration of the physical interface chip. The test routines for the SCC ethernet tests will be located in -arch/ppc/cpu/mpc8xx/scc.c. +arch/powerpc/cpu/mpc8xx/scc.c. 2.2.3.2. UART tests (SMC/SCC) @@ -725,7 +725,7 @@ will be transmitted. These tests may be enhanced to make to perform test will be executed manually. The test routine for the SMC/SCC UART tests will be located in -arch/ppc/cpu/mpc8xx/serial.c. +arch/powerpc/cpu/mpc8xx/serial.c. 2.2.3.3. USB test diff --git a/doc/README.RPXlite b/doc/README.RPXlite index 0aa4d11303..3ca671126d 100644 --- a/doc/README.RPXlite +++ b/doc/README.RPXlite @@ -116,7 +116,7 @@ board/RPXLITE/RPXLITE.c /* DRAM-related routines */ board/RPXLITE/flash.c /* flash-related routines */ board/RPXLITE/config.mk /* set text base address */ - arch/ppc/cpu/mpc8xx/serial.c /* board specific register setting */ + arch/powerpc/cpu/mpc8xx/serial.c /* board specific register setting */ include/config_RPXLITE.h /* board specific registers */ See 'reg_config.txt' for register values in detail. diff --git a/doc/README.TQM8260 b/doc/README.TQM8260 index e64e64a3e2..93b55068f5 100644 --- a/doc/README.TQM8260 +++ b/doc/README.TQM8260 @@ -14,10 +14,10 @@ The following common files have been modified by this project: MAKEALL - TQM8260 entry added Makefile - TQM8260_config entry added -arch/ppc/cpu/mpc8260/Makefile - soft_i2c.o module added -arch/ppc/cpu/mpc8260/ether_scc.c - TQM8260-specific definitions added, an obvious +arch/powerpc/cpu/mpc8260/Makefile - soft_i2c.o module added +arch/powerpc/cpu/mpc8260/ether_scc.c - TQM8260-specific definitions added, an obvious bug fixed (fcr -> scr) -arch/ppc/cpu/mpc8260/ether_fcc.c - TQM8260-specific definitions added +arch/powerpc/cpu/mpc8260/ether_fcc.c - TQM8260-specific definitions added include/flash.h - added definitions for the AM29LV640D Flash chip @@ -33,7 +33,7 @@ board/tqm8260/config.mk - config file board/tqm8260/flash.c - flash driver (for AM29LV640D) board/tqm8260/ppcboot.lds - linker script board/tqm8260/tqm8260.c - ioport and memory initialization -arch/ppc/cpu/mpc8260/soft_i2c.c - software i2c EEPROM driver +arch/powerpc/cpu/mpc8260/soft_i2c.c - software i2c EEPROM driver include/config_TQM8260.h - main configuration file diff --git a/doc/README.alaska8220 b/doc/README.alaska8220 index 9249cfb31e..334507397d 100644 --- a/doc/README.alaska8220 +++ b/doc/README.alaska8220 @@ -22,7 +22,7 @@ Changed files: - include/asm-ppc/global_data.h added global variables - inp_clk, pci_clk, vco_clk, pev_clk, flb_clk, and bExtUart -- arch/ppc/lib/board.c added CONFIG_MPC8220 support +- arch/powerpc/lib/board.c added CONFIG_MPC8220 support - net/eth.c added FEC support for MPC8220 @@ -37,24 +37,24 @@ Added files: - board/alaska/config.mk config make - board/alaska/u-boot.lds Linker description -- arch/ppc/cpu/mpc8220/dma.h multi-channel dma header file -- arch/ppc/cpu/mpc8220/dramSetup.h dram setup header file -- arch/ppc/cpu/mpc8220/fec.h MPC8220 FEC header file -- arch/ppc/cpu/mpc8220/cpu.c cpu specific code -- arch/ppc/cpu/mpc8220/cpu_init.c Flexbus ChipSelect and Mux pins setup -- arch/ppc/cpu/mpc8220/dramSetup.c MPC8220 DDR SDRAM setup -- arch/ppc/cpu/mpc8220/fec.c MPC8220 FEC driver -- arch/ppc/cpu/mpc8220/i2c.c MPC8220 I2C driver -- arch/ppc/cpu/mpc8220/interrupts.c interrupt support (not enable) -- arch/ppc/cpu/mpc8220/loadtask.c load dma -- arch/ppc/cpu/mpc8220/speed.c system, pci, flexbus, pev, and cpu clock -- arch/ppc/cpu/mpc8220/traps.c exception -- arch/ppc/cpu/mpc8220/uart.c MPC8220 UART driver -- arch/ppc/cpu/mpc8220/Makefile Makefile -- arch/ppc/cpu/mpc8220/config.mk config make -- arch/ppc/cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program -- arch/ppc/cpu/mpc8220/io.S io functions -- arch/ppc/cpu/mpc8220/start.S start up +- arch/powerpc/cpu/mpc8220/dma.h multi-channel dma header file +- arch/powerpc/cpu/mpc8220/dramSetup.h dram setup header file +- arch/powerpc/cpu/mpc8220/fec.h MPC8220 FEC header file +- arch/powerpc/cpu/mpc8220/cpu.c cpu specific code +- arch/powerpc/cpu/mpc8220/cpu_init.c Flexbus ChipSelect and Mux pins setup +- arch/powerpc/cpu/mpc8220/dramSetup.c MPC8220 DDR SDRAM setup +- arch/powerpc/cpu/mpc8220/fec.c MPC8220 FEC driver +- arch/powerpc/cpu/mpc8220/i2c.c MPC8220 I2C driver +- arch/powerpc/cpu/mpc8220/interrupts.c interrupt support (not enable) +- arch/powerpc/cpu/mpc8220/loadtask.c load dma +- arch/powerpc/cpu/mpc8220/speed.c system, pci, flexbus, pev, and cpu clock +- arch/powerpc/cpu/mpc8220/traps.c exception +- arch/powerpc/cpu/mpc8220/uart.c MPC8220 UART driver +- arch/powerpc/cpu/mpc8220/Makefile Makefile +- arch/powerpc/cpu/mpc8220/config.mk config make +- arch/powerpc/cpu/mpc8220/fec_dma_task.S MPC8220 FEC multi-channel dma program +- arch/powerpc/cpu/mpc8220/io.S io functions +- arch/powerpc/cpu/mpc8220/start.S start up - include/mpc8220.h diff --git a/doc/README.bedbug b/doc/README.bedbug index 4c1e6c4d5b..35e9d2706a 100644 --- a/doc/README.bedbug +++ b/doc/README.bedbug @@ -18,15 +18,15 @@ can be easily implemented. ./common/board.c Added call to initialize debugger on startup. -./arch/ppc/cpu/ppc4xx/Makefile +./arch/powerpc/cpu/ppc4xx/Makefile Added bedbug_405.c to the Makefile. -./arch/ppc/cpu/ppc4xx/start.S +./arch/powerpc/cpu/ppc4xx/start.S Added code to handle the debug exception (0x2000) on the 405. Also added code to handle critical exceptions since the debug is treated as critical on the 405. -./arch/ppc/cpu/ppc4xx/traps.c +./arch/powerpc/cpu/ppc4xx/traps.c Added more detailed output for the program exception to tell if it is an illegal instruction, privileged instruction or a trap. Also added debug trap handler. @@ -51,7 +51,7 @@ can be easily implemented. hardware breakpoints and stepping through code. These routines are common to all PowerPC processors. -./arch/ppc/cpu/ppc4xx/bedbug_405.c +./arch/powerpc/cpu/ppc4xx/bedbug_405.c AMCC PPC405 specific debugger routines. @@ -63,16 +63,16 @@ Changes: common/cmd_bedbug.c Added call to initialize 860 debugger. - arch/ppc/cpu/mpc8xx/Makefile + arch/powerpc/cpu/mpc8xx/Makefile Added new file "bedbug_860.c" to the makefile - arch/ppc/cpu/mpc8xx/start.S + arch/powerpc/cpu/mpc8xx/start.S Added handler for InstructionBreakpoint (0xfd00) - arch/ppc/cpu/mpc8xx/traps.c + arch/powerpc/cpu/mpc8xx/traps.c Added new routine DebugException() New Files: - arch/ppc/cpu/mpc8xx/bedbug_860.c + arch/powerpc/cpu/mpc8xx/bedbug_860.c CPU-specific routines for 860 debug registers. diff --git a/doc/README.mpc5xx b/doc/README.mpc5xx index 26fb0c27dc..df51b5cf5c 100644 --- a/doc/README.mpc5xx +++ b/doc/README.mpc5xx @@ -25,7 +25,7 @@ Added or Changed Files: u-boot-0.2.0/common/cmd_boot.c u-boot-0.2.0/common/cmd_reginfo.c u-boot-0.2.0/common/environment.c -u-boot-0.2.0/arch/ppc/cpu/mpc5xx/* +u-boot-0.2.0/arch/powerpc/cpu/mpc5xx/* u-boot-0.2.0/include/cmd_reginfo.h u-boot-0.2.0/include/common.h u-boot-0.2.0/include/ppc_asm.tmpl @@ -34,9 +34,9 @@ u-boot-0.2.0/include/mpc5xx.h u-boot-0.2.0/include/status_led.h u-boot-0.2.0/include/asm-ppc/u-boot.h u-boot-0.2.0/include/asm-ppc/5xx_immap.h -u-boot-0.2.0/arch/ppc/lib/board.c -u-boot-0.2.0/arch/ppc/lib/cache.c -u-boot-0.2.0/arch/ppc/lib/time.c +u-boot-0.2.0/arch/powerpc/lib/board.c +u-boot-0.2.0/arch/powerpc/lib/cache.c +u-boot-0.2.0/arch/powerpc/lib/time.c u-boot-0.2.0/Makefile u-boot-0.2.0/CREDITS u-boot-0.2.0/doc/README.mpc5xx diff --git a/doc/README.mpc85xxads b/doc/README.mpc85xxads index ae8202bdd1..046f981cf0 100644 --- a/doc/README.mpc85xxads +++ b/doc/README.mpc85xxads @@ -124,8 +124,8 @@ Updated 13-July-2004 Jon Loeliger kernel's ppcboot.h is consistent with U-Boot's u-boot.h. You can use two default configuration files as your starting points to configure the kernel: - arch/ppc/configs/mpc8540_ads_defconfig - arch/ppc/configs/mpc8560_ads_defconfig + arch/powerpc/configs/mpc8540_ads_defconfig + arch/powerpc/configs/mpc8560_ads_defconfig 3. DEFINITIONS AND COMPILATION diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 82e4eed806..87ee2c2408 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -1,5 +1,5 @@ /* - * arch/ppc/kernel/pci_auto.c + * arch/powerpc/kernel/pci_auto.c * * PCI autoconfiguration library * diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c index c1cc23bfcd..fa48feaf04 100644 --- a/drivers/qe/uec_phy.c +++ b/drivers/qe/uec_phy.c @@ -47,7 +47,7 @@ /*--------------------------------------------------------------------+ * Fixed PHY (PHY-less) support for Ethernet Ports. * - * Copied from arch/ppc/cpu/ppc4xx/4xx_enet.c + * Copied from arch/powerpc/cpu/ppc4xx/4xx_enet.c *--------------------------------------------------------------------*/ /* diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index b3bf10bb19..23c0f76dde 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -1,6 +1,6 @@ /* * COM1 NS16550 support - * originally from linux source (arch/ppc/boot/ns16550.c) + * originally from linux source (arch/powerpc/boot/ns16550.c) * modified to use CONFIG_SYS_ISA_MEM and new defines */ diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 687ffe6ace..44ab39dd3f 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc. - * With help from the common/soft_spi and arch/ppc/cpu/mpc8260 drivers + * With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers * * See file CREDITS for list of people who contributed to this * project. diff --git a/examples/api/Makefile b/examples/api/Makefile index bed16f1555..5b5f7a681c 100644 --- a/examples/api/Makefile +++ b/examples/api/Makefile @@ -20,7 +20,7 @@ # MA 02111-1307 USA # -ifeq ($(ARCH),ppc) +ifeq ($(ARCH),powerpc) LOAD_ADDR = 0x40000 endif ifeq ($(ARCH),arm) @@ -46,8 +46,8 @@ EXT_COBJ_FILES-$(CONFIG_API) += lib/div64.o EXT_COBJ_FILES-$(CONFIG_API) += lib/string.o EXT_COBJ_FILES-$(CONFIG_API) += lib/time.o EXT_COBJ_FILES-$(CONFIG_API) += lib/vsprintf.o -ifeq ($(ARCH),ppc) -EXT_SOBJ_FILES-$(CONFIG_API) += arch/ppc/lib/ppcstring.o +ifeq ($(ARCH),powerpc) +EXT_SOBJ_FILES-$(CONFIG_API) += arch/powerpc/lib/ppcstring.o endif # Create a list of source files so their dependencies can be auto-generated diff --git a/examples/standalone/mem_to_mem_idma2intr.c b/examples/standalone/mem_to_mem_idma2intr.c index eeff5f5f2d..f35f1ba5f6 100644 --- a/examples/standalone/mem_to_mem_idma2intr.c +++ b/examples/standalone/mem_to_mem_idma2intr.c @@ -1,5 +1,5 @@ /* The dpalloc function used and implemented in this file was derieved - * from PPCBoot/U-Boot file "arch/ppc/cpu/mpc8260/commproc.c". + * from PPCBoot/U-Boot file "arch/powerpc/cpu/mpc8260/commproc.c". */ /* Author: Arun Dharankar @@ -7,7 +7,7 @@ */ /* - * This file is based on "arch/ppc/8260_io/commproc.c" - here is it's + * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's * copyright notice: * * General Purpose functions for the global management of the diff --git a/include/configs/aria.h b/include/configs/aria.h index 06763c5d96..b6669e72a6 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -190,7 +190,7 @@ /* * Backward compatible definitions, - * so we do not have to change arch/ppc/cpu/mpc512x/fixed_sdram.c + * so we do not have to change arch/powerpc/cpu/mpc512x/fixed_sdram.c */ #define CONFIG_SYS_DDRCMD_EM2 (CONFIG_SYS_MICRON_EMR2) #define CONFIG_SYS_DDRCMD_EM3 (CONFIG_SYS_MICRON_EMR3) diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h index 44669ea44d..29951f7f12 100644 --- a/include/configs/galaxy5200.h +++ b/include/configs/galaxy5200.h @@ -141,7 +141,7 @@ #define CONFIG_SYS_FLASH_BASE 0xfe000000 /* - * The flash size is autoconfigured, but arch/ppc/cpu/mpc5xxx/cpu_init.c needs this + * The flash size is autoconfigured, but arch/powerpc/cpu/mpc5xxx/cpu_init.c needs this * variable defined */ #define CONFIG_SYS_FLASH_SIZE 0x02000000 diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index e5537da4af..48dc9463a8 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -230,7 +230,7 @@ * SDRAM Controller DDR autocalibration values and takes a lot longer * to run than Method_B. * (See the Method_A and Method_B algorithm discription in the file: - * arch/ppc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c) + * arch/powerpc/cpu/ppc4xx/4xx_ibm_ddr2_autocalib.c) * Define CONFIG_PPC4xx_DDR_METHOD_A to use DDR autocalibration Method_A * * DDR Autocalibration Method_B is the default. diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h index 3958d09eb9..6883e79e37 100644 --- a/include/configs/linkstation.h +++ b/include/configs/linkstation.h @@ -290,7 +290,7 @@ * taken from the orignal Linkstation boot code * * Most of the low level configuration setttings are normally used - * in arch/ppc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation. + * in arch/powerpc/cpu/mpc824x/cpu_init.c which is NOT used by this implementation. * Low level initialisation is done in board/linkstation/early_init.S * The values below are included for reference purpose only */ diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 2472187520..5538b18ef8 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -233,7 +233,7 @@ * Definitions for initial stack pointer and data area (in data cache) */ /* use on chip memory (OCM) for temperary stack until sdram is tested */ -/* see ./arch/ppc/cpu/ppc4xx/start.S */ +/* see ./arch/powerpc/cpu/ppc4xx/start.S */ #define CONFIG_SYS_TEMP_STACK_OCM 1 /* On Chip Memory location */ @@ -251,7 +251,7 @@ * Taken from PPCBoot board/icecube/icecube.h */ -/* see ./arch/ppc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/ndfc.c */ +/* see ./arch/powerpc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/ndfc.c */ #define CONFIG_SYS_EBC_PB0AP 0x04002480 /* AMD NOR flash - this corresponds to FLASH_BASE so may be correct */ #define CONFIG_SYS_EBC_PB0CR 0xFFC5A000 @@ -269,7 +269,7 @@ * * Taken in part from PPCBoot board/icecube/icecube.h */ -/* see ./arch/ppc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/start.S */ +/* see ./arch/powerpc/cpu/ppc4xx/cpu_init.c ./cpu/ppc4xx/start.S */ #define CONFIG_SYS_GPIO0_OSRH 0x55555550 #define CONFIG_SYS_GPIO0_OSRL 0x00000110 #define CONFIG_SYS_GPIO0_ISR1H 0x00000000 diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 7423663a26..61eb26ed84 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -456,7 +456,7 @@ * - internal SRAM (OCM=On Chip Memory) is placed to CONFIG_SYS_OCM_DATA_ADDR * - Stackpointer will be located to * (CONFIG_SYS_INIT_RAM_ADDR&0xFFFF0000) | (CONFIG_SYS_INIT_SP_OFFSET&0x0000FFFF) - * in arch/ppc/cpu/ppc4xx/start.S + * in arch/powerpc/cpu/ppc4xx/start.S */ #undef CONFIG_SYS_INIT_DCACHE_CS @@ -495,7 +495,7 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ /* ################################################################################### */ -/* These defines will be used in arch/ppc/cpu/ppc4xx/cpu_init.c to setup external chip selects */ +/* These defines will be used in arch/powerpc/cpu/ppc4xx/cpu_init.c to setup external chip selects */ /* They are currently undefined cause they are initiaized in board/solidcard3/init.S */ /* This chip select accesses the boot device */ diff --git a/include/ns16550.h b/include/ns16550.h index ce606b5738..9ea81e9463 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -1,6 +1,6 @@ /* * NS16550 Serial Port - * originally from linux source (arch/ppc/boot/ns16550.h) + * originally from linux source (arch/powerpc/boot/ns16550.h) * * Cleanup and unification * (C) 2009 by Detlev Zundel, DENX Software Engineering GmbH diff --git a/lib/div64.c b/lib/div64.c index d9951b597f..e688a91200 100644 --- a/lib/div64.c +++ b/lib/div64.c @@ -13,7 +13,7 @@ * * Code generated for this function might be very inefficient * for some CPUs. __div64_32() can be overridden by linking arch-specific - * assembly versions such as arch/ppc/lib/div64.S and arch/sh/lib/div64.S. + * assembly versions such as arch/powerpc/lib/div64.S and arch/sh/lib/div64.S. */ #include diff --git a/nand_spl/board/amcc/acadia/Makefile b/nand_spl/board/amcc/acadia/Makefile index fce4582c25..46fbe3c85b 100644 --- a/nand_spl/board/amcc/acadia/Makefile +++ b/nand_spl/board/amcc/acadia/Makefile @@ -68,11 +68,11 @@ $(nandobj)u-boot.lds: $(LDSCRIPT) # from cpu directory $(obj)cache.S: @rm -f $(obj)cache.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/cache.S $(obj)cache.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/cache.S $(obj)cache.S $(obj)gpio.c: @rm -f $(obj)gpio.c - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/gpio.c $(obj)gpio.c + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/gpio.c $(obj)gpio.c $(obj)ndfc.c: @rm -f $(obj)ndfc.c @@ -80,11 +80,11 @@ $(obj)ndfc.c: $(obj)resetvec.S: @rm -f $(obj)resetvec.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S $(obj)start.S: @rm -f $(obj)start.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/start.S $(obj)start.S # from board directory $(obj)memory.c: diff --git a/nand_spl/board/amcc/bamboo/Makefile b/nand_spl/board/amcc/bamboo/Makefile index 48fde1d1da..a114ca5f18 100644 --- a/nand_spl/board/amcc/bamboo/Makefile +++ b/nand_spl/board/amcc/bamboo/Makefile @@ -66,11 +66,11 @@ $(obj)ndfc.c: $(obj)resetvec.S: @rm -f $(obj)resetvec.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S $(obj)start.S: @rm -f $(obj)start.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/start.S $(obj)start.S # from board directory $(obj)init.S: diff --git a/nand_spl/board/amcc/canyonlands/Makefile b/nand_spl/board/amcc/canyonlands/Makefile index 0012a9c99b..e7982375fd 100644 --- a/nand_spl/board/amcc/canyonlands/Makefile +++ b/nand_spl/board/amcc/canyonlands/Makefile @@ -71,11 +71,11 @@ $(obj)ndfc.c: $(obj)resetvec.S: @rm -f $(obj)resetvec.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S $(obj)start.S: @rm -f $(obj)start.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/start.S $(obj)start.S # from board directory $(obj)init.S: diff --git a/nand_spl/board/amcc/kilauea/Makefile b/nand_spl/board/amcc/kilauea/Makefile index de4980a55c..a49ba0796e 100644 --- a/nand_spl/board/amcc/kilauea/Makefile +++ b/nand_spl/board/amcc/kilauea/Makefile @@ -62,15 +62,15 @@ $(nandobj)u-boot.lds: $(LDSCRIPT) # from cpu directory $(obj)44x_spd_ddr2.c: $(obj)ecc.h @rm -f $(obj)44x_spd_ddr2.c - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c $(obj)44x_spd_ddr2.c + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c $(obj)44x_spd_ddr2.c $(obj)cache.S: @rm -f $(obj)cache.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/cache.S $(obj)cache.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/cache.S $(obj)cache.S $(obj)ecc.h: @rm -f $(obj)ecc.h - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/ecc.h $(obj)ecc.h + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/ecc.h $(obj)ecc.h $(obj)ndfc.c: @rm -f $(obj)ndfc.c @@ -78,11 +78,11 @@ $(obj)ndfc.c: $(obj)resetvec.S: @rm -f $(obj)resetvec.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S $(obj)start.S: @rm -f $(obj)start.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/start.S $(obj)start.S # from nand_spl directory $(obj)nand_boot.c: diff --git a/nand_spl/board/amcc/sequoia/Makefile b/nand_spl/board/amcc/sequoia/Makefile index e6f96fd3bc..951fe46305 100644 --- a/nand_spl/board/amcc/sequoia/Makefile +++ b/nand_spl/board/amcc/sequoia/Makefile @@ -62,7 +62,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT) # from cpu directory $(obj)denali_data_eye.c: @rm -f $(obj)denali_data_eye.c - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/denali_data_eye.c $(obj)denali_data_eye.c + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/denali_data_eye.c $(obj)denali_data_eye.c $(obj)ndfc.c: @rm -f $(obj)ndfc.c @@ -70,11 +70,11 @@ $(obj)ndfc.c: $(obj)resetvec.S: @rm -f $(obj)resetvec.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/resetvec.S $(obj)resetvec.S $(obj)start.S: @rm -f $(obj)start.S - ln -s $(SRCTREE)/arch/ppc/cpu/ppc4xx/start.S $(obj)start.S + ln -s $(SRCTREE)/arch/powerpc/cpu/ppc4xx/start.S $(obj)start.S # from board directory $(obj)init.S: diff --git a/nand_spl/board/freescale/mpc8313erdb/Makefile b/nand_spl/board/freescale/mpc8313erdb/Makefile index a23176c78a..98edb09362 100644 --- a/nand_spl/board/freescale/mpc8313erdb/Makefile +++ b/nand_spl/board/freescale/mpc8313erdb/Makefile @@ -65,7 +65,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT) # create symbolic links for common files $(obj)start.S: - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc83xx/start.S $(obj)start.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/start.S $(obj)start.S $(obj)nand_boot_fsl_elbc.c: ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \ @@ -81,16 +81,16 @@ $(obj)ns16550.c: ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c $(obj)nand_init.c: - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c $(obj)cache.c: - ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c + ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c $(obj)time.c: - ln -sf $(SRCTREE)/arch/ppc/lib/time.c $(obj)time.c + ln -sf $(SRCTREE)/arch/powerpc/lib/time.c $(obj)time.c $(obj)ticks.S: - ln -sf $(SRCTREE)/arch/ppc/lib/ticks.S $(obj)ticks.S + ln -sf $(SRCTREE)/arch/powerpc/lib/ticks.S $(obj)ticks.S ######################################################################### diff --git a/nand_spl/board/freescale/mpc8315erdb/Makefile b/nand_spl/board/freescale/mpc8315erdb/Makefile index a23176c78a..98edb09362 100644 --- a/nand_spl/board/freescale/mpc8315erdb/Makefile +++ b/nand_spl/board/freescale/mpc8315erdb/Makefile @@ -65,7 +65,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT) # create symbolic links for common files $(obj)start.S: - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc83xx/start.S $(obj)start.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/start.S $(obj)start.S $(obj)nand_boot_fsl_elbc.c: ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \ @@ -81,16 +81,16 @@ $(obj)ns16550.c: ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c $(obj)nand_init.c: - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c $(obj)cache.c: - ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c + ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c $(obj)time.c: - ln -sf $(SRCTREE)/arch/ppc/lib/time.c $(obj)time.c + ln -sf $(SRCTREE)/arch/powerpc/lib/time.c $(obj)time.c $(obj)ticks.S: - ln -sf $(SRCTREE)/arch/ppc/lib/ticks.S $(obj)ticks.S + ln -sf $(SRCTREE)/arch/powerpc/lib/ticks.S $(obj)ticks.S ######################################################################### diff --git a/nand_spl/board/freescale/mpc8536ds/Makefile b/nand_spl/board/freescale/mpc8536ds/Makefile index 7f75afcb50..3d0936a4c5 100644 --- a/nand_spl/board/freescale/mpc8536ds/Makefile +++ b/nand_spl/board/freescale/mpc8536ds/Makefile @@ -64,15 +64,15 @@ $(nandobj)u-boot-spl: $(OBJS) $(obj)cache.c: @rm -f $(obj)cache.c - ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c + ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c $(obj)cpu_init_early.c: @rm -f $(obj)cpu_init_early.c - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c $(obj)cpu_init_nand.c: @rm -f $(obj)cpu_init_nand.c - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c $(obj)fsl_law.c: @rm -f $(obj)fsl_law.c @@ -97,15 +97,15 @@ $(obj)resetvec.S: $(obj)fixed_ivor.S: @rm -f $(obj)fixed_ivor.S - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S $(obj)start.S: $(obj)fixed_ivor.S @rm -f $(obj)start.S - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/start.S $(obj)start.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/start.S $(obj)start.S $(obj)tlb.c: @rm -f $(obj)tlb.c - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/tlb.c $(obj)tlb.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/tlb.c $(obj)tlb.c $(obj)tlb_table.c: @rm -f $(obj)tlb_table.c diff --git a/nand_spl/board/freescale/mpc8569mds/Makefile b/nand_spl/board/freescale/mpc8569mds/Makefile index 7f75afcb50..3d0936a4c5 100644 --- a/nand_spl/board/freescale/mpc8569mds/Makefile +++ b/nand_spl/board/freescale/mpc8569mds/Makefile @@ -64,15 +64,15 @@ $(nandobj)u-boot-spl: $(OBJS) $(obj)cache.c: @rm -f $(obj)cache.c - ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c + ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c $(obj)cpu_init_early.c: @rm -f $(obj)cpu_init_early.c - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c $(obj)cpu_init_nand.c: @rm -f $(obj)cpu_init_nand.c - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c $(obj)fsl_law.c: @rm -f $(obj)fsl_law.c @@ -97,15 +97,15 @@ $(obj)resetvec.S: $(obj)fixed_ivor.S: @rm -f $(obj)fixed_ivor.S - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S $(obj)start.S: $(obj)fixed_ivor.S @rm -f $(obj)start.S - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/start.S $(obj)start.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/start.S $(obj)start.S $(obj)tlb.c: @rm -f $(obj)tlb.c - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/tlb.c $(obj)tlb.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/tlb.c $(obj)tlb.c $(obj)tlb_table.c: @rm -f $(obj)tlb_table.c diff --git a/nand_spl/board/freescale/p1_p2_rdb/Makefile b/nand_spl/board/freescale/p1_p2_rdb/Makefile index 7f75afcb50..3d0936a4c5 100644 --- a/nand_spl/board/freescale/p1_p2_rdb/Makefile +++ b/nand_spl/board/freescale/p1_p2_rdb/Makefile @@ -64,15 +64,15 @@ $(nandobj)u-boot-spl: $(OBJS) $(obj)cache.c: @rm -f $(obj)cache.c - ln -sf $(SRCTREE)/arch/ppc/lib/cache.c $(obj)cache.c + ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c $(obj)cpu_init_early.c: @rm -f $(obj)cpu_init_early.c - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c $(obj)cpu_init_nand.c: @rm -f $(obj)cpu_init_nand.c - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c $(obj)fsl_law.c: @rm -f $(obj)fsl_law.c @@ -97,15 +97,15 @@ $(obj)resetvec.S: $(obj)fixed_ivor.S: @rm -f $(obj)fixed_ivor.S - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S $(obj)start.S: $(obj)fixed_ivor.S @rm -f $(obj)start.S - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/start.S $(obj)start.S + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/start.S $(obj)start.S $(obj)tlb.c: @rm -f $(obj)tlb.c - ln -sf $(SRCTREE)/arch/ppc/cpu/mpc85xx/tlb.c $(obj)tlb.c + ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/tlb.c $(obj)tlb.c $(obj)tlb_table.c: @rm -f $(obj)tlb_table.c diff --git a/nand_spl/board/sheldon/simpc8313/Makefile b/nand_spl/board/sheldon/simpc8313/Makefile index 3ad6250db5..2da61420a8 100644 --- a/nand_spl/board/sheldon/simpc8313/Makefile +++ b/nand_spl/board/sheldon/simpc8313/Makefile @@ -66,7 +66,7 @@ $(nandobj)u-boot.lds: $(LDSCRIPT) $(obj)start.S: @rm -f $@ - ln -s $(SRCTREE)/arch/ppc/cpu/mpc83xx/start.S $@ + ln -s $(SRCTREE)/arch/powerpc/cpu/mpc83xx/start.S $@ $(obj)nand_boot_fsl_elbc.c: @rm -f $@ @@ -86,19 +86,19 @@ $(obj)ns16550.c: $(obj)nand_init.c: @rm -f $@ - ln -s $(SRCTREE)/arch/ppc/cpu/mpc83xx/nand_init.c $@ + ln -s $(SRCTREE)/arch/powerpc/cpu/mpc83xx/nand_init.c $@ $(obj)cache.c: @rm -f $@ - ln -s $(SRCTREE)/arch/ppc/lib/cache.c $@ + ln -s $(SRCTREE)/arch/powerpc/lib/cache.c $@ $(obj)time.c: @rm -f $@ - ln -s $(SRCTREE)/arch/ppc/lib/time.c $@ + ln -s $(SRCTREE)/arch/powerpc/lib/time.c $@ $(obj)ticks.S: @rm -f $@ - ln -s $(SRCTREE)/arch/ppc/lib/ticks.S $@ + ln -s $(SRCTREE)/arch/powerpc/lib/ticks.S $@ ######################################################################### diff --git a/post/cpu/ppc4xx/spr.c b/post/cpu/ppc4xx/spr.c index 6ff5c79aa9..cb18b6436d 100644 --- a/post/cpu/ppc4xx/spr.c +++ b/post/cpu/ppc4xx/spr.c @@ -69,7 +69,7 @@ static struct { /* Additional Special-Purpose Registers. * The values must match the initialization - * values from arch/ppc/cpu/ppc4xx/start.S + * values from arch/powerpc/cpu/ppc4xx/start.S */ {0x30, "PID", 0x00000000, 0x00000000}, {0x3a, "CSRR0", 0x00000000, 0x00000000}, diff --git a/post/lib_ppc/Makefile b/post/lib_powerpc/Makefile similarity index 98% rename from post/lib_ppc/Makefile rename to post/lib_powerpc/Makefile index bd7a232992..0cd15cfa13 100644 --- a/post/lib_ppc/Makefile +++ b/post/lib_powerpc/Makefile @@ -22,7 +22,7 @@ # include $(TOPDIR)/config.mk -LIB = libpostppc.a +LIB = libpost$(ARCH).a AOBJS-$(CONFIG_HAS_POST) += asm.o COBJS-$(CONFIG_HAS_POST) += cpu.o cmp.o cmpi.o two.o twox.o three.o threex.o diff --git a/post/lib_ppc/andi.c b/post/lib_powerpc/andi.c similarity index 100% rename from post/lib_ppc/andi.c rename to post/lib_powerpc/andi.c diff --git a/post/lib_ppc/asm.S b/post/lib_powerpc/asm.S similarity index 100% rename from post/lib_ppc/asm.S rename to post/lib_powerpc/asm.S diff --git a/post/lib_ppc/b.c b/post/lib_powerpc/b.c similarity index 100% rename from post/lib_ppc/b.c rename to post/lib_powerpc/b.c diff --git a/post/lib_ppc/cmp.c b/post/lib_powerpc/cmp.c similarity index 100% rename from post/lib_ppc/cmp.c rename to post/lib_powerpc/cmp.c diff --git a/post/lib_ppc/cmpi.c b/post/lib_powerpc/cmpi.c similarity index 100% rename from post/lib_ppc/cmpi.c rename to post/lib_powerpc/cmpi.c diff --git a/post/lib_ppc/complex.c b/post/lib_powerpc/complex.c similarity index 100% rename from post/lib_ppc/complex.c rename to post/lib_powerpc/complex.c diff --git a/post/lib_ppc/cpu.c b/post/lib_powerpc/cpu.c similarity index 100% rename from post/lib_ppc/cpu.c rename to post/lib_powerpc/cpu.c diff --git a/post/lib_ppc/cpu_asm.h b/post/lib_powerpc/cpu_asm.h similarity index 100% rename from post/lib_ppc/cpu_asm.h rename to post/lib_powerpc/cpu_asm.h diff --git a/post/lib_ppc/cr.c b/post/lib_powerpc/cr.c similarity index 100% rename from post/lib_ppc/cr.c rename to post/lib_powerpc/cr.c diff --git a/post/lib_ppc/fpu/20001122-1.c b/post/lib_powerpc/fpu/20001122-1.c similarity index 100% rename from post/lib_ppc/fpu/20001122-1.c rename to post/lib_powerpc/fpu/20001122-1.c diff --git a/post/lib_ppc/fpu/20010114-2.c b/post/lib_powerpc/fpu/20010114-2.c similarity index 100% rename from post/lib_ppc/fpu/20010114-2.c rename to post/lib_powerpc/fpu/20010114-2.c diff --git a/post/lib_ppc/fpu/20010226-1.c b/post/lib_powerpc/fpu/20010226-1.c similarity index 100% rename from post/lib_ppc/fpu/20010226-1.c rename to post/lib_powerpc/fpu/20010226-1.c diff --git a/post/lib_ppc/fpu/980619-1.c b/post/lib_powerpc/fpu/980619-1.c similarity index 100% rename from post/lib_ppc/fpu/980619-1.c rename to post/lib_powerpc/fpu/980619-1.c diff --git a/post/lib_ppc/fpu/Makefile b/post/lib_powerpc/fpu/Makefile similarity index 97% rename from post/lib_ppc/fpu/Makefile rename to post/lib_powerpc/fpu/Makefile index a6815398e5..25726db73d 100644 --- a/post/lib_ppc/fpu/Makefile +++ b/post/lib_powerpc/fpu/Makefile @@ -22,7 +22,7 @@ # include $(TOPDIR)/config.mk -LIB = libpostppcfpu.a +LIB = libpost$(ARCH)fpu.a COBJS-$(CONFIG_HAS_POST) += fpu.o 20001122-1.o 20010114-2.o 20010226-1.o 980619-1.o COBJS-$(CONFIG_HAS_POST) += acc1.o compare-fp-1.o mul-subnormal-single-1.o diff --git a/post/lib_ppc/fpu/acc1.c b/post/lib_powerpc/fpu/acc1.c similarity index 100% rename from post/lib_ppc/fpu/acc1.c rename to post/lib_powerpc/fpu/acc1.c diff --git a/post/lib_ppc/fpu/compare-fp-1.c b/post/lib_powerpc/fpu/compare-fp-1.c similarity index 100% rename from post/lib_ppc/fpu/compare-fp-1.c rename to post/lib_powerpc/fpu/compare-fp-1.c diff --git a/post/lib_ppc/fpu/fpu.c b/post/lib_powerpc/fpu/fpu.c similarity index 100% rename from post/lib_ppc/fpu/fpu.c rename to post/lib_powerpc/fpu/fpu.c diff --git a/post/lib_ppc/fpu/mul-subnormal-single-1.c b/post/lib_powerpc/fpu/mul-subnormal-single-1.c similarity index 100% rename from post/lib_ppc/fpu/mul-subnormal-single-1.c rename to post/lib_powerpc/fpu/mul-subnormal-single-1.c diff --git a/post/lib_ppc/load.c b/post/lib_powerpc/load.c similarity index 100% rename from post/lib_ppc/load.c rename to post/lib_powerpc/load.c diff --git a/post/lib_ppc/multi.c b/post/lib_powerpc/multi.c similarity index 100% rename from post/lib_ppc/multi.c rename to post/lib_powerpc/multi.c diff --git a/post/lib_ppc/rlwimi.c b/post/lib_powerpc/rlwimi.c similarity index 100% rename from post/lib_ppc/rlwimi.c rename to post/lib_powerpc/rlwimi.c diff --git a/post/lib_ppc/rlwinm.c b/post/lib_powerpc/rlwinm.c similarity index 100% rename from post/lib_ppc/rlwinm.c rename to post/lib_powerpc/rlwinm.c diff --git a/post/lib_ppc/rlwnm.c b/post/lib_powerpc/rlwnm.c similarity index 100% rename from post/lib_ppc/rlwnm.c rename to post/lib_powerpc/rlwnm.c diff --git a/post/lib_ppc/srawi.c b/post/lib_powerpc/srawi.c similarity index 100% rename from post/lib_ppc/srawi.c rename to post/lib_powerpc/srawi.c diff --git a/post/lib_ppc/store.c b/post/lib_powerpc/store.c similarity index 100% rename from post/lib_ppc/store.c rename to post/lib_powerpc/store.c diff --git a/post/lib_ppc/string.c b/post/lib_powerpc/string.c similarity index 100% rename from post/lib_ppc/string.c rename to post/lib_powerpc/string.c diff --git a/post/lib_ppc/three.c b/post/lib_powerpc/three.c similarity index 100% rename from post/lib_ppc/three.c rename to post/lib_powerpc/three.c diff --git a/post/lib_ppc/threei.c b/post/lib_powerpc/threei.c similarity index 100% rename from post/lib_ppc/threei.c rename to post/lib_powerpc/threei.c diff --git a/post/lib_ppc/threex.c b/post/lib_powerpc/threex.c similarity index 100% rename from post/lib_ppc/threex.c rename to post/lib_powerpc/threex.c diff --git a/post/lib_ppc/two.c b/post/lib_powerpc/two.c similarity index 100% rename from post/lib_ppc/two.c rename to post/lib_powerpc/two.c diff --git a/post/lib_ppc/twox.c b/post/lib_powerpc/twox.c similarity index 100% rename from post/lib_ppc/twox.c rename to post/lib_powerpc/twox.c From 27ef578df7b9c7862c36a31b819c652f8b0aeea0 Mon Sep 17 00:00:00 2001 From: Rini van Zetten Date: Thu, 15 Apr 2010 16:03:05 +0200 Subject: [PATCH 15/76] mpc83xx: Use CONFIG_FSL_ESDHC to enable sdhc clk Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a platform define. This will enable all the 83xx platforms to use sdhc_clk based on CONFIG_FSL_ESDHC. It's the same patch as commit 6b9ea08c5010eab5ad1056bc9bf033afb672d9cc for the ppc/85xx. Signed-off-by: Rini Signed-off-by: Kim Phillips --- arch/powerpc/cpu/mpc83xx/speed.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index bde7e920a2..500eef1e9c 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -116,7 +116,7 @@ int get_clocks(void) #if defined(CONFIG_MPC8315) u32 tdm_clk; #endif -#if defined(CONFIG_MPC837x) +#if defined(CONFIG_FSL_ESDHC) u32 sdhc_clk; #endif u32 enc_clk; @@ -274,7 +274,7 @@ int get_clocks(void) return -7; } -#if defined(CONFIG_MPC837x) +#if defined(CONFIG_FSL_ESDHC) switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) { case 0: sdhc_clk = 0; @@ -321,7 +321,7 @@ int get_clocks(void) i2c1_clk = enc_clk; #elif defined(CONFIG_MPC831x) i2c1_clk = enc_clk; -#elif defined(CONFIG_MPC837x) +#elif defined(CONFIG_FSL_ESDHC) i2c1_clk = sdhc_clk; #endif #if !defined(CONFIG_MPC832x) @@ -455,7 +455,7 @@ int get_clocks(void) #if defined(CONFIG_MPC8315) gd->tdm_clk = tdm_clk; #endif -#if defined(CONFIG_MPC837x) +#if defined(CONFIG_FSL_ESDHC) gd->sdhc_clk = sdhc_clk; #endif gd->core_clk = core_clk; @@ -522,7 +522,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) #if defined(CONFIG_MPC8315) printf(" TDM: %-4s MHz\n", strmhz(buf, gd->tdm_clk)); #endif -#if defined(CONFIG_MPC837x) +#if defined(CONFIG_FSL_ESDHC) printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->sdhc_clk)); #endif #if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) From dfe812c744ee6dacae3b4d553694642668d9ac9d Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Thu, 15 Apr 2010 17:36:02 -0500 Subject: [PATCH 16/76] mpc83xx: use "A" nomenclature only on mpc834x and mpc836x families marketing didn't extend their postpend-with-an-A naming strategy on rev.2's and higher beyond the first two 83xx families. This patch stops us from misreporting we're running e.g., on an MPC8313EA, when such a name doesn't exist. Signed-off-by: Kim Phillips --- arch/powerpc/cpu/mpc83xx/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c index 51180d6daa..8b98a57758 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu.c +++ b/arch/powerpc/cpu/mpc83xx/cpu.c @@ -106,7 +106,9 @@ int checkcpu(void) puts(cpu_type_list[i].name); if (IS_E_PROCESSOR(spridr)) puts("E"); - if (REVID_MAJOR(spridr) >= 2) + if ((SPR_FAMILY(spridr) == SPR_834X_FAMILY || + SPR_FAMILY(spridr) == SPR_836X_FAMILY) && + REVID_MAJOR(spridr) >= 2) puts("A"); printf(", Rev: %d.%d", REVID_MAJOR(spridr), REVID_MINOR(spridr)); From a059e90e16e126e25da33ce23a37e2acce84284c Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Thu, 15 Apr 2010 17:36:05 -0500 Subject: [PATCH 17/76] mpc83xx: enable command line autocompletion because it's convenient. Signed-off-by: Kim Phillips --- include/configs/MPC8313ERDB.h | 2 +- include/configs/MPC8315ERDB.h | 1 + include/configs/MPC8323ERDB.h | 1 + include/configs/MPC832XEMDS.h | 1 + include/configs/MPC8349EMDS.h | 1 + include/configs/MPC8349ITX.h | 3 ++- include/configs/MPC8360EMDS.h | 1 + include/configs/MPC8360ERDK.h | 1 + include/configs/MPC837XEMDS.h | 1 + include/configs/MPC837XERDB.h | 1 + include/configs/MVBLM7.h | 1 + include/configs/SIMPC8313.h | 2 +- include/configs/TQM834x.h | 2 ++ include/configs/sbc8349.h | 1 + include/configs/vme8349.h | 1 + 15 files changed, 17 insertions(+), 3 deletions(-) diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 1478ec8c3c..a2e4cd46fa 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -435,7 +435,7 @@ #endif #define CONFIG_CMDLINE_EDITING 1 - +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* * Miscellaneous configurable options diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index a8570ce55a..b106aa9c10 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -504,6 +504,7 @@ #endif #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 4046f80b5a..50aea79e67 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -275,6 +275,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index 2ad5f60094..f7632e0d96 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -286,6 +286,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index bf28d9eaba..5c410c9e50 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -296,6 +296,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 52e2851620..09f9e38470 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -511,7 +511,8 @@ boards, we say we have two, but don't display a message if we find only one. */ * Miscellaneous configurable options */ #define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_CMDLINE_EDITING /* Command-line editing */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index b9b5eaba2e..620e32cda4 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -320,6 +320,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index c7bc9cddb8..a43e465520 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -250,6 +250,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 65d49ecd92..1565ff94c8 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -500,6 +500,7 @@ extern int board_pci_host_broken(void); #endif #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index ca60272263..97a05a293d 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -508,6 +508,7 @@ #endif #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index f8b016feed..6cc8d58765 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -275,6 +275,7 @@ */ #define CONFIG_SYS_LONGHELP #define CONFIG_CMDLINE_EDITING +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 36e952e741..40e89d9a5b 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -342,7 +342,7 @@ #endif #define CONFIG_CMDLINE_EDITING 1 - +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* * Miscellaneous configurable options diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 4c909e61ad..f08c0a95ee 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -332,6 +332,8 @@ extern int tqm834x_num_flash_banks; #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ + #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */ #ifdef CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 4ea65ce164..80f83ac5fa 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -283,6 +283,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index 7603300ae1..cb987a1e42 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -197,6 +197,7 @@ #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x4600) #define CONFIG_CMDLINE_EDITING /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER #ifdef CONFIG_SYS_HUSH_PARSER From 1a2e203b31d33fb720f2cf1033b241ad36ab405a Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Tue, 20 Apr 2010 19:37:54 -0500 Subject: [PATCH 18/76] mpc83xx: turn on icache in core initialization to improve u-boot boot time before, MPC8349ITX boots u-boot in 4.3sec: column1 is elapsed time since first message column2 is elapsed time since previous message column3 is the message 0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX 0.000 0.000: 0.000 0.000: Reset Status: 0.000 0.000: 0.032 0.032: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.032 0.000: Board: Freescale MPC8349E-mITX 0.032 0.000: UPMA: Configured for compact flash 0.032 0.000: I2C: ready 0.061 0.028: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 1.516 1.456: FLASH: 16 MB 2.641 1.125: PCI: Bus Dev VenId DevId Class Int 2.652 0.011: 00 10 1095 3114 0180 00 2.652 0.000: PCI: Bus Dev VenId DevId Class Int 2.652 0.000: In: serial 2.652 0.000: Out: serial 2.652 0.000: Err: serial 2.682 0.030: Board revision: 1.0 (PCF8475A) 3.080 0.398: Net: TSEC1: No support for PHY id ffffffff; assuming generic 3.080 0.000: TSEC0, TSEC1 4.300 1.219: IDE: Bus 0: .** Timeout ** after, MPC8349ITX boots u-boot in 3.0sec: 0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX 0.010 0.000: 0.010 0.000: Reset Status: 0.010 0.000: 0.017 0.007: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.017 0.000: Board: Freescale MPC8349E-mITX 0.038 0.020: UPMA: Configured for compact flash 0.038 0.000: I2C: ready 0.038 0.000: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 0.260 0.222: FLASH: 16 MB 1.390 1.130: PCI: Bus Dev VenId DevId Class Int 1.390 0.000: 00 10 1095 3114 0180 00 1.390 0.000: PCI: Bus Dev VenId DevId Class Int 1.400 0.010: In: serial 1.400 0.000: Out: serial 1.400 0.000: Err: serial 1.400 0.000: Board revision: 1.0 (PCF8475A) 1.832 0.432: Net: TSEC1: No support for PHY id ffffffff; assuming generic 1.832 0.000: TSEC0, TSEC1 3.038 1.205: IDE: Bus 0: .** Timeout ** also tested on these boards (albeit with a less accurate boottime measurement method): seconds: before after 8349MDS ~2.6 ~2.2 8360MDS ~2.8 ~2.6 8313RDB ~2.5 ~2.3 #nand boot 837xRDB ~3.1 ~2.3 also tested on an 8323ERDB. v2: also remove the delayed icache enablement assumption in arch ppc's board.c, and add a CONFIG_MPC83xx define in the ITX config file for consistency (even though it was already being defined in 83xx' config.mk). Signed-off-by: Kim Phillips --- arch/powerpc/lib/board.c | 2 +- include/configs/MPC8313ERDB.h | 3 ++- include/configs/MPC8315ERDB.h | 5 +++-- include/configs/MPC8323ERDB.h | 5 +++-- include/configs/MPC832XEMDS.h | 5 +++-- include/configs/MPC8349EMDS.h | 3 ++- include/configs/MPC8349ITX.h | 5 +++-- include/configs/MPC8360EMDS.h | 5 +++-- include/configs/MPC8360ERDK.h | 5 +++-- include/configs/MPC837XEMDS.h | 5 +++-- include/configs/MPC837XERDB.h | 5 +++-- include/configs/MVBLM7.h | 3 ++- include/configs/SIMPC8313.h | 5 +++-- include/configs/TQM834x.h | 3 ++- include/configs/kmeter1.h | 3 ++- include/configs/sbc8349.h | 3 ++- include/configs/vme8349.h | 3 ++- 17 files changed, 42 insertions(+), 26 deletions(-) diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index a30acee4fe..7b09fb51e2 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -686,7 +686,7 @@ void board_init_r (gd_t *id, ulong dest_addr) WATCHDOG_RESET(); -#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83xx) +#if defined(CONFIG_SYS_DELAYED_ICACHE) icache_enable (); /* it's time to enable the instruction cache */ #endif diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index a2e4cd46fa..94695fc285 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -517,7 +517,8 @@ #define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ - HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) + HID0_ENABLE_INSTRUCTION_CACHE | \ + HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index b106aa9c10..6972fe8cd1 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -536,8 +536,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE | \ HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h index 50aea79e67..7c843939c2 100644 --- a/include/configs/MPC8323ERDB.h +++ b/include/configs/MPC8323ERDB.h @@ -438,8 +438,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index f7632e0d96..7bd279369e 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -455,8 +455,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 5c410c9e50..73dbea4b74 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -598,7 +598,8 @@ #define CONFIG_SYS_SICRL SICRL_LDP_A #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) /* #define CONFIG_SYS_HID0_FINAL (\ HID0_ENABLE_INSTRUCTION_CACHE |\ diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 09f9e38470..9be571fecf 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -63,6 +63,7 @@ /* * High Level Configuration Options */ +#define CONFIG_MPC83xx 1 #define CONFIG_MPC834x /* MPC834x family (8343, 8347, 8349) */ #define CONFIG_MPC8349 /* MPC8349 specific */ @@ -596,8 +597,8 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_SYS_SICRH SICRH_TSOBI1 /* Needed for gigabit to work on TSEC 1 */ #define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1) /* USB DR as device + USB MPH as host */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT +#define CONFIG_SYS_HID0_INIT 0x00000000 +#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_INSTRUCTION_CACHE #define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_HIGH_BATS 1 /* High BATs supported */ diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 620e32cda4..87a137b3a3 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -495,8 +495,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC8360ERDK.h b/include/configs/MPC8360ERDK.h index a43e465520..e78cf60a10 100644 --- a/include/configs/MPC8360ERDK.h +++ b/include/configs/MPC8360ERDK.h @@ -412,8 +412,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h index 1565ff94c8..b30d0e385a 100644 --- a/include/configs/MPC837XEMDS.h +++ b/include/configs/MPC837XEMDS.h @@ -544,8 +544,9 @@ extern int board_pci_host_broken(void); /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 97a05a293d..1654f46a46 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -552,8 +552,9 @@ /* * Core HID Setup */ -#define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index 6cc8d58765..26897c69af 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -321,7 +321,8 @@ #define CONFIG_SYS_SICRL (SICRL_LDP_A | SICRL_USB1 | SICRL_USB0) #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT +#define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_HIGH_BATS 1 diff --git a/include/configs/SIMPC8313.h b/include/configs/SIMPC8313.h index 40e89d9a5b..84af8df9c9 100644 --- a/include/configs/SIMPC8313.h +++ b/include/configs/SIMPC8313.h @@ -411,8 +411,9 @@ | SICRL_ETSEC2_A ) #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK \ - | HID0_ENABLE_DYNAMIC_POWER_MANAGMENT ) +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE | \ + HID0_ENABLE_DYNAMIC_POWER_MANAGMENT ) #define CONFIG_SYS_HID2 HID2_HBE diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index f08c0a95ee..c1e0e6429a 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -405,7 +405,8 @@ extern int tqm834x_num_flash_banks; /* i-cache and d-cache disabled */ #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL CONFIG_SYS_HID0_INIT +#define CONFIG_SYS_HID0_FINAL (CONFIG_SYS_HID0_INIT | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE #define CONFIG_HIGH_BATS 1 /* High BATs supported */ diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index d27b75b647..64972317fb 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -367,7 +367,8 @@ * Core HID Setup */ #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE /* diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 80f83ac5fa..deaddde3bf 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -542,7 +542,8 @@ #define CONFIG_SYS_SICRL SICRL_LDP_A #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) /* #define CONFIG_SYS_HID0_FINAL (\ HID0_ENABLE_INSTRUCTION_CACHE |\ diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index cb987a1e42..f493e75d6f 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -449,7 +449,8 @@ #define CONFIG_SYS_SICRL SICRL_LDP_A #define CONFIG_SYS_HID0_INIT 0x000000000 -#define CONFIG_SYS_HID0_FINAL HID0_ENABLE_MACHINE_CHECK +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ + HID0_ENABLE_INSTRUCTION_CACHE) #define CONFIG_SYS_HID2 HID2_HBE From 77c1458d130d33704472db9c88d2310c8fc90f4c Mon Sep 17 00:00:00 2001 From: Dipen Dudhat Date: Mon, 5 Oct 2009 15:41:58 +0530 Subject: [PATCH 19/76] ppc/85xx: PIO Support for FSL eSDHC Controller Driver On some Freescale SoC Internal DMA of eSDHC controller has bug. So PIO Mode has been introduced to do data transfer using CPU. Signed-off-by: Dipen Dudhat --- drivers/mmc/fsl_esdhc.c | 87 ++++++++++++++++++++++++++++++++++++++++- include/fsl_esdhc.h | 2 + 2 files changed, 87 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 0f6f8b161c..a9b07a97c7 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -72,8 +72,10 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) uint xfertyp = 0; if (data) { - xfertyp |= XFERTYP_DPSEL | XFERTYP_DMAEN; - + xfertyp |= XFERTYP_DPSEL; +#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO + xfertyp |= XFERTYP_DMAEN; +#endif if (data->blocks > 1) { xfertyp |= XFERTYP_MSBSEL; xfertyp |= XFERTYP_BCEN; @@ -97,6 +99,71 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) return XFERTYP_CMD(cmd->cmdidx) | xfertyp; } +#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO +/* + * PIO Read/Write Mode reduce the performace as DMA is not used in this mode. + */ +static int +esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data) +{ + struct fsl_esdhc *regs = mmc->priv; + uint blocks; + char *buffer; + uint databuf; + uint size; + uint irqstat; + uint timeout; + + if (data->flags & MMC_DATA_READ) { + blocks = data->blocks; + buffer = data->dest; + while (blocks) { + timeout = PIO_TIMEOUT; + size = data->blocksize; + irqstat = esdhc_read32(®s->irqstat); + while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BREN) + && --timeout); + if (timeout <= 0) { + printf("\nData Read Failed in PIO Mode."); + return timeout; + } + while (size && (!(irqstat & IRQSTAT_TC))) { + udelay(100); /* Wait before last byte transfer complete */ + irqstat = esdhc_read32(®s->irqstat); + databuf = in_le32(®s->datport); + *((uint *)buffer) = databuf; + buffer += 4; + size -= 4; + } + blocks--; + } + } else { + blocks = data->blocks; + buffer = data->src; + while (blocks) { + timeout = PIO_TIMEOUT; + size = data->blocksize; + irqstat = esdhc_read32(®s->irqstat); + while (!(esdhc_read32(®s->prsstat) & PRSSTAT_BWEN) + && --timeout); + if (timeout <= 0) { + printf("\nData Write Failed in PIO Mode."); + return timeout; + } + while (size && (!(irqstat & IRQSTAT_TC))) { + udelay(100); /* Wait before last byte transfer complete */ + databuf = *((uint *)buffer); + buffer += 4; + size -= 4; + irqstat = esdhc_read32(®s->irqstat); + out_le32(®s->datport, databuf); + } + blocks--; + } + } +} +#endif + static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) { uint wml_value; @@ -104,6 +171,17 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base; +#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO + if (!(data->flags & MMC_DATA_READ)) { + if ((esdhc_read32(®s->prsstat) & PRSSTAT_WPSPL) == 0) { + printf("\nThe SD card is locked. " + "Can not write to a locked card.\n\n"); + return TIMEOUT; + } + esdhc_write32(®s->dsaddr, (u32)data->src); + } else + esdhc_write32(®s->dsaddr, (u32)data->dest); +#else wml_value = data->blocksize/4; if (data->flags & MMC_DATA_READ) { @@ -124,6 +202,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) wml_value << 16); esdhc_write32(®s->dsaddr, (u32)data->src); } +#endif esdhc_write32(®s->blkattr, data->blocks << 16 | data->blocksize); @@ -220,6 +299,9 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) /* Wait until all of the blocks are transferred */ if (data) { +#ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO + esdhc_pio_read_write(mmc, data); +#else do { irqstat = esdhc_read32(®s->irqstat); @@ -230,6 +312,7 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) return TIMEOUT; } while (!(irqstat & IRQSTAT_TC) && (esdhc_read32(®s->prsstat) & PRSSTAT_DLA)); +#endif } esdhc_write32(®s->irqstat, -1); diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index f9ae15ad42..477bbd792e 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -90,6 +90,7 @@ #define PRSSTAT_CDPL (0x00040000) #define PRSSTAT_CINS (0x00010000) #define PRSSTAT_BREN (0x00000800) +#define PRSSTAT_BWEN (0x00000400) #define PRSSTAT_DLA (0x00000004) #define PRSSTAT_CICHB (0x00000002) #define PRSSTAT_CIDHB (0x00000001) @@ -121,6 +122,7 @@ #define XFERTYP_DMAEN 0x00000001 #define CINS_TIMEOUT 1000 +#define PIO_TIMEOUT 100000 #define DSADDR 0x2e004 From fbb0030e3894119c089256f16626edd166c7629c Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 24 Apr 2010 19:27:04 +0200 Subject: [PATCH 20/76] serial: struct serial_device: add uninit() entry for drivers Subsequent patch extends mpc512x serial driver to support multiple PSC ports. The driver will provide an uninit() function to stop the serial controller and to disable the controller's clock. Adding uninit() entry to struct serial_device allows disabling the serial controller after usage of a stdio serial device. This patch adds uninit() entry to the struct serial_device and fixes initialization of this structure in the code accordingly. Signed-off-by: Anatolij Gustschin --- arch/powerpc/cpu/mpc5xxx/serial.c | 2 ++ arch/powerpc/cpu/mpc8xx/serial.c | 2 ++ arch/powerpc/cpu/ppc4xx/4xx_uart.c | 2 ++ board/logicpd/zoom2/zoom2_serial.h | 1 + drivers/serial/serial.c | 1 + drivers/serial/serial_pxa.c | 3 +++ drivers/serial/serial_s3c24x0.c | 1 + drivers/serial/serial_s5pc1xx.c | 1 + include/serial.h | 1 + 9 files changed, 14 insertions(+) diff --git a/arch/powerpc/cpu/mpc5xxx/serial.c b/arch/powerpc/cpu/mpc5xxx/serial.c index 59a877a8f9..01270655ae 100644 --- a/arch/powerpc/cpu/mpc5xxx/serial.c +++ b/arch/powerpc/cpu/mpc5xxx/serial.c @@ -340,6 +340,7 @@ struct serial_device serial0_device = "serial0", "UART0", serial0_init, + NULL, serial0_setbrg, serial0_getc, serial0_tstc, @@ -352,6 +353,7 @@ struct serial_device serial1_device = "serial1", "UART1", serial1_init, + NULL, serial1_setbrg, serial1_getc, serial1_tstc, diff --git a/arch/powerpc/cpu/mpc8xx/serial.c b/arch/powerpc/cpu/mpc8xx/serial.c index 664db65a56..9514c66fd5 100644 --- a/arch/powerpc/cpu/mpc8xx/serial.c +++ b/arch/powerpc/cpu/mpc8xx/serial.c @@ -392,6 +392,7 @@ struct serial_device serial_smc_device = "serial_smc", "SMC", smc_init, + NULL, smc_setbrg, smc_getc, smc_tstc, @@ -662,6 +663,7 @@ struct serial_device serial_scc_device = "serial_scc", "SCC", scc_init, + NULL, scc_setbrg, scc_getc, scc_tstc, diff --git a/arch/powerpc/cpu/ppc4xx/4xx_uart.c b/arch/powerpc/cpu/ppc4xx/4xx_uart.c index 8de65425c9..e6ab570c02 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_uart.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_uart.c @@ -822,6 +822,7 @@ struct serial_device serial0_device = "serial0", "UART0", serial0_init, + NULL, serial0_setbrg, serial0_getc, serial0_tstc, @@ -834,6 +835,7 @@ struct serial_device serial1_device = "serial1", "UART1", serial1_init, + NULL, serial1_setbrg, serial1_getc, serial1_tstc, diff --git a/board/logicpd/zoom2/zoom2_serial.h b/board/logicpd/zoom2/zoom2_serial.h index c98158f1ba..a6d2427fef 100644 --- a/board/logicpd/zoom2/zoom2_serial.h +++ b/board/logicpd/zoom2/zoom2_serial.h @@ -65,6 +65,7 @@ struct serial_device zoom2_serial_device##n = \ N(n), \ U(n), \ quad_init_##n, \ + NULL, \ quad_setbrg_##n, \ quad_getc_##n, \ quad_tstc_##n, \ diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index dd5f332ba9..8eda95cd3e 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -115,6 +115,7 @@ static NS16550_t serial_ports[4] = { name,\ bus,\ eserial##port##_init,\ + NULL,\ eserial##port##_setbrg,\ eserial##port##_getc,\ eserial##port##_tstc,\ diff --git a/drivers/serial/serial_pxa.c b/drivers/serial/serial_pxa.c index 9ba457e75a..b74e43957f 100644 --- a/drivers/serial/serial_pxa.c +++ b/drivers/serial/serial_pxa.c @@ -266,6 +266,7 @@ struct serial_device serial_ffuart_device = "serial_ffuart", "PXA", ffuart_init, + NULL, ffuart_setbrg, ffuart_getc, ffuart_tstc, @@ -310,6 +311,7 @@ struct serial_device serial_btuart_device = "serial_btuart", "PXA", btuart_init, + NULL, btuart_setbrg, btuart_getc, btuart_tstc, @@ -354,6 +356,7 @@ struct serial_device serial_stuart_device = "serial_stuart", "PXA", stuart_init, + NULL, stuart_setbrg, stuart_getc, stuart_tstc, diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c index 5dd4dd8160..8a3e30209c 100644 --- a/drivers/serial/serial_s3c24x0.c +++ b/drivers/serial/serial_s3c24x0.c @@ -78,6 +78,7 @@ DECLARE_GLOBAL_DATA_PTR; name, \ bus, \ s3serial##port##_init, \ + NULL,\ s3serial##port##_setbrg, \ s3serial##port##_getc, \ s3serial##port##_tstc, \ diff --git a/drivers/serial/serial_s5pc1xx.c b/drivers/serial/serial_s5pc1xx.c index 73669a9f17..8da0c8606d 100644 --- a/drivers/serial/serial_s5pc1xx.c +++ b/drivers/serial/serial_s5pc1xx.c @@ -185,6 +185,7 @@ void s5p_serial##port##_puts(const char *s) { serial_puts_dev(s, port); } name, \ bus, \ s5p_serial##port##_init, \ + NULL, \ s5p_serial##port##_setbrg, \ s5p_serial##port##_getc, \ s5p_serial##port##_tstc, \ diff --git a/include/serial.h b/include/serial.h index f2638ec566..fbf101bd7f 100644 --- a/include/serial.h +++ b/include/serial.h @@ -9,6 +9,7 @@ struct serial_device { char ctlr[CTLRSIZE]; int (*init) (void); + int (*uninit) (void); void (*setbrg) (void); int (*getc) (void); int (*tstc) (void); From e3b28e67329de99a315d509920760dcbc565f8c6 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 24 Apr 2010 19:27:05 +0200 Subject: [PATCH 21/76] mpc512x: add multi serial PSC support Extend mpc512x serial driver to support multiple PSC ports. Subsequent patches for PDM360NG board support make use of this functionality by defining CONFIG_SERIAL_MULTI in the board config file. Additionally the used PSC devices are specified by defining e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6. Support for PSC devices other than 1, 3, 4 and 6 is not added by this patch because these aren't used currently. In the future it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c. Additionally you have to add code for registering added devices in serial_initialize() in common/serial.c. Signed-off-by: Anatolij Gustschin --- arch/powerpc/cpu/mpc512x/serial.c | 266 +++++++++++++++++++++++--- arch/powerpc/include/asm/immap_512x.h | 92 ++++----- common/serial.c | 23 +++ include/serial.h | 7 + 4 files changed, 315 insertions(+), 73 deletions(-) diff --git a/arch/powerpc/cpu/mpc512x/serial.c b/arch/powerpc/cpu/mpc512x/serial.c index ec2f41bb36..f421968896 100644 --- a/arch/powerpc/cpu/mpc512x/serial.c +++ b/arch/powerpc/cpu/mpc512x/serial.c @@ -32,14 +32,16 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_PSC_CONSOLE) +#if defined(CONFIG_PSC_CONSOLE) || defined(CONFIG_SERIAL_MULTI) static void fifo_init (volatile psc512x_t *psc) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; + u32 tfsize, rfsize; /* reset Rx & Tx fifo slice */ out_be32(&psc->rfcmd, PSC_FIFO_RESET_SLICE); @@ -49,8 +51,65 @@ static void fifo_init (volatile psc512x_t *psc) out_be32(&psc->rfintmask, 0); out_be32(&psc->tfintmask, 0); - out_be32(&psc->tfsize, CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16)); - out_be32(&psc->rfsize, CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16)); +#if defined(CONFIG_SERIAL_MULTI) + switch (((u32)psc & 0xf00) >> 8) { + case 0: + tfsize = FIFOC_PSC0_TX_SIZE | (FIFOC_PSC0_TX_ADDR << 16); + rfsize = FIFOC_PSC0_RX_SIZE | (FIFOC_PSC0_RX_ADDR << 16); + break; + case 1: + tfsize = FIFOC_PSC1_TX_SIZE | (FIFOC_PSC1_TX_ADDR << 16); + rfsize = FIFOC_PSC1_RX_SIZE | (FIFOC_PSC1_RX_ADDR << 16); + break; + case 2: + tfsize = FIFOC_PSC2_TX_SIZE | (FIFOC_PSC2_TX_ADDR << 16); + rfsize = FIFOC_PSC2_RX_SIZE | (FIFOC_PSC2_RX_ADDR << 16); + break; + case 3: + tfsize = FIFOC_PSC3_TX_SIZE | (FIFOC_PSC3_TX_ADDR << 16); + rfsize = FIFOC_PSC3_RX_SIZE | (FIFOC_PSC3_RX_ADDR << 16); + break; + case 4: + tfsize = FIFOC_PSC4_TX_SIZE | (FIFOC_PSC4_TX_ADDR << 16); + rfsize = FIFOC_PSC4_RX_SIZE | (FIFOC_PSC4_RX_ADDR << 16); + break; + case 5: + tfsize = FIFOC_PSC5_TX_SIZE | (FIFOC_PSC5_TX_ADDR << 16); + rfsize = FIFOC_PSC5_RX_SIZE | (FIFOC_PSC5_RX_ADDR << 16); + break; + case 6: + tfsize = FIFOC_PSC6_TX_SIZE | (FIFOC_PSC6_TX_ADDR << 16); + rfsize = FIFOC_PSC6_RX_SIZE | (FIFOC_PSC6_RX_ADDR << 16); + break; + case 7: + tfsize = FIFOC_PSC7_TX_SIZE | (FIFOC_PSC7_TX_ADDR << 16); + rfsize = FIFOC_PSC7_RX_SIZE | (FIFOC_PSC7_RX_ADDR << 16); + break; + case 8: + tfsize = FIFOC_PSC8_TX_SIZE | (FIFOC_PSC8_TX_ADDR << 16); + rfsize = FIFOC_PSC8_RX_SIZE | (FIFOC_PSC8_RX_ADDR << 16); + break; + case 9: + tfsize = FIFOC_PSC9_TX_SIZE | (FIFOC_PSC9_TX_ADDR << 16); + rfsize = FIFOC_PSC9_RX_SIZE | (FIFOC_PSC9_RX_ADDR << 16); + break; + case 10: + tfsize = FIFOC_PSC10_TX_SIZE | (FIFOC_PSC10_TX_ADDR << 16); + rfsize = FIFOC_PSC10_RX_SIZE | (FIFOC_PSC10_RX_ADDR << 16); + break; + case 11: + tfsize = FIFOC_PSC11_TX_SIZE | (FIFOC_PSC11_TX_ADDR << 16); + rfsize = FIFOC_PSC11_RX_SIZE | (FIFOC_PSC11_RX_ADDR << 16); + break; + default: + return; + } +#else + tfsize = CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16); + rfsize = CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16); +#endif + out_be32(&psc->tfsize, tfsize); + out_be32(&psc->rfsize, rfsize); /* enable Tx & Rx FIFO slice */ out_be32(&psc->rfcmd, PSC_FIFO_ENABLE_SLICE); @@ -60,24 +119,47 @@ static void fifo_init (volatile psc512x_t *psc) __asm__ volatile ("sync"); } -void serial_setbrg(void) +void serial_setbrg_dev(unsigned int idx) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; + volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx]; unsigned long baseclk, div; + unsigned long baudrate; + char buf[16]; + char *br_env; - /* calculate dividor for setting PSC CTUR and CTLR registers */ + baudrate = gd->baudrate; + if (idx != CONFIG_PSC_CONSOLE) { + /* Allows setting baudrate for other serial devices + * on PSCx using environment. If not specified, use + * the same baudrate as for console. + */ + sprintf(buf, "psc%d_baudrate", idx); + br_env = getenv(buf); + if (br_env) + baudrate = simple_strtoul(br_env, NULL, 10); + + debug("%s: idx %d, baudrate %d\n", __func__, idx, baudrate); + } + + /* calculate divisor for setting PSC CTUR and CTLR registers */ baseclk = (gd->ips_clk + 8) / 16; - div = (baseclk + (gd->baudrate / 2)) / gd->baudrate; + div = (baseclk + (baudrate / 2)) / baudrate; out_8(&psc->ctur, (div >> 8) & 0xff); out_8(&psc->ctlr, div & 0xff); /* set baudrate */ } -int serial_init(void) +int serial_init_dev(unsigned int idx) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; + volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx]; +#if defined(CONFIG_SERIAL_MULTI) + u32 reg; + + reg = in_be32(&im->clk.sccr[0]); + out_be32(&im->clk.sccr[0], reg | CLOCK_SCCR1_PSC_EN(idx)); +#endif fifo_init (psc); @@ -100,7 +182,7 @@ int serial_init(void) out_8(&psc->mode, PSC_MODE_1_STOPBIT); /* set baudrate */ - serial_setbrg(); + serial_setbrg_dev(idx); /* disable all interrupts */ out_be16(&psc->psc_imr, 0); @@ -113,13 +195,27 @@ int serial_init(void) return 0; } -void serial_putc (const char c) +int serial_uninit_dev(unsigned int idx) +{ + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; + volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx]; + u32 reg; + + out_8(&psc->command, PSC_RX_DISABLE | PSC_TX_DISABLE); + reg = in_be32(&im->clk.sccr[0]); + reg &= ~CLOCK_SCCR1_PSC_EN(idx); + out_be32(&im->clk.sccr[0], reg); + + return 0; +} + +void serial_putc_dev(unsigned int idx, const char c) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; + volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx]; if (c == '\n') - serial_putc ('\r'); + serial_putc_dev(idx, '\r'); /* Wait for last character to go. */ while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP)) @@ -128,10 +224,10 @@ void serial_putc (const char c) out_8(&psc->tfdata_8, c); } -void serial_putc_raw (const char c) +void serial_putc_raw_dev(unsigned int idx, const char c) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; + volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx]; /* Wait for last character to go. */ while (!(in_be16(&psc->psc_status) & PSC_SR_TXEMP)) @@ -140,18 +236,16 @@ void serial_putc_raw (const char c) out_8(&psc->tfdata_8, c); } - -void serial_puts (const char *s) +void serial_puts_dev(unsigned int idx, const char *s) { - while (*s) { - serial_putc (*s++); - } + while (*s) + serial_putc_dev(idx, *s++); } -int serial_getc (void) +int serial_getc_dev(unsigned int idx) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; + volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx]; /* Wait for a character to arrive. */ while (in_be32(&psc->rfstat) & PSC_FIFO_EMPTY) @@ -160,18 +254,18 @@ int serial_getc (void) return in_8(&psc->rfdata_8); } -int serial_tstc (void) +int serial_tstc_dev(unsigned int idx) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; + volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx]; return !(in_be32(&psc->rfstat) & PSC_FIFO_EMPTY); } -void serial_setrts(int s) +void serial_setrts_dev(unsigned int idx, int s) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; + volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx]; if (s) { /* Assert RTS (become LOW) */ @@ -183,11 +277,127 @@ void serial_setrts(int s) } } -int serial_getcts(void) +int serial_getcts_dev(unsigned int idx) { volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; - volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE]; + volatile psc512x_t *psc = (psc512x_t *) &im->psc[idx]; return (in_8(&psc->ip) & 0x1) ? 0 : 1; } +#endif /* CONFIG_PSC_CONSOLE || CONFIG_SERIAL_MULTI */ + +#if defined(CONFIG_SERIAL_MULTI) + +#define DECLARE_PSC_SERIAL_FUNCTIONS(port) \ + int serial##port##_init(void) \ + { \ + return serial_init_dev(port); \ + } \ + int serial##port##_uninit(void) \ + { \ + return serial_uninit_dev(port); \ + } \ + void serial##port##_setbrg(void) \ + { \ + serial_setbrg_dev(port); \ + } \ + int serial##port##_getc(void) \ + { \ + return serial_getc_dev(port); \ + } \ + int serial##port##_tstc(void) \ + { \ + return serial_tstc_dev(port); \ + } \ + void serial##port##_putc(const char c) \ + { \ + serial_putc_dev(port, c); \ + } \ + void serial##port##_puts(const char *s) \ + { \ + serial_puts_dev(port, s); \ + } + +#define INIT_PSC_SERIAL_STRUCTURE(port, name, bus) { \ + name, \ + bus, \ + serial##port##_init, \ + serial##port##_uninit, \ + serial##port##_setbrg, \ + serial##port##_getc, \ + serial##port##_tstc, \ + serial##port##_putc, \ + serial##port##_puts, \ +} + +#if defined(CONFIG_SYS_PSC1) +DECLARE_PSC_SERIAL_FUNCTIONS(1); +struct serial_device serial1_device = +INIT_PSC_SERIAL_STRUCTURE(1, "psc1", "UART1"); +#endif + +#if defined(CONFIG_SYS_PSC3) +DECLARE_PSC_SERIAL_FUNCTIONS(3); +struct serial_device serial3_device = +INIT_PSC_SERIAL_STRUCTURE(3, "psc3", "UART3"); +#endif + +#if defined(CONFIG_SYS_PSC4) +DECLARE_PSC_SERIAL_FUNCTIONS(4); +struct serial_device serial4_device = +INIT_PSC_SERIAL_STRUCTURE(4, "psc4", "UART4"); +#endif + +#if defined(CONFIG_SYS_PSC6) +DECLARE_PSC_SERIAL_FUNCTIONS(6); +struct serial_device serial6_device = +INIT_PSC_SERIAL_STRUCTURE(6, "psc6", "UART6"); +#endif + +#else + +void serial_setbrg(void) +{ + serial_setbrg_dev(CONFIG_PSC_CONSOLE); +} + +int serial_init(void) +{ + return serial_init_dev(CONFIG_PSC_CONSOLE); +} + +void serial_putc(const char c) +{ + serial_putc_dev(CONFIG_PSC_CONSOLE, c); +} + +void serial_putc_raw(const char c) +{ + serial_putc_raw_dev(CONFIG_PSC_CONSOLE, c); +} + +void serial_puts(const char *s) +{ + serial_puts_dev(CONFIG_PSC_CONSOLE, s); +} + +int serial_getc(void) +{ + return serial_getc_dev(CONFIG_PSC_CONSOLE); +} + +int serial_tstc(void) +{ + return serial_tstc_dev(CONFIG_PSC_CONSOLE); +} + +void serial_setrts(int s) +{ + return serial_setrts_dev(CONFIG_PSC_CONSOLE, s); +} + +int serial_getcts(void) +{ + return serial_getcts_dev(CONFIG_PSC_CONSOLE); +} #endif /* CONFIG_PSC_CONSOLE */ diff --git a/arch/powerpc/include/asm/immap_512x.h b/arch/powerpc/include/asm/immap_512x.h index 95350fd9b8..8bce586b53 100644 --- a/arch/powerpc/include/asm/immap_512x.h +++ b/arch/powerpc/include/asm/immap_512x.h @@ -1116,66 +1116,68 @@ typedef struct fifoc512x { * * Overall size of FIFOC memory is not documented in the MPC5121e RM, but * tests indicate that it is 1024 words total. + * + * *_TX_SIZE and *_RX_SIZE is the number of 4-byte words for FIFO slice. */ -#define FIFOC_PSC0_TX_SIZE 0x0 /* number of 4-byte words for FIFO slice */ +#define FIFOC_PSC0_TX_SIZE 0x04 #define FIFOC_PSC0_TX_ADDR 0x0 -#define FIFOC_PSC0_RX_SIZE 0x0 -#define FIFOC_PSC0_RX_ADDR 0x0 +#define FIFOC_PSC0_RX_SIZE 0x04 +#define FIFOC_PSC0_RX_ADDR 0x10 -#define FIFOC_PSC1_TX_SIZE 0x0 -#define FIFOC_PSC1_TX_ADDR 0x0 -#define FIFOC_PSC1_RX_SIZE 0x0 -#define FIFOC_PSC1_RX_ADDR 0x0 +#define FIFOC_PSC1_TX_SIZE 0x04 +#define FIFOC_PSC1_TX_ADDR 0x20 +#define FIFOC_PSC1_RX_SIZE 0x04 +#define FIFOC_PSC1_RX_ADDR 0x30 -#define FIFOC_PSC2_TX_SIZE 0x0 -#define FIFOC_PSC2_TX_ADDR 0x0 -#define FIFOC_PSC2_RX_SIZE 0x0 -#define FIFOC_PSC2_RX_ADDR 0x0 +#define FIFOC_PSC2_TX_SIZE 0x04 +#define FIFOC_PSC2_TX_ADDR 0x40 +#define FIFOC_PSC2_RX_SIZE 0x04 +#define FIFOC_PSC2_RX_ADDR 0x50 #define FIFOC_PSC3_TX_SIZE 0x04 -#define FIFOC_PSC3_TX_ADDR 0x0 +#define FIFOC_PSC3_TX_ADDR 0x60 #define FIFOC_PSC3_RX_SIZE 0x04 -#define FIFOC_PSC3_RX_ADDR 0x10 +#define FIFOC_PSC3_RX_ADDR 0x70 -#define FIFOC_PSC4_TX_SIZE 0x0 -#define FIFOC_PSC4_TX_ADDR 0x0 -#define FIFOC_PSC4_RX_SIZE 0x0 -#define FIFOC_PSC4_RX_ADDR 0x0 +#define FIFOC_PSC4_TX_SIZE 0x04 +#define FIFOC_PSC4_TX_ADDR 0x80 +#define FIFOC_PSC4_RX_SIZE 0x04 +#define FIFOC_PSC4_RX_ADDR 0x90 -#define FIFOC_PSC5_TX_SIZE 0x0 -#define FIFOC_PSC5_TX_ADDR 0x0 -#define FIFOC_PSC5_RX_SIZE 0x0 -#define FIFOC_PSC5_RX_ADDR 0x0 +#define FIFOC_PSC5_TX_SIZE 0x04 +#define FIFOC_PSC5_TX_ADDR 0xa0 +#define FIFOC_PSC5_RX_SIZE 0x04 +#define FIFOC_PSC5_RX_ADDR 0xb0 -#define FIFOC_PSC6_TX_SIZE 0x0 -#define FIFOC_PSC6_TX_ADDR 0x0 -#define FIFOC_PSC6_RX_SIZE 0x0 -#define FIFOC_PSC6_RX_ADDR 0x0 +#define FIFOC_PSC6_TX_SIZE 0x04 +#define FIFOC_PSC6_TX_ADDR 0xc0 +#define FIFOC_PSC6_RX_SIZE 0x04 +#define FIFOC_PSC6_RX_ADDR 0xd0 -#define FIFOC_PSC7_TX_SIZE 0x0 -#define FIFOC_PSC7_TX_ADDR 0x0 -#define FIFOC_PSC7_RX_SIZE 0x0 -#define FIFOC_PSC7_RX_ADDR 0x0 +#define FIFOC_PSC7_TX_SIZE 0x04 +#define FIFOC_PSC7_TX_ADDR 0xe0 +#define FIFOC_PSC7_RX_SIZE 0x04 +#define FIFOC_PSC7_RX_ADDR 0xf0 -#define FIFOC_PSC8_TX_SIZE 0x0 -#define FIFOC_PSC8_TX_ADDR 0x0 -#define FIFOC_PSC8_RX_SIZE 0x0 -#define FIFOC_PSC8_RX_ADDR 0x0 +#define FIFOC_PSC8_TX_SIZE 0x04 +#define FIFOC_PSC8_TX_ADDR 0x100 +#define FIFOC_PSC8_RX_SIZE 0x04 +#define FIFOC_PSC8_RX_ADDR 0x110 -#define FIFOC_PSC9_TX_SIZE 0x0 -#define FIFOC_PSC9_TX_ADDR 0x0 -#define FIFOC_PSC9_RX_SIZE 0x0 -#define FIFOC_PSC9_RX_ADDR 0x0 +#define FIFOC_PSC9_TX_SIZE 0x04 +#define FIFOC_PSC9_TX_ADDR 0x120 +#define FIFOC_PSC9_RX_SIZE 0x04 +#define FIFOC_PSC9_RX_ADDR 0x130 -#define FIFOC_PSC10_TX_SIZE 0x0 -#define FIFOC_PSC10_TX_ADDR 0x0 -#define FIFOC_PSC10_RX_SIZE 0x0 -#define FIFOC_PSC10_RX_ADDR 0x0 +#define FIFOC_PSC10_TX_SIZE 0x04 +#define FIFOC_PSC10_TX_ADDR 0x140 +#define FIFOC_PSC10_RX_SIZE 0x04 +#define FIFOC_PSC10_RX_ADDR 0x150 -#define FIFOC_PSC11_TX_SIZE 0x0 -#define FIFOC_PSC11_TX_ADDR 0x0 -#define FIFOC_PSC11_RX_SIZE 0x0 -#define FIFOC_PSC11_RX_ADDR 0x0 +#define FIFOC_PSC11_TX_SIZE 0x04 +#define FIFOC_PSC11_TX_ADDR 0x160 +#define FIFOC_PSC11_RX_SIZE 0x04 +#define FIFOC_PSC11_RX_ADDR 0x170 /* * SATA diff --git a/common/serial.c b/common/serial.c index 5f9ffd7e45..754e329922 100644 --- a/common/serial.c +++ b/common/serial.c @@ -59,6 +59,14 @@ struct serial_device *__default_serial_console (void) #else return &serial0_device; #endif +#elif defined(CONFIG_MPC512X) +#if (CONFIG_PSC_CONSOLE == 3) + return &serial3_device; +#elif (CONFIG_PSC_CONSOLE == 6) + return &serial6_device; +#else +#error "Bad CONFIG_PSC_CONSOLE." +#endif #elif defined(CONFIG_S3C2410) #if defined(CONFIG_SERIAL1) return &s3c24xx_serial0_device; @@ -158,6 +166,20 @@ void serial_initialize (void) serial_register(&s5pc1xx_serial1_device); serial_register(&s5pc1xx_serial2_device); serial_register(&s5pc1xx_serial3_device); +#endif +#if defined(CONFIG_MPC512X) +#if defined(CONFIG_SYS_PSC1) + serial_register(&serial1_device); +#endif +#if defined(CONFIG_SYS_PSC3) + serial_register(&serial3_device); +#endif +#if defined(CONFIG_SYS_PSC4) + serial_register(&serial4_device); +#endif +#if defined(CONFIG_SYS_PSC6) + serial_register(&serial6_device); +#endif #endif serial_assign (default_serial_console ()->name); } @@ -174,6 +196,7 @@ void serial_stdio_init (void) dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT; dev.start = s->init; + dev.stop = s->uninit; dev.putc = s->putc; dev.puts = s->puts; dev.getc = s->getc; diff --git a/include/serial.h b/include/serial.h index fbf101bd7f..3f3edbc954 100644 --- a/include/serial.h +++ b/include/serial.h @@ -38,6 +38,13 @@ extern struct serial_device eserial4_device; #endif +#if defined(CONFIG_MPC512X) +extern struct serial_device serial1_device; +extern struct serial_device serial3_device; +extern struct serial_device serial4_device; +extern struct serial_device serial6_device; +#endif + #if defined(CONFIG_S3C2410) extern struct serial_device s3c24xx_serial0_device; extern struct serial_device s3c24xx_serial1_device; From 8e234e33bf60a850685c7e81ea92d383c643486b Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 24 Apr 2010 19:27:06 +0200 Subject: [PATCH 22/76] mpc5121: add PSC serial communication routines Signed-off-by: Anatolij Gustschin --- arch/powerpc/cpu/mpc512x/serial.c | 87 +++++++++++++++++++++++++++++++ include/serial.h | 7 +++ 2 files changed, 94 insertions(+) diff --git a/arch/powerpc/cpu/mpc512x/serial.c b/arch/powerpc/cpu/mpc512x/serial.c index f421968896..cb5bbf09b2 100644 --- a/arch/powerpc/cpu/mpc512x/serial.c +++ b/arch/powerpc/cpu/mpc512x/serial.c @@ -401,3 +401,90 @@ int serial_getcts(void) return serial_getcts_dev(CONFIG_PSC_CONSOLE); } #endif /* CONFIG_PSC_CONSOLE */ + +#if defined(CONFIG_SERIAL_MULTI) +#include +/* + * Routines for communication with serial devices over PSC + */ +/* Bitfield for initialized PSCs */ +static unsigned int initialized; + +struct stdio_dev *open_port(int num, int baudrate) +{ + struct stdio_dev *port; + char env_var[16]; + char env_val[10]; + char name[7]; + + if (num < 0 || num > 11) + return NULL; + + sprintf(name, "psc%d", num); + port = stdio_get_by_name(name); + if (!port) + return NULL; + + if (!test_bit(num, &initialized)) { + sprintf(env_var, "psc%d_baudrate", num); + sprintf(env_val, "%d", baudrate); + setenv(env_var, env_val); + + if (port->start()) + return NULL; + + set_bit(num, &initialized); + } + + return port; +} + +int close_port(int num) +{ + struct stdio_dev *port; + int ret; + char name[7]; + + if (num < 0 || num > 11) + return -1; + + sprintf(name, "psc%d", num); + port = stdio_get_by_name(name); + if (!port) + return -1; + + ret = port->stop(); + clear_bit(num, &initialized); + + return ret; +} + +int write_port(struct stdio_dev *port, char *buf) +{ + if (!port || !buf) + return -1; + + port->puts(buf); + + return 0; +} + +int read_port(struct stdio_dev *port, char *buf, int size) +{ + int cnt = 0; + + if (!port || !buf) + return -1; + + if (!size) + return 0; + + while (port->tstc()) { + buf[cnt++] = port->getc(); + if (cnt > size) + break; + } + + return cnt; +} +#endif /* CONFIG_SERIAL_MULTI */ diff --git a/include/serial.h b/include/serial.h index 3f3edbc954..6423fbaea1 100644 --- a/include/serial.h +++ b/include/serial.h @@ -92,4 +92,11 @@ extern int usbtty_tstc(void); #endif /* CONFIG_USB_TTY */ +#if defined(CONFIG_MPC512X) && defined(CONFIG_SERIAL_MULTI) +extern struct stdio_dev *open_port(int num, int baudrate); +extern int close_port(int num); +extern int write_port(struct stdio_dev *port, char *buf); +extern int read_port(struct stdio_dev *port, char *buf, int size); +#endif + #endif From 5d937e8b59f27d8c300a2e78c168a4c22ec6922a Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 24 Apr 2010 19:27:07 +0200 Subject: [PATCH 23/76] mpc512x: make MEM IO Control configuration a board config option Signed-off-by: Anatolij Gustschin --- arch/powerpc/cpu/mpc512x/fixed_sdram.c | 2 +- arch/powerpc/include/asm/immap_512x.h | 4 ---- include/configs/aria.h | 2 ++ include/configs/mecp5123.h | 2 ++ include/configs/mpc5121ads.h | 2 ++ 5 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/cpu/mpc512x/fixed_sdram.c b/arch/powerpc/cpu/mpc512x/fixed_sdram.c index 442b5fc918..72d524caad 100644 --- a/arch/powerpc/cpu/mpc512x/fixed_sdram.c +++ b/arch/powerpc/cpu/mpc512x/fixed_sdram.c @@ -91,7 +91,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config, } /* Initialize IO Control */ - out_be32(&im->io_ctrl.io_control_mem, IOCTRL_MUX_DDR); + out_be32(&im->io_ctrl.io_control_mem, CONFIG_SYS_IOCTRL_MUX_DDR); /* Initialize DDR Local Window */ out_be32(&im->sysconf.ddrlaw.bar, CONFIG_SYS_DDR_BASE & 0xFFFFF000); diff --git a/arch/powerpc/include/asm/immap_512x.h b/arch/powerpc/include/asm/immap_512x.h index 8bce586b53..c430cb640b 100644 --- a/arch/powerpc/include/asm/immap_512x.h +++ b/arch/powerpc/include/asm/immap_512x.h @@ -848,10 +848,6 @@ typedef struct ioctrl512x { u8 reserved[0x0cfc]; /* fill to 4096 bytes size */ } ioctrl512x_t; -/* Indexes in regs array */ -/* Set for DDR */ -#define IOCTRL_MUX_DDR 0x00000036 - /* IO pin fields */ #define IO_PIN_FMUX(v) ((v) << 7) /* pin function */ #define IO_PIN_HOLD(v) ((v) << 5) /* hold time, pci only */ diff --git a/include/configs/aria.h b/include/configs/aria.h index b6669e72a6..7097ab72d0 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -79,6 +79,8 @@ #define CONFIG_SYS_DDR_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036 + /* DDR Controller Configuration * * SYS_CFG: diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index cccc31d5ed..cafd6a7f66 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -67,6 +67,8 @@ #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036 + /* DDR Controller Configuration * * SYS_CFG: diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index fb49388bd0..8ecc9e1141 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -86,6 +86,8 @@ #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036 + /* DDR Controller Configuration * * SYS_CFG: From b9947bbb08d0483be03004bdbce283b644471cb7 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 24 Apr 2010 19:27:08 +0200 Subject: [PATCH 24/76] mpc5121: determine RAM size using get_ram_size() Configure CONFIG_SYS_MAX_RAM_SIZE address range in DDR Local Access Window and determine the RAM size. Fix DDR LAW afterwards using detected RAM size. Signed-off-by: Anatolij Gustschin --- arch/powerpc/cpu/mpc512x/fixed_sdram.c | 7 ++++++- include/configs/aria.h | 1 + include/configs/mecp5123.h | 1 + include/configs/mpc5121ads.h | 1 + 4 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc512x/fixed_sdram.c b/arch/powerpc/cpu/mpc512x/fixed_sdram.c index 72d524caad..550cbd0bd6 100644 --- a/arch/powerpc/cpu/mpc512x/fixed_sdram.c +++ b/arch/powerpc/cpu/mpc512x/fixed_sdram.c @@ -78,7 +78,7 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config, u32 *dram_init_seq, int seq_sz) { volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; - u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024; + u32 msize = CONFIG_SYS_MAX_RAM_SIZE; u32 msize_log2 = __ilog2(msize); u32 i; @@ -148,5 +148,10 @@ long int fixed_sdram(ddr512x_config_t *mddrc_config, out_be32(&im->mddrc.ddr_time_config0, mddrc_config->ddr_time_config0); out_be32(&im->mddrc.ddr_sys_config, mddrc_config->ddr_sys_config); + msize = get_ram_size(CONFIG_SYS_DDR_BASE, CONFIG_SYS_MAX_RAM_SIZE); + /* Fix DDR Local Window for new size */ + out_be32(&im->sysconf.ddrlaw.ar, __ilog2(msize) - 1); + sync_law(&im->sysconf.ddrlaw.ar); + return msize; } diff --git a/include/configs/aria.h b/include/configs/aria.h index 7097ab72d0..c5f9cc1046 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -78,6 +78,7 @@ #define CONFIG_SYS_DDR_SIZE 256 /* MB */ #define CONFIG_SYS_DDR_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_MAX_RAM_SIZE 0x20000000 #define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036 diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index cafd6a7f66..92c4f5fdb3 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -66,6 +66,7 @@ #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_MAX_RAM_SIZE 0x20000000 #define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036 diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h index 8ecc9e1141..5281042efd 100644 --- a/include/configs/mpc5121ads.h +++ b/include/configs/mpc5121ads.h @@ -85,6 +85,7 @@ #endif #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_MAX_RAM_SIZE 0x20000000 #define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000036 From a3921eefa1440d23f22751704cd7df999769f169 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 24 Apr 2010 19:27:09 +0200 Subject: [PATCH 25/76] mpc5121: add support for PDM360NG board PDM360NG is a MPC5121E based board by ifm ecomatic gmbh. Signed-off-by: Michael Weiss Signed-off-by: Detlev Zundel Signed-off-by: Anatolij Gustschin --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + arch/powerpc/cpu/mpc512x/diu.c | 12 +- arch/powerpc/include/asm/immap_512x.h | 5 + board/freescale/common/fsl_diu_fb.c | 29 +- board/pdm360ng/Makefile | 51 ++ board/pdm360ng/config.mk | 24 + board/pdm360ng/pdm360ng.c | 650 ++++++++++++++++++++++++++ include/configs/mpc5121-common.h | 53 +++ include/configs/pdm360ng.h | 481 +++++++++++++++++++ 11 files changed, 1307 insertions(+), 6 deletions(-) create mode 100644 board/pdm360ng/Makefile create mode 100644 board/pdm360ng/config.mk create mode 100644 board/pdm360ng/pdm360ng.c create mode 100644 include/configs/mpc5121-common.h create mode 100644 include/configs/pdm360ng.h diff --git a/MAINTAINERS b/MAINTAINERS index 04c87309db..59d3aec0bb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -467,6 +467,10 @@ Josef Wagner CPC45 MPC8245 PM520 MPC5200 +Michael Weiss + + PDM360NG MPC5121e + Stephen Williams JSE PPC405GPr diff --git a/MAKEALL b/MAKEALL index 4632750943..95ac60fad2 100755 --- a/MAKEALL +++ b/MAKEALL @@ -92,6 +92,7 @@ LIST_512x=" \ aria \ mecp5123 \ mpc5121ads \ + pdm360ng \ " ######################################################################### diff --git a/Makefile b/Makefile index 34f10ced18..0f1601e07b 100644 --- a/Makefile +++ b/Makefile @@ -809,6 +809,9 @@ mpc5121ads_rev2_config \ fi @$(MKCONFIG) -a mpc5121ads powerpc mpc512x mpc5121ads freescale +pdm360ng_config: unconfig + @$(MKCONFIG) -a pdm360ng powerpc mpc512x pdm360ng + ######################################################################### ## MPC8xx Systems ######################################################################### diff --git a/arch/powerpc/cpu/mpc512x/diu.c b/arch/powerpc/cpu/mpc512x/diu.c index 93611615f1..f8d19a0a1f 100644 --- a/arch/powerpc/cpu/mpc512x/diu.c +++ b/arch/powerpc/cpu/mpc512x/diu.c @@ -34,6 +34,8 @@ #include #endif +DECLARE_GLOBAL_DATA_PTR; + #ifdef CONFIG_FSL_DIU_LOGO_BMP extern unsigned int FSL_Logo_BMP[]; #else @@ -65,10 +67,11 @@ void diu_set_pixel_clock(unsigned int pixclock) char *valid_bmp(char *addr) { unsigned long h_addr; + bd_t *bd = gd->bd; h_addr = simple_strtoul(addr, NULL, 16); - if (h_addr < CONFIG_SYS_FLASH_BASE || - h_addr >= (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - 1)) { + if (h_addr < bd->bi_flashstart || + h_addr >= (bd->bi_flashstart + bd->bi_flashsize - 1)) { printf("bmp addr %lx is not a valid flash address\n", h_addr); return 0; } else if ((*(char *)(h_addr) != 'B') || (*(char *)(h_addr+1) != 'M')) { @@ -84,8 +87,13 @@ int mpc5121_diu_init(void) char *bmp = NULL; char *bmp_env; +#if defined(CONFIG_VIDEO_XRES) & defined(CONFIG_VIDEO_YRES) + xres = CONFIG_VIDEO_XRES; + yres = CONFIG_VIDEO_YRES; +#else xres = 1024; yres = 768; +#endif pixel_format = 0x88883316; debug("mpc5121_diu_init\n"); diff --git a/arch/powerpc/include/asm/immap_512x.h b/arch/powerpc/include/asm/immap_512x.h index c430cb640b..7f9db8bae3 100644 --- a/arch/powerpc/include/asm/immap_512x.h +++ b/arch/powerpc/include/asm/immap_512x.h @@ -356,6 +356,11 @@ typedef struct ddr512x_config { u32 ddr_time_config2; /* Timing Configuration Register */ } ddr512x_config_t; +typedef struct sdram_conf_s { + unsigned long size; + ddr512x_config_t cfg; +} sdram_conf_t; + /* * DMA/Messaging Unit */ diff --git a/board/freescale/common/fsl_diu_fb.c b/board/freescale/common/fsl_diu_fb.c index 2fc878be8a..cbee8fe093 100644 --- a/board/freescale/common/fsl_diu_fb.c +++ b/board/freescale/common/fsl_diu_fb.c @@ -50,6 +50,22 @@ struct fb_videomode { #define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */ #define FB_VMODE_NONINTERLACED 0 /* non interlaced */ +/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */ +static struct fb_videomode fsl_diu_mode_800 = { + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 31250, + .left_margin = 86, + .right_margin = 42, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 128, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED +}; + /* * These parameters give default parameters * for video output 1024x768, @@ -210,9 +226,14 @@ int fsl_diu_init(int xres, disable_lcdc(); - if (xres == 1280) { + switch (xres) { + case 800: + fsl_diu_mode_db = &fsl_diu_mode_800; + break; + case 1280: fsl_diu_mode_db = &fsl_diu_mode_1280; - } else { + break; + default: fsl_diu_mode_db = &fsl_diu_mode_1024; } @@ -519,9 +540,9 @@ int fsl_diu_display_bmp(unsigned char *bmp, b = *bitmap++; for (k = 0; k < 8; k++) { if (b & 0x80) - *fb_t = palette[1]; + *fb_t++ = palette[1]; else - *fb_t = palette[0]; + *fb_t++ = palette[0]; b = b << 1; } } diff --git a/board/pdm360ng/Makefile b/board/pdm360ng/Makefile new file mode 100644 index 0000000000..8513242081 --- /dev/null +++ b/board/pdm360ng/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2007 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +COBJS := $(COBJS-y) +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/pdm360ng/config.mk b/board/pdm360ng/config.mk new file mode 100644 index 0000000000..c3b07ddc16 --- /dev/null +++ b/board/pdm360ng/config.mk @@ -0,0 +1,24 @@ +# +# (C) Copyright 2009 +# Michael Weiß, ifm ecomatic gmbh, michael.weiss@ifm.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0xF0000000 diff --git a/board/pdm360ng/pdm360ng.c b/board/pdm360ng/pdm360ng.c new file mode 100644 index 0000000000..8fe5ac874e --- /dev/null +++ b/board/pdm360ng/pdm360ng.c @@ -0,0 +1,650 @@ +/* + * (C) Copyright 2009, 2010 Wolfgang Denk + * + * (C) Copyright 2009-2010 + * Michael Weiß, ifm ecomatic gmbh, michael.weiss@ifm.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_MISC_INIT_R +#include +#endif +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +extern flash_info_t flash_info[]; +ulong flash_get_size (phys_addr_t base, int banknum); + +/* Clocks in use */ +#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \ + CLOCK_SCCR1_LPC_EN | \ + CLOCK_SCCR1_NFC_EN | \ + CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ + CLOCK_SCCR1_PSCFIFO_EN | \ + CLOCK_SCCR1_DDR_EN | \ + CLOCK_SCCR1_FEC_EN | \ + CLOCK_SCCR1_TPR_EN) + +#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \ + CLOCK_SCCR2_SPDIF_EN | \ + CLOCK_SCCR2_DIU_EN | \ + CLOCK_SCCR2_I2C_EN) + +int board_early_init_f(void) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + + /* + * Initialize Local Window for FLASH-Bank1 access (CS1) + */ + out_be32(&im->sysconf.lpcs1aw, + CSAW_START(CONFIG_SYS_FLASH1_BASE) | + CSAW_STOP(CONFIG_SYS_FLASH1_BASE, CONFIG_SYS_FLASH_SIZE) + ); + out_be32(&im->lpc.cs_cfg[1], CONFIG_SYS_CS1_CFG); + + /* + * Local Window for MRAM access (CS2) + */ + out_be32(&im->sysconf.lpcs2aw, + CSAW_START(CONFIG_SYS_MRAM_BASE) | + CSAW_STOP(CONFIG_SYS_MRAM_BASE, CONFIG_SYS_MRAM_SIZE) + ); + out_be32(&im->lpc.cs_cfg[2], CONFIG_SYS_CS2_CFG); + + sync_law(&im->sysconf.lpcs2aw); + + /* + * Configure Flash Speed + */ + out_be32(&im->lpc.cs_cfg[0], CONFIG_SYS_CS0_CFG); + out_be32(&im->lpc.altr, CONFIG_SYS_CS_ALETIMING); + + /* + * Enable clocks + */ + out_be32(&im->clk.sccr[0], SCCR1_CLOCKS_EN); + out_be32(&im->clk.sccr[1], SCCR2_CLOCKS_EN); +#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE) + setbits_be32(&im->clk.sccr[1], CLOCK_SCCR2_IIM_EN); +#endif + + return 0; +} + +sdram_conf_t mddrc_config[] = { + { + (512 << 20), /* 512 MB RAM configuration */ + { + CONFIG_SYS_MDDRC_SYS_CFG, + CONFIG_SYS_MDDRC_TIME_CFG0, + CONFIG_SYS_MDDRC_TIME_CFG1, + CONFIG_SYS_MDDRC_TIME_CFG2 + } + }, + { + (128 << 20), /* 128 MB RAM configuration */ + { + CONFIG_SYS_MDDRC_SYS_CFG_ALT1, + CONFIG_SYS_MDDRC_TIME_CFG0_ALT1, + CONFIG_SYS_MDDRC_TIME_CFG1_ALT1, + CONFIG_SYS_MDDRC_TIME_CFG2_ALT1 + } + }, +}; + +phys_size_t initdram (int board_type) +{ + int i; + u32 msize = 0; + u32 pdm360ng_init_seq[] = { + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_PCHG_ALL, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_RFSH, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_RFSH, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_MICRON_INIT_DEV_OP, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_EM2, + CONFIG_SYS_DDRCMD_NOP, + CONFIG_SYS_DDRCMD_PCHG_ALL, + CONFIG_SYS_DDRCMD_EM2, + CONFIG_SYS_DDRCMD_EM3, + CONFIG_SYS_DDRCMD_EN_DLL, + CONFIG_SYS_DDRCMD_RES_DLL, + CONFIG_SYS_DDRCMD_PCHG_ALL, + CONFIG_SYS_DDRCMD_RFSH, + CONFIG_SYS_DDRCMD_RFSH, + CONFIG_SYS_MICRON_INIT_DEV_OP, + CONFIG_SYS_DDRCMD_OCD_DEFAULT, + CONFIG_SYS_DDRCMD_OCD_EXIT, + CONFIG_SYS_DDRCMD_PCHG_ALL, + CONFIG_SYS_DDRCMD_NOP + }; + + for (i = 0; i < ARRAY_SIZE(mddrc_config); i++) { + msize = fixed_sdram(&mddrc_config[i].cfg, pdm360ng_init_seq, + ARRAY_SIZE(pdm360ng_init_seq)); + if (msize == mddrc_config[i].size) + break; + } + + return msize; +} + +#if defined(CONFIG_SERIAL_MULTI) +static int set_lcd_brightness(char *); +#endif + +int misc_init_r(void) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + + /* + * Re-configure flash setup using auto-detected info + */ + if (flash_info[1].size > 0) { + out_be32(&im->sysconf.lpcs1aw, + CSAW_START(gd->bd->bi_flashstart + flash_info[1].size) | + CSAW_STOP(gd->bd->bi_flashstart + flash_info[1].size, + flash_info[1].size)); + sync_law(&im->sysconf.lpcs1aw); + /* + * Re-check to get correct base address + */ + flash_get_size (gd->bd->bi_flashstart + flash_info[1].size, 1); + } else { + /* Disable Bank 1 */ + out_be32(&im->sysconf.lpcs1aw, 0x01000100); + sync_law(&im->sysconf.lpcs1aw); + } + + out_be32(&im->sysconf.lpcs0aw, + CSAW_START(gd->bd->bi_flashstart) | + CSAW_STOP(gd->bd->bi_flashstart, flash_info[0].size)); + sync_law(&im->sysconf.lpcs0aw); + + /* + * Re-check to get correct base address + */ + flash_get_size (gd->bd->bi_flashstart, 0); + + /* + * Re-do flash protection upon new addresses + */ + flash_protect (FLAG_PROTECT_CLEAR, + gd->bd->bi_flashstart, 0xffffffff, + &flash_info[0]); + + /* Monitor protection ON by default */ + flash_protect (FLAG_PROTECT_SET, + CONFIG_SYS_MONITOR_BASE, + CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1, + &flash_info[0]); + + /* Environment protection ON by default */ + flash_protect (FLAG_PROTECT_SET, + CONFIG_ENV_ADDR, + CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1, + &flash_info[0]); + +#ifdef CONFIG_ENV_ADDR_REDUND + /* Redundant environment protection ON by default */ + flash_protect (FLAG_PROTECT_SET, + CONFIG_ENV_ADDR_REDUND, + CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1, + &flash_info[0]); +#endif + +#ifdef CONFIG_FSL_DIU_FB +# if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)) + mpc5121_diu_init(); +#endif +#if defined(CONFIG_SERIAL_MULTI) + set_lcd_brightness(0); +#endif + /* Switch LCD-Backlight and LVDS-Interface on */ + setbits_be32(&im->gpio.gpdir, 0x01040000); + clrsetbits_be32(&im->gpio.gpdat, 0x01000000, 0x00040000); +#endif + +#if defined(CONFIG_HARD_I2C) + if (!getenv("ethaddr")) { + uchar buf[6]; + uchar ifm_oui[3] = { 0, 2, 1, }; + int ret; + + /* I2C-0 for on-board eeprom */ + i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS_NUM); + + /* Read ethaddr from EEPROM */ + ret = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, + CONFIG_SYS_I2C_EEPROM_MAC_OFFSET, 1, buf, 6); + if (ret != 0) { + printf("Error: Unable to read MAC from I2C" + " EEPROM at address %02X:%02X\n", + CONFIG_SYS_I2C_EEPROM_ADDR, + CONFIG_SYS_I2C_EEPROM_MAC_OFFSET); + return 1; + } + + /* Owned by IFM ? */ + if (memcmp(buf, ifm_oui, sizeof(ifm_oui))) { + printf("Illegal MAC address in EEPROM: %pM\n", buf); + return 1; + } + + eth_setenv_enetaddr("ethaddr", buf); + } +#endif /* defined(CONFIG_HARD_I2C) */ + + return 0; +} + +static iopin_t ioregs_init[] = { + /* FUNC1=LPC_CS4 */ + { + offsetof(struct ioctrl512x, io_control_pata_ce1), 1, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) | + IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC3=GPIO10 */ + { + offsetof(struct ioctrl512x, io_control_pata_ce2), 1, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC1=CAN3_TX */ + { + offsetof(struct ioctrl512x, io_control_pata_isolate), 1, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC3=GPIO14 */ + { + offsetof(struct ioctrl512x, io_control_pata_iochrdy), 1, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC2=DIU_LD22 Sets Next 2 to DIU_LD pads */ + /* DIU_LD22-DIU_LD23 */ + { + offsetof(struct ioctrl512x, io_control_pci_ad31), 2, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1) + }, + /* FUNC2=USB1_DATA7 Sets Next 12 to USB1 pads */ + /* USB1_DATA7-USB1_DATA0, USB1_STOP, USB1_NEXT, USB1_CLK, USB1_DIR */ + { + offsetof(struct ioctrl512x, io_control_pci_ad29), 12, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1) + }, + /* FUNC1=VIU_DATA0 Sets Next 3 to VIU_DATA pads */ + /* VIU_DATA0-VIU_DATA2 */ + { + offsetof(struct ioctrl512x, io_control_pci_ad17), 3, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1) + }, + /* FUNC2=FEC_TXD_0 */ + { + offsetof(struct ioctrl512x, io_control_pci_ad14), 1, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1) + }, + /* FUNC1=VIU_DATA3 Sets Next 2 to VIU_DATA pads */ + /* VIU_DATA3, VIU_DATA4 */ + { + offsetof(struct ioctrl512x, io_control_pci_ad13), 2, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1) + }, + /* FUNC2=FEC_RXD_1 Sets Next 12 to FEC pads */ + /* FEC_RXD_1, FEC_RXD_0, FEC_RX_CLK, FEC_TX_CLK, FEC_RX_ER, FEC_RX_DV */ + /* FEC_TX_EN, FEC_TX_ER, FEC_CRS, FEC_MDC, FEC_MDIO, FEC_COL */ + { + offsetof(struct ioctrl512x, io_control_pci_ad11), 12, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1) + }, + /* FUNC2=DIU_LD03 Sets Next 25 to DIU pads */ + /* DIU_LD00-DIU_LD21 */ + { + offsetof(struct ioctrl512x, io_control_pci_cbe0), 22, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(1) + }, + /* FUNC2=DIU_CLK Sets Next 3 to DIU pads */ + /* DIU_CLK, DIU_VSYNC, DIU_HSYNC */ + { + offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC2=CAN3_RX */ + { + offsetof(struct ioctrl512x, io_control_irq1), 1, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* Sets lowest slew on 2 CAN_TX Pins*/ + { + offsetof(struct ioctrl512x, io_control_can1_tx), 2, 0, + IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC3=CAN4_TX Sets Next 2 to CAN4 pads */ + /* CAN4_TX, CAN4_RX */ + { + offsetof(struct ioctrl512x, io_control_j1850_tx), 2, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC3=GPIO8 Sets Next 2 to GPIO pads */ + /* GPIO8, GPIO9 */ + { + offsetof(struct ioctrl512x, io_control_psc0_0), 2, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC1=FEC_TXD_1 Sets Next 3 to FEC pads */ + /* FEC_TXD_1, FEC_TXD_2, FEC_TXD_3 */ + { + offsetof(struct ioctrl512x, io_control_psc0_4), 3, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC1=FEC_RXD_3 Sets Next 2 to FEC pads */ + /* FEC_RXD_3, FEC_RXD_2 */ + { + offsetof(struct ioctrl512x, io_control_psc1_4), 2, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC3=GPIO17 */ + { + offsetof(struct ioctrl512x, io_control_psc2_1), 1, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC3=GPIO2/GPT2 Sets Next 3 to GPIO pads */ + /* GPIO2, GPIO20, GPIO21 */ + { + offsetof(struct ioctrl512x, io_control_psc2_4), 3, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC2=VIU_PIX_CLK */ + { + offsetof(struct ioctrl512x, io_control_psc3_4), 1, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC3=GPIO24 Sets Next 2 to GPIO pads */ + /* GPIO24, GPIO25 */ + { + offsetof(struct ioctrl512x, io_control_psc4_0), 2, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC1=NFC_CE2 */ + { + offsetof(struct ioctrl512x, io_control_psc4_4), 1, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(1) | + IO_PIN_PUE(1) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC2=VIU_DATA5 Sets Next 5 to VIU_DATA pads */ + /* VIU_DATA5-VIU_DATA9 */ + { + offsetof(struct ioctrl512x, io_control_psc5_0), 5, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC1=LPC_TSIZ1 Sets Next 2 to LPC_TSIZ pads */ + /* LPC_TSIZ1-LPC_TSIZ2 */ + { + offsetof(struct ioctrl512x, io_control_psc6_0), 2, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC1=LPC_TS */ + { + offsetof(struct ioctrl512x, io_control_psc6_4), 1, 0, + IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + }, + /* FUNC3=GPIO16 */ + { + offsetof(struct ioctrl512x, io_control_psc7_0), 1, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC3=GPIO18 Sets Next 3 to GPIO pads */ + /* GPIO18-GPIO19, GPT7/GPIO7 */ + { + offsetof(struct ioctrl512x, io_control_psc7_2), 3, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC3=GPIO0/GPT0 */ + { + offsetof(struct ioctrl512x, io_control_psc8_4), 1, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC3=GPIO11 Sets Next 4 to GPIO pads */ + /* GPIO11, GPIO2, GPIO12, GPIO13 */ + { + offsetof(struct ioctrl512x, io_control_psc10_3), 4, 0, + IO_PIN_FMUX(3) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(0) + }, + /* FUNC2=DIU_DE */ + { + offsetof(struct ioctrl512x, io_control_psc11_4), 1, 0, + IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) | + IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3) + } +}; + +int checkboard (void) +{ + volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR; + + puts("Board: PDM360NG\n"); + + /* initialize function mux & slew rate IO inter alia on IO Pins */ + + iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init)); + + /* initialize IO_CONTROL_GP (GPIO/GPT-mux-register) */ + setbits_be32(&im->io_ctrl.io_control_gp, + (1 << 0) | /* GP_MUX7->GPIO7 */ + (1 << 5)); /* GP_MUX2->GPIO2 */ + + /* configure GPIO24 (VIU_CE), output/high */ + setbits_be32(&im->gpio.gpdir, 0x80); + setbits_be32(&im->gpio.gpdat, 0x80); + + return 0; +} + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +#ifdef CONFIG_FDT_FIXUP_PARTITIONS +struct node_info nodes[] = { + { "fsl,mpc5121-nfc", MTD_DEV_TYPE_NAND, }, + { "cfi-flash", MTD_DEV_TYPE_NOR, }, +}; +#endif + +void ft_board_setup(void *blob, bd_t *bd) +{ + u32 val[8]; + int rc, i = 0; + + ft_cpu_setup(blob, bd); + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); +#ifdef CONFIG_FDT_FIXUP_PARTITIONS + fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); +#endif + + /* Fixup NOR FLASH mapping */ + val[i++] = 0; /* chip select number */ + val[i++] = 0; /* always 0 */ + val[i++] = gd->bd->bi_flashstart; + val[i++] = gd->bd->bi_flashsize; + + /* Fixup MRAM mapping */ + val[i++] = 2; /* chip select number */ + val[i++] = 0; /* always 0 */ + val[i++] = CONFIG_SYS_MRAM_BASE; + val[i++] = CONFIG_SYS_MRAM_SIZE; + + rc = fdt_find_and_setprop(blob, "/localbus", "ranges", + val, i * sizeof(u32), 1); + if (rc) + printf("Unable to update localbus ranges, err=%s\n", + fdt_strerror(rc)); + + /* Fixup reg property in NOR Flash node */ + i = 0; + val[i++] = 0; /* always 0 */ + val[i++] = 0; /* start at offset 0 */ + val[i++] = flash_info[0].size; /* size of Bank 0 */ + + /* Second Bank available? */ + if (flash_info[1].size > 0) { + val[i++] = 0; /* always 0 */ + val[i++] = flash_info[0].size; /* offset of Bank 1 */ + val[i++] = flash_info[1].size; /* size of Bank 1 */ + } + + rc = fdt_find_and_setprop(blob, "/localbus/flash", "reg", + val, i * sizeof(u32), 1); + if (rc) + printf("Unable to update flash reg property, err=%s\n", + fdt_strerror(rc)); +} +#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ + +#if defined(CONFIG_SERIAL_MULTI) +/* + * If argument is NULL, set the LCD brightness to the + * value from "brightness" environment variable. Set + * the LCD brightness to the value specified by the + * argument otherwise. Default brightness is zero. + */ +#define MAX_BRIGHTNESS 99 +static int set_lcd_brightness(char *brightness) +{ + struct stdio_dev *cop_port; + char *env; + char cmd_buf[20]; + int val = 0; + int cs = 0; + int len, i; + + if (brightness) { + val = simple_strtol(brightness, NULL, 10); + } else { + env = getenv("brightness"); + if (env) + val = simple_strtol(env, NULL, 10); + } + + if (val < 0) + val = 0; + + if (val > MAX_BRIGHTNESS) + val = MAX_BRIGHTNESS; + + sprintf(cmd_buf, "$SB;%04d;", val); + + len = strlen(cmd_buf); + for (i = 1; i <= len; i++) + cs += cmd_buf[i]; + + cs = (~cs + 1) & 0xff; + sprintf(cmd_buf + len, "%02X\n", cs); + + /* IO Coprocessor communication */ + cop_port = open_port(4, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE); + if (!cop_port) { + printf("Error: Can't open IO Coprocessor port.\n"); + return -1; + } + + debug("%s: cmd: %s", __func__, cmd_buf); + write_port(cop_port, cmd_buf); + /* + * Wait for transmission and maybe response data + * before closing the port. + */ + udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY); + memset(cmd_buf, 0, sizeof(cmd_buf)); + len = read_port(cop_port, cmd_buf, sizeof(cmd_buf)); + if (len) + printf("Error: %s\n", cmd_buf); + + close_port(4); + + return 0; +} + +static int cmd_lcd_brightness(cmd_tbl_t *cmdtp, int flag, + int argc, char *argv[]) +{ + if (argc < 2) { + cmd_usage(cmdtp); + return 1; + } + + return set_lcd_brightness(argv[1]); +} + +U_BOOT_CMD(lcdbr, 2, 1, cmd_lcd_brightness, + "set LCD brightness", + " - set LCD backlight level to .\n" +); +#endif /* CONFIG_SERIAL_MULTI */ diff --git a/include/configs/mpc5121-common.h b/include/configs/mpc5121-common.h new file mode 100644 index 0000000000..96fab20936 --- /dev/null +++ b/include/configs/mpc5121-common.h @@ -0,0 +1,53 @@ +/* + * (C) Copyright 2010 DENX Software Engineering + * Anatolij Gustschin + * + * Common configuration options for MPC5121 based boards + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __MPC5121_COMMON_H +#define __MPC5121_COMMON_H + +/* Use SRAM for initial stack */ +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Init RAM base */ +#define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_SRAM_SIZE /* End of area */ + +#define CONFIG_SYS_GBL_DATA_SIZE 0x100 /* num bytes of initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ + CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR + +#define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest region */ +#define CONFIG_SYS_MEMTEST_END 0x00400000 + +/* + * Serial console + */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} + +#define CONFIG_CMDLINE_EDITING 1 /* command line history */ +/* Use the HUSH parser */ +#define CONFIG_SYS_HUSH_PARSER +#ifdef CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#endif + +#endif /* __MPC5121_COMMON_H */ diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h new file mode 100644 index 0000000000..228a686886 --- /dev/null +++ b/include/configs/pdm360ng.h @@ -0,0 +1,481 @@ +/* + * (C) Copyright 2009-2010 + * Michael Weiß, ifm ecomatic gmbh, michael.weiss@ifm.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * pdm360ng board configuration file + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_PDM360NG 1 + +/* + * Memory map for the PDM360NG board: + * + * 0x0000_0000 - 0x1FFF_FFFF DDR RAM (512 MB) + * 0x2000_0000 - 0x3FFF_FFFF reserved (DDR RAM (512 MB) + * 0x5000_0000 - 0x5001_FFFF SRAM (128 KB) + * 0x5004_0000 - 0x5005_FFFF MRAM (CS2) (128 KB) + * 0x8000_0000 - 0x803F_FFFF IMMR (4 MB) + * 0xF000_0000 - 0xF7FF_FFFF NOR FLASH (CS0) (128 MB) + * 0xF800_0000 - 0xFFFF_FFFF NOR FLASH (CS1) (128 MB) optional + */ + +/* + * High Level Configuration Options + */ +#define CONFIG_E300 1 /* E300 Family */ +#define CONFIG_MPC512X 1 /* MPC512X family */ +#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */ + +/* Used for silent command in environment */ +#define CONFIG_SYS_DEVICE_NULLDEV +#define CONFIG_SILENT_CONSOLE + +/* Video */ +#define CONFIG_VIDEO + +#if defined(CONFIG_VIDEO) +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SPLASH_SCREEN +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_XRES 800 +#define CONFIG_VIDEO_YRES 480 +#endif + +#define CONFIG_SYS_MPC512X_CLKIN 33333333 /* in Hz */ + +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ +#define CONFIG_MISC_INIT_R + +#define CONFIG_SYS_IMMR 0x80000000 +#define CONFIG_SYS_DIU_ADDR ((CONFIG_SYS_IMMR) + 0x2100) + +/* + * DDR Setup + */ + +/* DDR is system memory */ +#define CONFIG_SYS_DDR_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE +#define CONFIG_SYS_MAX_RAM_SIZE 0x40000000 + +/* DDR pin mux and slew rate */ +#define CONFIG_SYS_IOCTRL_MUX_DDR 0x00000012 + +/* Manually set all parameters as there's no SPD etc. */ +/* + * DDR Controller Configuration for Micron DDR2 SDRAM MT47H128M8-3 + * + * SYS_CFG: + * [31:31] MDDRC Soft Reset: Diabled + * [30:30] DRAM CKE pin: Enabled + * [29:29] DRAM CLK: Enabled + * [28:28] Command Mode: Enabled (For initialization only) + * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10] + * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10] + * [20:19] Read Test: DON'T USE + * [18:18] Self Refresh: Enabled + * [17:17] 16bit Mode: Disabled + * [16:13] Read Delay: 3 + * [12:12] Half DQS Delay: Disabled + * [11:11] Quarter DQS Delay: Disabled + * [10:08] Write Delay: 2 + * [07:07] Early ODT: Disabled + * [06:06] On DIE Termination: Enabled + * [05:05] FIFO Overflow Clear: DON'T USE here + * [04:04] FIFO Underflow Clear: DON'T USE here + * [03:03] FIFO Overflow Pending: DON'T USE here + * [02:02] FIFO Underlfow Pending: DON'T USE here + * [01:01] FIFO Overlfow Enabled: Enabled + * [00:00] FIFO Underflow Enabled: Enabled + * TIME_CFG0 + * [31:16] DRAM Refresh Time: 0 CSB clocks + * [15:8] DRAM Command Time: 0 CSB clocks + * [07:00] DRAM Precharge Time: 0 CSB clocks + * TIME_CFG1 + * [31:26] DRAM tRFC: + * [25:21] DRAM tWR1: + * [20:17] DRAM tWRT1: + * [16:11] DRAM tDRR: + * [10:05] DRAM tRC: + * [04:00] DRAM tRAS: + * TIME_CFG2 + * [31:28] DRAM tRCD: + * [27:23] DRAM tFAW: + * [22:19] DRAM tRTW1: + * [18:15] DRAM tCCD: + * [14:10] DRAM tRTP: + * [09:05] DRAM tRP: + * [04:00] DRAM tRPA + */ +#define CONFIG_SYS_MDDRC_SYS_CFG 0xEA804A40 +#define CONFIG_SYS_MDDRC_TIME_CFG0 0x030C3D2E +#define CONFIG_SYS_MDDRC_TIME_CFG1 0x68EC1168 +#define CONFIG_SYS_MDDRC_TIME_CFG2 0x34310864 + +/* + * Alternative 1: small RAM (128 MB) configuration + */ +#define CONFIG_SYS_MDDRC_SYS_CFG_ALT1 0xE8604A40 +#define CONFIG_SYS_MDDRC_TIME_CFG0_ALT1 0x030C3D2E +#define CONFIG_SYS_MDDRC_TIME_CFG1_ALT1 0x3CEC1168 +#define CONFIG_SYS_MDDRC_TIME_CFG2_ALT1 0x33310863 + +#define CONFIG_SYS_MDDRC_SYS_CFG_EN 0xF0000000 + +#define CONFIG_SYS_DDRCMD_NOP 0x01380000 +#define CONFIG_SYS_DDRCMD_PCHG_ALL 0x01100400 +#define CONFIG_SYS_DDRCMD_EM2 0x01020000 /* EMR2 */ +#define CONFIG_SYS_DDRCMD_EM3 0x01030000 /* EMR3 */ +/* EMR with 150 ohm ODT todo: verify */ +#define CONFIG_SYS_DDRCMD_EN_DLL 0x01010040 +#define CONFIG_SYS_DDRCMD_RES_DLL 0x01000100 +#define CONFIG_SYS_DDRCMD_RFSH 0x01080000 +#define CONFIG_SYS_MICRON_INIT_DEV_OP 0x01000432 +/* EMR with 150 ohm ODT todo: verify */ +#define CONFIG_SYS_DDRCMD_OCD_DEFAULT 0x010107C0 +/* EMR new command with 150 ohm ODT todo: verify */ +#define CONFIG_SYS_DDRCMD_OCD_EXIT 0x01010440 + +/* DDR Priority Manager Configuration */ +#define CONFIG_SYS_MDDRCGRP_PM_CFG1 0x00077777 +#define CONFIG_SYS_MDDRCGRP_PM_CFG2 0x00000000 +#define CONFIG_SYS_MDDRCGRP_HIPRIO_CFG 0x00000001 +#define CONFIG_SYS_MDDRCGRP_LUT0_MU 0xFFEEDDCC +#define CONFIG_SYS_MDDRCGRP_LUT0_ML 0xBBAAAAAA +#define CONFIG_SYS_MDDRCGRP_LUT1_MU 0x66666666 +#define CONFIG_SYS_MDDRCGRP_LUT1_ML 0x55555555 +#define CONFIG_SYS_MDDRCGRP_LUT2_MU 0x44444444 +#define CONFIG_SYS_MDDRCGRP_LUT2_ML 0x44444444 +#define CONFIG_SYS_MDDRCGRP_LUT3_MU 0x55555555 +#define CONFIG_SYS_MDDRCGRP_LUT3_ML 0x55555558 +#define CONFIG_SYS_MDDRCGRP_LUT4_MU 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT4_ML 0x11111122 +#define CONFIG_SYS_MDDRCGRP_LUT0_AU 0xaaaaaaaa +#define CONFIG_SYS_MDDRCGRP_LUT0_AL 0xaaaaaaaa +#define CONFIG_SYS_MDDRCGRP_LUT1_AU 0x66666666 +#define CONFIG_SYS_MDDRCGRP_LUT1_AL 0x66666666 +#define CONFIG_SYS_MDDRCGRP_LUT2_AU 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT2_AL 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT3_AU 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT3_AL 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT4_AU 0x11111111 +#define CONFIG_SYS_MDDRCGRP_LUT4_AL 0x11111111 + +/* + * NOR FLASH on the Local Bus + */ +#define CONFIG_SYS_FLASH_CFI /* use Common Flash Interface */ +#define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE + +#define CONFIG_SYS_FLASH_BASE 0xF0000000 /* start of FLASH-Bank0 */ +#define CONFIG_SYS_FLASH_SIZE 0x08000000 /* max size of a Bank */ +/* start of FLASH-Bank1 */ +#define CONFIG_SYS_FLASH1_BASE (CONFIG_SYS_FLASH_BASE + \ + CONFIG_SYS_FLASH_SIZE) +#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max sectors per device */ +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_FLASH_BANKS_LIST \ + {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH1_BASE} + +#define CONFIG_SYS_SRAM_BASE 0x50000000 +#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */ + +/* ALE active low, data size 4 bytes */ +#define CONFIG_SYS_CS0_CFG 0x05059350 +/* ALE active low, data size 4 bytes */ +#define CONFIG_SYS_CS1_CFG 0x05059350 + +#define CONFIG_SYS_MRAM_BASE 0x50040000 +#define CONFIG_SYS_MRAM_SIZE 0x00020000 +/* ALE active low, data size 4 bytes */ +#define CONFIG_SYS_CS2_CFG 0x05059110 + +/* alt. CS timing for CS0, CS1, CS2 */ +#define CONFIG_SYS_CS_ALETIMING 0x00000007 + +/* + * NAND FLASH + */ +#define CONFIG_CMD_NAND /* enable NAND support */ +#define CONFIG_NAND_MPC5121_NFC +#define CONFIG_SYS_NAND_BASE 0x40000000 + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE +#define CONFIG_SYS_NAND_SELECT_DEVICE /* driver supports mutipl. chips */ + +/* + * Configuration parameters for MPC5121 NAND driver + */ +#define CONFIG_FSL_NFC_WIDTH 1 +#define CONFIG_FSL_NFC_WRITE_SIZE 2048 +#define CONFIG_FSL_NFC_SPARE_SIZE 64 +#define CONFIG_FSL_NFC_CHIPS CONFIG_SYS_MAX_NAND_DEVICE + +/* + * Dynamic MTD partition support + */ +#define CONFIG_CMD_MTDPARTS +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_FLASH_CFI_MTD +#define MTDIDS_DEFAULT "nor0=f0000000.flash,nor1=f8000000.flash," \ + "nand0=MPC5121 NAND" + +/* + * Flash layout + */ +#define MTDPARTS_DEFAULT "mtdparts=f0000000.flash:512k(u-boot)," \ + "256k(environment1)," \ + "256k(environment2)," \ + "256k(splash-factory)," \ + "2m(FIT: recovery)," \ + "4608k(fs-recovery)," \ + "256k(splash-customer),"\ + "5m(FIT: kernel+dtb)," \ + "64m(rootfs squash)ro," \ + "51m(userfs ubi);" \ + "f8000000.flash:-(unused);" \ + "MPC5121 NAND:1024m(extended-userfs)" + +/* + * Override partitions in device tree using info + * in "mtdparts" environment variable + */ +#ifdef CONFIG_CMD_MTDPARTS +#define CONFIG_FDT_FIXUP_PARTITIONS +#endif + +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* Start of monitor */ +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* 512 kB for monitor */ +#ifdef CONFIG_FSL_DIU_FB +#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* for malloc */ +#else +#define CONFIG_SYS_MALLOC_LEN (512 * 1024) +#endif + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 + +/* + * Serial console configuration + */ +#define CONFIG_PSC_CONSOLE 6 /* console is on PSC6 */ +#if CONFIG_PSC_CONSOLE != 6 +#error CONFIG_PSC_CONSOLE must be 6 +#endif + +#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC6_TX_SIZE +#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC6_TX_ADDR +#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC6_RX_SIZE +#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC6_RX_ADDR + +/* + * Used PSC UART devices + */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_SYS_PSC1 +#define CONFIG_SYS_PSC4 +#define CONFIG_SYS_PSC6 + +/* + * Co-processor communication parameters + */ +#define CONFIG_SYS_PDM360NG_COPROC_READ_DELAY 5000 +#define CONFIG_SYS_PDM360NG_COPROC_BAUDRATE 38400 + +/* + * I2C + */ +#define CONFIG_HARD_I2C /* I2C with hardware support */ +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE +/* I2C speed and slave address */ +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_I2C_SLAVE 0x7F + +/* + * EEPROM configuration + */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* 16-bit EEPROM addr */ +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* ST AT24C01 */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10ms of delay */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-Byte Write Mode */ + +/* + * MAC addr in EEPROM + */ +#define CONFIG_SYS_I2C_EEPROM_BUS_NUM 0 +#define CONFIG_SYS_I2C_EEPROM_MAC_OFFSET 0x10 +/* + * Enabled only to delete "ethaddr" before testing + * "ethaddr" setting from EEPROM + */ +#define CONFIG_ENV_OVERWRITE + +/* + * Ethernet configuration + */ +#define CONFIG_MPC512x_FEC 1 +#define CONFIG_NET_MULTI +#define CONFIG_PHY_ADDR 0x1F +#define CONFIG_MII 1 /* MII PHY management */ +#define CONFIG_FEC_AN_TIMEOUT 1 +#define CONFIG_HAS_ETH0 + +/* + * Configure on-board RTC + */ +#define CONFIG_RTC_M41T62 /* use M41T00 rtc via i2c */ +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 /* at address 0x68 */ + +/* + * Environment + */ +#define CONFIG_ENV_IS_IN_FLASH 1 +/* This has to be a multiple of the Flash sector size */ +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */ + +/* Address and size of Redundant Environment Sector */ +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) + +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ + +#include + +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_PING +#define CONFIG_CMD_REGINFO + +#ifdef CONFIG_VIDEO +#define CONFIG_CMD_BMP +#endif + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ + +#ifdef CONFIG_CMD_KGDB + #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#else + #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#endif + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +/* Max number of command args */ +#define CONFIG_SYS_MAXARGS 16 +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +/* Decrementer freq: 1ms ticks */ +#define CONFIG_SYS_HZ 1000 + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +/* Initial Memory map for Linux */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) + +/* Cache Configuration */ +#define CONFIG_SYS_DCACHE_SIZE 32768 +#define CONFIG_SYS_CACHELINE_SIZE 32 +#ifdef CONFIG_CMD_KGDB +/* log base 2 of the above value */ +#define CONFIG_SYS_CACHELINE_SHIFT 5 +#endif + +#define CONFIG_SYS_HID0_INIT 0x000000000 +#define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | HID0_ICE) +#define CONFIG_SYS_HID2 HID2_HBE + +#define CONFIG_HIGH_BATS 1 /* High BATs supported */ + +/* + * Internal Definitions + * + * Boot Flags + */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ +#endif + +/* + * Environment Configuration + */ +#define CONFIG_TIMESTAMP + +#define CONFIG_HOSTNAME pdm360ng +/* default location for tftp and bootm */ +#define CONFIG_LOADADDR 400000 + +#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */ + +#define CONFIG_PREBOOT "echo;" \ + "echo PDM360NG SAMPLE;" \ + "echo" + +#define CONFIG_BOOTCOMMAND "run env_cont" + +#define CONFIG_OF_LIBFDT 1 +#define CONFIG_OF_BOARD_SETUP 1 +#define CONFIG_OF_SUPPORT_OLD_DEVICE_TREES 1 +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE + +#define OF_CPU "PowerPC,5121@0" +#define OF_SOC_COMPAT "fsl,mpc5121-immr" +#define OF_TBCLK (bd->bi_busfreq / 4) +#define OF_STDOUT_PATH "/soc@80000000/serial@11600" + +/* + * Include common options for all mpc5121 boards + */ +#include "mpc5121-common.h" + +#endif /* __CONFIG_H */ From 2ebdb9a9d7abcb17fdbfdc4bbb71b4ef538fc713 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 24 Apr 2010 19:27:10 +0200 Subject: [PATCH 26/76] mpc5121: add common post_word_load/store code Add common post_word_load/post_word_store routines for all mpc5121 boards. pdm360ng board POST support added by subsequent patch needs them. Signed-off-by: Anatolij Gustschin --- arch/powerpc/cpu/mpc512x/Makefile | 1 + arch/powerpc/cpu/mpc512x/common.c | 25 +++++++++++++++++++++++++ 2 files changed, 26 insertions(+) create mode 100644 arch/powerpc/cpu/mpc512x/common.c diff --git a/arch/powerpc/cpu/mpc512x/Makefile b/arch/powerpc/cpu/mpc512x/Makefile index 1719c66e8d..9cfdb0f35d 100644 --- a/arch/powerpc/cpu/mpc512x/Makefile +++ b/arch/powerpc/cpu/mpc512x/Makefile @@ -29,6 +29,7 @@ LIB = $(obj)lib$(CPU).a START = start.o COBJS-y := cpu.o COBJS-y += traps.o +COBJS-y += common.o COBJS-y += cpu_init.o COBJS-y += fixed_sdram.o COBJS-y += i2c.o diff --git a/arch/powerpc/cpu/mpc512x/common.c b/arch/powerpc/cpu/mpc512x/common.c new file mode 100644 index 0000000000..180d323cf9 --- /dev/null +++ b/arch/powerpc/cpu/mpc512x/common.c @@ -0,0 +1,25 @@ +#include +#include + +#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) + +#if defined(CONFIG_SYS_POST_WORD_ADDR) +# define _POST_ADDR (CONFIG_SYS_POST_WORD_ADDR) +#else +#error echo "No POST word address defined" +#endif + +void post_word_store(ulong a) +{ + volatile void *save_addr = (volatile void *)(_POST_ADDR); + + out_be32(save_addr, a); +} + +ulong post_word_load(void) +{ + volatile void *save_addr = (volatile void *)(_POST_ADDR); + + return in_be32(save_addr); +} +#endif /* CONFIG_POST || CONFIG_LOGBUFFER */ From 29fd7ceb3c1cb7ffaffce1047e806d1e85e3ab4b Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 24 Apr 2010 19:27:11 +0200 Subject: [PATCH 27/76] mpc5121: pdm360ng: add coprocessor POST Adds coprocessor communication POST code Signed-off-by: Anatolij Gustschin --- include/configs/pdm360ng.h | 5 ++ include/post.h | 1 + post/board/pdm360ng/Makefile | 29 ++++++++++ post/board/pdm360ng/coproc_com.c | 97 ++++++++++++++++++++++++++++++++ post/tests.c | 13 +++++ 5 files changed, 145 insertions(+) create mode 100644 post/board/pdm360ng/Makefile create mode 100644 post/board/pdm360ng/coproc_com.c diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h index 228a686886..718abdf42b 100644 --- a/include/configs/pdm360ng.h +++ b/include/configs/pdm360ng.h @@ -445,6 +445,11 @@ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif +#ifdef CONFIG_SERIAL_MULTI +/* POST support */ +#define CONFIG_POST (CONFIG_SYS_POST_COPROC) +#endif + /* * Environment Configuration */ diff --git a/include/post.h b/include/post.h index ff83bce6b4..3da959d9a3 100644 --- a/include/post.h +++ b/include/post.h @@ -124,6 +124,7 @@ extern int post_hotkeys_pressed(void); #define CONFIG_SYS_POST_BSPEC4 0x00080000 #define CONFIG_SYS_POST_BSPEC5 0x00100000 #define CONFIG_SYS_POST_CODEC 0x00200000 +#define CONFIG_SYS_POST_COPROC 0x00400000 #endif /* CONFIG_POST */ diff --git a/post/board/pdm360ng/Makefile b/post/board/pdm360ng/Makefile new file mode 100644 index 0000000000..d1538f6727 --- /dev/null +++ b/post/board/pdm360ng/Makefile @@ -0,0 +1,29 @@ +# +# (C) Copyright 2010 DENX Software Engineering +# Anatolij Gustschin, agust@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +include $(OBJTREE)/include/autoconf.mk + +LIB = libpostpdm360ng.a + +COBJS-$(CONFIG_HAS_POST) += coproc_com.o + +include $(TOPDIR)/post/rules.mk diff --git a/post/board/pdm360ng/coproc_com.c b/post/board/pdm360ng/coproc_com.c new file mode 100644 index 0000000000..075535213b --- /dev/null +++ b/post/board/pdm360ng/coproc_com.c @@ -0,0 +1,97 @@ +/* + * (C) Copyright 2010 DENX Software Engineering, + * Anatolij Gustschin, agust@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Co-Processor communication POST + */ +#include +#include +#include + +#if defined(CONFIG_SERIAL_MULTI) + +/* + * Actually the termination sequence of the coprocessor + * commands is "\r\n" (CR LF), but here we use a side effect of + * the putc() routine of the serial driver which checks for LF + * and sends CR before sending LF. Therefore the termination + * sequence in the command below is only "\n". + * "alive" string is the coprocessor response for ping command + * and not a command, therefore it is terminated with "\r\n". + */ +char alive[] = "$AL;38\r\n"; +char ping[] = "$PI;2C\n"; + +int coprocessor_post_test(int flags) +{ + struct stdio_dev *cop_port; + int ret; + char buf[10]; + + /* Test IO Coprocessor communication */ + cop_port = open_port(4, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE); + if (!cop_port) + return -1; + + write_port(cop_port, ping); + udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY); + + memset(buf, 0, sizeof(buf)); + ret = read_port(cop_port, buf, sizeof(buf)); + close_port(4); + if (ret <= 0) { + post_log("Error: Can't read IO Coprocessor port.\n"); + return -1; + } + + if (strcmp(buf, alive)) { + post_log("Error: IO-Cop. resp.: %s\n", buf); + return -1; + } + + /* Test WD Coprocessor communication */ + cop_port = open_port(1, CONFIG_SYS_PDM360NG_COPROC_BAUDRATE); + if (!cop_port) { + post_log("Error: Can't open WD Coprocessor port.\n"); + return -1; + } + + write_port(cop_port, ping); + udelay(CONFIG_SYS_PDM360NG_COPROC_READ_DELAY); + + memset(buf, 0, sizeof(buf)); + ret = read_port(cop_port, buf, sizeof(buf)); + close_port(1); + if (ret <= 0) { + post_log("Error: Can't read WD Coprocessor port.\n"); + return -1; + } + + if (strcmp(buf, alive)) { + post_log("Error: WD-Cop. resp.: %s\n", buf); + return -1; + } + + return 0; +} +#endif /* CONFIG_SERIAL_MULTI */ diff --git a/post/tests.c b/post/tests.c index 3224f009a6..a4066f9f8b 100644 --- a/post/tests.c +++ b/post/tests.c @@ -53,6 +53,7 @@ extern int gdc_post_test (int flags); extern int fpga_post_test (int flags); extern int lwmon5_watchdog_post_test(int flags); extern int sysmon1_post_test(int flags); +extern int coprocessor_post_test(int flags); extern int sysmon_init_f (void); @@ -286,6 +287,18 @@ struct post_test post_list[] = #if CONFIG_POST & CONFIG_SYS_POST_BSPEC5 CONFIG_POST_BSPEC5, #endif +#if CONFIG_POST & CONFIG_SYS_POST_COPROC + { + "Coprocessors communication test", + "coproc_com", + "This test checks communication with coprocessors.", + POST_RAM | POST_ALWAYS | POST_CRITICAL, + &coprocessor_post_test, + NULL, + NULL, + CONFIG_SYS_POST_COPROC + } +#endif }; unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test); From dd168ef5b82255401e46a27faae09e39c66967fe Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Sat, 17 Apr 2010 17:39:12 +0800 Subject: [PATCH 28/76] nios2: allow link script overriding from boards This patch allow boards to override the default link script. Signed-off-by: Thomas Chou Signed-off-by: Scott McNutt --- arch/nios2/config.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/nios2/config.mk b/arch/nios2/config.mk index f455982f3a..8e5d6ef03c 100644 --- a/arch/nios2/config.mk +++ b/arch/nios2/config.mk @@ -29,4 +29,4 @@ STANDALONE_LOAD_ADDR = 0x02000000 -L $(gcclibdir) PLATFORM_CPPFLAGS += -DCONFIG_NIOS2 -D__NIOS2__ PLATFORM_CPPFLAGS += -ffixed-r15 -G0 -LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds +LDSCRIPT ?= $(SRCTREE)/$(CPUDIR)/u-boot.lds From e4bf588609d8d9cefbc312a6c6b8bb309b194fd5 Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Wed, 31 Mar 2010 08:36:24 +0800 Subject: [PATCH 29/76] nios2: add altera cf reset This patch toggles power to reset the cf card. Signed-off-by: Thomas Chou Signed-off-by: Scott McNutt --- board/altera/common/cfide.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 board/altera/common/cfide.c diff --git a/board/altera/common/cfide.c b/board/altera/common/cfide.c new file mode 100644 index 0000000000..40d6a12b55 --- /dev/null +++ b/board/altera/common/cfide.c @@ -0,0 +1,33 @@ +/* + * Altera CF drvier + * + * (C) Copyright 2010, Thomas Chou + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include + +#if defined(CONFIG_IDE_RESET) && defined(CONFIG_SYS_CF_CTL_BASE) +/* ide_set_reset for Altera CF interface */ +#define ALTERA_CF_CTL_STATUS 0 +#define ALTERA_CF_IDE_CTL 4 +#define ALTERA_CF_CTL_STATUS_PRESENT_MSK (0x1) +#define ALTERA_CF_CTL_STATUS_POWER_MSK (0x2) +#define ALTERA_CF_CTL_STATUS_RESET_MSK (0x4) +#define ALTERA_CF_CTL_STATUS_IRQ_EN_MSK (0x8) +#define ALTERA_CF_IDE_CTL_IRQ_EN_MSK (0x1) + +void ide_set_reset(int idereset) +{ + int i; + writel(idereset ? ALTERA_CF_CTL_STATUS_RESET_MSK : + ALTERA_CF_CTL_STATUS_POWER_MSK, + CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_CTL_STATUS); + /* wait 500 ms for power to stabilize */ + for (i = 0; i < 500; i++) + udelay(1000); +} +#endif From 0dc1c7f692c15fe1745e3eeab918e98ee6126677 Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Sat, 17 Apr 2010 23:10:09 +0800 Subject: [PATCH 30/76] nios2: add 64 bits swab support This patch adds 64 bits swab support. Most 32 bits processors use this. We need 64 bits swab for UBI. Signed-off-by: Thomas Chou Signed-off-by: Scott McNutt --- arch/nios2/include/asm/byteorder.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/nios2/include/asm/byteorder.h b/arch/nios2/include/asm/byteorder.h index 495c823af2..d5c152e73e 100644 --- a/arch/nios2/include/asm/byteorder.h +++ b/arch/nios2/include/asm/byteorder.h @@ -25,6 +25,12 @@ #define __ASM_NIOS2_BYTEORDER_H_ #include + +#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) +# define __BYTEORDER_HAS_U64__ +# define __SWAB_64_THRU_32__ +#endif + #include #endif /* __ASM_NIOS2_BYTEORDER_H_ */ From 7e812f2e9cdac80f6287d4aee5deb434597c4f8b Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Sat, 17 Apr 2010 23:34:40 +0800 Subject: [PATCH 31/76] nios2: add dma_alloc_coherent This function return cache-line aligned allocation which is mapped to uncached io region. Signed-off-by: Thomas Chou Signed-off-by: Scott McNutt --- arch/nios2/include/asm/dma-mapping.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 arch/nios2/include/asm/dma-mapping.h diff --git a/arch/nios2/include/asm/dma-mapping.h b/arch/nios2/include/asm/dma-mapping.h new file mode 100644 index 0000000000..1350e3b96f --- /dev/null +++ b/arch/nios2/include/asm/dma-mapping.h @@ -0,0 +1,23 @@ +#ifndef __ASM_NIOS2_DMA_MAPPING_H +#define __ASM_NIOS2_DMA_MAPPING_H + +/* dma_alloc_coherent() return cache-line aligned allocation which is mapped + * to uncached io region. + * + * IO_REGION_BASE should be defined in board config header file + * 0x80000000 for nommu, 0xe0000000 for mmu + */ + +static inline void *dma_alloc_coherent(size_t len, unsigned long *handle) +{ + void *addr = malloc(len + CONFIG_SYS_DCACHELINE_SIZE); + if (!addr) + return 0; + flush_dcache((unsigned long)addr, len + CONFIG_SYS_DCACHELINE_SIZE); + *handle = ((unsigned long)addr + + (CONFIG_SYS_DCACHELINE_SIZE - 1)) & + ~(CONFIG_SYS_DCACHELINE_SIZE - 1) & ~(IO_REGION_BASE); + return (void *)(*handle | IO_REGION_BASE); +} + +#endif /* __ASM_NIOS2_DMA_MAPPING_H */ From 994852966d2e6cf98c1dbeea8ee62c233b305ffb Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Wed, 31 Mar 2010 08:30:08 +0800 Subject: [PATCH 32/76] altera_jtag_uart: bypass when no jtag connection This patch adds an option to bypass output waiting when there is no jtag connection. This allows the jtag uart work similar to a serial uart, ie, boot even without connection. This option is enabled with CONFIG_ALTERA_JTAG_UART_BYPASS Signed-off-by: Thomas Chou Signed-off-by: Scott McNutt --- drivers/serial/altera_jtag_uart.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c index fb28aa9eb9..2980e4d07c 100644 --- a/drivers/serial/altera_jtag_uart.c +++ b/drivers/serial/altera_jtag_uart.c @@ -38,8 +38,16 @@ int serial_init( void ) { return(0);} void serial_putc (char c) { - while (NIOS_JTAG_WSPACE ( readl (&jtag->control)) == 0) - WATCHDOG_RESET (); + while (1) { + unsigned st = readl(&jtag->control); + if (NIOS_JTAG_WSPACE(st)) + break; +#ifdef CONFIG_ALTERA_JTAG_UART_BYPASS + if (!(st & NIOS_JTAG_AC)) /* no connection */ + return; +#endif + WATCHDOG_RESET(); + } writel ((unsigned char)c, &jtag->data); } From fd2712d0b1d4c1624bef35b784ee64451ee5a017 Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Tue, 20 Apr 2010 11:01:11 +0800 Subject: [PATCH 33/76] nios2: consolidate reset initialization Global interrupt should be disabled from the beginning. Signed-off-by: Thomas Chou Signed-off-by: Scott McNutt --- arch/nios2/cpu/start.S | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/nios2/cpu/start.S b/arch/nios2/cpu/start.S index 31cd5b004a..d1016ea718 100644 --- a/arch/nios2/cpu/start.S +++ b/arch/nios2/cpu/start.S @@ -34,6 +34,7 @@ .global _start _start: + wrctl status, r0 /* Disable interrupts */ /* ICACHE INIT -- only the icache line at the reset address * is invalidated at reset. So the init must stay within * the cache line size (8 words). If GERMS is used, we'll @@ -43,10 +44,9 @@ _start: ori r4, r0, %lo(CONFIG_SYS_ICACHELINE_SIZE) movhi r5, %hi(CONFIG_SYS_ICACHE_SIZE) ori r5, r5, %lo(CONFIG_SYS_ICACHE_SIZE) - mov r6, r0 -0: initi r6 - add r6, r6, r4 - bltu r6, r5, 0b +0: initi r5 + sub r5, r5, r4 + bgt r5, r0, 0b br _except_end /* Skip the tramp */ /* EXCEPTION TRAMPOLINE -- the following gets copied @@ -62,7 +62,6 @@ _except_end: /* INTERRUPTS -- for now, all interrupts masked and globally * disabled. */ - wrctl status, r0 /* Disable interrupts */ wrctl ienable, r0 /* All disabled */ /* DCACHE INIT -- if dcache not implemented, initd behaves as From 441cac10d8a9438b144ab0ad46280780b58f638b Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Thu, 22 Apr 2010 17:27:16 +0800 Subject: [PATCH 34/76] nios2: fix no flash, add nand and mmc init in board.c This patch fixes error when CONFIG_SYS_NO_FLASH. And adds nand flash and mmc initialization, which should go before env initialization. Signed-off-by: Thomas Chou Signed-off-by: Scott McNutt --- arch/nios2/lib/board.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/nios2/lib/board.c b/arch/nios2/lib/board.c index 8ec66a3540..f83e691a34 100644 --- a/arch/nios2/lib/board.c +++ b/arch/nios2/lib/board.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #ifdef CONFIG_STATUS_LED #include @@ -35,6 +36,9 @@ #if defined(CONFIG_SYS_NIOS_EPCSBASE) #include #endif +#ifdef CONFIG_CMD_NAND +#include /* cannot even include nand.h if it isnt configured */ +#endif DECLARE_GLOBAL_DATA_PTR; @@ -100,7 +104,9 @@ void board_init (void) bd = gd->bd; bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE; +#ifndef CONFIG_SYS_NO_FLASH bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; +#endif #if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE) bd->bi_sramstart= CONFIG_SYS_SRAM_BASE; bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; @@ -119,8 +125,20 @@ void board_init (void) /* The Malloc area is immediately below the monitor copy in RAM */ mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); +#ifndef CONFIG_SYS_NO_FLASH WATCHDOG_RESET (); bd->bi_flashsize = flash_init(); +#endif + +#ifdef CONFIG_CMD_NAND + puts("NAND: "); + nand_init(); +#endif + +#ifdef CONFIG_GENERIC_MMC + puts("MMC: "); + mmc_initialize(bd); +#endif WATCHDOG_RESET (); env_relocate(); From 8cbb0ddd7e696c6a4be1ae3ab3c95d3c8f6a7031 Mon Sep 17 00:00:00 2001 From: Thomas Chou Date: Wed, 21 Apr 2010 08:40:59 +0800 Subject: [PATCH 35/76] nios2: add nios2-generic board This is a generic approach to port u-boot for nios2 boards. You may find the usage of this approach on the nioswiki, http://nioswiki.com/DasUBoot A fpga parameter file, which contains base address information and drivers declaration, is generated from Altera's hardware system description sopc file using tools. The example fpga parameter file is compatible with EP1C20, EP1S10 and EP1S40 boards. So these boards can be removed after this commit. Though epcs controller is removed to cut the dependency of altera_spi driver. Signed-off-by: Thomas Chou Signed-off-by: Scott McNutt --- MAINTAINERS | 1 + MAKEALL | 1 + Makefile | 6 + board/altera/nios2-generic/Makefile | 59 ++++++++ board/altera/nios2-generic/config.mk | 34 +++++ board/altera/nios2-generic/custom_fpga.h | 66 +++++++++ board/altera/nios2-generic/nios2-generic.c | 68 +++++++++ board/altera/nios2-generic/text_base.S | 21 +++ board/altera/nios2-generic/u-boot.lds | 136 ++++++++++++++++++ include/configs/nios2-generic.h | 153 +++++++++++++++++++++ 10 files changed, 545 insertions(+) create mode 100644 board/altera/nios2-generic/Makefile create mode 100644 board/altera/nios2-generic/config.mk create mode 100644 board/altera/nios2-generic/custom_fpga.h create mode 100644 board/altera/nios2-generic/nios2-generic.c create mode 100644 board/altera/nios2-generic/text_base.S create mode 100644 board/altera/nios2-generic/u-boot.lds create mode 100644 include/configs/nios2-generic.h diff --git a/MAINTAINERS b/MAINTAINERS index 04c87309db..46e051bb13 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -858,6 +858,7 @@ Scott McNutt EP1C20 Nios-II EP1S10 Nios-II EP1S40 Nios-II + nios2-generic Nios-II ######################################################################### # MicroBlaze Systems: # diff --git a/MAKEALL b/MAKEALL index 4632750943..79e57ab5ac 100755 --- a/MAKEALL +++ b/MAKEALL @@ -830,6 +830,7 @@ LIST_nios2=" \ EP1S40 \ PCI5441 \ PK1C20 \ + nios2-generic \ " ######################################################################### diff --git a/Makefile b/Makefile index 34f10ced18..0024fe2cde 100644 --- a/Makefile +++ b/Makefile @@ -3534,6 +3534,12 @@ PK1C20_config : unconfig PCI5441_config : unconfig @$(MKCONFIG) PCI5441 nios2 nios2 pci5441 psyent +# nios2 generic boards +NIOS2_GENERIC = nios2-generic + +$(NIOS2_GENERIC:%=%_config) : unconfig + @$(MKCONFIG) $(@:_config=) nios2 nios2 nios2-generic altera + #======================================================================== ## Microblaze #======================================================================== diff --git a/board/altera/nios2-generic/Makefile b/board/altera/nios2-generic/Makefile new file mode 100644 index 0000000000..6780872505 --- /dev/null +++ b/board/altera/nios2-generic/Makefile @@ -0,0 +1,59 @@ +# +# (C) Copyright 2001-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# (C) Copyright 2010, Thomas Chou +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../common) +endif + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o +COBJS-$(CONFIG_CMD_IDE) += ../common/cfide.o +COBJS-$(CONFIG_EPLED) += ../common/epled.o +COBJS-$(CONFIG_SEVENSEG) += ../common/sevenseg.o + +SOBJS-y := text_base.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/altera/nios2-generic/config.mk b/board/altera/nios2-generic/config.mk new file mode 100644 index 0000000000..d500133eac --- /dev/null +++ b/board/altera/nios2-generic/config.mk @@ -0,0 +1,34 @@ +# +# (C) Copyright 2005, Psyent Corporation +# Scott McNutt +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# we get text_base from board config header, so do not use this +#TEXT_BASE = do-not-use-me + +PLATFORM_CPPFLAGS += -mno-hw-div -mno-hw-mul +PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(VENDOR)/include + +ifeq ($(debug),1) +PLATFORM_CPPFLAGS += -DDEBUG +endif + +LDSCRIPT := $(SRCTREE)/board/$(VENDOR)/$(BOARD)/u-boot.lds diff --git a/board/altera/nios2-generic/custom_fpga.h b/board/altera/nios2-generic/custom_fpga.h new file mode 100644 index 0000000000..761f605a49 --- /dev/null +++ b/board/altera/nios2-generic/custom_fpga.h @@ -0,0 +1,66 @@ +/* + * (C) Copyright 2010, Thomas Chou + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This file is generated by sopc-create-config-files. + */ +#ifndef _CUSTOM_FPGA_H_ +#define _CUSTOM_FPGA_H_ + +/* generated from std_1c20.sopc */ + +/* cpu.data_master is a altera_nios2 */ +#define CONFIG_SYS_CLK_FREQ 50000000 +#define CONFIG_SYS_RESET_ADDR 0x00000000 +#define CONFIG_SYS_EXCEPTION_ADDR 0x01000020 +#define CONFIG_SYS_ICACHE_SIZE 4096 +#define CONFIG_SYS_ICACHELINE_SIZE 32 +#define CONFIG_SYS_DCACHE_SIZE 2048 +#define CONFIG_SYS_DCACHELINE_SIZE 4 + +/* sdram.s1 is a altera_avalon_new_sdram_controller */ +#define CONFIG_SYS_SDRAM_BASE 0x01000000 +#define CONFIG_SYS_SDRAM_SIZE 0x01000000 + +/* uart1.s1 is a altera_avalon_uart */ +#define CONFIG_SYS_UART_BASE 0x82120840 +#define CONFIG_SYS_UART_FREQ 50000000 +#define CONFIG_SYS_UART_BAUD 115200 + +/* lan91c111.s1 is a altera_avalon_lan91c111 */ +#define CONFIG_SMC91111_BASE 0x82110300 +#define CONFIG_SMC91111 +#define CONFIG_SMC_USE_32_BIT + +/* jtag_uart.avalon_jtag_slave is a altera_avalon_jtag_uart */ +#define CONFIG_SYS_JTAG_UART_BASE 0x821208b0 + +/* led_pio.s1 is a altera_avalon_pio */ +#define LED_PIO_BASE 0x82120870 + +/* high_res_timer.s1 is a altera_avalon_timer */ +#define CONFIG_SYS_TIMER_BASE 0x82120820 +#define CONFIG_SYS_TIMER_IRQ 3 +#define CONFIG_SYS_TIMER_FREQ 50000000 + +/* ext_flash.s1 is a altera_avalon_cfi_flash */ +#define CONFIG_SYS_FLASH_BASE 0x80000000 +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_CFI_FLASH_STATUS_POLL /* fix amd flash issue */ +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 1024 + +/* ext_ram.s1 is a altera_nios_dev_kit_stratix_edition_sram2 */ +#define CONFIG_SYS_SRAM_BASE 0x02000000 +#define CONFIG_SYS_SRAM_SIZE 0x00100000 + +/* sysid.control_slave is a altera_avalon_sysid */ +#define CONFIG_SYS_SYSID_BASE 0x821208b8 + +#endif /* _CUSTOM_FPGA_H_ */ diff --git a/board/altera/nios2-generic/nios2-generic.c b/board/altera/nios2-generic/nios2-generic.c new file mode 100644 index 0000000000..89848cf041 --- /dev/null +++ b/board/altera/nios2-generic/nios2-generic.c @@ -0,0 +1,68 @@ +/* + * (C) Copyright 2005, Psyent Corporation + * Scott McNutt + * (C) Copyright 2010, Thomas Chou + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +void text_base_hook(void); /* nop hook for text_base.S */ + +int board_early_init_f(void) +{ + text_base_hook(); + return 0; +} + +int checkboard(void) +{ + printf("BOARD : %s\n", CONFIG_BOARD_NAME); + return 0; +} + +phys_size_t initdram(int board_type) +{ + return 0; +} + +#ifdef CONFIG_CMD_NET +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC91111 + rc += smc91111_initialize(0, CONFIG_SMC91111_BASE); +#endif +#ifdef CONFIG_DRIVER_DM9000 + rc += dm9000_initialize(bis); +#endif +#ifdef CONFIG_ALTERA_TSE + rc += altera_tse_initialize(0, + CONFIG_SYS_ALTERA_TSE_MAC_BASE, + CONFIG_SYS_ALTERA_TSE_SGDMA_RX_BASE, + CONFIG_SYS_ALTERA_TSE_SGDMA_TX_BASE); +#endif +#ifdef CONFIG_ETHOC + rc += ethoc_initialize(0, CONFIG_SYS_ETHOC_BASE); +#endif + return rc; +} +#endif diff --git a/board/altera/nios2-generic/text_base.S b/board/altera/nios2-generic/text_base.S new file mode 100644 index 0000000000..f236db13e5 --- /dev/null +++ b/board/altera/nios2-generic/text_base.S @@ -0,0 +1,21 @@ +/* + * text_base + * + * (C) Copyright 2010, Thomas Chou + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include + +#ifdef CONFIG_SYS_MONITOR_BASE + .text + /* text base used in link script u-boot.lds */ + .global text_base + .equ text_base,CONFIG_SYS_MONITOR_BASE + /* dummy func to let linker include this file */ + .global text_base_hook +text_base_hook: + ret +#endif diff --git a/board/altera/nios2-generic/u-boot.lds b/board/altera/nios2-generic/u-boot.lds new file mode 100644 index 0000000000..d4be077bbd --- /dev/null +++ b/board/altera/nios2-generic/u-boot.lds @@ -0,0 +1,136 @@ +/* + * (C) Copyright 2004, Psyent Corporation + * Scott McNutt + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +OUTPUT_FORMAT("elf32-littlenios2") +OUTPUT_ARCH(nios2) +ENTRY(_start) + +SECTIONS +{ + . = text_base; + .text : + { + arch/nios2/cpu/start.o (.text) + *(.text) + *(.text.*) + *(.gnu.linkonce.t*) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + *(.gnu.linkonce.r*) + } + . = ALIGN (4); + _etext = .; + PROVIDE (etext = .); + + /* CMD TABLE - sandwich this in between text and data so + * the initialization code relocates the command table as + * well -- admittedly, this is just pure laziness ;-) + */ + __u_boot_cmd_start = .; + .u_boot_cmd : + { + *(.u_boot_cmd) + } + . = ALIGN(4); + __u_boot_cmd_end = .; + + /* INIT DATA sections - "Small" data (see the gcc -G option) + * is always gp-relative. Here we make all init data sections + * adjacent to simplify the startup code -- and provide + * the global pointer for gp-relative access. + */ + _data = .; + .data : + { + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + } + + . = ALIGN(16); + _gp = .; /* Global pointer addr */ + PROVIDE (gp = .); + + .sdata : + { + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + } + . = ALIGN(4); + + _edata = .; + PROVIDE (edata = .); + + /* UNINIT DATA - Small uninitialized data is first so it's + * adjacent to sdata and can be referenced via gp. The normal + * bss follows. We keep it adjacent to simplify init code. + */ + __bss_start = .; + .sbss (NOLOAD) : + { + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + *(.scommon) + } + . = ALIGN(4); + .bss (NOLOAD) : + { + *(.bss) + *(.bss.*) + *(.dynbss) + *(COMMON) + *(.scommon) + } + . = ALIGN(4); + _end = .; + PROVIDE (end = .); + + /* DEBUG -- symbol table, string table, etc. etc. + */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/include/configs/nios2-generic.h b/include/configs/nios2-generic.h new file mode 100644 index 0000000000..e83e1e391e --- /dev/null +++ b/include/configs/nios2-generic.h @@ -0,0 +1,153 @@ +/* + * (C) Copyright 2005, Psyent Corporation + * Scott McNutt + * (C) Copyright 2010, Thomas Chou + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * BOARD/CPU + */ +#include "../board/altera/nios2-generic/custom_fpga.h" /* fpga parameters */ +#define CONFIG_BOARD_NAME "nios2-generic" /* custom board name */ +#define CONFIG_BOARD_EARLY_INIT_F /* enable early board-spec. init */ +#define CONFIG_SYS_NIOS_SYSID_BASE CONFIG_SYS_SYSID_BASE + +/* + * SERIAL + */ +#define CONFIG_ALTERA_UART +#if defined(CONFIG_ALTERA_JTAG_UART) +# define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_JTAG_UART_BASE +#else +# define CONFIG_SYS_NIOS_CONSOLE CONFIG_SYS_UART_BASE +#endif + +#define CONFIG_ALTERA_JTAG_UART_BYPASS +#define CONFIG_SYS_NIOS_FIXEDBAUD +#define CONFIG_BAUDRATE CONFIG_SYS_UART_BAUD +#define CONFIG_SYS_BAUDRATE_TABLE {CONFIG_BAUDRATE} +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* Suppress console info */ + +/* + * TIMER + */ +#define CONFIG_SYS_NIOS_TMRBASE CONFIG_SYS_TIMER_BASE +#define CONFIG_SYS_NIOS_TMRIRQ CONFIG_SYS_TIMER_IRQ +#define CONFIG_SYS_HZ 1000 /* Always 1000 */ +#define CONFIG_SYS_NIOS_TMRMS 10 /* Desired period (msec)*/ +#define CONFIG_SYS_NIOS_TMRCNT \ + (CONFIG_SYS_NIOS_TMRMS * (CONFIG_SYS_TIMER_FREQ / 1000) - 1) + +/* + * STATUS LED + */ +#define CONFIG_STATUS_LED /* Enable status driver */ +#define CONFIG_EPLED /* Enable LED PIO driver */ +#define CONFIG_SYS_LEDPIO_ADDR LED_PIO_BASE + +#define STATUS_LED_BIT 1 /* Bit-0 on PIO */ +#define STATUS_LED_STATE 1 /* Blinking */ +#define STATUS_LED_PERIOD (500 / CONFIG_SYS_NIOS_TMRMS) /* 500 msec */ + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include +#undef CONFIG_CMD_BOOTD +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_ITEST +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_XIMG + +#ifdef CONFIG_CMD_NET +# define CONFIG_NET_MULTI +# define CONFIG_CMD_DHCP +# define CONFIG_CMD_PING +#endif + +/* + * ENVIRONMENT -- Put environment in sector CONFIG_SYS_MONITOR_LEN above + * CONFIG_SYS_RESET_ADDR, since we assume the monitor is stored at the + * reset address, no? This will keep the environment in user region + * of flash. NOTE: the monitor length must be multiple of sector size + * (which is common practice). + */ +#define CONFIG_ENV_IS_IN_FLASH + +#define CONFIG_ENV_SIZE 0x10000 /* 64k, 1 sector */ +#define CONFIG_ENV_OVERWRITE /* Serial change Ok */ +#define CONFIG_ENV_ADDR ((CONFIG_SYS_RESET_ADDR + \ + CONFIG_SYS_MONITOR_LEN) | \ + CONFIG_SYS_FLASH_BASE) + +/* + * MEMORY ORGANIZATION + * -Monitor at top of sdram. + * -The heap is placed below the monitor + * -Global data is placed below the heap. + * -The stack is placed below global data (&grows down). + */ +#define CONFIG_MONITOR_IS_IN_RAM +#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256k */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \ + CONFIG_SYS_SDRAM_SIZE - \ + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_GBL_DATA_SIZE 256 /* Global data size rsvd */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x20000) +#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - \ + CONFIG_SYS_MALLOC_LEN) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_MALLOC_BASE - \ + CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP CONFIG_SYS_GBL_DATA_OFFSET + +/* + * MISC + */ +#define CONFIG_SYS_LONGHELP /* Provide extended help */ +#define CONFIG_SYS_PROMPT "==> " /* Command prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O buf size */ +#define CONFIG_SYS_MAXARGS 16 /* Max command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Bootarg buf size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + \ + 16) /* Print buf size */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_INIT_SP - 0x20000) +#define CONFIG_CMDLINE_EDITING + +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +#endif /* __CONFIG_H */ From 1749c3da8d8445cdf78d70120a803e3e9553113c Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 7 Apr 2010 02:49:12 -0500 Subject: [PATCH 36/76] ppc/85xx: Fixup PCI nodes for P1_P2_RDB While we had ft_pci_board_setup it wasn't being called by ft_board_setup. Fix that so we actually update the device tree PCI nodes on P1_P2_RDB boards. Signed-off-by: Kumar Gala --- board/freescale/p1_p2_rdb/p1_p2_rdb.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c index 3af660e775..31cdf9ae4c 100644 --- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c +++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c @@ -198,6 +198,8 @@ int board_eth_init(bd_t *bis) #endif #if defined(CONFIG_OF_BOARD_SETUP) +extern void ft_pci_board_setup(void *blob); + void ft_board_setup(void *blob, bd_t *bd) { phys_addr_t base; @@ -208,6 +210,8 @@ void ft_board_setup(void *blob, bd_t *bd) base = getenv_bootm_low(); size = getenv_bootm_size(); + ft_pci_board_setup(blob); + fdt_fixup_memory(blob, (u64)base, (u64)size); } #endif From ab48ca1a661b9ab8e3fee9fe2df65432b09ed073 Mon Sep 17 00:00:00 2001 From: Srikanth Srinivasan Date: Wed, 10 Feb 2010 17:32:43 +0800 Subject: [PATCH 37/76] ppc/p4080: Fix synchronous frequency calculations When DDR is in synchronous mode, the existing code assigns sysclk frequency to DDR frequency. It should be synchronous with the platform frequency. CPU frequency is based on platform frequency in synchronous mode. Also fix: * Fixes the bit mask for DDR_SYNC (RCWSR5[184]) * Corrects the detection of synchronous mode. Signed-off-by: Srikanth Srinivasan Signed-off-by: Dave Liu Signed-off-by: Ed Swarthout Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/cpu.c | 16 ++++++--------- arch/powerpc/cpu/mpc85xx/speed.c | 28 +++++++++++++++++---------- arch/powerpc/include/asm/immap_85xx.h | 4 ++-- 3 files changed, 26 insertions(+), 22 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 0cc6e0323f..15b7b231ee 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -1,5 +1,5 @@ /* - * Copyright 2004,2007-2009 Freescale Semiconductor, Inc. + * Copyright 2004,2007-2010 Freescale Semiconductor, Inc. * (C) Copyright 2002, 2003 Motorola Inc. * Xianghua Xiao (X.Xiao@motorola.com) * @@ -44,21 +44,17 @@ int checkcpu (void) uint major, minor; struct cpu_type *cpu; char buf1[32], buf2[32]; -#ifdef CONFIG_DDR_CLK_FREQ volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); +#ifdef CONFIG_DDR_CLK_FREQ + u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO) + >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; +#else #ifdef CONFIG_FSL_CORENET u32 ddr_sync = ((gur->rcwsr[5]) & FSL_CORENET_RCWSR5_DDR_SYNC) >> FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT; -#else - u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO) - >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; -#endif -#else -#ifdef CONFIG_FSL_CORENET - u32 ddr_sync = 0; #else u32 ddr_ratio = 0; -#endif +#endif /* CONFIG_FSL_CORENET */ #endif /* CONFIG_DDR_CLK_FREQ */ int i; diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 268edbc5b7..8132115fca 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -1,5 +1,5 @@ /* - * Copyright 2004, 2007-2009 Freescale Semiconductor, Inc. + * Copyright 2004, 2007-2010 Freescale Semiconductor, Inc. * * (C) Copyright 2003 Motorola Inc. * Xianghua Xiao, (X.Xiao@motorola.com) @@ -71,22 +71,30 @@ void get_sys_info (sys_info_t * sysInfo) [14] = 4, /* CC4 PPL / 4 */ }; uint lcrr_div, i, freqCC_PLL[4], rcw_tmp; + uint ratio[4]; unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + uint mem_pll_rat; sysInfo->freqSystemBus = sysclk; sysInfo->freqDDRBus = sysclk; - freqCC_PLL[0] = sysclk; - freqCC_PLL[1] = sysclk; - freqCC_PLL[2] = sysclk; - freqCC_PLL[3] = sysclk; sysInfo->freqSystemBus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f; - sysInfo->freqDDRBus *= ((in_be32(&gur->rcwsr[0]) >> 17) & 0x1f); - freqCC_PLL[0] *= (in_be32(&clk->pllc1gsr) >> 1) & 0x3f; - freqCC_PLL[1] *= (in_be32(&clk->pllc2gsr) >> 1) & 0x3f; - freqCC_PLL[2] *= (in_be32(&clk->pllc3gsr) >> 1) & 0x3f; - freqCC_PLL[3] *= (in_be32(&clk->pllc4gsr) >> 1) & 0x3f; + mem_pll_rat = (in_be32(&gur->rcwsr[0]) >> 17) & 0x1f; + if (mem_pll_rat > 2) + sysInfo->freqDDRBus *= mem_pll_rat; + else + sysInfo->freqDDRBus = sysInfo->freqSystemBus * mem_pll_rat; + ratio[0] = (in_be32(&clk->pllc1gsr) >> 1) & 0x3f; + ratio[1] = (in_be32(&clk->pllc2gsr) >> 1) & 0x3f; + ratio[2] = (in_be32(&clk->pllc3gsr) >> 1) & 0x3f; + ratio[3] = (in_be32(&clk->pllc4gsr) >> 1) & 0x3f; + for (i = 0; i < 4; i++) { + if (ratio[i] > 4) + freqCC_PLL[i] = sysclk * ratio[i]; + else + freqCC_PLL[i] = sysInfo->freqSystemBus * ratio[i]; + } rcw_tmp = in_be32(&gur->rcwsr[3]); for (i = 0; i < cpu_numcores(); i++) { u32 c_pll_sel = (in_be32(&clk->clkc0csr + i*8) >> 27) & 0xf; diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 957ad76a79..dd28e3239a 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1697,8 +1697,8 @@ typedef struct ccsr_gur { u8 res17[24]; u32 rcwsr[16]; /* Reset control word status */ #define FSL_CORENET_RCWSR4_SRDS_PRTCL 0xfc000000 -#define FSL_CORENET_RCWSR5_DDR_SYNC 0x00008000 -#define FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT 15 +#define FSL_CORENET_RCWSR5_DDR_SYNC 0x00000080 +#define FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT 7 #define FSL_CORENET_RCWSR7_MCK_TO_PLAT_RAT 0x00400000 #define FSL_CORENET_RCWSR8_HOST_AGT_B1 0x00e00000 #define FSL_CORENET_RCWSR8_HOST_AGT_B2 0x00100000 From 17d90f31a810a19ade1a1c534fde9f65d4d66390 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Fri, 5 Mar 2010 12:23:00 +0800 Subject: [PATCH 38/76] ppc/p4080: Extend the GUTS memory map Extend pin control and clock control to GUTS memory map Signed-off-by: Dave Liu Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/immap_85xx.h | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index dd28e3239a..916cc62537 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1647,7 +1647,7 @@ typedef struct ccsr_gur { u8 res4[12]; u32 gpindr; /* General-purpose input data */ u8 res5[12]; - u32 pmuxcr; /* Alt function signal multiplex control */ + u32 alt_pmuxcr; /* Alt function signal multiplex control */ u8 res6[12]; u32 devdisr; /* Device disable control */ #define FSL_CORENET_DEVDISR_PCIE1 0x80000000 @@ -1750,7 +1750,17 @@ typedef struct ccsr_gur { u32 cgencrl; /* Core general control */ u8 res31[184]; u32 sriopstecr; /* SRIO prescaler timer enable control */ - u8 res32[2300]; + u8 res32[1788]; + u32 pmuxcr; /* Pin multiplexing control */ + u8 res33[60]; + u32 iovselsr; /* I/O voltage selection status */ + u8 res34[28]; + u32 ddrclkdr; /* DDR clock disable */ + u8 res35; + u32 elbcclkdr; /* eLBC clock disable */ + u8 res36[20]; + u32 sdhcpcr; /* eSDHC polarity configuration */ + u8 res37[380]; } ccsr_gur_t; typedef struct ccsr_clk { From 1231c498e016b5bfe85f1eb87c2e044d3389d7da Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 7 Apr 2010 10:39:46 -0500 Subject: [PATCH 39/76] ppc/p4080: Add p4080 DEVDISR2 & SRDS_PLLCR0 defines Added some needed fines and some misc additional defines used by p4080 initialization. Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/immap_85xx.h | 30 +++++++++++++++++++++++++-- 1 file changed, 28 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 916cc62537..ef3a1e1c03 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1,7 +1,7 @@ /* * MPC85xx Internal Memory Map * - * Copyright 2007-2009 Freescale Semiconductor, Inc. + * Copyright 2007-2010 Freescale Semiconductor, Inc. * * Copyright(c) 2002,2003 Motorola Inc. * Xianghua Xiao (x.xiao@motorola.com) @@ -1672,7 +1672,23 @@ typedef struct ccsr_gur { #define FSL_CORENET_DEVDISR_I2C2 0x00000010 #define FSL_CORENET_DEVDISR_DUART1 0x00000002 #define FSL_CORENET_DEVDISR_DUART2 0x00000001 - u8 res7[12]; + u32 devdisr2; /* Device disable control 2 */ +#define FSL_CORENET_DEVDISR2_PME 0x80000000 +#define FSL_CORENET_DEVDISR2_SEC 0x40000000 +#define FSL_CORENET_DEVDISR2_QMBM 0x08000000 +#define FSL_CORENET_DEVDISR2_FM1 0x02000000 +#define FSL_CORENET_DEVDISR2_10GEC1 0x01000000 +#define FSL_CORENET_DEVDISR2_DTSEC1_1 0x00800000 +#define FSL_CORENET_DEVDISR2_DTSEC1_2 0x00400000 +#define FSL_CORENET_DEVDISR2_DTSEC1_3 0x00200000 +#define FSL_CORENET_DEVDISR2_DTSEC1_4 0x00100000 +#define FSL_CORENET_DEVDISR2_FM2 0x00020000 +#define FSL_CORENET_DEVDISR2_10GEC2 0x00010000 +#define FSL_CORENET_DEVDISR2_DTSEC2_1 0x00008000 +#define FSL_CORENET_DEVDISR2_DTSEC2_2 0x00004000 +#define FSL_CORENET_DEVDISR2_DTSEC2_3 0x00002000 +#define FSL_CORENET_DEVDISR2_DTSEC2_4 0x00001000 + u8 res7[8]; u32 powmgtcsr; /* Power management status & control */ u8 res8[12]; u32 coredisru; /* uppper portion for support of 64 cores */ @@ -1699,6 +1715,7 @@ typedef struct ccsr_gur { #define FSL_CORENET_RCWSR4_SRDS_PRTCL 0xfc000000 #define FSL_CORENET_RCWSR5_DDR_SYNC 0x00000080 #define FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT 7 +#define FSL_CORENET_RCWSR5_SRDS_EN 0x00002000 #define FSL_CORENET_RCWSR7_MCK_TO_PLAT_RAT 0x00400000 #define FSL_CORENET_RCWSR8_HOST_AGT_B1 0x00e00000 #define FSL_CORENET_RCWSR8_HOST_AGT_B2 0x00100000 @@ -1952,7 +1969,15 @@ typedef struct serdes_corenet { #define SRDS_RSTCTL_RST 0x80000000 #define SRDS_RSTCTL_RSTDONE 0x40000000 #define SRDS_RSTCTL_RSTERR 0x20000000 +#define SRDS_RSTCTL_SDPD 0x00000020 u32 pllcr0; /* PLL Control Register 0 */ +#define SRDS_PLLCR0_RFCK_SEL_MASK 0x30000000 +#define SRDS_PLLCR0_RFCK_SEL_100 0x00000000 +#define SRDS_PLLCR0_RFCK_SEL_125 0x10000000 +#define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 +#define SRDS_PLLCR0_FRATE_SEL_MASK 0x00030000 +#define SRDS_PLLCR0_FRATE_SEL_5 0x00000000 +#define SRDS_PLLCR0_FRATE_SEL_6_25 0x00010000 u32 pllcr1; /* PLL Control Register 1 */ #define SRDS_PLLCR1_PLL_BWSEL 0x08000000 u32 res[5]; @@ -2028,6 +2053,7 @@ enum { #define CONFIG_SYS_MPC85xx_USB_OFFSET 0x210000 #define CONFIG_SYS_FSL_CORENET_QMAN_OFFSET 0x318000 #define CONFIG_SYS_FSL_CORENET_BMAN_OFFSET 0x31a000 +#define CONFIG_SYS_TSEC1_OFFSET 0x4e0000 /* FM1@DTSEC0 */ #else #define CONFIG_SYS_MPC85xx_ECM_OFFSET 0x0000 #define CONFIG_SYS_MPC85xx_DDR_OFFSET 0x2000 From f8d05e5e5888d88ab42524d699924936e8e77970 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Fri, 5 Mar 2010 12:23:00 +0800 Subject: [PATCH 40/76] fsl-ddr: add the macro for Rtt_Nom definition add the macro definition for Rtt_Nom termination value for DDR3 Signed-off-by: Dave Liu Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/fsl_ddr_sdram.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h index 3216a50633..02920dbfd7 100644 --- a/arch/powerpc/include/asm/fsl_ddr_sdram.h +++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h @@ -1,5 +1,5 @@ /* - * Copyright 2008-2009 Freescale Semiconductor, Inc. + * Copyright 2008-2010 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -24,6 +24,12 @@ #define DDR_OTF 6 /* on-the-fly BC4 and BL8 */ #define DDR_BL8 8 /* burst length 8 */ +#define DDR3_RTT_60_OHM 1 /* RTT_Nom = RZQ/4 */ +#define DDR3_RTT_120_OHM 2 /* RTT_Nom = RZQ/2 */ +#define DDR3_RTT_40_OHM 3 /* RTT_Nom = RZQ/6 */ +#define DDR3_RTT_20_OHM 4 /* RTT_Nom = RZQ/12 */ +#define DDR3_RTT_30_OHM 5 /* RTT_Nom = RZQ/8 */ + #if defined(CONFIG_FSL_DDR1) #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR (1) typedef ddr1_spd_eeprom_t generic_spd_eeprom_t; From 99bac479dd183529f4e259a0de8d31644219d487 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Tue, 8 Dec 2009 11:56:48 +0800 Subject: [PATCH 41/76] fsl-ddr: Add extra cycle to turnaround times Add an extra cycle turnaround time to read->write to ensure stability at high DDR frequencies. Signed-off-by: Dave Liu Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c index 03f9c4380d..4a282bc52d 100644 --- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c +++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c @@ -198,6 +198,8 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr) pre_pd_exit_mclk = act_pd_exit_mclk; taxpd_mclk = 8; tmrd_mclk = 4; + /* set the turnaround time */ + trwt_mclk = 1; #else /* CONFIG_FSL_DDR2 */ /* * (tXARD and tXARDS). Empirical? From e4773debb735323a9eedf353239e8e88e03d7c58 Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Mon, 12 Apr 2010 14:23:25 +0800 Subject: [PATCH 42/76] fsl_sata: Add the workaround for errata SATA-A001 After power on, the SATA host controller of P1022 Rev1 is configured in legacy mode instead of the expected enterprise mode. Software needs to clear bit[28] of HControl register to change to enterprise mode after bringing the host offline. Signed-off-by: Dave Liu Signed-off-by: Kumar Gala --- drivers/block/fsl_sata.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/drivers/block/fsl_sata.c b/drivers/block/fsl_sata.c index abcda6fb5f..88785605fa 100644 --- a/drivers/block/fsl_sata.c +++ b/drivers/block/fsl_sata.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -191,6 +192,27 @@ int init_sata(int dev) /* Wait the controller offline */ ata_wait_register(®->hstatus, HSTATUS_ONOFF, 0, 1000); +#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001) + /* + * For P1022/1013 Rev1.0 silicon, after power on SATA host + * controller is configured in legacy mode instead of the + * expected enterprise mode. software needs to clear bit[28] + * of HControl register to change to enterprise mode from + * legacy mode. + */ + { + u32 svr = get_svr(); + if (IS_SVR_REV(svr, 1, 0) && + ((SVR_SOC_VER(svr) == SVR_P1022) || + (SVR_SOC_VER(svr) == SVR_P1022_E) || + (SVR_SOC_VER(svr) == SVR_P1013) || + (SVR_SOC_VER(svr) == SVR_P1013_E))) { + out_le32(®->hstatus, 0x20000000); + out_le32(®->hcontrol, 0x00000100); + } + } +#endif + /* Set the command header base address to CHBA register to tell DMA */ out_le32(®->chba, (u32)cmd_hdr & ~0x3); From cd3abcfa2d4dc8df09f6d01e735e4dc2f6c87ebc Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Mon, 12 Apr 2010 14:23:35 +0800 Subject: [PATCH 43/76] fsl_sata: Move the snoop bit to another place For P1022 SATA host controller, the data snoop bit of DW3 in PRDT is moved to bit28. Signed-off-by: Dave Liu Signed-off-by: Kumar Gala --- drivers/block/fsl_sata.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/block/fsl_sata.h b/drivers/block/fsl_sata.h index 18e88fa4ad..576efaf6f5 100644 --- a/drivers/block/fsl_sata.h +++ b/drivers/block/fsl_sata.h @@ -243,8 +243,12 @@ typedef struct prd_entry { /* ext_c_ddc */ -#define PRD_ENTRY_EXT 0x80000000 /* extension flag or called indirect descriptor flag */ -#define PRD_ENTRY_DATA_SNOOP 0x00400000 /* Snoop enable for all data associated with the PRD entry */ +#define PRD_ENTRY_EXT 0x80000000 /* extension flag */ +#ifdef CONFIG_FSL_SATA_V2 +#define PRD_ENTRY_DATA_SNOOP 0x10000000 /* Data snoop enable */ +#else +#define PRD_ENTRY_DATA_SNOOP 0x00400000 /* Data snoop enable */ +#endif #define PRD_ENTRY_LEN_MASK 0x003fffff /* Data word count */ #define PRD_ENTRY_MAX_XFER_SZ (PRD_ENTRY_LEN_MASK + 1) From 4db9708b94b6745f5c1eaa699d4d76477de8588a Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 13 Apr 2010 23:56:23 -0500 Subject: [PATCH 44/76] 85xx: Convert cpu_init_f code to use out_be32 for LBC registers Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 36 ++++++++++++++--------------- 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index e0126d331a..b517e06608 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -180,54 +180,54 @@ void cpu_init_f (void) * has been determined */ #if defined(CONFIG_SYS_OR0_REMAP) - memctl->or0 = CONFIG_SYS_OR0_REMAP; + out_be32(&memctl->or0, CONFIG_SYS_OR0_REMAP); #endif #if defined(CONFIG_SYS_OR1_REMAP) - memctl->or1 = CONFIG_SYS_OR1_REMAP; + out_be32(&memctl->or1, CONFIG_SYS_OR1_REMAP); #endif /* now restrict to preliminary range */ /* if cs1 is already set via debugger, leave cs0/cs1 alone */ if (! memctl->br1 & 1) { #if defined(CONFIG_SYS_BR0_PRELIM) && defined(CONFIG_SYS_OR0_PRELIM) - memctl->br0 = CONFIG_SYS_BR0_PRELIM; - memctl->or0 = CONFIG_SYS_OR0_PRELIM; + out_be32(&memctl->br0, CONFIG_SYS_BR0_PRELIM); + out_be32(&memctl->or0, CONFIG_SYS_OR0_PRELIM); #endif #if defined(CONFIG_SYS_BR1_PRELIM) && defined(CONFIG_SYS_OR1_PRELIM) - memctl->or1 = CONFIG_SYS_OR1_PRELIM; - memctl->br1 = CONFIG_SYS_BR1_PRELIM; + out_be32(&memctl->or1, CONFIG_SYS_OR1_PRELIM); + out_be32(&memctl->br1, CONFIG_SYS_BR1_PRELIM); #endif } #if defined(CONFIG_SYS_BR2_PRELIM) && defined(CONFIG_SYS_OR2_PRELIM) - memctl->or2 = CONFIG_SYS_OR2_PRELIM; - memctl->br2 = CONFIG_SYS_BR2_PRELIM; + out_be32(&memctl->or2, CONFIG_SYS_OR2_PRELIM); + out_be32(&memctl->br2, CONFIG_SYS_BR2_PRELIM); #endif #if defined(CONFIG_SYS_BR3_PRELIM) && defined(CONFIG_SYS_OR3_PRELIM) - memctl->or3 = CONFIG_SYS_OR3_PRELIM; - memctl->br3 = CONFIG_SYS_BR3_PRELIM; + out_be32(&memctl->or3, CONFIG_SYS_OR3_PRELIM); + out_be32(&memctl->br3, CONFIG_SYS_BR3_PRELIM); #endif #if defined(CONFIG_SYS_BR4_PRELIM) && defined(CONFIG_SYS_OR4_PRELIM) - memctl->or4 = CONFIG_SYS_OR4_PRELIM; - memctl->br4 = CONFIG_SYS_BR4_PRELIM; + out_be32(&memctl->or4, CONFIG_SYS_OR4_PRELIM); + out_be32(&memctl->br4, CONFIG_SYS_BR4_PRELIM); #endif #if defined(CONFIG_SYS_BR5_PRELIM) && defined(CONFIG_SYS_OR5_PRELIM) - memctl->or5 = CONFIG_SYS_OR5_PRELIM; - memctl->br5 = CONFIG_SYS_BR5_PRELIM; + out_be32(&memctl->or5, CONFIG_SYS_OR5_PRELIM); + out_be32(&memctl->br5, CONFIG_SYS_BR5_PRELIM); #endif #if defined(CONFIG_SYS_BR6_PRELIM) && defined(CONFIG_SYS_OR6_PRELIM) - memctl->or6 = CONFIG_SYS_OR6_PRELIM; - memctl->br6 = CONFIG_SYS_BR6_PRELIM; + out_be32(&memctl->or6, CONFIG_SYS_OR6_PRELIM); + out_be32(&memctl->br6, CONFIG_SYS_BR6_PRELIM); #endif #if defined(CONFIG_SYS_BR7_PRELIM) && defined(CONFIG_SYS_OR7_PRELIM) - memctl->or7 = CONFIG_SYS_OR7_PRELIM; - memctl->br7 = CONFIG_SYS_BR7_PRELIM; + out_be32(&memctl->or7, CONFIG_SYS_OR7_PRELIM); + out_be32(&memctl->br7, CONFIG_SYS_BR7_PRELIM); #endif #if defined(CONFIG_CPM2) From 9ce3c228276b0f85105da8c39b164f2b6c84ea34 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 13 Apr 2010 11:07:57 -0500 Subject: [PATCH 45/76] 85xx: Fix compile warning cpu.c: In function 'checkcpu': cpu.c:47: warning: unused variable 'gur' Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 15b7b231ee..fddeb2fb09 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -44,7 +44,9 @@ int checkcpu (void) uint major, minor; struct cpu_type *cpu; char buf1[32], buf2[32]; +#if defined(CONFIG_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET) volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); +#endif /* CONFIG_FSL_CORENET */ #ifdef CONFIG_DDR_CLK_FREQ u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO) >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT; From 47106ce168890d637fd849682ba88ecfdb9c35de Mon Sep 17 00:00:00 2001 From: Detlev Zundel Date: Wed, 14 Apr 2010 11:32:20 +0200 Subject: [PATCH 46/76] 85xx/socrates: Remove NFS support to fit image size. This fixes an overflow during the link phase. Signed-off-by: Detlev Zundel Signed-off-by: Kumar Gala --- include/configs/socrates.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 96410413a0..89f7cc4a19 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -174,7 +174,7 @@ #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256kB for Mon */ +#define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384KiB for Mon */ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4 MB for malloc */ /* FPGA and NAND */ @@ -342,19 +342,19 @@ */ #include +#define CONFIG_CMD_BMP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_DTT #undef CONFIG_CMD_EEPROM +#define CONFIG_CMD_EXT2 /* EXT2 Support */ #define CONFIG_CMD_I2C #define CONFIG_CMD_SDRAM #define CONFIG_CMD_MII -#define CONFIG_CMD_NFS +#undef CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB -#define CONFIG_CMD_EXT2 /* EXT2 Support */ -#define CONFIG_CMD_BMP #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI From 0c955dafab495fef5a76f5383387281d0408056c Mon Sep 17 00:00:00 2001 From: Dave Liu Date: Wed, 14 Apr 2010 19:05:06 +0800 Subject: [PATCH 47/76] 85xx: clean up the io_sel for PCI express of P1022 clean up the wrong io_sel for PCI express according to latest manual. Signed-off-by: Dave Liu Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc8xxx/pci_cfg.c | 13 ++++++------- arch/powerpc/include/asm/immap_85xx.h | 5 +++++ 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c index 9b7181d5b6..85995cac95 100644 --- a/arch/powerpc/cpu/mpc8xxx/pci_cfg.c +++ b/arch/powerpc/cpu/mpc8xxx/pci_cfg.c @@ -176,15 +176,14 @@ static struct pci_info pci_config_info[] = (1 << 0x1d) | (1 << 0x1e) | (1 << 0x1f), }, [LAW_TRGT_IF_PCIE_2] = { - .cfg = (1 << 0) | (1 << 1) | (1 << 6) | (1 << 7) | - (1 << 9) | (1 << 0xa) | (1 << 0xb) | (1 << 0xd) | - (1 << 0x15) | (1 << 0x16) | (1 << 0x17) | - (1 << 0x18) | (1 << 0x1c), + .cfg = (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) | + (1 << 0xd) | (1 << 0x15) | (1 << 0x16) | (1 << 0x17) | + (1 << 0x18) | (1 << 0x19) | (1 << 0x1a) | (1 << 0x1b), }, [LAW_TRGT_IF_PCIE_3] = { - .cfg = (1 << 6) | (1 << 7) | (1 << 9) | (1 << 0xd) | - (1 << 0x15) | (1 << 0x16) | (1 << 0x17) | (1 << 0x18) | - (1 << 0x19) | (1 << 0x1a) | (1 << 0x1b), + .cfg = (1 << 0) | (1 << 1) | (1 << 6) | (1 << 7) | (1 << 9) | + (1 << 0xa) | (1 << 0xb) | (1 << 0xd) | (1 << 0x15) | + (1 << 0x16) | (1 << 0x17) | (1 << 0x18) | (1 << 0x1c), }, }; #elif defined(CONFIG_P2010) || defined(CONFIG_P2020) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index ef3a1e1c03..e7954e657c 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1873,8 +1873,13 @@ typedef struct ccsr_gur { #define MPC85xx_PORDEVSR_SGMII4_DIS 0x04000000 #define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000 #define MPC85xx_PORDEVSR_PCI1 0x00800000 +#if defined(CONFIG_P1013) || defined(CONFIG_P1022) +#define MPC85xx_PORDEVSR_IO_SEL 0x007c0000 +#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 18 +#else #define MPC85xx_PORDEVSR_IO_SEL 0x00780000 #define MPC85xx_PORDEVSR_IO_SEL_SHIFT 19 +#endif #define MPC85xx_PORDEVSR_PCI2_ARB 0x00040000 #define MPC85xx_PORDEVSR_PCI1_ARB 0x00020000 #define MPC85xx_PORDEVSR_PCI1_PCI32 0x00010000 From 3f0202ed13add5fd6e2ed66fcb3f5e1228cdf766 Mon Sep 17 00:00:00 2001 From: Lan Chunhe Date: Wed, 21 Apr 2010 07:40:50 -0500 Subject: [PATCH 48/76] mpc85xx: Add the ability to set LCRR[CLKDIV] to improve R/W speed of flash Signed-off-by: Lan Chunhe Signed-off-by: Roy Zang Signed-off-by: Kumar Gala --- arch/powerpc/cpu/mpc85xx/cpu_init.c | 15 +++++++++++++++ arch/powerpc/include/asm/fsl_lbc.h | 6 +++++- 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index b517e06608..e578b296df 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -260,6 +260,10 @@ void cpu_init_f (void) int cpu_init_r(void) { +#ifdef CONFIG_SYS_LBC_LCRR + volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR); +#endif + puts ("L2: "); #if defined(CONFIG_L2_CACHE) @@ -383,6 +387,17 @@ int cpu_init_r(void) #if defined(CONFIG_MP) setup_mp(); #endif + +#ifdef CONFIG_SYS_LBC_LCRR + /* + * Modify the CLKDIV field of LCRR register to improve the writing + * speed for NOR flash. + */ + clrsetbits_be32(&lbc->lcrr, LCRR_CLKDIV, CONFIG_SYS_LBC_LCRR); + __raw_readl(&lbc->lcrr); + isync(); +#endif + return 0; } diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index 5723de643a..dfe8f793a3 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2004-2008 Freescale Semiconductor, Inc. + * Copyright (C) 2004-2008,2010 Freescale Semiconductor, Inc. * * See file CREDITS for list of people who contributed to this * project. @@ -125,8 +125,12 @@ #define OR_GPCM_SETA_SHIFT 3 #define OR_GPCM_TRLX 0x00000004 #define OR_GPCM_TRLX_SHIFT 2 +#define OR_GPCM_TRLX_CLEAR 0x00000000 +#define OR_GPCM_TRLX_SET 0x00000004 #define OR_GPCM_EHTR 0x00000002 #define OR_GPCM_EHTR_SHIFT 1 +#define OR_GPCM_EHTR_CLEAR 0x00000000 +#define OR_GPCM_EHTR_SET 0x00000002 #define OR_GPCM_EAD 0x00000001 #define OR_GPCM_EAD_SHIFT 0 From 7e1afb62a7e68843248b9a76a265c9193e716768 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 20 Apr 2010 10:02:24 -0500 Subject: [PATCH 49/76] ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQ The MPC83xx SERDES control is different from the other FSL PPC chips. For now lets split it out so we can standardize on interfaces for determining of a device on SERDES is configured. Signed-off-by: Kumar Gala Acked-by: Kim Phillips --- arch/powerpc/cpu/mpc83xx/serdes.c | 2 +- arch/powerpc/include/asm/fsl_mpc83xx_serdes.h | 36 +++++++++++++++++++ board/freescale/mpc837xemds/mpc837xemds.c | 2 +- board/freescale/mpc837xemds/pci.c | 2 +- board/freescale/mpc837xerdb/mpc837xerdb.c | 2 +- 5 files changed, 40 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/include/asm/fsl_mpc83xx_serdes.h diff --git a/arch/powerpc/cpu/mpc83xx/serdes.c b/arch/powerpc/cpu/mpc83xx/serdes.c index 64033fe4c3..fecfc80f81 100644 --- a/arch/powerpc/cpu/mpc83xx/serdes.c +++ b/arch/powerpc/cpu/mpc83xx/serdes.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include /* SerDes registers */ #define FSL_SRDSCR0_OFFS 0x0 diff --git a/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h b/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h new file mode 100644 index 0000000000..2d813f4188 --- /dev/null +++ b/arch/powerpc/include/asm/fsl_mpc83xx_serdes.h @@ -0,0 +1,36 @@ +/* + * Copyright 2010 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __FSL_MPC83XX_SERDES_H +#define __FSL_MPC83XX_SERDES_H + +#include + +#define FSL_SERDES_CLK_100 (0 << 28) +#define FSL_SERDES_CLK_125 (1 << 28) +#define FSL_SERDES_CLK_150 (3 << 28) +#define FSL_SERDES_PROTO_SATA 0 +#define FSL_SERDES_PROTO_PEX 1 +#define FSL_SERDES_PROTO_PEX_X2 2 +#define FSL_SERDES_PROTO_SGMII 3 +#define FSL_SERDES_VDD_1V 1 + +extern void fsl_setup_serdes(u32 offset, char proto, u32 rfcks, char vdd); + +#endif /* __FSL_MPC83XX_SERDES_H */ diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 9d8b18d993..32a87adb9e 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -14,7 +14,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/board/freescale/mpc837xemds/pci.c b/board/freescale/mpc837xemds/pci.c index 6b7b8b2e7f..82f34f85c8 100644 --- a/board/freescale/mpc837xemds/pci.c +++ b/board/freescale/mpc837xemds/pci.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include static struct pci_region pci_regions[] = { { diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c index c5c2e40833..d636796f85 100644 --- a/board/freescale/mpc837xerdb/mpc837xerdb.c +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c @@ -16,7 +16,7 @@ #include #include #include -#include +#include #include #include #include From 7c8cf0d0c7b12c7c63765e936cf760dc2c7d7306 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Wed, 21 Apr 2010 09:56:31 +0200 Subject: [PATCH 50/76] MX31: Added LCD support for QONG module Added support for LCD and splash image to the QONG module. The supported display is VBEST-VGG322403. Signed-off-by: Stefano Babic --- drivers/video/mx3fb.c | 17 +++++++++++++++++ include/configs/qong.h | 11 +++++++++++ 2 files changed, 28 insertions(+) diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index 1e1d507652..99a595e882 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -56,6 +56,7 @@ void lcd_panel_disable(void) #define msleep(a) udelay(a * 1000) +#ifndef CONFIG_DISPLAY_VBEST_VGG322403 #define XRES 240 #define YRES 320 #define PANEL_TYPE IPU_PANEL_TFT @@ -70,6 +71,22 @@ void lcd_panel_disable(void) #define SIG_POL (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL) #define IF_CONF 0 #define IF_CLK_DIV 0x175 +#else /* Display Vbest VGG322403 */ +#define XRES 320 +#define YRES 240 +#define PANEL_TYPE IPU_PANEL_TFT +#define PIXEL_CLK 156000 +#define PIXEL_FMT IPU_PIX_FMT_RGB666 +#define H_START_WIDTH 20 /* left_margin */ +#define H_SYNC_WIDTH 30 /* hsync_len */ +#define H_END_WIDTH (38 + 30) /* right_margin + hsync_len */ +#define V_START_WIDTH 7 /* upper_margin */ +#define V_SYNC_WIDTH 3 /* vsync_len */ +#define V_END_WIDTH (26 + 3) /* lower_margin + vsync_len */ +#define SIG_POL (DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL) +#define IF_CONF 0 +#define IF_CLK_DIV 0x175 +#endif #define LCD_COLOR_IPU LCD_COLOR16 diff --git a/include/configs/qong.h b/include/configs/qong.h index 64d0214e27..e41ea91bde 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -62,6 +62,17 @@ #define CONFIG_DNET_BASE (CS1_BASE + QONG_FPGA_PERIPH_SIZE) #define CONFIG_NET_MULTI 1 +/* Framebuffer and LCD */ +#define CONFIG_LCD +#define CONFIG_VIDEO_MX3 +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_CMD_BMP +#define CONFIG_BMP_16BPP +#define CONFIG_DISPLAY_VBEST_VGG322403 + /* * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the * initial TFTP transfer, should the user wish one, significantly. From 7bc8768039948e50cc149bea2ec214bde3245c4a Mon Sep 17 00:00:00 2001 From: trix Date: Sat, 10 Apr 2010 12:46:49 -0500 Subject: [PATCH 51/76] ARM Update mach-types Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 85b3cce880a19e78286570d5fd004cc3cac06f57 Signed-off-by: Tom Rix --- arch/arm/include/asm/mach-types.h | 986 +++++++++++++++++++++++++++++- 1 file changed, 974 insertions(+), 12 deletions(-) diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h index 4622557b57..b33e97b5fa 100644 --- a/arch/arm/include/asm/mach-types.h +++ b/arch/arm/include/asm/mach-types.h @@ -2659,7 +2659,7 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_AQUILA 2676 #define MACH_TYPE_SPARK_SLS_HW2 2677 #define MACH_TYPE_ESATA_SHEEVAPLUG 2678 -#define MACH_TYPE_SURF7X30 2679 +#define MACH_TYPE_MSM7X30_SURF 2679 #define MACH_TYPE_MICRO2440 2680 #define MACH_TYPE_AM2440 2681 #define MACH_TYPE_TQ2440 2682 @@ -2693,12 +2693,86 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_QSD8X50_FFA 2710 #define MACH_TYPE_QSD8X50A_SURF 2711 #define MACH_TYPE_QSD8X50A_FFA 2712 -#define MACH_TYPE_XGCP10 2713 +#define MACH_TYPE_ADX_XGCP10 2713 #define MACH_TYPE_MCGWUMTS2A 2714 #define MACH_TYPE_MOBIKT 2715 #define MACH_TYPE_MX53_EVK 2716 #define MACH_TYPE_IGEP0030 2717 #define MACH_TYPE_AXELL_H40_H50_CTRL 2718 +#define MACH_TYPE_DTCOMMOD 2719 +#define MACH_TYPE_GOULD 2720 +#define MACH_TYPE_SIBERIA 2721 +#define MACH_TYPE_SBC3530 2722 +#define MACH_TYPE_QARM 2723 +#define MACH_TYPE_MIPS 2724 +#define MACH_TYPE_MX27GRB 2725 +#define MACH_TYPE_SBC8100 2726 +#define MACH_TYPE_SAARB 2727 +#define MACH_TYPE_OMAP3MINI 2728 +#define MACH_TYPE_CNMBOOK7SE 2729 +#define MACH_TYPE_CATAN 2730 +#define MACH_TYPE_HARMONY 2731 +#define MACH_TYPE_TONGA 2732 +#define MACH_TYPE_CYBOOK_ORIZON 2733 +#define MACH_TYPE_HTCRHODIUMCDMA 2734 +#define MACH_TYPE_EPC_G45 2735 +#define MACH_TYPE_EPC_LPC3250 2736 +#define MACH_TYPE_MXC91341EVB 2737 +#define MACH_TYPE_RTW1000 2738 +#define MACH_TYPE_BOBCAT 2739 +#define MACH_TYPE_TRIZEPS6 2740 +#define MACH_TYPE_MSM7X30_FLUID 2741 +#define MACH_TYPE_NEDAP9263 2742 +#define MACH_TYPE_NETGEAR_MS2110 2743 +#define MACH_TYPE_BMX 2744 +#define MACH_TYPE_NETSTREAM 2745 +#define MACH_TYPE_VPNEXT_RCU 2746 +#define MACH_TYPE_VPNEXT_MPU 2747 +#define MACH_TYPE_BCMRING_TABLET_V1 2748 +#define MACH_TYPE_SGARM10 2749 +#define MACH_TYPE_CM_T3517 2750 +#define MACH_TYPE_OMAP3_CPS 2751 +#define MACH_TYPE_AXAR1500_RECEIVER 2752 +#define MACH_TYPE_WBD222 2753 +#define MACH_TYPE_MT65XX 2754 +#define MACH_TYPE_MSM8X60_SURF 2755 +#define MACH_TYPE_MSM8X60_SIM 2756 +#define MACH_TYPE_VMC300 2757 +#define MACH_TYPE_TCC8000_SDK 2758 +#define MACH_TYPE_NANOS 2759 +#define MACH_TYPE_STAMP9G10 2760 +#define MACH_TYPE_STAMP9G45 2761 +#define MACH_TYPE_H6053 2762 +#define MACH_TYPE_SMINT01 2763 +#define MACH_TYPE_PRTLVT2 2764 +#define MACH_TYPE_AP420 2765 +#define MACH_TYPE_HTCSHIFT 2766 +#define MACH_TYPE_DAVINCI_DM365_FC 2767 +#define MACH_TYPE_MSM8X55_SURF 2768 +#define MACH_TYPE_MSM8X55_FFA 2769 +#define MACH_TYPE_ESL_VAMANA 2770 +#define MACH_TYPE_SBC35 2771 +#define MACH_TYPE_MPX6446 2772 +#define MACH_TYPE_OREO_CONTROLLER 2773 +#define MACH_TYPE_KOPIN_MODELS 2774 +#define MACH_TYPE_TTC_VISION2 2775 +#define MACH_TYPE_CNS3420VB 2776 +#define MACH_TYPE_LPC2 2777 +#define MACH_TYPE_OLYMPUS 2778 +#define MACH_TYPE_VORTEX 2779 +#define MACH_TYPE_S5PC200 2780 +#define MACH_TYPE_ECUCORE_9263 2781 +#define MACH_TYPE_SMDKC200 2782 +#define MACH_TYPE_EMSISO_SX27 2783 +#define MACH_TYPE_APX_SOM9G45_EK 2784 +#define MACH_TYPE_SONGSHAN 2785 +#define MACH_TYPE_TIANSHAN 2786 +#define MACH_TYPE_VPX500 2787 +#define MACH_TYPE_AM3517SAM 2788 +#define MACH_TYPE_SKAT91_SIM508 2789 +#define MACH_TYPE_SKAT91_S3E 2790 +#define MACH_TYPE_OMAP4_PANDA 2791 +#define MACH_TYPE_DF7220 2792 #ifdef CONFIG_ARCH_EBSA110 # ifdef machine_arch_type @@ -18343,9 +18417,9 @@ extern unsigned int __machine_arch_type; # else # define machine_arch_type MACH_TYPE_HYNET_INE # endif -# define machine_is_hynet_ine() (machine_arch_type == MACH_TYPE_HYNET_INE) +# define machine_is_argonst_foundation() (machine_arch_type == MACH_TYPE_HYNET_INE) #else -# define machine_is_hynet_ine() (0) +# define machine_is_argonst_foundation() (0) #endif #ifdef CONFIG_MACH_HYNET_APP @@ -30211,9 +30285,9 @@ extern unsigned int __machine_arch_type; # else # define machine_arch_type MACH_TYPE_OREO # endif -# define machine_is_oreo() (machine_arch_type == MACH_TYPE_OREO) +# define machine_is_oreo_camera() (machine_arch_type == MACH_TYPE_OREO) #else -# define machine_is_oreo() (0) +# define machine_is_oreo_camera() (0) #endif #ifdef CONFIG_MACH_SMDK6442 @@ -34464,14 +34538,14 @@ extern unsigned int __machine_arch_type; # define machine_is_sheeva_esata() (0) #endif -#ifdef CONFIG_MACH_SURF7X30 +#ifdef CONFIG_MACH_MSM7X30_SURF # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_SURF7X30 +# define machine_arch_type MACH_TYPE_MSM7X30_SURF # endif -# define machine_is_msm7x30_surf() (machine_arch_type == MACH_TYPE_SURF7X30) +# define machine_is_msm7x30_surf() (machine_arch_type == MACH_TYPE_MSM7X30_SURF) #else # define machine_is_msm7x30_surf() (0) #endif @@ -34872,14 +34946,14 @@ extern unsigned int __machine_arch_type; # define machine_is_qsd8x50a_ffa() (0) #endif -#ifdef CONFIG_MACH_XGCP10 +#ifdef CONFIG_MACH_ADX_XGCP10 # ifdef machine_arch_type # undef machine_arch_type # define machine_arch_type __machine_arch_type # else -# define machine_arch_type MACH_TYPE_XGCP10 +# define machine_arch_type MACH_TYPE_ADX_XGCP10 # endif -# define machine_is_adx_xgcp10() (machine_arch_type == MACH_TYPE_XGCP10) +# define machine_is_adx_xgcp10() (machine_arch_type == MACH_TYPE_ADX_XGCP10) #else # define machine_is_adx_xgcp10() (0) #endif @@ -34944,6 +35018,894 @@ extern unsigned int __machine_arch_type; # define machine_is_axell_h40_h50_ctrl() (0) #endif +#ifdef CONFIG_MACH_DTCOMMOD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DTCOMMOD +# endif +# define machine_is_dtcommod() (machine_arch_type == MACH_TYPE_DTCOMMOD) +#else +# define machine_is_dtcommod() (0) +#endif + +#ifdef CONFIG_MACH_GOULD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GOULD +# endif +# define machine_is_gould() (machine_arch_type == MACH_TYPE_GOULD) +#else +# define machine_is_gould() (0) +#endif + +#ifdef CONFIG_MACH_SIBERIA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SIBERIA +# endif +# define machine_is_siberia() (machine_arch_type == MACH_TYPE_SIBERIA) +#else +# define machine_is_siberia() (0) +#endif + +#ifdef CONFIG_MACH_SBC3530 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SBC3530 +# endif +# define machine_is_sbc3530() (machine_arch_type == MACH_TYPE_SBC3530) +#else +# define machine_is_sbc3530() (0) +#endif + +#ifdef CONFIG_MACH_QARM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_QARM +# endif +# define machine_is_qarm() (machine_arch_type == MACH_TYPE_QARM) +#else +# define machine_is_qarm() (0) +#endif + +#ifdef CONFIG_MACH_MIPS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MIPS +# endif +# define machine_is_mips() (machine_arch_type == MACH_TYPE_MIPS) +#else +# define machine_is_mips() (0) +#endif + +#ifdef CONFIG_MACH_MX27GRB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MX27GRB +# endif +# define machine_is_mx27grb() (machine_arch_type == MACH_TYPE_MX27GRB) +#else +# define machine_is_mx27grb() (0) +#endif + +#ifdef CONFIG_MACH_SBC8100 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SBC8100 +# endif +# define machine_is_sbc8100() (machine_arch_type == MACH_TYPE_SBC8100) +#else +# define machine_is_sbc8100() (0) +#endif + +#ifdef CONFIG_MACH_SAARB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SAARB +# endif +# define machine_is_saarb() (machine_arch_type == MACH_TYPE_SAARB) +#else +# define machine_is_saarb() (0) +#endif + +#ifdef CONFIG_MACH_OMAP3MINI +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP3MINI +# endif +# define machine_is_omap3mini() (machine_arch_type == MACH_TYPE_OMAP3MINI) +#else +# define machine_is_omap3mini() (0) +#endif + +#ifdef CONFIG_MACH_CNMBOOK7SE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CNMBOOK7SE +# endif +# define machine_is_cnmbook7se() (machine_arch_type == MACH_TYPE_CNMBOOK7SE) +#else +# define machine_is_cnmbook7se() (0) +#endif + +#ifdef CONFIG_MACH_CATAN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CATAN +# endif +# define machine_is_catan() (machine_arch_type == MACH_TYPE_CATAN) +#else +# define machine_is_catan() (0) +#endif + +#ifdef CONFIG_MACH_HARMONY +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HARMONY +# endif +# define machine_is_harmony() (machine_arch_type == MACH_TYPE_HARMONY) +#else +# define machine_is_harmony() (0) +#endif + +#ifdef CONFIG_MACH_TONGA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TONGA +# endif +# define machine_is_tonga() (machine_arch_type == MACH_TYPE_TONGA) +#else +# define machine_is_tonga() (0) +#endif + +#ifdef CONFIG_MACH_CYBOOK_ORIZON +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CYBOOK_ORIZON +# endif +# define machine_is_cybook_orizon() (machine_arch_type == MACH_TYPE_CYBOOK_ORIZON) +#else +# define machine_is_cybook_orizon() (0) +#endif + +#ifdef CONFIG_MACH_HTCRHODIUMCDMA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HTCRHODIUMCDMA +# endif +# define machine_is_htcrhodiumcdma() (machine_arch_type == MACH_TYPE_HTCRHODIUMCDMA) +#else +# define machine_is_htcrhodiumcdma() (0) +#endif + +#ifdef CONFIG_MACH_EPC_G45 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EPC_G45 +# endif +# define machine_is_epc_g45() (machine_arch_type == MACH_TYPE_EPC_G45) +#else +# define machine_is_epc_g45() (0) +#endif + +#ifdef CONFIG_MACH_EPC_LPC3250 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EPC_LPC3250 +# endif +# define machine_is_epc_lpc3250() (machine_arch_type == MACH_TYPE_EPC_LPC3250) +#else +# define machine_is_epc_lpc3250() (0) +#endif + +#ifdef CONFIG_MACH_MXC91341EVB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MXC91341EVB +# endif +# define machine_is_mxc91341evb() (machine_arch_type == MACH_TYPE_MXC91341EVB) +#else +# define machine_is_mxc91341evb() (0) +#endif + +#ifdef CONFIG_MACH_RTW1000 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_RTW1000 +# endif +# define machine_is_rtw1000() (machine_arch_type == MACH_TYPE_RTW1000) +#else +# define machine_is_rtw1000() (0) +#endif + +#ifdef CONFIG_MACH_BOBCAT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BOBCAT +# endif +# define machine_is_bobcat() (machine_arch_type == MACH_TYPE_BOBCAT) +#else +# define machine_is_bobcat() (0) +#endif + +#ifdef CONFIG_MACH_TRIZEPS6 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TRIZEPS6 +# endif +# define machine_is_trizeps6() (machine_arch_type == MACH_TYPE_TRIZEPS6) +#else +# define machine_is_trizeps6() (0) +#endif + +#ifdef CONFIG_MACH_MSM7X30_FLUID +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM7X30_FLUID +# endif +# define machine_is_msm7x30_fluid() (machine_arch_type == MACH_TYPE_MSM7X30_FLUID) +#else +# define machine_is_msm7x30_fluid() (0) +#endif + +#ifdef CONFIG_MACH_NEDAP9263 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NEDAP9263 +# endif +# define machine_is_nedap9263() (machine_arch_type == MACH_TYPE_NEDAP9263) +#else +# define machine_is_nedap9263() (0) +#endif + +#ifdef CONFIG_MACH_NETGEAR_MS2110 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NETGEAR_MS2110 +# endif +# define machine_is_netgear_ms2110() (machine_arch_type == MACH_TYPE_NETGEAR_MS2110) +#else +# define machine_is_netgear_ms2110() (0) +#endif + +#ifdef CONFIG_MACH_BMX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BMX +# endif +# define machine_is_bmx() (machine_arch_type == MACH_TYPE_BMX) +#else +# define machine_is_bmx() (0) +#endif + +#ifdef CONFIG_MACH_NETSTREAM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NETSTREAM +# endif +# define machine_is_netstream() (machine_arch_type == MACH_TYPE_NETSTREAM) +#else +# define machine_is_netstream() (0) +#endif + +#ifdef CONFIG_MACH_VPNEXT_RCU +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VPNEXT_RCU +# endif +# define machine_is_vpnext_rcu() (machine_arch_type == MACH_TYPE_VPNEXT_RCU) +#else +# define machine_is_vpnext_rcu() (0) +#endif + +#ifdef CONFIG_MACH_VPNEXT_MPU +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VPNEXT_MPU +# endif +# define machine_is_vpnext_mpu() (machine_arch_type == MACH_TYPE_VPNEXT_MPU) +#else +# define machine_is_vpnext_mpu() (0) +#endif + +#ifdef CONFIG_MACH_BCMRING_TABLET_V1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BCMRING_TABLET_V1 +# endif +# define machine_is_bcmring_tablet_v1() (machine_arch_type == MACH_TYPE_BCMRING_TABLET_V1) +#else +# define machine_is_bcmring_tablet_v1() (0) +#endif + +#ifdef CONFIG_MACH_SGARM10 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SGARM10 +# endif +# define machine_is_sgarm10() (machine_arch_type == MACH_TYPE_SGARM10) +#else +# define machine_is_sgarm10() (0) +#endif + +#ifdef CONFIG_MACH_CM_T3517 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CM_T3517 +# endif +# define machine_is_cm_t3517() (machine_arch_type == MACH_TYPE_CM_T3517) +#else +# define machine_is_cm_t3517() (0) +#endif + +#ifdef CONFIG_MACH_OMAP3_CPS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP3_CPS +# endif +# define machine_is_omap3_cps() (machine_arch_type == MACH_TYPE_OMAP3_CPS) +#else +# define machine_is_omap3_cps() (0) +#endif + +#ifdef CONFIG_MACH_AXAR1500_RECEIVER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_AXAR1500_RECEIVER +# endif +# define machine_is_axar1500_receiver() (machine_arch_type == MACH_TYPE_AXAR1500_RECEIVER) +#else +# define machine_is_axar1500_receiver() (0) +#endif + +#ifdef CONFIG_MACH_WBD222 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_WBD222 +# endif +# define machine_is_wbd222() (machine_arch_type == MACH_TYPE_WBD222) +#else +# define machine_is_wbd222() (0) +#endif + +#ifdef CONFIG_MACH_MT65XX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MT65XX +# endif +# define machine_is_mt65xx() (machine_arch_type == MACH_TYPE_MT65XX) +#else +# define machine_is_mt65xx() (0) +#endif + +#ifdef CONFIG_MACH_MSM8X60_SURF +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM8X60_SURF +# endif +# define machine_is_msm8x60_surf() (machine_arch_type == MACH_TYPE_MSM8X60_SURF) +#else +# define machine_is_msm8x60_surf() (0) +#endif + +#ifdef CONFIG_MACH_MSM8X60_SIM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM8X60_SIM +# endif +# define machine_is_msm8x60_sim() (machine_arch_type == MACH_TYPE_MSM8X60_SIM) +#else +# define machine_is_msm8x60_sim() (0) +#endif + +#ifdef CONFIG_MACH_VMC300 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VMC300 +# endif +# define machine_is_vmc300() (machine_arch_type == MACH_TYPE_VMC300) +#else +# define machine_is_vmc300() (0) +#endif + +#ifdef CONFIG_MACH_TCC8000_SDK +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TCC8000_SDK +# endif +# define machine_is_tcc8000_sdk() (machine_arch_type == MACH_TYPE_TCC8000_SDK) +#else +# define machine_is_tcc8000_sdk() (0) +#endif + +#ifdef CONFIG_MACH_NANOS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NANOS +# endif +# define machine_is_nanos() (machine_arch_type == MACH_TYPE_NANOS) +#else +# define machine_is_nanos() (0) +#endif + +#ifdef CONFIG_MACH_STAMP9G10 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_STAMP9G10 +# endif +# define machine_is_stamp9g10() (machine_arch_type == MACH_TYPE_STAMP9G10) +#else +# define machine_is_stamp9g10() (0) +#endif + +#ifdef CONFIG_MACH_STAMP9G45 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_STAMP9G45 +# endif +# define machine_is_stamp9g45() (machine_arch_type == MACH_TYPE_STAMP9G45) +#else +# define machine_is_stamp9g45() (0) +#endif + +#ifdef CONFIG_MACH_H6053 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_H6053 +# endif +# define machine_is_h6053() (machine_arch_type == MACH_TYPE_H6053) +#else +# define machine_is_h6053() (0) +#endif + +#ifdef CONFIG_MACH_SMINT01 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SMINT01 +# endif +# define machine_is_smint01() (machine_arch_type == MACH_TYPE_SMINT01) +#else +# define machine_is_smint01() (0) +#endif + +#ifdef CONFIG_MACH_PRTLVT2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PRTLVT2 +# endif +# define machine_is_prtlvt2() (machine_arch_type == MACH_TYPE_PRTLVT2) +#else +# define machine_is_prtlvt2() (0) +#endif + +#ifdef CONFIG_MACH_AP420 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_AP420 +# endif +# define machine_is_ap420() (machine_arch_type == MACH_TYPE_AP420) +#else +# define machine_is_ap420() (0) +#endif + +#ifdef CONFIG_MACH_HTCSHIFT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HTCSHIFT +# endif +# define machine_is_htcclio() (machine_arch_type == MACH_TYPE_HTCSHIFT) +#else +# define machine_is_htcclio() (0) +#endif + +#ifdef CONFIG_MACH_DAVINCI_DM365_FC +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DAVINCI_DM365_FC +# endif +# define machine_is_davinci_dm365_fc() (machine_arch_type == MACH_TYPE_DAVINCI_DM365_FC) +#else +# define machine_is_davinci_dm365_fc() (0) +#endif + +#ifdef CONFIG_MACH_MSM8X55_SURF +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM8X55_SURF +# endif +# define machine_is_msm8x55_surf() (machine_arch_type == MACH_TYPE_MSM8X55_SURF) +#else +# define machine_is_msm8x55_surf() (0) +#endif + +#ifdef CONFIG_MACH_MSM8X55_FFA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MSM8X55_FFA +# endif +# define machine_is_msm8x55_ffa() (machine_arch_type == MACH_TYPE_MSM8X55_FFA) +#else +# define machine_is_msm8x55_ffa() (0) +#endif + +#ifdef CONFIG_MACH_ESL_VAMANA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ESL_VAMANA +# endif +# define machine_is_esl_vamana() (machine_arch_type == MACH_TYPE_ESL_VAMANA) +#else +# define machine_is_esl_vamana() (0) +#endif + +#ifdef CONFIG_MACH_SBC35 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SBC35 +# endif +# define machine_is_sbc35() (machine_arch_type == MACH_TYPE_SBC35) +#else +# define machine_is_sbc35() (0) +#endif + +#ifdef CONFIG_MACH_MPX6446 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MPX6446 +# endif +# define machine_is_mpx6446() (machine_arch_type == MACH_TYPE_MPX6446) +#else +# define machine_is_mpx6446() (0) +#endif + +#ifdef CONFIG_MACH_OREO_CONTROLLER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OREO_CONTROLLER +# endif +# define machine_is_oreo_controller() (machine_arch_type == MACH_TYPE_OREO_CONTROLLER) +#else +# define machine_is_oreo_controller() (0) +#endif + +#ifdef CONFIG_MACH_KOPIN_MODELS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_KOPIN_MODELS +# endif +# define machine_is_kopin_models() (machine_arch_type == MACH_TYPE_KOPIN_MODELS) +#else +# define machine_is_kopin_models() (0) +#endif + +#ifdef CONFIG_MACH_TTC_VISION2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TTC_VISION2 +# endif +# define machine_is_ttc_vision2() (machine_arch_type == MACH_TYPE_TTC_VISION2) +#else +# define machine_is_ttc_vision2() (0) +#endif + +#ifdef CONFIG_MACH_CNS3420VB +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CNS3420VB +# endif +# define machine_is_cns3420vb() (machine_arch_type == MACH_TYPE_CNS3420VB) +#else +# define machine_is_cns3420vb() (0) +#endif + +#ifdef CONFIG_MACH_LPC2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_LPC2 +# endif +# define machine_is_lpc2() (machine_arch_type == MACH_TYPE_LPC2) +#else +# define machine_is_lpc2() (0) +#endif + +#ifdef CONFIG_MACH_OLYMPUS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OLYMPUS +# endif +# define machine_is_olympus() (machine_arch_type == MACH_TYPE_OLYMPUS) +#else +# define machine_is_olympus() (0) +#endif + +#ifdef CONFIG_MACH_VORTEX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VORTEX +# endif +# define machine_is_vortex() (machine_arch_type == MACH_TYPE_VORTEX) +#else +# define machine_is_vortex() (0) +#endif + +#ifdef CONFIG_MACH_S5PC200 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_S5PC200 +# endif +# define machine_is_s5pc200() (machine_arch_type == MACH_TYPE_S5PC200) +#else +# define machine_is_s5pc200() (0) +#endif + +#ifdef CONFIG_MACH_ECUCORE_9263 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ECUCORE_9263 +# endif +# define machine_is_ecucore_9263() (machine_arch_type == MACH_TYPE_ECUCORE_9263) +#else +# define machine_is_ecucore_9263() (0) +#endif + +#ifdef CONFIG_MACH_SMDKC200 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SMDKC200 +# endif +# define machine_is_smdkc200() (machine_arch_type == MACH_TYPE_SMDKC200) +#else +# define machine_is_smdkc200() (0) +#endif + +#ifdef CONFIG_MACH_EMSISO_SX27 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EMSISO_SX27 +# endif +# define machine_is_emsiso_sx27() (machine_arch_type == MACH_TYPE_EMSISO_SX27) +#else +# define machine_is_emsiso_sx27() (0) +#endif + +#ifdef CONFIG_MACH_APX_SOM9G45_EK +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_APX_SOM9G45_EK +# endif +# define machine_is_apx_som9g45_ek() (machine_arch_type == MACH_TYPE_APX_SOM9G45_EK) +#else +# define machine_is_apx_som9g45_ek() (0) +#endif + +#ifdef CONFIG_MACH_SONGSHAN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SONGSHAN +# endif +# define machine_is_songshan() (machine_arch_type == MACH_TYPE_SONGSHAN) +#else +# define machine_is_songshan() (0) +#endif + +#ifdef CONFIG_MACH_TIANSHAN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TIANSHAN +# endif +# define machine_is_tianshan() (machine_arch_type == MACH_TYPE_TIANSHAN) +#else +# define machine_is_tianshan() (0) +#endif + +#ifdef CONFIG_MACH_VPX500 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_VPX500 +# endif +# define machine_is_vpx500() (machine_arch_type == MACH_TYPE_VPX500) +#else +# define machine_is_vpx500() (0) +#endif + +#ifdef CONFIG_MACH_AM3517SAM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_AM3517SAM +# endif +# define machine_is_am3517sam() (machine_arch_type == MACH_TYPE_AM3517SAM) +#else +# define machine_is_am3517sam() (0) +#endif + +#ifdef CONFIG_MACH_SKAT91_SIM508 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SKAT91_SIM508 +# endif +# define machine_is_skat91_sim508() (machine_arch_type == MACH_TYPE_SKAT91_SIM508) +#else +# define machine_is_skat91_sim508() (0) +#endif + +#ifdef CONFIG_MACH_SKAT91_S3E +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SKAT91_S3E +# endif +# define machine_is_skat91_s3e() (machine_arch_type == MACH_TYPE_SKAT91_S3E) +#else +# define machine_is_skat91_s3e() (0) +#endif + +#ifdef CONFIG_MACH_OMAP4_PANDA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP4_PANDA +# endif +# define machine_is_omap4_panda() (machine_arch_type == MACH_TYPE_OMAP4_PANDA) +#else +# define machine_is_omap4_panda() (0) +#endif + +#ifdef CONFIG_MACH_DF7220 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DF7220 +# endif +# define machine_is_df7220() (machine_arch_type == MACH_TYPE_DF7220) +#else +# define machine_is_df7220() (0) +#endif + /* * These have not yet been registered */ From e3150c77617c7d452420e6c87769b79b6671b12d Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Tue, 6 Apr 2010 16:18:04 +0300 Subject: [PATCH 52/76] pm9261 converted to at91 soc access Signed-off-by: Asen Dimov --- board/ronetix/pm9261/led.c | 18 ++-- board/ronetix/pm9261/pm9261.c | 150 +++++++++++++++++++--------------- include/configs/pm9261.h | 68 ++++++++------- 3 files changed, 129 insertions(+), 107 deletions(-) diff --git a/board/ronetix/pm9261/led.c b/board/ronetix/pm9261/led.c index 396c3e7340..ff21ce667b 100644 --- a/board/ronetix/pm9261/led.c +++ b/board/ronetix/pm9261/led.c @@ -26,19 +26,21 @@ #include #include #include -#include +#include #include void coloured_LED_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); + writel(1 << AT91SAM9261_ID_PIOC, &pmc->pcer); - at91_set_gpio_output(CONFIG_RED_LED, 1); - at91_set_gpio_output(CONFIG_GREEN_LED, 1); - at91_set_gpio_output(CONFIG_YELLOW_LED, 1); + at91_set_pio_output(CONFIG_RED_LED, 1); + at91_set_pio_output(CONFIG_GREEN_LED, 1); + at91_set_pio_output(CONFIG_YELLOW_LED, 1); - at91_set_gpio_value(CONFIG_RED_LED, 0); - at91_set_gpio_value(CONFIG_GREEN_LED, 1); - at91_set_gpio_value(CONFIG_YELLOW_LED, 1); + at91_set_pio_value(CONFIG_RED_LED, 0); + at91_set_pio_value(CONFIG_GREEN_LED, 1); + at91_set_pio_value(CONFIG_YELLOW_LED, 1); } diff --git a/board/ronetix/pm9261/pm9261.c b/board/ronetix/pm9261/pm9261.c index 8662339581..53d8c48281 100644 --- a/board/ronetix/pm9261/pm9261.c +++ b/board/ronetix/pm9261/pm9261.c @@ -27,13 +27,14 @@ #include #include #include -#include #include #include #include #include +#include +#include #include -#include +#include #include #include #include @@ -55,39 +56,48 @@ DECLARE_GLOBAL_DATA_PTR; static void pm9261_nand_hw_init(void) { unsigned long csa; + at91_smc_t *smc = (at91_smc_t *) AT91_SMC_BASE; + at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; /* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, - csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + csa = readl(&matrix->csa) | AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &matrix->csa); /* Configure SMC CS3 for NAND/SmartMedia */ - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[3].setup); + + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), + &smc->cs[3].pulse); + + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + &smc->cs[3].cycle); + + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | #ifdef CONFIG_SYS_NAND_DBW_16 - AT91_SMC_DBW_16 | + AT91_SMC_MODE_DBW_16 | #else /* CONFIG_SYS_NAND_DBW_8 */ - AT91_SMC_DBW_8 | + AT91_SMC_MODE_DBW_8 | #endif - AT91_SMC_TDF_(2)); + AT91_SMC_MODE_TDF_CYCLE(2), + &smc->cs[3].mode); + + writel(1 << AT91SAM9261_ID_PIOA | + 1 << AT91SAM9261_ID_PIOC, + &pmc->pcer); /* Configure RDY/BSY */ - at91_set_gpio_input(AT91_PIN_PA16, 1); + at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1); /* Enable NandFlash */ - at91_set_gpio_output(AT91_PIN_PC14, 1); + at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); - at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ - at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ + at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* NANDOE */ + at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* NANDWE */ } #endif @@ -95,23 +105,30 @@ static void pm9261_nand_hw_init(void) #ifdef CONFIG_DRIVER_DM9000 static void pm9261_dm9000_hw_init(void) { + at91_smc_t *smc = (at91_smc_t *) AT91_SMC_BASE; + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Configure SMC CS2 for DM9000 */ - at91_sys_write(AT91_SMC_SETUP(2), - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC_PULSE(2), - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | - AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); - at91_sys_write(AT91_SMC_CYCLE(2), - AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); - at91_sys_write(AT91_SMC_MODE(2), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | - AT91_SMC_TDF_(1)); + writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[2].setup); + + writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(8) | + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(8), + &smc->cs[2].pulse); + + writel(AT91_SMC_CYCLE_NWE(16) | AT91_SMC_CYCLE_NRD(16), + &smc->cs[2].cycle); + + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | + AT91_SMC_MODE_BAT | AT91_SMC_MODE_DBW_16 | + AT91_SMC_MODE_TDF_CYCLE(1), + &smc->cs[2].mode); /* Configure Interrupt pin as input, no pull-up */ - at91_set_gpio_input(AT91_PIN_PA24, 0); + writel(1 << AT91SAM9261_ID_PIOA, &pmc->pcer); + at91_set_pio_input(AT91_PIO_PORTA, 24, 0); } #endif @@ -135,40 +152,42 @@ vidinfo_t panel_info = { void lcd_enable(void) { - at91_set_gpio_value(AT91_PIN_PA22, 0); /* power up */ + at91_set_pio_value(AT91_PIO_PORTA, 22, 0); /* power up */ } void lcd_disable(void) { - at91_set_gpio_value(AT91_PIN_PA22, 1); /* power down */ + at91_set_pio_value(AT91_PIO_PORTA, 22, 1); /* power down */ } static void pm9261_lcd_hw_init(void) { - at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ - at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ - at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ - at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ - at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ - at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ - at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */ - at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */ - at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */ - at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */ - at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */ - at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */ - at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */ - at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */ - at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */ - at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */ - at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */ - at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */ - at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */ - at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ - at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ - at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1); + at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* LCDHSYNC */ + at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* LCDDOTCK */ + at91_set_a_periph(AT91_PIO_PORTB, 3, 0); /* LCDDEN */ + at91_set_a_periph(AT91_PIO_PORTB, 4, 0); /* LCDCC */ + at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* LCDD2 */ + at91_set_a_periph(AT91_PIO_PORTB, 8, 0); /* LCDD3 */ + at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* LCDD4 */ + at91_set_a_periph(AT91_PIO_PORTB, 10, 0); /* LCDD5 */ + at91_set_a_periph(AT91_PIO_PORTB, 11, 0); /* LCDD6 */ + at91_set_a_periph(AT91_PIO_PORTB, 12, 0); /* LCDD7 */ + at91_set_a_periph(AT91_PIO_PORTB, 15, 0); /* LCDD10 */ + at91_set_a_periph(AT91_PIO_PORTB, 16, 0); /* LCDD11 */ + at91_set_a_periph(AT91_PIO_PORTB, 17, 0); /* LCDD12 */ + at91_set_a_periph(AT91_PIO_PORTB, 18, 0); /* LCDD13 */ + at91_set_a_periph(AT91_PIO_PORTB, 19, 0); /* LCDD14 */ + at91_set_a_periph(AT91_PIO_PORTB, 20, 0); /* LCDD15 */ + at91_set_b_periph(AT91_PIO_PORTB, 23, 0); /* LCDD18 */ + at91_set_b_periph(AT91_PIO_PORTB, 24, 0); /* LCDD19 */ + at91_set_b_periph(AT91_PIO_PORTB, 25, 0); /* LCDD20 */ + at91_set_b_periph(AT91_PIO_PORTB, 26, 0); /* LCDD21 */ + at91_set_b_periph(AT91_PIO_PORTB, 27, 0); /* LCDD22 */ + at91_set_b_periph(AT91_PIO_PORTB, 28, 0); /* LCDD23 */ + + writel(1 << 17, &pmc->scer); /* LCD controller Clock, AT91SAM9261 only */ gd->fb_base = AT91SAM9261_SRAM_BASE; } @@ -222,11 +241,14 @@ void lcd_show_board_info(void) int board_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Enable Ctrlc */ console_init_f(); - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA); - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); + writel(1 << AT91SAM9261_ID_PIOA | + 1 << AT91SAM9261_ID_PIOC, + &pmc->pcer); /* arch number of PM9261-Board */ gd->bd->bi_arch_number = MACH_TYPE_PM9261; diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 47bb8c09aa..b245761b3d 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -28,8 +28,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_AT91_LEGACY - /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261" @@ -51,26 +49,26 @@ /* clocks */ /* CKGR_MOR - enable main osc. */ #define CONFIG_SYS_MOR_VAL \ - (AT91_PMC_MOSCEN | \ + (AT91_PMC_MOR_MOSCEN | \ (255 << 8)) /* Main Oscillator Start-up Time */ #define CONFIG_SYS_PLLAR_VAL \ - (AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */ \ - AT91_PMC_OUT | \ + (AT91_PMC_PLLAR_29 | /* Bit 29 must be 1 when prog */ \ + AT91_PMC_PLLXR_OUT(3) | \ ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV)) /* PCK/2 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR1_VAL \ - (AT91_PMC_CSS_SLOW | \ - AT91_PMC_PRES_1 | \ - AT91SAM9_PMC_MDIV_2 | \ - AT91_PMC_PDIV_1) + (AT91_PMC_MCKR_CSS_SLOW | \ + AT91_PMC_MCKR_PRES_1 | \ + AT91_PMC_MCKR_MDIV_2 | \ + AT91_PMC_MCKR_PLLADIV_1) /* PCK/2 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR2_VAL \ - (AT91_PMC_CSS_PLLA | \ - AT91_PMC_PRES_1 | \ - AT91SAM9_PMC_MDIV_2 | \ - AT91_PMC_PDIV_1) + (AT91_PMC_MCKR_CSS_PLLA | \ + AT91_PMC_MCKR_PRES_1 | \ + AT91_PMC_MCKR_MDIV_2 | \ + AT91_PMC_MCKR_PLLADIV_1) /* define PDC[31:16] as DATA[31:16] */ #define CONFIG_SYS_PIOC_PDR_VAL1 0xFFFF0000 @@ -79,7 +77,7 @@ /* EBI_CSA, no pull-ups for D[15:0], CS1 SDRAM, CS3 NAND Flash */ #define CONFIG_SYS_MATRIX_EBICSA_VAL \ - (AT91_MATRIX_DBPUC | AT91_MATRIX_CS1A_SDRAMC) + (AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_EBI_CS1A) /* SDRAM */ /* SDRAMC_MR Mode register */ @@ -122,32 +120,32 @@ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ #define CONFIG_SYS_SMC0_SETUP0_VAL \ - (AT91_SMC_NWESETUP_(10) | AT91_SMC_NCS_WRSETUP_(10) | \ - AT91_SMC_NRDSETUP_(10) | AT91_SMC_NCS_RDSETUP_(10)) + (AT91_SMC_SETUP_NWE(10) | AT91_SMC_SETUP_NCS_WR(10) | \ + AT91_SMC_SETUP_NRD(10) | AT91_SMC_SETUP_NCS_RD(10)) #define CONFIG_SYS_SMC0_PULSE0_VAL \ - (AT91_SMC_NWEPULSE_(11) | AT91_SMC_NCS_WRPULSE_(11) | \ - AT91_SMC_NRDPULSE_(11) | AT91_SMC_NCS_RDPULSE_(11)) + (AT91_SMC_PULSE_NWE(11) | AT91_SMC_PULSE_NCS_WR(11) | \ + AT91_SMC_PULSE_NRD(11) | AT91_SMC_PULSE_NCS_RD(11)) #define CONFIG_SYS_SMC0_CYCLE0_VAL \ - (AT91_SMC_NWECYCLE_(22) | AT91_SMC_NRDCYCLE_(22)) + (AT91_SMC_CYCLE_NWE(22) | AT91_SMC_CYCLE_NRD(22)) #define CONFIG_SYS_SMC0_MODE0_VAL \ - (AT91_SMC_READMODE | AT91_SMC_WRITEMODE | \ - AT91_SMC_DBW_16 | \ - AT91_SMC_TDFMODE | \ - AT91_SMC_TDF_(6)) + (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \ + AT91_SMC_MODE_DBW_16 | \ + AT91_SMC_MODE_TDF | \ + AT91_SMC_MODE_TDF_CYCLE(6)) /* user reset enable */ #define CONFIG_SYS_RSTC_RMR_VAL \ (AT91_RSTC_KEY | \ - AT91_RSTC_PROCRST | \ - AT91_RSTC_RSTTYP_WAKEUP | \ - AT91_RSTC_RSTTYP_WATCHDOG) + AT91_RSTC_CR_PROCRST | \ + AT91_RSTC_MR_ERSTL(1) | \ + AT91_RSTC_MR_ERSTL(2)) /* Disable Watchdog */ #define CONFIG_SYS_WDTC_WDMR_VAL \ - (AT91_WDT_WDIDLEHLT | AT91_WDT_WDDBGHLT | \ - AT91_WDT_WDV | \ - AT91_WDT_WDDIS | \ - AT91_WDT_WDD) + (AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT | \ + AT91_WDT_MR_WDV(0xfff) | \ + AT91_WDT_MR_WDDIS | \ + AT91_WDT_MR_WDD(0xfff)) #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 @@ -180,9 +178,9 @@ /* LED */ #define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIN_PC12 -#define CONFIG_GREEN_LED AT91_PIN_PC13 -#define CONFIG_YELLOW_LED AT91_PIN_PC15 +#define CONFIG_RED_LED AT91_PIO_PORTC, 12 +#define CONFIG_GREEN_LED AT91_PIO_PORTC, 13 +#define CONFIG_YELLOW_LED AT91_PIO_PORTC, 15 #define CONFIG_BOOTDELAY 3 @@ -236,8 +234,8 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) /* our CLE is AD21 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA16 +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTC, 14 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 16 /* NOR flash */ #define CONFIG_SYS_FLASH_CFI 1 From dc8cab87459d682fc272444044592d20243da2f0 Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Tue, 6 Apr 2010 16:17:34 +0300 Subject: [PATCH 53/76] pm9261: remove CONFIG_CMD_AUTOSCRIPT Signed-off-by: Asen Dimov --- include/configs/pm9261.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index b245761b3d..a0b00e9706 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -198,7 +198,6 @@ #include #undef CONFIG_CMD_BDI #undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_IMLS From 47eb08a97eb166e93d0495848b0c7582a0639fbc Mon Sep 17 00:00:00 2001 From: Alexander Holler Date: Mon, 29 Mar 2010 21:39:43 +0200 Subject: [PATCH 54/76] at91: add defines for RTT and GPBR Signed-off-by: Alexander Holler --- arch/arm/include/asm/arch-at91/at91sam9260.h | 2 ++ arch/arm/include/asm/arch-at91/at91sam9261.h | 2 ++ arch/arm/include/asm/arch-at91/at91sam9263.h | 3 +++ 3 files changed, 7 insertions(+) diff --git a/arch/arm/include/asm/arch-at91/at91sam9260.h b/arch/arm/include/asm/arch-at91/at91sam9260.h index a60a0811c0..ec04318036 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9260.h +++ b/arch/arm/include/asm/arch-at91/at91sam9260.h @@ -56,8 +56,10 @@ #define AT91_PIO_BASE 0xfffff400 #define AT91_PMC_BASE 0xfffffc00 #define AT91_RSTC_BASE 0xfffffd00 +#define AT91_RTT_BASE 0xfffffd20 #define AT91_PIT_BASE 0xfffffd30 #define AT91_WDT_BASE 0xfffffd40 +#define AT91_GPR_BASE 0xfffffd50 #ifdef CONFIG_AT91_LEGACY diff --git a/arch/arm/include/asm/arch-at91/at91sam9261.h b/arch/arm/include/asm/arch-at91/at91sam9261.h index 2952292c5d..7ca0283135 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9261.h +++ b/arch/arm/include/asm/arch-at91/at91sam9261.h @@ -49,8 +49,10 @@ #define AT91_PIO_BASE 0xfffff400 #define AT91_PMC_BASE 0xfffffc00 #define AT91_RSTC_BASE 0xfffffd00 +#define AT91_RTT_BASE 0xfffffd20 #define AT91_PIT_BASE 0xfffffd30 #define AT91_WDT_BASE 0xfffffd40 +#define AT91_GPBR_BASE 0xfffffd50 #ifdef CONFIG_AT91_LEGACY diff --git a/arch/arm/include/asm/arch-at91/at91sam9263.h b/arch/arm/include/asm/arch-at91/at91sam9263.h index c177bd059e..4ada1ceaf8 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9263.h +++ b/arch/arm/include/asm/arch-at91/at91sam9263.h @@ -61,8 +61,11 @@ #define AT91_PIO_BASE 0xfffff200 #define AT91_PMC_BASE 0xfffffc00 #define AT91_RSTC_BASE 0xfffffd00 +#define AT91_RTT0_BASE 0xfffffd20 #define AT91_PIT_BASE 0xfffffd30 #define AT91_WDT_BASE 0xfffffd40 +#define AT91_RTT1_BASE 0xfffffd50 +#define AT91_GPBR_BASE 0xfffffd60 #ifdef CONFIG_AT91_LEGACY From da0f2af279563ddc75eff304ad5389f7f0e79381 Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Wed, 7 Apr 2010 12:33:11 +0300 Subject: [PATCH 55/76] pm9263: remove CONFIG_CMD_AUTOSCRIPT Signed-off-by: Asen Dimov --- include/configs/pm9263.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 807dba8f42..f854f3874d 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -215,7 +215,6 @@ #include #undef CONFIG_CMD_BDI #undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_IMLS From 46a3b5c8df939f5547bcd3684030072c94d06bd8 Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Wed, 24 Mar 2010 16:59:30 +0900 Subject: [PATCH 56/76] SAMSUNG: serial: modify name from s5pc1xx to s5p Because of other s5p series SoC will use these serial functions, modify function's name and structure's name. Signed-off-by: Minkyu Kang --- arch/arm/include/asm/arch-s5pc1xx/uart.h | 2 +- common/serial.c | 16 +++++----- drivers/serial/Makefile | 2 +- .../serial/{serial_s5pc1xx.c => serial_s5p.c} | 30 +++++++++---------- include/serial.h | 8 ++--- 5 files changed, 29 insertions(+), 29 deletions(-) rename drivers/serial/{serial_s5pc1xx.c => serial_s5p.c} (83%) diff --git a/arch/arm/include/asm/arch-s5pc1xx/uart.h b/arch/arm/include/asm/arch-s5pc1xx/uart.h index 140dbdc45f..2d7ad7ec98 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/uart.h +++ b/arch/arm/include/asm/arch-s5pc1xx/uart.h @@ -24,7 +24,7 @@ #define __ASM_ARCH_UART_H_ #ifndef __ASSEMBLY__ -struct s5pc1xx_uart { +struct s5p_uart { unsigned int ulcon; unsigned int ucon; unsigned int ufcon; diff --git a/common/serial.c b/common/serial.c index 754e329922..0682faa9d1 100644 --- a/common/serial.c +++ b/common/serial.c @@ -79,13 +79,13 @@ struct serial_device *__default_serial_console (void) #endif #elif defined(CONFIG_S5PC1XX) #if defined(CONFIG_SERIAL0) - return &s5pc1xx_serial0_device; + return &s5p_serial0_device; #elif defined(CONFIG_SERIAL1) - return &s5pc1xx_serial1_device; + return &s5p_serial1_device; #elif defined(CONFIG_SERIAL2) - return &s5pc1xx_serial2_device; + return &s5p_serial2_device; #elif defined(CONFIG_SERIAL3) - return &s5pc1xx_serial3_device; + return &s5p_serial3_device; #else #error "CONFIG_SERIAL? missing." #endif @@ -162,10 +162,10 @@ void serial_initialize (void) serial_register(&s3c24xx_serial2_device); #endif #if defined(CONFIG_S5PC1XX) - serial_register(&s5pc1xx_serial0_device); - serial_register(&s5pc1xx_serial1_device); - serial_register(&s5pc1xx_serial2_device); - serial_register(&s5pc1xx_serial3_device); + serial_register(&s5p_serial0_device); + serial_register(&s5p_serial1_device); + serial_register(&s5p_serial2_device); + serial_register(&s5p_serial3_device); #endif #if defined(CONFIG_MPC512X) #if defined(CONFIG_SYS_PSC1) diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index d2b4820b6f..c731bfb594 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -36,7 +36,7 @@ COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o COBJS-$(CONFIG_SYS_NS16550) += ns16550.o COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o COBJS-$(CONFIG_S3C64XX) += s3c64xx.o -COBJS-$(CONFIG_S5PC1XX) += serial_s5pc1xx.o +COBJS-$(CONFIG_S5PC1XX) += serial_s5p.o COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o COBJS-$(CONFIG_CLPS7111_SERIAL) += serial_clps7111.o COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o diff --git a/drivers/serial/serial_s5pc1xx.c b/drivers/serial/serial_s5p.c similarity index 83% rename from drivers/serial/serial_s5pc1xx.c rename to drivers/serial/serial_s5p.c index 8da0c8606d..9747db3721 100644 --- a/drivers/serial/serial_s5pc1xx.c +++ b/drivers/serial/serial_s5p.c @@ -27,18 +27,18 @@ #include #include -static inline struct s5pc1xx_uart *s5pc1xx_get_base_uart(int dev_index) +static inline struct s5p_uart *s5p_get_base_uart(int dev_index) { - u32 offset = dev_index * sizeof(struct s5pc1xx_uart); + u32 offset = dev_index * sizeof(struct s5p_uart); if (cpu_is_s5pc100()) - return (struct s5pc1xx_uart *)(S5PC100_UART_BASE + offset); + return (struct s5p_uart *)(S5PC100_UART_BASE + offset); else - return (struct s5pc1xx_uart *)(S5PC110_UART_BASE + offset); + return (struct s5p_uart *)(S5PC110_UART_BASE + offset); } /* - * The coefficient, used to calculate the baudrate on S5PC1XX UARTs is + * The coefficient, used to calculate the baudrate on S5P UARTs is * calculated as * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1, @@ -66,7 +66,7 @@ static const int udivslot[] = { void serial_setbrg_dev(const int dev_index) { DECLARE_GLOBAL_DATA_PTR; - struct s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(dev_index); + struct s5p_uart *const uart = s5p_get_base_uart(dev_index); u32 pclk = get_pclk(); u32 baudrate = gd->baudrate; u32 val; @@ -83,7 +83,7 @@ void serial_setbrg_dev(const int dev_index) */ int serial_init_dev(const int dev_index) { - struct s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(dev_index); + struct s5p_uart *const uart = s5p_get_base_uart(dev_index); /* reset and enable FIFOs, set triggers to the maximum */ writel(0, &uart->ufcon); @@ -100,7 +100,7 @@ int serial_init_dev(const int dev_index) static int serial_err_check(const int dev_index, int op) { - struct s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(dev_index); + struct s5p_uart *const uart = s5p_get_base_uart(dev_index); unsigned int mask; /* @@ -125,7 +125,7 @@ static int serial_err_check(const int dev_index, int op) */ int serial_getc_dev(const int dev_index) { - struct s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(dev_index); + struct s5p_uart *const uart = s5p_get_base_uart(dev_index); /* wait for character to arrive */ while (!(readl(&uart->utrstat) & 0x1)) { @@ -141,7 +141,7 @@ int serial_getc_dev(const int dev_index) */ void serial_putc_dev(const char c, const int dev_index) { - struct s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(dev_index); + struct s5p_uart *const uart = s5p_get_base_uart(dev_index); /* wait for room in the tx FIFO */ while (!(readl(&uart->utrstat) & 0x2)) { @@ -161,7 +161,7 @@ void serial_putc_dev(const char c, const int dev_index) */ int serial_tstc_dev(const int dev_index) { - struct s5pc1xx_uart *const uart = s5pc1xx_get_base_uart(dev_index); + struct s5p_uart *const uart = s5p_get_base_uart(dev_index); return (int)(readl(&uart->utrstat) & 0x1); } @@ -193,14 +193,14 @@ void s5p_serial##port##_puts(const char *s) { serial_puts_dev(s, port); } s5p_serial##port##_puts, } DECLARE_S5P_SERIAL_FUNCTIONS(0); -struct serial_device s5pc1xx_serial0_device = +struct serial_device s5p_serial0_device = INIT_S5P_SERIAL_STRUCTURE(0, "s5pser0", "S5PUART0"); DECLARE_S5P_SERIAL_FUNCTIONS(1); -struct serial_device s5pc1xx_serial1_device = +struct serial_device s5p_serial1_device = INIT_S5P_SERIAL_STRUCTURE(1, "s5pser1", "S5PUART1"); DECLARE_S5P_SERIAL_FUNCTIONS(2); -struct serial_device s5pc1xx_serial2_device = +struct serial_device s5p_serial2_device = INIT_S5P_SERIAL_STRUCTURE(2, "s5pser2", "S5PUART2"); DECLARE_S5P_SERIAL_FUNCTIONS(3); -struct serial_device s5pc1xx_serial3_device = +struct serial_device s5p_serial3_device = INIT_S5P_SERIAL_STRUCTURE(3, "s5pser3", "S5PUART3"); diff --git a/include/serial.h b/include/serial.h index 6423fbaea1..111edbec8f 100644 --- a/include/serial.h +++ b/include/serial.h @@ -52,10 +52,10 @@ extern struct serial_device s3c24xx_serial2_device; #endif #if defined(CONFIG_S5PC1XX) -extern struct serial_device s5pc1xx_serial0_device; -extern struct serial_device s5pc1xx_serial1_device; -extern struct serial_device s5pc1xx_serial2_device; -extern struct serial_device s5pc1xx_serial3_device; +extern struct serial_device s5p_serial0_device; +extern struct serial_device s5p_serial1_device; +extern struct serial_device s5p_serial2_device; +extern struct serial_device s5p_serial3_device; #endif #if defined(CONFIG_OMAP3_ZOOM2) From 3bb6b037e8557fd3c0f3b3d9840c8b5996651dcb Mon Sep 17 00:00:00 2001 From: Minkyu Kang Date: Wed, 24 Mar 2010 15:31:06 +0900 Subject: [PATCH 57/76] SAMSUNG: make s5p common gpio functions Because of s5pc1xx gpio is same as s5p seires SoC, move gpio functions to drvier/gpio/ and modify structure's name from s5pc1xx_ to s5p_. Signed-off-by: Minkyu Kang --- arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile | 1 - arch/arm/include/asm/arch-s5pc1xx/gpio.h | 192 +++++++++--------- drivers/gpio/Makefile | 1 + .../s5pc1xx/gpio.c => drivers/gpio/s5p_gpio.c | 16 +- 4 files changed, 105 insertions(+), 105 deletions(-) rename arch/arm/cpu/arm_cortexa8/s5pc1xx/gpio.c => drivers/gpio/s5p_gpio.c (82%) diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile b/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile index 01c93feda8..3785593d25 100644 --- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile +++ b/arch/arm/cpu/arm_cortexa8/s5pc1xx/Makefile @@ -33,7 +33,6 @@ SOBJS += reset.o COBJS += clock.o COBJS += cpu_info.o -COBJS += gpio.o COBJS += sromc.o COBJS += timer.o diff --git a/arch/arm/include/asm/arch-s5pc1xx/gpio.h b/arch/arm/include/asm/arch-s5pc1xx/gpio.h index 8e4bb863f9..9a7faed319 100644 --- a/arch/arm/include/asm/arch-s5pc1xx/gpio.h +++ b/arch/arm/include/asm/arch-s5pc1xx/gpio.h @@ -22,7 +22,7 @@ #define __ASM_ARCH_GPIO_H #ifndef __ASSEMBLY__ -struct s5pc1xx_gpio_bank { +struct s5p_gpio_bank { unsigned int con; unsigned int dat; unsigned int pull; @@ -33,107 +33,107 @@ struct s5pc1xx_gpio_bank { }; struct s5pc100_gpio { - struct s5pc1xx_gpio_bank gpio_a0; - struct s5pc1xx_gpio_bank gpio_a1; - struct s5pc1xx_gpio_bank gpio_b; - struct s5pc1xx_gpio_bank gpio_c; - struct s5pc1xx_gpio_bank gpio_d; - struct s5pc1xx_gpio_bank gpio_e0; - struct s5pc1xx_gpio_bank gpio_e1; - struct s5pc1xx_gpio_bank gpio_f0; - struct s5pc1xx_gpio_bank gpio_f1; - struct s5pc1xx_gpio_bank gpio_f2; - struct s5pc1xx_gpio_bank gpio_f3; - struct s5pc1xx_gpio_bank gpio_g0; - struct s5pc1xx_gpio_bank gpio_g1; - struct s5pc1xx_gpio_bank gpio_g2; - struct s5pc1xx_gpio_bank gpio_g3; - struct s5pc1xx_gpio_bank gpio_i; - struct s5pc1xx_gpio_bank gpio_j0; - struct s5pc1xx_gpio_bank gpio_j1; - struct s5pc1xx_gpio_bank gpio_j2; - struct s5pc1xx_gpio_bank gpio_j3; - struct s5pc1xx_gpio_bank gpio_j4; - struct s5pc1xx_gpio_bank gpio_k0; - struct s5pc1xx_gpio_bank gpio_k1; - struct s5pc1xx_gpio_bank gpio_k2; - struct s5pc1xx_gpio_bank gpio_k3; - struct s5pc1xx_gpio_bank gpio_l0; - struct s5pc1xx_gpio_bank gpio_l1; - struct s5pc1xx_gpio_bank gpio_l2; - struct s5pc1xx_gpio_bank gpio_l3; - struct s5pc1xx_gpio_bank gpio_l4; - struct s5pc1xx_gpio_bank gpio_h0; - struct s5pc1xx_gpio_bank gpio_h1; - struct s5pc1xx_gpio_bank gpio_h2; - struct s5pc1xx_gpio_bank gpio_h3; + struct s5p_gpio_bank gpio_a0; + struct s5p_gpio_bank gpio_a1; + struct s5p_gpio_bank gpio_b; + struct s5p_gpio_bank gpio_c; + struct s5p_gpio_bank gpio_d; + struct s5p_gpio_bank gpio_e0; + struct s5p_gpio_bank gpio_e1; + struct s5p_gpio_bank gpio_f0; + struct s5p_gpio_bank gpio_f1; + struct s5p_gpio_bank gpio_f2; + struct s5p_gpio_bank gpio_f3; + struct s5p_gpio_bank gpio_g0; + struct s5p_gpio_bank gpio_g1; + struct s5p_gpio_bank gpio_g2; + struct s5p_gpio_bank gpio_g3; + struct s5p_gpio_bank gpio_i; + struct s5p_gpio_bank gpio_j0; + struct s5p_gpio_bank gpio_j1; + struct s5p_gpio_bank gpio_j2; + struct s5p_gpio_bank gpio_j3; + struct s5p_gpio_bank gpio_j4; + struct s5p_gpio_bank gpio_k0; + struct s5p_gpio_bank gpio_k1; + struct s5p_gpio_bank gpio_k2; + struct s5p_gpio_bank gpio_k3; + struct s5p_gpio_bank gpio_l0; + struct s5p_gpio_bank gpio_l1; + struct s5p_gpio_bank gpio_l2; + struct s5p_gpio_bank gpio_l3; + struct s5p_gpio_bank gpio_l4; + struct s5p_gpio_bank gpio_h0; + struct s5p_gpio_bank gpio_h1; + struct s5p_gpio_bank gpio_h2; + struct s5p_gpio_bank gpio_h3; }; struct s5pc110_gpio { - struct s5pc1xx_gpio_bank gpio_a0; - struct s5pc1xx_gpio_bank gpio_a1; - struct s5pc1xx_gpio_bank gpio_b; - struct s5pc1xx_gpio_bank gpio_c0; - struct s5pc1xx_gpio_bank gpio_c1; - struct s5pc1xx_gpio_bank gpio_d0; - struct s5pc1xx_gpio_bank gpio_d1; - struct s5pc1xx_gpio_bank gpio_e0; - struct s5pc1xx_gpio_bank gpio_e1; - struct s5pc1xx_gpio_bank gpio_f0; - struct s5pc1xx_gpio_bank gpio_f1; - struct s5pc1xx_gpio_bank gpio_f2; - struct s5pc1xx_gpio_bank gpio_f3; - struct s5pc1xx_gpio_bank gpio_g0; - struct s5pc1xx_gpio_bank gpio_g1; - struct s5pc1xx_gpio_bank gpio_g2; - struct s5pc1xx_gpio_bank gpio_g3; - struct s5pc1xx_gpio_bank gpio_i; - struct s5pc1xx_gpio_bank gpio_j0; - struct s5pc1xx_gpio_bank gpio_j1; - struct s5pc1xx_gpio_bank gpio_j2; - struct s5pc1xx_gpio_bank gpio_j3; - struct s5pc1xx_gpio_bank gpio_j4; - struct s5pc1xx_gpio_bank gpio_mp0_1; - struct s5pc1xx_gpio_bank gpio_mp0_2; - struct s5pc1xx_gpio_bank gpio_mp0_3; - struct s5pc1xx_gpio_bank gpio_mp0_4; - struct s5pc1xx_gpio_bank gpio_mp0_5; - struct s5pc1xx_gpio_bank gpio_mp0_6; - struct s5pc1xx_gpio_bank gpio_mp0_7; - struct s5pc1xx_gpio_bank gpio_mp1_0; - struct s5pc1xx_gpio_bank gpio_mp1_1; - struct s5pc1xx_gpio_bank gpio_mp1_2; - struct s5pc1xx_gpio_bank gpio_mp1_3; - struct s5pc1xx_gpio_bank gpio_mp1_4; - struct s5pc1xx_gpio_bank gpio_mp1_5; - struct s5pc1xx_gpio_bank gpio_mp1_6; - struct s5pc1xx_gpio_bank gpio_mp1_7; - struct s5pc1xx_gpio_bank gpio_mp1_8; - struct s5pc1xx_gpio_bank gpio_mp2_0; - struct s5pc1xx_gpio_bank gpio_mp2_1; - struct s5pc1xx_gpio_bank gpio_mp2_2; - struct s5pc1xx_gpio_bank gpio_mp2_3; - struct s5pc1xx_gpio_bank gpio_mp2_4; - struct s5pc1xx_gpio_bank gpio_mp2_5; - struct s5pc1xx_gpio_bank gpio_mp2_6; - struct s5pc1xx_gpio_bank gpio_mp2_7; - struct s5pc1xx_gpio_bank gpio_mp2_8; - struct s5pc1xx_gpio_bank res1[48]; - struct s5pc1xx_gpio_bank gpio_h0; - struct s5pc1xx_gpio_bank gpio_h1; - struct s5pc1xx_gpio_bank gpio_h2; - struct s5pc1xx_gpio_bank gpio_h3; + struct s5p_gpio_bank gpio_a0; + struct s5p_gpio_bank gpio_a1; + struct s5p_gpio_bank gpio_b; + struct s5p_gpio_bank gpio_c0; + struct s5p_gpio_bank gpio_c1; + struct s5p_gpio_bank gpio_d0; + struct s5p_gpio_bank gpio_d1; + struct s5p_gpio_bank gpio_e0; + struct s5p_gpio_bank gpio_e1; + struct s5p_gpio_bank gpio_f0; + struct s5p_gpio_bank gpio_f1; + struct s5p_gpio_bank gpio_f2; + struct s5p_gpio_bank gpio_f3; + struct s5p_gpio_bank gpio_g0; + struct s5p_gpio_bank gpio_g1; + struct s5p_gpio_bank gpio_g2; + struct s5p_gpio_bank gpio_g3; + struct s5p_gpio_bank gpio_i; + struct s5p_gpio_bank gpio_j0; + struct s5p_gpio_bank gpio_j1; + struct s5p_gpio_bank gpio_j2; + struct s5p_gpio_bank gpio_j3; + struct s5p_gpio_bank gpio_j4; + struct s5p_gpio_bank gpio_mp0_1; + struct s5p_gpio_bank gpio_mp0_2; + struct s5p_gpio_bank gpio_mp0_3; + struct s5p_gpio_bank gpio_mp0_4; + struct s5p_gpio_bank gpio_mp0_5; + struct s5p_gpio_bank gpio_mp0_6; + struct s5p_gpio_bank gpio_mp0_7; + struct s5p_gpio_bank gpio_mp1_0; + struct s5p_gpio_bank gpio_mp1_1; + struct s5p_gpio_bank gpio_mp1_2; + struct s5p_gpio_bank gpio_mp1_3; + struct s5p_gpio_bank gpio_mp1_4; + struct s5p_gpio_bank gpio_mp1_5; + struct s5p_gpio_bank gpio_mp1_6; + struct s5p_gpio_bank gpio_mp1_7; + struct s5p_gpio_bank gpio_mp1_8; + struct s5p_gpio_bank gpio_mp2_0; + struct s5p_gpio_bank gpio_mp2_1; + struct s5p_gpio_bank gpio_mp2_2; + struct s5p_gpio_bank gpio_mp2_3; + struct s5p_gpio_bank gpio_mp2_4; + struct s5p_gpio_bank gpio_mp2_5; + struct s5p_gpio_bank gpio_mp2_6; + struct s5p_gpio_bank gpio_mp2_7; + struct s5p_gpio_bank gpio_mp2_8; + struct s5p_gpio_bank res1[48]; + struct s5p_gpio_bank gpio_h0; + struct s5p_gpio_bank gpio_h1; + struct s5p_gpio_bank gpio_h2; + struct s5p_gpio_bank gpio_h3; }; /* functions */ -void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg); -void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en); -void gpio_direction_input(struct s5pc1xx_gpio_bank *bank, int gpio); -void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en); -unsigned int gpio_get_value(struct s5pc1xx_gpio_bank *bank, int gpio); -void gpio_set_pull(struct s5pc1xx_gpio_bank *bank, int gpio, int mode); -void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode); -void gpio_set_rate(struct s5pc1xx_gpio_bank *bank, int gpio, int mode); +void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg); +void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en); +void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio); +void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en); +unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio); +void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode); +void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode); +void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); #endif /* Pin configurations */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index d9660820bd..528ca2e99a 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -29,6 +29,7 @@ COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o COBJS-$(CONFIG_MX31_GPIO) += mx31_gpio.o COBJS-$(CONFIG_PCA953X) += pca953x.o +COBJS-$(CONFIG_S5PC1XX) += s5p_gpio.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/arch/arm/cpu/arm_cortexa8/s5pc1xx/gpio.c b/drivers/gpio/s5p_gpio.c similarity index 82% rename from arch/arm/cpu/arm_cortexa8/s5pc1xx/gpio.c rename to drivers/gpio/s5p_gpio.c index a97244bf30..0439477e46 100644 --- a/arch/arm/cpu/arm_cortexa8/s5pc1xx/gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -36,7 +36,7 @@ #define RATE_MASK(x) (0x1 << (x + 16)) #define RATE_SET(x) (0x1 << (x + 16)) -void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg) +void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg) { unsigned int value; @@ -46,7 +46,7 @@ void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg) writel(value, &bank->con); } -void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en) +void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en) { unsigned int value; @@ -59,12 +59,12 @@ void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en) writel(value, &bank->dat); } -void gpio_direction_input(struct s5pc1xx_gpio_bank *bank, int gpio) +void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio) { gpio_cfg_pin(bank, gpio, GPIO_INPUT); } -void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en) +void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en) { unsigned int value; @@ -75,7 +75,7 @@ void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en) writel(value, &bank->dat); } -unsigned int gpio_get_value(struct s5pc1xx_gpio_bank *bank, int gpio) +unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio) { unsigned int value; @@ -83,7 +83,7 @@ unsigned int gpio_get_value(struct s5pc1xx_gpio_bank *bank, int gpio) return !!(value & DAT_MASK(gpio)); } -void gpio_set_pull(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) +void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode) { unsigned int value; @@ -102,7 +102,7 @@ void gpio_set_pull(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) writel(value, &bank->pull); } -void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) +void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode) { unsigned int value; @@ -123,7 +123,7 @@ void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) writel(value, &bank->drv); } -void gpio_set_rate(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) +void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) { unsigned int value; From 1e65c2beb5805f975cd5d0ab7d853040a716d51b Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Thu, 4 Mar 2010 08:12:05 +0100 Subject: [PATCH 58/76] arm, mx27: add support for SDHC1 pin init Signed-off-by: Heiko Schocher --- arch/arm/cpu/arm926ejs/mx27/generic.c | 17 +++++++++++++++++ arch/arm/include/asm/arch-mx27/imx-regs.h | 1 + 2 files changed, 18 insertions(+) diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c index 30cf544712..ae2ce5841c 100644 --- a/arch/arm/cpu/arm926ejs/mx27/generic.c +++ b/arch/arm/cpu/arm926ejs/mx27/generic.c @@ -316,6 +316,23 @@ void mx27_fec_init_pins(void) #endif /* CONFIG_FEC_MXC */ #ifdef CONFIG_MXC_MMC +void mx27_sd1_init_pins(void) +{ + int i; + unsigned int mode[] = { + PE18_PF_SD1_D0, + PE19_PF_SD1_D1, + PE20_PF_SD1_D2, + PE21_PF_SD1_D3, + PE22_PF_SD1_CMD, + PE23_PF_SD1_CLK, + }; + + for (i = 0; i < ARRAY_SIZE(mode); i++) + imx_gpio_mode(mode[i]); + +} + void mx27_sd2_init_pins(void) { int i; diff --git a/arch/arm/include/asm/arch-mx27/imx-regs.h b/arch/arm/include/asm/arch-mx27/imx-regs.h index d36a6da96d..6ecddaae85 100644 --- a/arch/arm/include/asm/arch-mx27/imx-regs.h +++ b/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -37,6 +37,7 @@ extern void mx27_fec_init_pins(void); #endif /* CONFIG_FEC_MXC */ #ifdef CONFIG_MXC_MMC +extern void mx27_sd1_init_pins(void); extern void mx27_sd2_init_pins(void); #endif /* CONFIG_MXC_MMC */ From bbe310922f4d0b12c8aba97b45ed979db9c0ec9a Mon Sep 17 00:00:00 2001 From: Heiko Schocher Date: Fri, 5 Mar 2010 07:36:33 +0100 Subject: [PATCH 59/76] arm, i.mx27: add support for magnesium board from projectiondesign This patch adds support for the magnesium board from projectiondesign. This board uses i.MX27 SoC and has 8MB NOR flash, 128MB NAND flash, FEC ethernet controller integrated into i.MX27. As this port is based on the imx27lite port, common config options are collected in include/configs/imx27lite-common.h Signed-off-by: Heiko Schocher --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 1 + board/logicpd/imx27lite/imx27lite.c | 18 ++- include/configs/imx27lite-common.h | 237 ++++++++++++++++++++++++++++ include/configs/imx27lite.h | 200 +---------------------- include/configs/magnesium.h | 71 +++++++++ 7 files changed, 335 insertions(+), 197 deletions(-) create mode 100644 include/configs/imx27lite-common.h create mode 100644 include/configs/magnesium.h diff --git a/MAINTAINERS b/MAINTAINERS index a5d5835d62..4e6d73511d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -738,6 +738,10 @@ Jens Scharsig eb_cpux9k2 ARM920T (AT91RM9200 SoC) +Heiko Schocher + + magnesium i.MX27 + Robert Schwebel csb226 xscale diff --git a/MAKEALL b/MAKEALL index 34bc4a171b..e2bba1c576 100755 --- a/MAKEALL +++ b/MAKEALL @@ -569,6 +569,7 @@ LIST_ARM9=" \ edb9315a \ imx27lite \ lpd7a400 \ + magnesium \ mv88f6281gtw_ge \ mx1ads \ mx1fs2 \ diff --git a/Makefile b/Makefile index 25e3b8c51c..9213ec2a92 100644 --- a/Makefile +++ b/Makefile @@ -2940,6 +2940,7 @@ davinci_dm365evm_config : unconfig davinci_dm6467evm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci +magnesium_config \ imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27 diff --git a/board/logicpd/imx27lite/imx27lite.c b/board/logicpd/imx27lite/imx27lite.c index 63375d5da0..442741547b 100644 --- a/board/logicpd/imx27lite/imx27lite.c +++ b/board/logicpd/imx27lite/imx27lite.c @@ -29,6 +29,10 @@ DECLARE_GLOBAL_DATA_PTR; int board_init (void) { struct gpio_regs *regs = (struct gpio_regs *)IMX_GPIO_BASE; +#if defined(CONFIG_SYS_NAND_LARGEPAGE) + struct system_control_regs *sc_regs = + (struct system_control_regs *)IMX_SYSTEM_CTL_BASE; +#endif gd->bd->bi_arch_number = MACH_TYPE_IMX27LITE; gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; @@ -43,9 +47,20 @@ int board_init (void) ®s->port[PORTC].dr); #endif #ifdef CONFIG_MXC_MMC +#if defined(CONFIG_MAGNESIUM) + mx27_sd1_init_pins(); +#else mx27_sd2_init_pins(); #endif +#endif +#if defined(CONFIG_SYS_NAND_LARGEPAGE) + /* + * set in FMCR NF_FMS Bit(5) to 1 + * (NAND Flash with 2 Kbyte page size) + */ + writel(readl(&sc_regs->fmcr) | (1 << 5), &sc_regs->fmcr); +#endif return 0; } @@ -68,6 +83,7 @@ int dram_init (void) int checkboard(void) { - printf("LogicPD imx27lite\n"); + puts ("Board: "); + puts(CONFIG_BOARDNAME); return 0; } diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h new file mode 100644 index 0000000000..1da860261a --- /dev/null +++ b/include/configs/imx27lite-common.h @@ -0,0 +1,237 @@ +/* + * Copyright (C) 2010 Heiko Schocher + * + * based on: + * Copyright (C) 2009 Ilya Yanok + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __IMX27LITE_COMMON_CONFIG_H +#define __IMX27LITE_COMMON_CONFIG_H + +/* + * SoC Configuration + */ +#define CONFIG_ARM926EJS /* arm926ejs CPU core */ +#define CONFIG_MX27 +#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_DISPLAY_CPUINFO + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 + +/* + * Lowlevel configuration + */ +#define SDRAM_ESDCFG_REGISTER_VAL(cas) \ + (ESDCFG_TRC(10) | \ + ESDCFG_TRCD(3) | \ + ESDCFG_TCAS(cas) | \ + ESDCFG_TRRD(1) | \ + ESDCFG_TRAS(5) | \ + ESDCFG_TWR | \ + ESDCFG_TMRD(2) | \ + ESDCFG_TRP(2) | \ + ESDCFG_TXP(3)) + +#define SDRAM_ESDCTL_REGISTER_VAL \ + (ESDCTL_PRCT(0) | \ + ESDCTL_BL | \ + ESDCTL_PWDT(0) | \ + ESDCTL_SREFR(3) | \ + ESDCTL_DSIZ_32 | \ + ESDCTL_COL10 | \ + ESDCTL_ROW13 | \ + ESDCTL_SDE) + +#define SDRAM_ALL_VAL 0xf00 + +#define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */ +#define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000 + +#define MPCTL0_VAL 0x1ef15d5 + +#define SPCTL0_VAL 0x043a1c09 + +#define CSCR_VAL 0x33f08107 + +#define PCDR0_VAL 0x120470c3 +#define PCDR1_VAL 0x03030303 +#define PCCR0_VAL 0xffffffff +#define PCCR1_VAL 0xfffffffc + +#define AIPI1_PSR0_VAL 0x20040304 +#define AIPI1_PSR1_VAL 0xdffbfcfb +#define AIPI2_PSR0_VAL 0x07ffc200 +#define AIPI2_PSR1_VAL 0xffffffff + +/* + * Memory Info + */ +/* malloc() len */ +#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024) +/* reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 +/* memtest start address */ +#define CONFIG_SYS_MEMTEST_START 0xA0000000 +#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_STACKSIZE (256 * 1024) /* regular stack */ +#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */ +#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ + +/* + * Serial Driver info + */ +#define CONFIG_MXC_UART +#define CONFIG_SYS_MX27_UART1 +#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +/* + * Flash & Environment + */ +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +/* Use buffered writes (~10x faster) */ +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 +/* Use hardware sector protection */ +#define CONFIG_SYS_FLASH_PROTECTION 1 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ +/* CS2 Base address */ +#define PHYS_FLASH_1 0xc0000000 +/* Flash Base for U-Boot */ +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \ + CONFIG_SYS_FLASH_SECT_SZ) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */ +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +/* Address and size of Redundant Environment Sector */ +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE + +/* + * Ethernet + */ +#define CONFIG_FEC_MXC +#define CONFIG_FEC_MXC_PHYADDR 0x1f +#define CONFIG_MII +#define CONFIG_NET_MULTI + +/* + * MTD + */ +#define CONFIG_FLASH_CFI_MTD +#define CONFIG_MTD_DEVICE + +/* + * NAND + */ +#define CONFIG_NAND_MXC +#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0xd8000000 +#define CONFIG_JFFS2_NAND +#define CONFIG_MXC_NAND_HWECC +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + +/* + * SD/MMC + */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_MXC_MMC +#define CONFIG_DOS_PARTITION + +/* + * MTD partitions + */ +#define CONFIG_CMD_MTDPARTS + +/* + * U-Boot general configuration + */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +/* Print buffer sz */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +/* Boot Argument Buffer Size */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP + +/* + * U-Boot commands + */ +#include +#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING + +#define CONFIG_BOOTDELAY 5 + +#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */ +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define xstr(s) str(s) +#define str(s) #s + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "netdev=eth0\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath}\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off panic=1\0" \ + "addtty=setenv bootargs ${bootargs}" \ + " console=ttymxc0,${baudrate}\0" \ + "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ + "addmisc=setenv bootargs ${bootargs}\0" \ + "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \ + "kernel_addr_r=a0800000\0" \ + "bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \ + "rootpath=/opt/eldk-4.2-arm/arm\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ + "run nfsargs addip addtty addmtd addmisc;" \ + "bootm\0" \ + "bootcmd=run net_nfs\0" \ + "load=tftp ${loadaddr} ${u-boot}\0" \ + "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \ + " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \ + " +${filesize};cp.b ${fileaddr} " \ + xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \ + "upd=run load update\0" \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + +#endif /* __IMX27LITE_COMMON_CONFIG_H */ diff --git a/include/configs/imx27lite.h b/include/configs/imx27lite.h index ee749ecd2f..72f6e80ede 100644 --- a/include/configs/imx27lite.h +++ b/include/configs/imx27lite.h @@ -20,158 +20,31 @@ #ifndef __CONFIG_H #define __CONFIG_H +/* include common defines/options for all imx27lite related boards */ +#include "imx27lite-common.h" /* * SoC Configuration */ -#define CONFIG_ARM926EJS /* arm926ejs CPU core */ -#define CONFIG_MX27 #define CONFIG_IMX27LITE -#define CONFIG_MX27_CLK32 32768 /* OSC32K frequency */ -#define CONFIG_SYS_HZ 1000 - -#define CONFIG_DISPLAY_CPUINFO - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -/* - * Lowlevel configuration - */ -#define SDRAM_ESDCFG_REGISTER_VAL(cas) \ - (ESDCFG_TRC(10) | \ - ESDCFG_TRCD(3) | \ - ESDCFG_TCAS(cas) | \ - ESDCFG_TRRD(1) | \ - ESDCFG_TRAS(5) | \ - ESDCFG_TWR | \ - ESDCFG_TMRD(2) | \ - ESDCFG_TRP(2) | \ - ESDCFG_TXP(3)) - -#define SDRAM_ESDCTL_REGISTER_VAL \ - (ESDCTL_PRCT(0) | \ - ESDCTL_BL | \ - ESDCTL_PWDT(0) | \ - ESDCTL_SREFR(3) | \ - ESDCTL_DSIZ_32 | \ - ESDCTL_COL10 | \ - ESDCTL_ROW13 | \ - ESDCTL_SDE) - -#define SDRAM_ALL_VAL 0xf00 - -#define SDRAM_MODE_REGISTER_VAL 0x33 /* BL: 8, CAS: 3 */ -#define SDRAM_EXT_MODE_REGISTER_VAL 0x1000000 - -#define MPCTL0_VAL 0x1ef15d5 - -#define SPCTL0_VAL 0x043a1c09 - -#define CSCR_VAL 0x33f08107 - -#define PCDR0_VAL 0x120470c3 -#define PCDR1_VAL 0x03030303 -#define PCCR0_VAL 0xffffffff -#define PCCR1_VAL 0xfffffffc - -#define AIPI1_PSR0_VAL 0x20040304 -#define AIPI1_PSR1_VAL 0xdffbfcfb -#define AIPI2_PSR0_VAL 0x07ffc200 -#define AIPI2_PSR1_VAL 0xffffffff - -/* - * Memory Info - */ -/* malloc() len */ -#define CONFIG_SYS_MALLOC_LEN (0x10000 + 512 * 1024) -/* reserved for initial data */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 -/* memtest start address */ -#define CONFIG_SYS_MEMTEST_START 0xA0000000 -#define CONFIG_SYS_MEMTEST_END 0xA1000000 /* 16MB RAM test */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define CONFIG_STACKSIZE (256 * 1024) /* regular stack */ -#define PHYS_SDRAM_1 0xA0000000 /* DDR Start */ -#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */ - -/* - * Serial Driver info - */ -#define CONFIG_MXC_UART -#define CONFIG_SYS_MX27_UART1 -#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ -#define CONFIG_BAUDRATE 115200 /* Default baud rate */ -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_HOSTNAME imx27 +#define CONFIG_BOARDNAME "LogicPD imx27lite\n" /* * Flash & Environment */ -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_FLASH_CFI -/* Use buffered writes (~10x faster) */ -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 -/* Use hardware sector protection */ -#define CONFIG_SYS_FLASH_PROTECTION 1 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ #define CONFIG_SYS_FLASH_SECT_SZ 0x2000 /* 8KB sect size Intel Flash */ -/* end of flash */ #define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - 0x20000) -/* CS2 Base address */ -#define PHYS_FLASH_1 0xc0000000 -/* Flash Base for U-Boot */ -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -/* Flash size 2MB */ #define PHYS_FLASH_SIZE 0x200000 -#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \ - CONFIG_SYS_FLASH_SECT_SZ) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */ #define CONFIG_ENV_SECT_SIZE 0x10000 /* Env sector Size */ -#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -/* Address and size of Redundant Environment Sector */ -#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) -#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE - -/* - * Ethernet - */ -#define CONFIG_FEC_MXC -#define CONFIG_FEC_MXC_PHYADDR 0x1f -#define CONFIG_MII -#define CONFIG_NET_MULTI - -/* - * MTD - */ -#define CONFIG_FLASH_CFI_MTD -#define CONFIG_MTD_DEVICE - -/* - * NAND - */ -#define CONFIG_NAND_MXC -#define CONFIG_MXC_NAND_REGS_BASE 0xd8000000 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0xd8000000 -#define CONFIG_JFFS2_NAND -#define CONFIG_MXC_NAND_HWECC -#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ /* * SD/MMC */ -#define CONFIG_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_MXC_MMC #define CONFIG_MXC_MCI_REGS_BASE 0x10014000 -#define CONFIG_DOS_PARTITION /* * MTD partitions */ -#define CONFIG_CMD_MTDPARTS #define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=mxc_nand.0" #define MTDPARTS_DEFAULT \ "mtdparts=" \ @@ -186,69 +59,4 @@ "22m(rootfs)," \ "-(userfs)" -/* - * U-Boot general configuration - */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -/* Print buffer sz */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ - sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP - -/* - * U-Boot commands - */ -#include -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_FAT -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MII -#define CONFIG_CMD_MMC -#define CONFIG_CMD_NAND -#define CONFIG_CMD_PING - -#define CONFIG_BOOTDELAY 5 - -#define CONFIG_LOADADDR 0xa0800000 /* loadaddr env var */ -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -#define xstr(s) str(s) -#define str(s) #s - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=${serverip}:${rootpath}\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs ${bootargs} " \ - "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ - ":${hostname}:${netdev}:off panic=1\0" \ - "addtty=setenv bootargs ${bootargs}" \ - " console=ttymxc0,${baudrate}\0" \ - "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ - "addmisc=setenv bootargs ${bootargs}\0" \ - "u-boot=imx27/u-boot.bin\0" \ - "kernel_addr_r=a0800000\0" \ - "hostname=imx27\0" \ - "bootfile=imx27/uImage\0" \ - "rootpath=/opt/eldk-4.2-arm/arm\0" \ - "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ - "run nfsargs addip addtty addmtd addmisc;" \ - "bootm\0" \ - "bootcmd=run net_nfs\0" \ - "load=tftp ${loadaddr} ${u-boot}\0" \ - "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize};era " xstr(CONFIG_SYS_MONITOR_BASE) \ - " +${filesize};cp.b ${fileaddr} " \ - xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0" \ - "upd=run load update\0" \ - #endif /* __CONFIG_H */ diff --git a/include/configs/magnesium.h b/include/configs/magnesium.h new file mode 100644 index 0000000000..4fb7744bae --- /dev/null +++ b/include/configs/magnesium.h @@ -0,0 +1,71 @@ +/* + * Copyright (C) 2010 Heiko Schocher + * + * based on: + * Copyright (C) 2009 Ilya Yanok + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* include common defines/options for all imx27lite related boards */ +#include "imx27lite-common.h" + +/* + * SoC Configuration + */ +#define CONFIG_MAGNESIUM +#define CONFIG_HOSTNAME magnesium +#define CONFIG_BOARDNAME "Projectiondesign magnesium\n" + +/* + * Flash & Environment + */ +#define CONFIG_SYS_FLASH_SECT_SZ 0x8000 /* 64KB sect size */ +#define CONFIG_ENV_OFFSET (PHYS_FLASH_SIZE - 0x40000) +#define PHYS_FLASH_SIZE 0x800000 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* Env sector Size */ + +/* + * NAND + */ +#define CONFIG_SYS_NAND_LARGEPAGE + +/* + * SD/MMC + */ +#define CONFIG_MXC_MCI_REGS_BASE 0x10013000 + +/* + * MTD partitions + */ +#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=mxc_nand.0" +#define MTDPARTS_DEFAULT \ + "mtdparts=" \ + "physmap-flash.0:" \ + "256k(U-Boot)," \ + "7680k(user)," \ + "128k(env1)," \ + "128k(env2);" \ + "mxc_nand.0:" \ + "128k(IPL-SPL)," \ + "4m(kernel)," \ + "22m(rootfs)," \ + "-(userfs)" + +#endif /* __CONFIG_H */ From 272017853339f5b9685f9488bdaf5405812d12a4 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 31 Mar 2010 06:32:56 -0700 Subject: [PATCH 60/76] MX51EVK: Remove CPLD related code There is no CPLD on MX51EVK board, so remove CPLD related function. Signed-off-by: Fabio Estevam --- board/freescale/mx51evk/mx51evk.c | 67 ------------------------------- board/freescale/mx51evk/mx51evk.h | 1 - 2 files changed, 68 deletions(-) diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index 8754563802..f0b7abcf52 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -72,72 +72,6 @@ static void setup_iomux_uart(void) mxc_iomux_set_pad(MX51_PIN_UART1_CTS, pad); } -static void setup_expio(void) -{ - u32 reg; - struct weim *pweim = (struct weim *)WEIM_BASE_ADDR; - struct clkctl *pclkctl = (struct clkctl *)CCM_BASE_ADDR; - - /* CS5 setup */ - mxc_request_iomux(MX51_PIN_EIM_CS5, IOMUX_CONFIG_ALT0); - writel(0x00410089, &pweim[5].csgcr1); - writel(0x00000002, &pweim[5].csgcr2); - - /* RWSC=50, RADVA=2, RADVN=6, OEA=0, OEN=0, RCSA=0, RCSN=0 */ - writel(0x32260000, &pweim[5].csrcr1); - - /* APR = 0 */ - writel(0x00000000, &pweim[5].csrcr2); - - /* - * WAL=0, WBED=1, WWSC=50, WADVA=2, WADVN=6, WEA=0, WEN=0, - * WCSA=0, WCSN=0 - */ - writel(0x72080F00, &pweim[5].cswcr1); - - mx51_io_board = (struct io_board_ctrl *)(CS5_BASE_ADDR + - IO_BOARD_OFFSET); - if ((readw(&mx51_io_board->id1) == 0xAAAA) && - (readw(&mx51_io_board->id2) == 0x5555)) { - if (is_soc_rev(CHIP_REV_2_0) < 0) { - reg = readl(&pclkctl->cbcdr); - reg = (reg & (~0x70000)) | 0x30000; - writel(reg, &pclkctl->cbcdr); - /* make sure divider effective */ - while (readl(&pclkctl->cdhipr) != 0) - ; - writel(0x0, &pclkctl->ccdr); - } - } else { - /* CS1 */ - writel(0x00410089, &pweim[1].csgcr1); - writel(0x00000002, &pweim[1].csgcr2); - /* RWSC=50, RADVA=2, RADVN=6, OEA=0, OEN=0, RCSA=0, RCSN=0 */ - writel(0x32260000, &pweim[1].csrcr1); - /* APR=0 */ - writel(0x00000000, &pweim[1].csrcr2); - /* - * WAL=0, WBED=1, WWSC=50, WADVA=2, WADVN=6, WEA=0, - * WEN=0, WCSA=0, WCSN=0 - */ - writel(0x72080F00, &pweim[1].cswcr1); - mx51_io_board = (struct io_board_ctrl *)(CS1_BASE_ADDR + - IO_BOARD_OFFSET); - } - - /* Reset interrupt status reg */ - writew(0x1F, &(mx51_io_board->int_rest)); - writew(0x00, &(mx51_io_board->int_rest)); - writew(0xFFFF, &(mx51_io_board->int_mask)); - - /* Reset the XUART and Ethernet controllers */ - reg = readw(&(mx51_io_board->sw_reset)); - reg |= 0x9; - writew(reg, &(mx51_io_board->sw_reset)); - reg &= ~0x9; - writew(reg, &(mx51_io_board->sw_reset)); -} - static void setup_iomux_fec(void) { /*FEC_MDIO*/ @@ -349,7 +283,6 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; setup_iomux_uart(); - setup_expio(); setup_iomux_fec(); return 0; } diff --git a/board/freescale/mx51evk/mx51evk.h b/board/freescale/mx51evk/mx51evk.h index 524cdcced4..2854e71e8d 100644 --- a/board/freescale/mx51evk/mx51evk.h +++ b/board/freescale/mx51evk/mx51evk.h @@ -47,5 +47,4 @@ struct io_board_ctrl { }; #endif -#define IO_BOARD_OFFSET (0x20000) #endif From 5e1fe88fe3df2555a8a0cba7d2ffaf2b03041dfb Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Sun, 28 Mar 2010 13:43:26 +0200 Subject: [PATCH 61/76] Moved board specific values in config file The lowlevel_init file contained some hard-coded values to setup the RAM. These board related values are moved into the board configuration file. Signed-off-by: Stefano Babic --- arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S | 5 ++++- include/configs/mx51evk.h | 3 +++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S b/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S index 31af9e2b58..783c81f72a 100644 --- a/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S +++ b/arch/arm/cpu/arm_cortexa8/mx51/lowlevel_init.S @@ -158,6 +158,7 @@ /* Switch peripheral to PLL 3 */ ldr r0, =CCM_BASE_ADDR ldr r1, =0x000010C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] ldr r1, =0x13239145 str r1, [r0, #CLKCTL_CBCDR] @@ -171,6 +172,7 @@ ldr r1, =0x19239145 str r1, [r0, #CLKCTL_CBCDR] ldr r1, =0x000020C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] mov r3, #DP_OP_216 @@ -201,9 +203,10 @@ /* setup the rest */ /* Use lp_apm (24MHz) source for perclk */ ldr r1, =0x000020C2 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] /* ddr clock from PLL 1, all perclk dividers are 1 since using 24MHz */ - ldr r1, =0x59E35100 + ldr r1, =CONFIG_SYS_CLKTL_CBCDR str r1, [r0, #CLKCTL_CBCDR] /* Restore the default values in the Gate registers */ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 903fe6da7e..3626df73df 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -160,6 +160,9 @@ #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) +#define CONFIG_SYS_DDR_CLKSEL 0 +#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 + /*----------------------------------------------------------------------- * FLASH and environment organization */ From 16b76705d36ac137fa9231cedfe1355561639e47 Mon Sep 17 00:00:00 2001 From: Siddarth Gore <[gores@marvell.com]> Date: Thu, 18 Mar 2010 20:25:40 +0530 Subject: [PATCH 62/76] Marvell GuruPlug Board Support GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0 GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot References: http://www.globalscaletechnologies.com/t-guruplugdetails.aspx http://plugcomputer.org This patch is for GuruPlug Plus, but it supports Standard version as well. Signed-off-by: Siddarth Gore --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 3 + board/Marvell/guruplug/Makefile | 51 +++++++ board/Marvell/guruplug/config.mk | 27 ++++ board/Marvell/guruplug/guruplug.c | 167 +++++++++++++++++++++++ board/Marvell/guruplug/guruplug.h | 39 ++++++ board/Marvell/guruplug/kwbimage.cfg | 162 +++++++++++++++++++++++ include/configs/guruplug.h | 198 ++++++++++++++++++++++++++++ 9 files changed, 652 insertions(+) create mode 100644 board/Marvell/guruplug/Makefile create mode 100644 board/Marvell/guruplug/config.mk create mode 100644 board/Marvell/guruplug/guruplug.c create mode 100644 board/Marvell/guruplug/guruplug.h create mode 100644 board/Marvell/guruplug/kwbimage.cfg create mode 100644 include/configs/guruplug.h diff --git a/MAINTAINERS b/MAINTAINERS index 4e6d73511d..7f688c36e0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -194,6 +194,10 @@ Niklaus Giger MCU25 PPC405GPr HCU5 PPC440EPx +Siddarth Gore + + guruplug ARM926EJS (Kirkwood SoC) + Frank Gottschling MHPC MPC8xx diff --git a/MAKEALL b/MAKEALL index e2bba1c576..326bde0486 100755 --- a/MAKEALL +++ b/MAKEALL @@ -567,6 +567,7 @@ LIST_ARM9=" \ edb9312 \ edb9315 \ edb9315a \ + guruplug \ imx27lite \ lpd7a400 \ magnesium \ diff --git a/Makefile b/Makefile index 9213ec2a92..e49def36fa 100644 --- a/Makefile +++ b/Makefile @@ -2940,6 +2940,9 @@ davinci_dm365evm_config : unconfig davinci_dm6467evm_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci +guruplug_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood + magnesium_config \ imx27lite_config: unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27 diff --git a/board/Marvell/guruplug/Makefile b/board/Marvell/guruplug/Makefile new file mode 100644 index 0000000000..99748a7ea5 --- /dev/null +++ b/board/Marvell/guruplug/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor +# Written-by: Siddarth Gore +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := guruplug.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/Marvell/guruplug/config.mk b/board/Marvell/guruplug/config.mk new file mode 100644 index 0000000000..caa26b6cfb --- /dev/null +++ b/board/Marvell/guruplug/config.mk @@ -0,0 +1,27 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor +# Written-by: Siddarth Gore +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +TEXT_BASE = 0x00600000 + +KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c new file mode 100644 index 0000000000..ba47ca179f --- /dev/null +++ b/board/Marvell/guruplug/guruplug.c @@ -0,0 +1,167 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor + * Written-by: Siddarth Gore + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include "guruplug.h" + +DECLARE_GLOBAL_DATA_PTR; + +int board_init(void) +{ + /* + * default gpio configuration + * There are maximum 64 gpios controlled through 2 sets of registers + * the below configuration configures mainly initial LED status + */ + kw_config_gpio(GURUPLUG_OE_VAL_LOW, + GURUPLUG_OE_VAL_HIGH, + GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH); + + /* Multi-Purpose Pins Functionality configuration */ + u32 kwmpp_config[] = { + MPP0_NF_IO2, + MPP1_NF_IO3, + MPP2_NF_IO4, + MPP3_NF_IO5, + MPP4_NF_IO6, + MPP5_NF_IO7, + MPP6_SYSRST_OUTn, + MPP7_GPO, /* GPIO_RST */ + MPP8_TW_SDA, + MPP9_TW_SCK, + MPP10_UART0_TXD, + MPP11_UART0_RXD, + MPP12_SD_CLK, + MPP13_SD_CMD, + MPP14_SD_D0, + MPP15_SD_D1, + MPP16_SD_D2, + MPP17_SD_D3, + MPP18_NF_IO0, + MPP19_NF_IO1, + MPP20_GE1_0, + MPP21_GE1_1, + MPP22_GE1_2, + MPP23_GE1_3, + MPP24_GE1_4, + MPP25_GE1_5, + MPP26_GE1_6, + MPP27_GE1_7, + MPP28_GE1_8, + MPP29_GE1_9, + MPP30_GE1_10, + MPP31_GE1_11, + MPP32_GE1_12, + MPP33_GE1_13, + MPP34_GE1_14, + MPP35_GE1_15, + MPP36_GPIO, + MPP37_GPIO, + MPP38_GPIO, + MPP39_GPIO, + MPP40_TDM_SPI_SCK, + MPP41_TDM_SPI_MISO, + MPP42_TDM_SPI_MOSI, + MPP43_GPIO, + MPP44_GPIO, + MPP45_GPIO, + MPP46_GPIO, /* M_RLED */ + MPP47_GPIO, /* M_GLED */ + MPP48_GPIO, /* B_RLED */ + MPP49_GPIO, /* B_GLED */ + 0 + }; + kirkwood_mpp_conf(kwmpp_config); + + /* + * arch number of board + */ + gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG; + + /* adress of boot parameters */ + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100; + + return 0; +} + +int dram_init(void) +{ + int i; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + gd->bd->bi_dram[i].start = kw_sdram_bar(i); + gd->bd->bi_dram[i].size = kw_sdram_bs(i); + } + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void mv_phy_88e1121_init(char *name) +{ + u16 reg; + u16 devadr; + + if (miiphy_set_current_dev(name)) + return; + + /* command to read PHY dev address */ + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { + printf("Err..%s could not read PHY dev address\n", + __FUNCTION__); + return; + } + + /* + * Enable RGMII delay on Tx and Rx for CPU port + * Ref: sec 4.7.2 of chip datasheet + */ + miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2); + miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, ®); + reg |= (MV88E1121_RGMII_RXTM_CTRL | MV88E1121_RGMII_TXTM_CTRL); + miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg); + miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0); + + /* reset the phy */ + if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) { + printf("Err..(%s) PHY status read failed\n", __FUNCTION__); + return; + } + if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) { + printf("Err..(%s) PHY reset failed\n", __FUNCTION__); + return; + } + + printf("88E1121 Initialized on %s\n", name); +} + +void reset_phy(void) +{ + /* configure and initialize both PHY's */ + mv_phy_88e1121_init("egiga0"); + mv_phy_88e1121_init("egiga1"); +} +#endif /* CONFIG_RESET_PHY_R */ diff --git a/board/Marvell/guruplug/guruplug.h b/board/Marvell/guruplug/guruplug.h new file mode 100644 index 0000000000..5bc16b4c8f --- /dev/null +++ b/board/Marvell/guruplug/guruplug.h @@ -0,0 +1,39 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor + * Written-by: Siddarth Gore + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef __GURUPLUG_H +#define __GURUPLUG_H + +#define GURUPLUG_OE_LOW (~(0)) +#define GURUPLUG_OE_HIGH (~(0)) +#define GURUPLUG_OE_VAL_LOW 0 +#define GURUPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */ + +/* PHY related */ +#define MV88E1121_MAC_CTRL2_REG 21 +#define MV88E1121_PGADR_REG 22 +#define MV88E1121_RGMII_TXTM_CTRL (1 << 4) +#define MV88E1121_RGMII_RXTM_CTRL (1 << 5) + +#endif /* __GURUPLUG_H */ diff --git a/board/Marvell/guruplug/kwbimage.cfg b/board/Marvell/guruplug/kwbimage.cfg new file mode 100644 index 0000000000..2afd927463 --- /dev/null +++ b/board/Marvell/guruplug/kwbimage.cfg @@ -0,0 +1,162 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor +# Written-by: Siddarth Gore +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# +# Refer docs/README.kwimage for more details about how-to configure +# and create kirkwood boot image +# + +# Boot Media configurations +BOOT_FROM nand +NAND_ECC_MODE default +NAND_PAGE_SIZE 0x0800 + +# SOC registers configuration using bootrom header extension +# Maximum KWBIMAGE_MAX_CONFIG configurations allowed + +# Configure RGMII-0/1 interface pad voltage to 1.8V +DATA 0xFFD100e0 0x1b1b9b9b + +#Dram initalization for SINGLE x16 CL=5 @ 400MHz +DATA 0xFFD01400 0x43000c30 # DDR Configuration register +# bit13-0: 0xc30 (3120 DDR2 clks refresh rate) +# bit23-14: zero +# bit24: 1= enable exit self refresh mode on DDR access +# bit25: 1 required +# bit29-26: zero +# bit31-30: 01 + +DATA 0xFFD01404 0x37543000 # DDR Controller Control Low +# bit 4: 0=addr/cmd in smame cycle +# bit 5: 0=clk is driven during self refresh, we don't care for APX +# bit 6: 0=use recommended falling edge of clk for addr/cmd +# bit14: 0=input buffer always powered up +# bit18: 1=cpu lock transaction enabled +# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0 +# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM +# bit30-28: 3 required +# bit31: 0=no additional STARTBURST delay + +DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1) +# bit3-0: TRAS lsbs +# bit7-4: TRCD +# bit11- 8: TRP +# bit15-12: TWR +# bit19-16: TWTR +# bit20: TRAS msb +# bit23-21: 0x0 +# bit27-24: TRRD +# bit31-28: TRTP + +DATA 0xFFD0140C 0x00000a33 # DDR Timing (High) +# bit6-0: TRFC +# bit8-7: TR2R +# bit10-9: TR2W +# bit12-11: TW2W +# bit31-13: zero required + +DATA 0xFFD01410 0x000000cc # DDR Address Control +# bit1-0: 01, Cs0width=x8 +# bit3-2: 10, Cs0size=1Gb +# bit5-4: 01, Cs1width=x8 +# bit7-6: 10, Cs1size=1Gb +# bit9-8: 00, Cs2width=nonexistent +# bit11-10: 00, Cs2size =nonexistent +# bit13-12: 00, Cs3width=nonexistent +# bit15-14: 00, Cs3size =nonexistent +# bit16: 0, Cs0AddrSel +# bit17: 0, Cs1AddrSel +# bit18: 0, Cs2AddrSel +# bit19: 0, Cs3AddrSel +# bit31-20: 0 required + +DATA 0xFFD01414 0x00000000 # DDR Open Pages Control +# bit0: 0, OpenPage enabled +# bit31-1: 0 required + +DATA 0xFFD01418 0x00000000 # DDR Operation +# bit3-0: 0x0, DDR cmd +# bit31-4: 0 required + +DATA 0xFFD0141C 0x00000C52 # DDR Mode +# bit2-0: 2, BurstLen=2 required +# bit3: 0, BurstType=0 required +# bit6-4: 4, CL=5 +# bit7: 0, TestMode=0 normal +# bit8: 0, DLL reset=0 normal +# bit11-9: 6, auto-precharge write recovery ???????????? +# bit12: 0, PD must be zero +# bit31-13: 0 required + +DATA 0xFFD01420 0x00000040 # DDR Extended Mode +# bit0: 0, DDR DLL enabled +# bit1: 0, DDR drive strenght normal +# bit2: 0, DDR ODT control lsd (disabled) +# bit5-3: 000, required +# bit6: 1, DDR ODT control msb, (disabled) +# bit9-7: 000, required +# bit10: 0, differential DQS enabled +# bit11: 0, required +# bit12: 0, DDR output buffer enabled +# bit31-13: 0 required + +DATA 0xFFD01424 0x0000F17F # DDR Controller Control High +# bit2-0: 111, required +# bit3 : 1 , MBUS Burst Chop disabled +# bit6-4: 111, required +# bit7 : 0 +# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz +# bit9 : 0 , no half clock cycle addition to dataout +# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals +# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh +# bit15-12: 1111 required +# bit31-16: 0 required + +DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values) +DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values) + +DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0 +DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size +# bit0: 1, Window enabled +# bit1: 0, Write Protect disabled +# bit3-2: 00, CS0 hit selected +# bit23-4: ones, required +# bit31-24: 0x0F, Size (i.e. 256MB) + +DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb +DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1 + +DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled +DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled + +DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low) +DATA 0xFFD01498 0x00000000 # DDR ODT Control (High) +# bit1-0: 00, ODT0 controlled by ODT Control (low) register above +# bit3-2: 01, ODT1 active NEVER! +# bit31-4: zero, required + +DATA 0xFFD0149C 0x0000E803 # CPU ODT Control +DATA 0xFFD01480 0x00000001 # DDR Initialization Control +#bit0=1, enable DDR init upon this register write + +# End of Header extension +DATA 0x0 0x0 diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h new file mode 100644 index 0000000000..2fbc6ad7f8 --- /dev/null +++ b/include/configs/guruplug.h @@ -0,0 +1,198 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor + * Written-by: Siddarth Gore + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_GURUPLUG_H +#define _CONFIG_GURUPLUG_H + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING "\nMarvell-GuruPlug" + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_MARVELL 1 +#define CONFIG_ARM926EJS 1 /* Basic Architecture */ +#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ +#define CONFIG_KIRKWOOD 1 /* SOC Family Name */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_MACH_GURUPLUG /* Machine type */ + +#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ + +/* + * CLKs configurations + */ +#define CONFIG_SYS_HZ 1000 + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE + +/* + * Serial Port configuration + * The following definitions let you select what serial you want to use + * for your console driver. + */ + +#define CONFIG_CONS_INDEX 1 /*Console on UART0 */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ + 115200,230400, 460800, 921600 } +/* auto boot */ +#define CONFIG_BOOTDELAY 3 /* default enable autoboot */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */ +#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */ + +#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ + +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ +/* + * Commands configuration + */ +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ +#include +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_ENV +#define CONFIG_CMD_FAT +#define CONFIG_CMD_NAND +#define CONFIG_CMD_PING +#define CONFIG_CMD_USB + +/* + * NAND configuration + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_KIRKWOOD +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */ +#define NAND_ALLOW_ERASE_ALL 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ +#endif + +/* + * Environment variables configurations + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_ENV_IS_IN_NAND 1 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#endif +/* + * max 4k env size is enough, but in case of nand + * it has to be rounded to sector size + */ +#define CONFIG_ENV_SIZE 0x20000 /* 128k */ +#define CONFIG_ENV_ADDR 0x40000 +#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */ + +/* + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \ + "${x_bootcmd_ethernet}; setenv ethact egiga1; " \ + "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\ + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \ + "bootm 0x6400000;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "x_bootcmd_ethernet=ping 192.168.2.1\0" \ + "x_bootcmd_usb=usb start\0" \ + "x_bootcmd_kernel=nand read.e 0x6400000 0x100000 0x400000\0" \ + "x_bootargs=console=ttyS0,115200\0" \ + "x_bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0" + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Other required configurations + */ +#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ +#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ +#define CONFIG_NR_DRAM_BANKS 4 +#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ +#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ +#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */ +#define CONFIG_SYS_MEMTEST_END 0x1fffffff /*(_512M -1) */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ + +/* + * Ethernet Driver configuration + */ +#ifdef CONFIG_CMD_NET +#define CONFIG_NETCONSOLE /* include NetConsole support */ +#define CONFIG_NET_MULTI /* specify more that one ports available */ +#define CONFIG_MII /* expose smi ove miiphy interface */ +#define CONFIG_CMD_MII +#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */ +#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ +#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,1} /* enable both ports */ +#define CONFIG_PHY_BASE_ADR 0 +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ +#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv88e1121 PHY */ +#endif /* CONFIG_CMD_NET */ + +/* + * USB/EHCI + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI /* Enable EHCI USB support */ +#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */ +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION +#define CONFIG_ISO_PARTITION +#define CONFIG_SUPPORT_VFAT +#endif /* CONFIG_CMD_USB */ + +#define CONFIG_SYS_ALT_MEMTEST + +#endif /* _CONFIG_GURUPLUG_H */ From 5414fec85ff558af8823d4391f03977288871fe4 Mon Sep 17 00:00:00 2001 From: Frans Meulenbroeks <[fransmeulenbroeks@gmail.com]> Date: Tue, 6 Apr 2010 18:26:19 +0530 Subject: [PATCH 63/76] configs/sheevaplug: added a few additional commands This patch includes a few additional commands in the sheevaplug version of u-boot: - support for LONGHELP so you can get help messages - auto completion and command editing - ubi and mii support - ext2 filesystem (convenient if you have an ext2 from which you want to boot) - jffs2 and ubifs filesystems (if you want to use these in NAND) This also makes it more similar to openrd client. Side effect of this patch is that the code now needs 3 sectors i.s.o. 2 so an existing env is overwritten Signed-off-by: Frans Meulenbroeks --- include/configs/sheevaplug.h | 27 ++++++++++++++++++++++----- 1 file changed, 22 insertions(+), 5 deletions(-) diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index fc401a8f88..e9edc44950 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -85,6 +85,7 @@ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */ + /* * Commands configuration */ @@ -93,7 +94,7 @@ #define CONFIG_CMD_AUTOSCRIPT #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV -#define CONFIG_CMD_FAT +#define CONFIG_CMD_MII #define CONFIG_CMD_NAND #define CONFIG_CMD_PING #define CONFIG_CMD_USB @@ -123,8 +124,8 @@ * it has to be rounded to sector size */ #define CONFIG_ENV_SIZE 0x20000 /* 128k */ -#define CONFIG_ENV_ADDR 0x40000 -#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */ +#define CONFIG_ENV_ADDR 0x60000 +#define CONFIG_ENV_OFFSET 0x60000 /* env starts here */ /* * Default environment variables @@ -145,14 +146,16 @@ /* * Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* 1 MiB for malloc() */ /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 /* * Other required minimal configurations */ -#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ @@ -192,4 +195,18 @@ #define CONFIG_SUPPORT_VFAT #endif /* CONFIG_CMD_USB */ +/* + * File system + */ +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_LZO + #endif /* _CONFIG_SHEEVAPLUG_H */ From 1c9d91aca649f17762bae2c0e38f5101d62ed0b5 Mon Sep 17 00:00:00 2001 From: Frans Meulenbroeks <[fransmeulenbroeks@gmail.com]> Date: Tue, 6 Apr 2010 19:06:11 +0530 Subject: [PATCH 64/76] configs/openrd_base.h: reordered macros moved CONFIG_CMD_FAT to filesystem section swapped CONFIG_CMD_NAND and CONFIG_CMD_MII so they are alpha correct Signed-off-by: Frans Meulenbroeks --- include/configs/openrd_base.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/configs/openrd_base.h b/include/configs/openrd_base.h index 88f27baafd..d2f45028ae 100644 --- a/include/configs/openrd_base.h +++ b/include/configs/openrd_base.h @@ -99,9 +99,8 @@ #define CONFIG_CMD_AUTOSCRIPT #define CONFIG_CMD_DHCP #define CONFIG_CMD_ENV -#define CONFIG_CMD_FAT -#define CONFIG_CMD_NAND #define CONFIG_CMD_MII +#define CONFIG_CMD_NAND #define CONFIG_CMD_PING #define CONFIG_CMD_USB @@ -208,6 +207,7 @@ /* * File system */ +#define CONFIG_CMD_FAT #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS #define CONFIG_RBTREE From 34196b0a8bd7ab6d472e2e6f6c90b73e915a1fae Mon Sep 17 00:00:00 2001 From: John Rigby Date: Wed, 7 Apr 2010 23:30:09 -0600 Subject: [PATCH 65/76] MX25 print arm clock instead of mpllclk on boot Replace call to imx_get_mpllclk with imx_get_armclk to show frequency of ARM core instead of mpll internal bus in print_cpuinfo. Signed-off-by: John Rigby CC: Stefano Babic --- arch/arm/cpu/arm926ejs/mx25/generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 694841dd10..b80a389ed9 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -111,7 +111,7 @@ int print_cpuinfo (void) char buf[32]; printf ("CPU: Freescale i.MX25 at %s MHz\n\n", - strmhz (buf, imx_get_mpllclk ())); + strmhz (buf, imx_get_armclk ())); return 0; } #endif From f581e3a2157fbd736e7dd2378465ae242fba545c Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Tue, 13 Apr 2010 12:38:22 +0200 Subject: [PATCH 66/76] mkimage: correct spelling error in imximage Signed-off-by: Stefano Babic --- tools/imximage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/imximage.c b/tools/imximage.c index df2d8c4d7b..39f89c2b93 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -36,7 +36,7 @@ * Supported commands for configuration file */ static table_entry_t imximage_cmds[] = { - {CMD_BOOT_FROM, "BOOT_FROM", "boot comand", }, + {CMD_BOOT_FROM, "BOOT_FROM", "boot command", }, {CMD_DATA, "DATA", "Reg Write Data", }, {-1, "", "", }, }; From dfe83352cb58c55dfdbd5b535cb335526cb1c581 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Tue, 13 Apr 2010 12:38:43 +0200 Subject: [PATCH 67/76] mx51evk: correct list of possible BOOT_FROM values Signed-off-by: Stefano Babic --- board/freescale/mx51evk/imximage.cfg | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/mx51evk/imximage.cfg b/board/freescale/mx51evk/imximage.cfg index db09913f49..a875e8ff55 100644 --- a/board/freescale/mx51evk/imximage.cfg +++ b/board/freescale/mx51evk/imximage.cfg @@ -26,7 +26,7 @@ # The syntax is taken as close as possible with the kwbimage # Boot Device : one of -# spi_flash, nand, onenand, sd_card +# spi, sd (the board has no nand neither onenand) BOOT_FROM spi From 7d27cd08b4c1adfd58c54aaa8b8c8f4eeb3c7021 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Tue, 13 Apr 2010 12:07:00 +0200 Subject: [PATCH 68/76] MX31: add accessor function to get a gpio The patch adds an accessor function to get the value of a gpio. Signed-off-by: Stefano Babic --- arch/arm/include/asm/arch-mx31/mx31.h | 5 +++++ drivers/gpio/mx31_gpio.c | 15 +++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/arch/arm/include/asm/arch-mx31/mx31.h b/arch/arm/include/asm/arch-mx31/mx31.h index 3cc4b350b6..f702d260f1 100644 --- a/arch/arm/include/asm/arch-mx31/mx31.h +++ b/arch/arm/include/asm/arch-mx31/mx31.h @@ -37,12 +37,17 @@ enum mx31_gpio_direction { extern int mx31_gpio_direction(unsigned int gpio, enum mx31_gpio_direction direction); extern void mx31_gpio_set(unsigned int gpio, unsigned int value); +extern int mx31_gpio_get(unsigned int gpio); #else static inline int mx31_gpio_direction(unsigned int gpio, enum mx31_gpio_direction direction) { return 1; } +static inline int mx31_gpio_get(unsigned int gpio) +{ + return 1; +} static inline void mx31_gpio_set(unsigned int gpio, unsigned int value) { } diff --git a/drivers/gpio/mx31_gpio.c b/drivers/gpio/mx31_gpio.c index 737aafa822..b07f038156 100644 --- a/drivers/gpio/mx31_gpio.c +++ b/drivers/gpio/mx31_gpio.c @@ -71,3 +71,18 @@ void mx31_gpio_set(unsigned int gpio, unsigned int value) l &= ~(1 << gpio); __REG(gpio_ports[port] + GPIO_DR) = l; } + +int mx31_gpio_get(unsigned int gpio) +{ + unsigned int port = gpio >> 5; + u32 l; + + if (port >= ARRAY_SIZE(gpio_ports)) + return -1; + + gpio &= 0x1f; + + l = (__REG(gpio_ports[port] + GPIO_DR) >> gpio) & 0x01; + + return l; +} From efb9591069ee276f7fa27a821240c7511f72fe65 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Mon, 29 Mar 2010 15:56:10 +0200 Subject: [PATCH 69/76] MX31: add pin definitions for NAND controller Add pin definitions ralted to the NAND controller to be used to set up the pin multiplexer. Signed-off-by: Stefano Babic --- arch/arm/include/asm/arch-mx31/mx31-regs.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/include/asm/arch-mx31/mx31-regs.h b/arch/arm/include/asm/arch-mx31/mx31-regs.h index 6f6e9a4048..c59255e24b 100644 --- a/arch/arm/include/asm/arch-mx31/mx31-regs.h +++ b/arch/arm/include/asm/arch-mx31/mx31-regs.h @@ -207,6 +207,15 @@ struct clock_control_regs { #define MUX_CTL_CSPI1_SS0 0x8e #define MUX_CTL_CSPI1_SS1 0x8f +#define MUX_CTL_NFC_WP 0xD0 +#define MUX_CTL_NFC_CE 0xD1 +#define MUX_CTL_NFC_RB 0xD2 +#define MUX_CTL_NFC_WE 0xD4 +#define MUX_CTL_NFC_RE 0xD5 +#define MUX_CTL_NFC_ALE 0xD6 +#define MUX_CTL_NFC_CLE 0xD7 + + /* * Helper macros for the MUX_[contact name]__[pin function] macros */ From 45997e0a86ee8d8abec6d791a241cb20011fe0e3 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Mon, 29 Mar 2010 16:43:39 +0200 Subject: [PATCH 70/76] MX31: Add support for NAND to QONG board The NAND device is connected to the FPGA of the QONG board and not to the NFC controller. For this reason, the FPGA must be set and initialized before accessing to the NAND itself. Signed-off-by: Stefano Babic --- board/davedenx/qong/qong.c | 93 +++++++++++++++++++++++++-------- board/davedenx/qong/qong_fpga.h | 4 +- include/configs/qong.h | 27 ++++++++++ 3 files changed, 101 insertions(+), 23 deletions(-) diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index b801150036..e73d26b8f6 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "qong_fpga.h" DECLARE_GLOBAL_DATA_PTR; @@ -38,6 +39,15 @@ int dram_init (void) return 0; } +static void qong_fpga_reset(void) +{ + mx31_gpio_set(QONG_FPGA_RST_PIN, 0); + udelay(30); + mx31_gpio_set(QONG_FPGA_RST_PIN, 1); + + udelay(300); +} + int board_init (void) { /* Chip selects */ @@ -101,6 +111,15 @@ int board_init (void) mx31_gpio_mux(IOMUX_MODE(0x91, MUX_CTL_OUT_FUNC | MUX_CTL_IN_GPIO)); mx31_gpio_mux(IOMUX_MODE(0x92, MUX_CTL_GPIO)); mx31_gpio_mux(IOMUX_MODE(0x93, MUX_CTL_GPIO)); + + /* FPGA reset Pin */ + /* rstn = 0 */ + mx31_gpio_set(QONG_FPGA_RST_PIN, 0); + mx31_gpio_direction(QONG_FPGA_RST_PIN, MX31_GPIO_DIRECTION_OUT); + + /* set interrupt pin as input */ + mx31_gpio_direction(QONG_FPGA_IRQ_PIN, MX31_GPIO_DIRECTION_IN); + #endif /* setup pins for UART1 */ @@ -127,32 +146,11 @@ int misc_init_r (void) #ifdef CONFIG_QONG_FPGA u32 tmp; - /* FPGA reset */ - /* rstn = 0 */ - tmp = __REG(GPIO2_BASE + GPIO_DR); - tmp &= (~(1 << QONG_FPGA_RST_PIN)); - __REG(GPIO2_BASE + GPIO_DR) = tmp; - /* set the GPIO as output */ - tmp = __REG(GPIO2_BASE + GPIO_GDIR); - tmp |= (1 << QONG_FPGA_RST_PIN); - __REG(GPIO2_BASE + GPIO_GDIR) = tmp; - /* wait */ - udelay(30); - /* rstn = 1 */ - tmp = __REG(GPIO2_BASE + GPIO_DR); - tmp |= (1 << QONG_FPGA_RST_PIN); - __REG(GPIO2_BASE + GPIO_DR) = tmp; - /* set interrupt pin as input */ - __REG(GPIO2_BASE + GPIO_GDIR) = tmp | (1 << QONG_FPGA_IRQ_PIN); - /* wait while the FPGA starts */ - udelay(300); - tmp = *(volatile u32*)QONG_FPGA_CTRL_VERSION; printf("FPGA: "); printf("version register = %u.%u.%u\n", (tmp & 0xF000) >> 12, (tmp & 0x0F00) >> 8, tmp & 0x00FF); #endif - return 0; } @@ -164,3 +162,56 @@ int board_eth_init(bd_t *bis) return 0; #endif } + +#if defined(CONFIG_QONG_FPGA) && defined(CONFIG_NAND_PLAT) +static void board_nand_setup(void) +{ + + /* CS3: NAND 8-bit */ + __REG(CSCR_U(3)) = 0x00004f00; + __REG(CSCR_L(3)) = 0x20013b31; + __REG(CSCR_A(3)) = 0x00020800; + __REG(IOMUXC_GPR) |= 1 << 13; + + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_NFC_WP, MUX_CTL_IN_GPIO)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_NFC_CE, MUX_CTL_IN_GPIO)); + mx31_gpio_mux(IOMUX_MODE(MUX_CTL_NFC_RB, MUX_CTL_IN_GPIO)); + + /* Make sure to reset the fpga else you cannot access NAND */ + qong_fpga_reset(); + + /* Enable NAND flash */ + mx31_gpio_set(15, 1); + mx31_gpio_set(14, 1); + mx31_gpio_direction(15, MX31_GPIO_DIRECTION_OUT); + mx31_gpio_direction(16, MX31_GPIO_DIRECTION_IN); + mx31_gpio_direction(14, MX31_GPIO_DIRECTION_IN); + mx31_gpio_set(15, 0); + +} + +int qong_nand_rdy(void *chip) +{ + udelay(1); + return mx31_gpio_get(16); +} + +void qong_nand_select_chip(struct mtd_info *mtd, int chip) +{ + if (chip >= 0) + mx31_gpio_set(15, 0); + else + mx31_gpio_set(15, 1); + +} + +void qong_nand_plat_init(void *chip) +{ + struct nand_chip *nand = (struct nand_chip *)chip; + nand->chip_delay = 20; + nand->select_chip = qong_nand_select_chip; + nand->options &= ~NAND_BUSWIDTH_16; + board_nand_setup(); +} + +#endif diff --git a/board/davedenx/qong/qong_fpga.h b/board/davedenx/qong/qong_fpga.h index e8042b131e..4e11f5a1cf 100644 --- a/board/davedenx/qong/qong_fpga.h +++ b/board/davedenx/qong/qong_fpga.h @@ -33,8 +33,8 @@ #define QONG_FPGA_TMS_PIN 25 #define QONG_FPGA_TDI_PIN 8 #define QONG_FPGA_TDO_PIN 7 -#define QONG_FPGA_RST_PIN 16 -#define QONG_FPGA_IRQ_PIN 8 +#define QONG_FPGA_RST_PIN 48 +#define QONG_FPGA_IRQ_PIN 40 #endif #endif /* QONG_FPGA_H */ diff --git a/include/configs/qong.h b/include/configs/qong.h index e41ea91bde..669b586a47 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -52,6 +52,8 @@ #define CONFIG_MXC_UART 1 #define CONFIG_SYS_MX31_UART1 1 +#define CONFIG_MX31_GPIO + /* FPGA */ #define CONFIG_QONG_FPGA 1 #define CONFIG_FPGA_BASE (CS1_BASE) @@ -96,6 +98,7 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_MII #define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_NAND /* * You can compile in a MAC address and your custom net settings by using @@ -188,6 +191,30 @@ #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */ +/* + * NAND driver + */ + +#ifndef __ASSEMBLY__ +extern void qong_nand_plat_init(void *chip); +extern int qong_nand_rdy(void *chip); +#endif +#define CONFIG_NAND_PLAT +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE CS3_BASE +#define NAND_PLAT_INIT() qong_nand_plat_init(nand) + +#define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24)) +#define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23)) +#define QONG_NAND_WRITE(addr, cmd) \ + do { \ + __REG8(addr) = cmd; \ + } while (0) + +#define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd) +#define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd) +#define NAND_PLAT_DEV_READY(chip) (qong_nand_rdy(chip)) + /*----------------------------------------------------------------------- * FLASH and environment organization */ From eab40f819ddd50eef465619db1386c053b59a95b Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Wed, 31 Mar 2010 10:27:47 +0200 Subject: [PATCH 71/76] MX31: Support 128MB RAM on QONG module The QONG module can be downsized and delivered with 128MB instead of 256MB. The patch adds run time support for the two different memory configurations. Signed-off-by: Stefano Babic --- arch/arm/include/asm/arch-mx31/mx31-regs.h | 6 + board/davedenx/qong/lowlevel_init.S | 130 +++++++++++++++------ 2 files changed, 103 insertions(+), 33 deletions(-) diff --git a/arch/arm/include/asm/arch-mx31/mx31-regs.h b/arch/arm/include/asm/arch-mx31/mx31-regs.h index c59255e24b..d72585c8a0 100644 --- a/arch/arm/include/asm/arch-mx31/mx31-regs.h +++ b/arch/arm/include/asm/arch-mx31/mx31-regs.h @@ -303,4 +303,10 @@ struct clock_control_regs { */ #define NFC_BASE_ADDR 0xB8000000 +/* + * Internal RAM (16KB) + */ +#define IRAM_BASE_ADDR 0x1FFFC000 +#define IRAM_SIZE (16 * 1024) + #endif /* __ASM_ARCH_MX31_REGS_H */ diff --git a/board/davedenx/qong/lowlevel_init.S b/board/davedenx/qong/lowlevel_init.S index 198dd76b8a..80bed92329 100644 --- a/board/davedenx/qong/lowlevel_init.S +++ b/board/davedenx/qong/lowlevel_init.S @@ -42,6 +42,27 @@ bcs 1b .endm +.macro SETUP_RAM cfg, ctl + /* B8xxxxxx - NAND, 8xxxxxxx - CSD0 RAM */ + REG 0xB8001010, 0x00000004 + ldr r3, =\cfg + ldr r2, =WEIM_ESDCFG0 + str r3, [r2] + REG 0xB8001000, 0x92100000 + REG 0x80000f00, 0x12344321 + REG 0xB8001000, 0xa2100000 + REG 0x80000000, 0x12344321 + REG 0x80000000, 0x12344321 + REG 0xB8001000, 0xb2100000 + REG8 0x80000033, 0xda + REG8 0x81000000, 0xff + ldr r3, =\ctl + ldr r2, =WEIM_ESDCTL0 + str r3, [r2] + REG 0x80000000, 0xDEADBEEF + REG 0xB8001010, 0x0000000c + +.endm /* RedBoot: To support 133MHz DDR */ .macro init_drive_strength /* @@ -130,43 +151,86 @@ lowlevel_init: /* Default: 1, 4, 12, 1 */ REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(4) | PLL_MFI(12) | PLL_MFN(1) - /* B8xxxxxx - NAND, 8xxxxxxx - CSD0 RAM */ - REG 0xB8001010, 0x00000004 - REG 0xB8001004, ((3 << 21) | /* tXP */ \ - (0 << 20) | /* tWTR */ \ - (2 << 18) | /* tRP */ \ - (1 << 16) | /* tMRD */ \ - (0 << 15) | /* tWR */ \ - (5 << 12) | /* tRAS */ \ - (1 << 10) | /* tRRD */ \ - (3 << 8) | /* tCAS */ \ - (2 << 4) | /* tRCD */ \ - (7 << 0) /* tRC */ ) - REG 0xB8001000, 0x92100000 - REG 0x80000f00, 0x12344321 - REG 0xB8001000, 0xa2100000 - REG 0x80000000, 0x12344321 - REG 0x80000000, 0x12344321 - REG 0xB8001000, 0xb2100000 - REG8 0x80000033, 0xda - REG8 0x81000000, 0xff - REG 0xB8001000, ((1 << 31) | \ - (0 << 28) | \ - (0 << 27) | \ - (3 << 24) | /* 14 rows */ \ - (2 << 20) | /* 10 cols */ \ - (2 << 16) | \ - (4 << 13) | /* 3.91us (64ms/16384) */ \ - (0 << 10) | \ - (0 << 8) | \ - (1 << 7) | \ - (0 << 0)) - REG 0x80000000, 0xDEADBEEF - REG 0xB8001010, 0x0000000c +check_ddr_module: +/* Set stackpointer in internal RAM to call get_ram_size */ + ldr sp, =(IRAM_BASE_ADDR + IRAM_SIZE - 16) + stmfd sp!, {r0-r11, ip, lr} + mov ip, lr /* save link reg across call */ + + ldr r0,=0x08000000 + SETUP_RAM ESDCFG0_256MB, ESDCTL0_256MB + ldr r0,=0x80000000 + ldr r1,=0x10000000 + bl get_ram_size + ldr r1,=0x10000000 + cmp r0,r1 + beq restore_regs + SETUP_RAM ESDCFG0_128MB, ESDCTL0_128MB + ldr r0,=0x80000000 + ldr r1,=0x08000000 + bl get_ram_size + ldr r1,=0x08000000 + cmp r0,r1 + beq restore_regs + +restore_regs: + ldmfd sp!, {r0-r11, ip, lr} + mov lr, ip /* restore link reg */ mov pc, lr + MPCTL_PARAM_399: .word (((1 - 1) << 26) + ((52 - 1) << 16) + (7 << 10) + (35 << 0)) UPCTL_PARAM_240: .word (((2 - 1) << 26) + ((13 - 1) << 16) + (9 << 10) + (3 << 0)) + + .equ ESDCFG0_128MB, \ + (0 << 21) + /* tXP */ \ + (1 << 20) + /* tWTR */ \ + (2 << 18) + /* tRP */ \ + (1 << 16) + /* tMRD */ \ + (0 << 15) + /* tWR */ \ + (5 << 12) + /* tRAS */ \ + (1 << 10) + /* tRRD */ \ + (3 << 8) + /* tCAS */ \ + (2 << 4) + /* tRCD */ \ + (0x0F << 0) /* tRC */ + + .equ ESDCTL0_128MB, \ + (1 << 31) + /* enable */ \ + (0 << 28) + /* mode */ \ + (0 << 27) + /* supervisor protect */ \ + (2 << 24) + /* 13 rows */ \ + (2 << 20) + /* 10 cols */ \ + (2 << 16) + /* 32 bit */ \ + (3 << 13) + /* 7.81us (64ms/8192) */ \ + (0 << 10) + /* power down timer */ \ + (0 << 8) + /* full page */ \ + (1 << 7) + /* burst length */ \ + (0 << 0) /* precharge timer */ + + .equ ESDCFG0_256MB, \ + (3 << 21) + /* tXP */ \ + (0 << 20) + /* tWTR */ \ + (2 << 18) + /* tRP */ \ + (1 << 16) + /* tMRD */ \ + (0 << 15) + /* tWR */ \ + (5 << 12) + /* tRAS */ \ + (1 << 10) + /* tRRD */ \ + (3 << 8) + /* tCAS */ \ + (2 << 4) + /* tRCD */ \ + (7 << 0) /* tRC */ + + .equ ESDCTL0_256MB, \ + (1 << 31) + \ + (0 << 28) + \ + (0 << 27) + \ + (3 << 24) + /* 14 rows */ \ + (2 << 20) + /* 10 cols */ \ + (2 << 16) + \ + (4 << 13) + /* 3.91us (64ms/16384) */ \ + (0 << 10) + \ + (0 << 8) + \ + (1 << 7) + \ + (0 << 0) From c9d944d35e7904229c5333e761bce9d4324971f8 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Thu, 8 Apr 2010 17:23:52 +0200 Subject: [PATCH 72/76] MX31: Add UBI support to QONG module The UBI/UBIFS support is added to the QONG module. Signed-off-by: Stefano Babic --- include/configs/qong.h | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/include/configs/qong.h b/include/configs/qong.h index 669b586a47..baf8481569 100644 --- a/include/configs/qong.h +++ b/include/configs/qong.h @@ -41,7 +41,7 @@ /* * Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) /* size in bytes reserved for initial data */ #define CONFIG_SYS_GBL_DATA_SIZE 128 @@ -97,7 +97,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_NET #define CONFIG_CMD_MII -#define CONFIG_CMD_JFFS2 #define CONFIG_CMD_NAND /* @@ -229,7 +228,7 @@ extern int qong_nand_rdy(void *chip); #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000) /* Address and size of Redundant Environment Sector */ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) @@ -248,9 +247,15 @@ extern int qong_nand_rdy(void *chip); #define CONFIG_SYS_FLASH_PROTECTION 1 /* - * JFFS2 partitions + * Filesystem */ +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_RBTREE +#define CONFIG_MTD_PARTITIONS #define CONFIG_CMD_MTDPARTS +#define CONFIG_LZO #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ #define CONFIG_FLASH_CFI_MTD #define MTDIDS_DEFAULT "nor0=physmap-flash.0" From eeb50ce193453951529015f50e5c1ccd7b55aad2 Mon Sep 17 00:00:00 2001 From: Stefano Babic Date: Tue, 13 Apr 2010 12:19:06 +0200 Subject: [PATCH 73/76] MX31: Removed erroneous board name from QONG QONG is a module that can be installed on several boards, not only on the QONG-EVB manufactured by Dave srl. Signed-off-by: Stefano Babic --- board/davedenx/qong/qong.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index e73d26b8f6..eb9218ec50 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -137,7 +137,7 @@ int board_init (void) int checkboard (void) { - printf("Board: DAVE/DENX QongEVB-LITE\n"); + printf("Board: DAVE/DENX Qong\n"); return 0; } From d6b91e30d32871eb20b6227519fd2f3a6ea073fd Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Mon, 19 Apr 2010 14:17:22 +0300 Subject: [PATCH 74/76] at91: define matrix registers bit fields Signed-off-by: Asen Dimov --- arch/arm/include/asm/arch-at91/at91_matrix.h | 138 +++++++++++++++++++ 1 file changed, 138 insertions(+) diff --git a/arch/arm/include/asm/arch-at91/at91_matrix.h b/arch/arm/include/asm/arch-at91/at91_matrix.h index 981ec2029c..f99b1d4cbf 100644 --- a/arch/arm/include/asm/arch-at91/at91_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91_matrix.h @@ -113,4 +113,142 @@ typedef struct at91_matrix { #define AT91_MATRIX_CSA_EBI1_CS2A 0x00000008 +#if defined CONFIG_AT91SAM9261 +/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_MCFG_RCB0 (1 << 0) +/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ +#define AT91_MATRIX_MCFG_RCB1 (1 << 1) +#endif + +/* Undefined Length Burst Type */ +#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \ + defined(CONFIG_AT91SAM9G45) +#define AT91_MATRIX_MCFG_ULBT_INFINITE 0x00000000 +#define AT91_MATRIX_MCFG_ULBT_SINGLE 0x00000001 +#define AT91_MATRIX_MCFG_ULBT_FOUR 0x00000002 +#define AT91_MATRIX_MCFG_ULBT_EIGHT 0x00000003 +#define AT91_MATRIX_MCFG_ULBT_SIXTEEN 0x00000004 +#endif +#if defined(CONFIG_AT91SAM9G45) +#define AT91_MATRIX_MCFG_ULBT_THIRTYTWO 0x00000005 +#define AT91_MATRIX_MCFG_ULBT_SIXTYFOUR 0x00000006 +#define AT91_MATRIX_MCFG_ULBT_128 0x00000007 +#endif + +/* Default Master Type */ +#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_NONE 0x00000000 +#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_LAST 0x00010000 +#define AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED 0x00020000 + +/* Fixed Index of Default Master */ +#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9263) +#define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 0xf) << 18) +#elif defined(CONFIG_AT91SAM9261) || defined(CONFIG_AT91SAM9260) +#define AT91_MATRIX_SCFG_FIXED_DEFMSTR(x) ((x & 7) << 18) +#endif + +/* Maximum Number of Allowed Cycles for a Burst */ +#if defined(CONFIG_AT91SAM9G45) +#define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0x1ff) << 0) +#elif defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ + defined(CONFIG_AT91SAM9263) +#define AT91_MATRIX_SCFG_SLOT_CYCLE(x) ((x & 0xff) << 0) +#endif + +/* Arbitration Type */ +#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) +#define AT91_MATRIX_SCFG_ARBT_ROUND_ROBIN 0x00000000 +#define AT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY 0x01000000 +#endif + +/* Master Remap Control Register */ +#if defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9263) || \ + defined(CONFIG_AT91SAM9G45) +/* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ +#define AT91_MATRIX_MRCR_RCB0 (1 << 0) +/* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ +#define AT91_MATRIX_MRCR_RCB1 (1 << 1) +#endif +#if defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G45) +#define AT91_MATRIX_MRCR_RCB2 0x00000004 +#define AT91_MATRIX_MRCR_RCB3 0x00000008 +#define AT91_MATRIX_MRCR_RCB4 0x00000010 +#define AT91_MATRIX_MRCR_RCB5 0x00000020 +#define AT91_MATRIX_MRCR_RCB6 0x00000040 +#define AT91_MATRIX_MRCR_RCB7 0x00000080 +#define AT91_MATRIX_MRCR_RCB8 0x00000100 +#endif +#if defined(CONFIG_AT91SAM9G45) +#define AT91_MATRIX_MRCR_RCB9 0x00000200 +#define AT91_MATRIX_MRCR_RCB10 0x00000400 +#define AT91_MATRIX_MRCR_RCB11 0x00000800 +#endif + +/* TCM Configuration Register */ +#if defined(CONFIG_AT91SAM9G45) +/* Size of ITCM enabled memory block */ +#define AT91_MATRIX_TCMR_ITCM_0 0x00000000 +#define AT91_MATRIX_TCMR_ITCM_32 0x00000040 +/* Size of DTCM enabled memory block */ +#define AT91_MATRIX_TCMR_DTCM_0 0x00000000 +#define AT91_MATRIX_TCMR_DTCM_32 0x00000060 +#define AT91_MATRIX_TCMR_DTCM_64 0x00000070 +/* Wait state TCM register */ +#define AT91_MATRIX_TCMR_TCM_NO_WS 0x00000000 +#define AT91_MATRIX_TCMR_TCM_ONE_WS 0x00000800 +#endif +#if defined(CONFIG_AT91SAM9263) +/* Size of ITCM enabled memory block */ +#define AT91_MATRIX_TCMR_ITCM_0 0x00000000 +#define AT91_MATRIX_TCMR_ITCM_16 0x00000005 +#define AT91_MATRIX_TCMR_ITCM_32 0x00000006 +/* Size of DTCM enabled memory block */ +#define AT91_MATRIX_TCMR_DTCM_0 0x00000000 +#define AT91_MATRIX_TCMR_DTCM_16 0x00000050 +#define AT91_MATRIX_TCMR_DTCM_32 0x00000060 +#endif +#if defined(CONFIG_AT91SAM9261) +/* Size of ITCM enabled memory block */ +#define AT91_MATRIX_TCMR_ITCM_0 0x00000000 +#define AT91_MATRIX_TCMR_ITCM_16 0x00000005 +#define AT91_MATRIX_TCMR_ITCM_32 0x00000006 +#define AT91_MATRIX_TCMR_ITCM_64 0x00000007 +/* Size of DTCM enabled memory block */ +#define AT91_MATRIX_TCMR_DTCM_0 0x00000000 +#define AT91_MATRIX_TCMR_DTCM_16 0x00000050 +#define AT91_MATRIX_TCMR_DTCM_32 0x00000060 +#define AT91_MATRIX_TCMR_DTCM_64 0x00000070 +#endif + +#if defined(CONFIG_AT91SAM9G45) +/* Video Mode Configuration Register */ +#define AT91C_MATRIX_VDEC_SEL_OFF 0x00000000 +#define AT91C_MATRIX_VDEC_SEL_ON 0x00000001 +/* Write Protect Mode Register */ +#define AT91_MATRIX_WPMR_WP_WPDIS 0x00000000 +#define AT91_MATRIX_WPMR_WP_WPEN 0x00000001 +#define AT91_MATRIX_WPMR_WPKEY 0xFFFFFF00 /* Write Protect KEY */ +/* Write Protect Status Register */ +#define AT91_MATRIX_WPSR_NO_WPV 0x00000000 +#define AT91_MATRIX_WPSR_WPV 0x00000001 +#define AT91_MATRIX_WPSR_WPVSRC 0x00FFFF00 /* Write Protect Violation Source */ +#endif + +/* USB Pad Pull-Up Control Register */ +#if defined(CONFIG_AT91SAM9261) +#define AT91_MATRIX_USBPUCR_PUON 0x40000000 +#endif + +#define AT91_MATRIX_PRA_M0(x) ((x & 3) << 0) /* Master 0 Priority Reg. A*/ +#define AT91_MATRIX_PRA_M1(x) ((x & 3) << 4) /* Master 1 Priority Reg. A*/ +#define AT91_MATRIX_PRA_M2(x) ((x & 3) << 8) /* Master 2 Priority Reg. A*/ +#define AT91_MATRIX_PRA_M3(x) ((x & 3) << 12) /* Master 3 Priority Reg. A*/ +#define AT91_MATRIX_PRA_M4(x) ((x & 3) << 16) /* Master 4 Priority Reg. A*/ +#define AT91_MATRIX_PRA_M5(x) ((x & 3) << 20) /* Master 5 Priority Reg. A*/ +#define AT91_MATRIX_PRA_M6(x) ((x & 3) << 24) /* Master 6 Priority Reg. A*/ +#define AT91_MATRIX_PRA_M7(x) ((x & 3) << 28) /* Master 7 Priority Reg. A*/ +#define AT91_MATRIX_PRB_M8(x) ((x & 3) << 0) /* Master 8 Priority Reg. B) */ +#define AT91_MATRIX_PRB_M9(x) ((x & 3) << 4) /* Master 9 Priority Reg. B) */ +#define AT91_MATRIX_PRB_M10(x) ((x & 3) << 8) /* Master 10 Priority Reg. B) */ + #endif From 20d98c2cea3398ad93beccd4727a371f41514086 Mon Sep 17 00:00:00 2001 From: Asen Dimov Date: Mon, 19 Apr 2010 14:18:43 +0300 Subject: [PATCH 75/76] pm9263 converted to at91 soc access Signed-off-by: Asen Dimov --- board/ronetix/pm9263/led.c | 15 +-- board/ronetix/pm9263/pm9263.c | 193 ++++++++++++++++++---------------- include/configs/pm9263.h | 87 ++++++++------- 3 files changed, 151 insertions(+), 144 deletions(-) diff --git a/board/ronetix/pm9263/led.c b/board/ronetix/pm9263/led.c index fe1a1d2001..4e585a4751 100644 --- a/board/ronetix/pm9263/led.c +++ b/board/ronetix/pm9263/led.c @@ -26,18 +26,19 @@ #include #include #include -#include +#include #include void coloured_LED_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOB | - 1 << AT91SAM9263_ID_PIOCDE); + writel(1 << AT91SAM9263_ID_PIOB, &pmc->pcer); - at91_set_gpio_output(CONFIG_RED_LED, 1); - at91_set_gpio_output(CONFIG_GREEN_LED, 1); + at91_set_pio_output(CONFIG_RED_LED, 1); + at91_set_pio_output(CONFIG_GREEN_LED, 1); - at91_set_gpio_value(CONFIG_RED_LED, 0); - at91_set_gpio_value(CONFIG_GREEN_LED, 1); + at91_set_pio_value(CONFIG_RED_LED, 0); + at91_set_pio_value(CONFIG_GREEN_LED, 1); } diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c index 23ea154b43..c7835de3d0 100644 --- a/board/ronetix/pm9263/pm9263.c +++ b/board/ronetix/pm9263/pm9263.c @@ -27,13 +27,13 @@ #include #include #include -#include #include #include #include #include +#include +#include #include -#include #include #include #include @@ -55,52 +55,59 @@ DECLARE_GLOBAL_DATA_PTR; static void pm9263_nand_hw_init(void) { unsigned long csa; + at91_smc_t *smc = (at91_smc_t *) AT91_SMC0_BASE; + at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; /* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBI0CSA); - at91_sys_write(AT91_MATRIX_EBI0CSA, - csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); + csa = readl(&matrix->csa[0]) | AT91_MATRIX_CSA_EBI_CS3A; + writel(csa, &matrix->csa[0]); /* Configure SMC CS3 for NAND/SmartMedia */ - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(1) | - AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(1)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | - AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(1) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(1), + &smc->cs[3].setup); + + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), + &smc->cs[3].pulse); + + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), + &smc->cs[3].cycle); + + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | #ifdef CONFIG_SYS_NAND_DBW_16 - AT91_SMC_DBW_16 | + AT91_SMC_MODE_DBW_16 | #else /* CONFIG_SYS_NAND_DBW_8 */ - AT91_SMC_DBW_8 | + AT91_SMC_MODE_DBW_8 | #endif - AT91_SMC_TDF_(2)); + AT91_SMC_MODE_TDF_CYCLE(2), + &smc->cs[3].mode); /* Configure RDY/BSY */ - at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1); /* Enable NandFlash */ - at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); + at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); } #endif #ifdef CONFIG_MACB static void pm9263_macb_hw_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + at91_pio_t *pio = (at91_pio_t *) AT91_PIO_BASE; + /* * PB27 enables the 50MHz oscillator for Ethernet PHY * 1 - enable * 0 - disable */ - at91_set_gpio_output(AT91_PIN_PB27, 1); - at91_set_gpio_value(AT91_PIN_PB27, 1); /* 1- enable, 0 - disable */ + at91_set_pio_output(AT91_PIO_PORTB, 27, 1); + at91_set_pio_value(AT91_PIO_PORTB, 27, 1); /* 1- enable, 0 - disable */ /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); + writel(1 << AT91SAM9263_ID_EMAC, &pmc->pcer); /* * Disable pull-up on: @@ -110,19 +117,15 @@ static void pm9263_macb_hw_init(void) * * PHY has internal pull-down */ - writel(pin_to_mask(AT91_PIN_PC25), - pin_to_controller(AT91_PIN_PC0) + PIO_PUDR); - writel(pin_to_mask(AT91_PIN_PE25) | - pin_to_mask(AT91_PIN_PE26), - pin_to_controller(AT91_PIN_PE0) + PIO_PUDR); + at91_set_pio_pullup(AT91_PIO_PORTC, 25, 0); + at91_set_pio_pullup(AT91_PIO_PORTE, 25, 0); + at91_set_pio_pullup(AT91_PIO_PORTE, 26, 0); /* Re-enable pull-up */ - writel(pin_to_mask(AT91_PIN_PC25), - pin_to_controller(AT91_PIN_PC0) + PIO_PUER); - writel(pin_to_mask(AT91_PIN_PE25) | - pin_to_mask(AT91_PIN_PE26), - pin_to_controller(AT91_PIN_PE0) + PIO_PUER); + at91_set_pio_pullup(AT91_PIO_PORTC, 25, 1); + at91_set_pio_pullup(AT91_PIO_PORTE, 25, 1); + at91_set_pio_pullup(AT91_PIO_PORTE, 26, 1); at91_macb_hw_init(); } @@ -148,17 +151,17 @@ vidinfo_t panel_info = { void lcd_enable(void) { - at91_set_gpio_value(AT91_PIN_PA22, 1); /* power up */ + at91_set_pio_value(AT91_PIO_PORTA, 22, 1); /* power up */ } void lcd_disable(void) { - at91_set_gpio_value(AT91_PIN_PA22, 0); /* power down */ + at91_set_pio_value(AT91_PIO_PORTA, 22, 0); /* power down */ } #ifdef CONFIG_LCD_IN_PSRAM -#define PSRAM_CRE_PIN AT91_PIN_PB29 +#define PSRAM_CRE_PIN AT91_PIO_PORTB, 29 #define PSRAM_CTRL_REG (PHYS_PSRAM + PHYS_PSRAM_SIZE - 2) /* Initialize the PSRAM memory */ @@ -166,31 +169,34 @@ static int pm9263_lcd_hw_psram_init(void) { volatile uint16_t x; unsigned long csa; + at91_smc_t *smc = (at91_smc_t *) AT91_SMC1_BASE; + at91_matrix_t *matrix = (at91_matrix_t *) AT91_MATRIX_BASE; /* Enable CS3 3.3v, no pull-ups */ - csa = at91_sys_read(AT91_MATRIX_EBI1CSA); - at91_sys_write(AT91_MATRIX_EBI1CSA, - csa | AT91_MATRIX_EBI1_DBPUC | - AT91_MATRIX_EBI1_VDDIOMSEL_3_3V); + csa = readl(&matrix->csa[1]) | AT91_MATRIX_CSA_DBPUC | + AT91_MATRIX_CSA_VDDIOMSEL_3_3V; + + writel(csa, &matrix->csa[1]); /* Configure SMC1 CS0 for PSRAM - 16-bit */ - at91_sys_write(AT91_SMC1_SETUP(0), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); - at91_sys_write(AT91_SMC1_PULSE(0), - AT91_SMC_NWEPULSE_(7) | AT91_SMC_NCS_WRPULSE_(7) | - AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(7)); - at91_sys_write(AT91_SMC1_CYCLE(0), - AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8)); - at91_sys_write(AT91_SMC1_MODE(0), - AT91_SMC_DBW_16 | - AT91_SMC_PMEN | - AT91_SMC_PS_32); + writel(AT91_SMC_SETUP_NWE(0) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(0) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[0].setup); + + writel(AT91_SMC_PULSE_NWE(7) | AT91_SMC_PULSE_NCS_WR(7) | + AT91_SMC_PULSE_NRD(2) | AT91_SMC_PULSE_NCS_RD(7), + &smc->cs[0].pulse); + + writel(AT91_SMC_CYCLE_NWE(8) | AT91_SMC_CYCLE_NRD(8), + &smc->cs[0].cycle); + + writel(AT91_SMC_MODE_DBW_16 | AT91_SMC_MODE_PMEN | AT91_SMC_MODE_PS_32, + &smc->cs[0].mode); /* setup PB29 as output */ - at91_set_gpio_output(PSRAM_CRE_PIN, 1); + at91_set_pio_output(PSRAM_CRE_PIN, 1); - at91_set_gpio_value(PSRAM_CRE_PIN, 0); /* set PSRAM_CRE_PIN to '0' */ + at91_set_pio_value(PSRAM_CRE_PIN, 0); /* set PSRAM_CRE_PIN to '0' */ /* PSRAM: write BCR */ x = readw(PSRAM_CTRL_REG); @@ -216,7 +222,7 @@ static int pm9263_lcd_hw_psram_init(void) /* test if the chip is MT45W2M16B */ if ((readw(PHYS_PSRAM) != 0x1234) || (readw(PHYS_PSRAM+2) != 0x5678)) { /* try with CRE=1 (MT45W2M16A) */ - at91_set_gpio_value(PSRAM_CRE_PIN, 1); /* set PSRAM_CRE_PIN to '1' */ + at91_set_pio_value(PSRAM_CRE_PIN, 1); /* set PSRAM_CRE_PIN to '1' */ /* write RCR of the PSRAM */ x = readw(PSRAM_CTRL_REG); @@ -229,17 +235,14 @@ static int pm9263_lcd_hw_psram_init(void) writew(0x1234, PHYS_PSRAM); writew(0x5678, PHYS_PSRAM+2); if ((readw(PHYS_PSRAM) != 0x1234) - || (readw(PHYS_PSRAM + 2) != 0x5678)) + || (readw(PHYS_PSRAM + 2) != 0x5678)) return 1; } /* Bus matrix */ - at91_sys_write( AT91_MATRIX_PRAS5, AT91_MATRIX_M5PR ); - at91_sys_write( AT91_MATRIX_SCFG5, AT91_MATRIX_ARBT_FIXED_PRIORITY | - (AT91_MATRIX_FIXED_DEFMSTR & (5 << 18)) | - AT91_MATRIX_DEFMSTR_TYPE_FIXED | - (AT91_MATRIX_SLOT_CYCLE & (0xFF << 0))); + writel(AT91_MATRIX_PRA_M5(3), &matrix->pr[5].a); + writel(CONFIG_PSRAM_SCFG, &matrix->scfg[5]); return 0; } @@ -247,35 +250,37 @@ static int pm9263_lcd_hw_psram_init(void) static void pm9263_lcd_hw_init(void) { - at91_set_A_periph(AT91_PIN_PC0, 0); /* LCDVSYNC */ - at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ - at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ - at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ - at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ - at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ - at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ - at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ - at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ - at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ - at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ - at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ - at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ - at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ - at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */ - at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ - at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ - at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ - at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ - at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ - at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */ - at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ - at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; - at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC); + at91_set_a_periph(AT91_PIO_PORTC, 0, 0); /* LCDVSYNC */ + at91_set_a_periph(AT91_PIO_PORTC, 1, 0); /* LCDHSYNC */ + at91_set_a_periph(AT91_PIO_PORTC, 2, 0); /* LCDDOTCK */ + at91_set_a_periph(AT91_PIO_PORTC, 3, 0); /* LCDDEN */ + at91_set_b_periph(AT91_PIO_PORTB, 9, 0); /* LCDCC */ + at91_set_a_periph(AT91_PIO_PORTC, 6, 0); /* LCDD2 */ + at91_set_a_periph(AT91_PIO_PORTC, 7, 0); /* LCDD3 */ + at91_set_a_periph(AT91_PIO_PORTC, 8, 0); /* LCDD4 */ + at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* LCDD5 */ + at91_set_a_periph(AT91_PIO_PORTC, 10, 0); /* LCDD6 */ + at91_set_a_periph(AT91_PIO_PORTC, 11, 0); /* LCDD7 */ + at91_set_a_periph(AT91_PIO_PORTC, 14, 0); /* LCDD10 */ + at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* LCDD11 */ + at91_set_a_periph(AT91_PIO_PORTC, 16, 0); /* LCDD12 */ + at91_set_b_periph(AT91_PIO_PORTC, 12, 0); /* LCDD13 */ + at91_set_a_periph(AT91_PIO_PORTC, 18, 0); /* LCDD14 */ + at91_set_a_periph(AT91_PIO_PORTC, 19, 0); /* LCDD15 */ + at91_set_a_periph(AT91_PIO_PORTC, 22, 0); /* LCDD18 */ + at91_set_a_periph(AT91_PIO_PORTC, 23, 0); /* LCDD19 */ + at91_set_a_periph(AT91_PIO_PORTC, 24, 0); /* LCDD20 */ + at91_set_b_periph(AT91_PIO_PORTC, 17, 0); /* LCDD21 */ + at91_set_a_periph(AT91_PIO_PORTC, 26, 0); /* LCDD22 */ + at91_set_a_periph(AT91_PIO_PORTC, 27, 0); /* LCDD23 */ + + writel(1 << AT91SAM9263_ID_LCDC, &pmc->pcer); /* Power Control */ - at91_set_gpio_output(AT91_PIN_PA22, 1); - at91_set_gpio_value(AT91_PIN_PA22, 0); /* power down */ + at91_set_pio_output(AT91_PIO_PORTA, 22, 1); + at91_set_pio_value(AT91_PIO_PORTA, 22, 0); /* power down */ #ifdef CONFIG_LCD_IN_PSRAM /* initialize te PSRAM */ @@ -337,13 +342,15 @@ void lcd_show_board_info(void) int board_init(void) { + at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE; + /* Enable Ctrlc */ console_init_f(); - at91_sys_write(AT91_PMC_PCER, - (1 << AT91SAM9263_ID_PIOA) | - (1 << AT91SAM9263_ID_PIOCDE) | - (1 << AT91SAM9263_ID_PIOB)); + writel((1 << AT91SAM9263_ID_PIOA) | + (1 << AT91SAM9263_ID_PIOCDE) | + (1 << AT91SAM9263_ID_PIOB), + &pmc->pcer); /* arch number of AT91SAM9263EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_PM9263; @@ -394,7 +401,7 @@ int board_eth_init(bd_t *bis) { int rc = 0; #ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *)AT91SAM9263_BASE_EMAC, 0x01); + rc = macb_eth_initialize(0, (void *)AT91_EMAC_BASE, 0x01); #endif return rc; } diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index f854f3874d..9735e6a079 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -28,8 +28,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_AT91_LEGACY - /* ARM asynchronous clock */ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO @@ -49,41 +47,37 @@ /* clocks */ #define CONFIG_SYS_MOR_VAL \ - (AT91_PMC_MOSCEN | \ + (AT91_PMC_MOR_MOSCEN | \ (255 << 8)) /* Main Oscillator Start-up Time */ #define CONFIG_SYS_PLLAR_VAL \ - (AT91_PMC_PLLA_WR_ERRATA | /* Bit 29 must be 1 when prog */ \ - AT91_PMC_OUT | \ - AT91_PMC_PLLCOUNT | /* PLL Counter */ \ + (AT91_PMC_PLLAR_29 | /* Bit 29 must be 1 when prog */ \ + AT91_PMC_PLLXR_OUT(3) | \ + AT91_PMC_PLLXR_PLLCOUNT(0x3f) | /* PLL Counter */\ (2 << 28) | /* PLL Clock Frequency Range */ \ ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV)) #if (MAIN_PLL_DIV == 2) /* PCK/2 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR1_VAL \ - (AT91_PMC_CSS_SLOW | \ - AT91_PMC_PRES_1 | \ - AT91SAM9_PMC_MDIV_2 | \ - AT91_PMC_PDIV_1) + (AT91_PMC_MCKR_CSS_SLOW | \ + AT91_PMC_MCKR_PRES_1 | \ + AT91_PMC_MCKR_MDIV_2) /* PCK/2 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR2_VAL \ - (AT91_PMC_CSS_PLLA | \ - AT91_PMC_PRES_1 | \ - AT91SAM9_PMC_MDIV_2 | \ - AT91_PMC_PDIV_1) + (AT91_PMC_MCKR_CSS_PLLA | \ + AT91_PMC_MCKR_PRES_1 | \ + AT91_PMC_MCKR_MDIV_2) #else /* PCK/4 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR1_VAL \ - (AT91_PMC_CSS_SLOW | \ - AT91_PMC_PRES_1 | \ - AT91RM9200_PMC_MDIV_3 | \ - AT91_PMC_PDIV_1) + (AT91_PMC_MCKR_CSS_SLOW | \ + AT91_PMC_MCKR_PRES_1 | \ + AT91_PMC_MCKR_MDIV_4) /* PCK/4 = MCK Master Clock from PLLA */ #define CONFIG_SYS_MCKR2_VAL \ - (AT91_PMC_CSS_PLLA | \ - AT91_PMC_PRES_1 | \ - AT91RM9200_PMC_MDIV_3 | \ - AT91_PMC_PDIV_1) + (AT91_PMC_MCKR_CSS_PLLA | \ + AT91_PMC_MCKR_PRES_1 | \ + AT91_PMC_MCKR_MDIV_4) #endif /* define PDC[31:16] as DATA[31:16] */ #define CONFIG_SYS_PIOD_PDR_VAL1 0xFFFF0000 @@ -91,8 +85,8 @@ #define CONFIG_SYS_PIOD_PPUDR_VAL 0xFFFF0000 /* EBI0_CSA, CS1 SDRAM, CS3 NAND Flash, 3.3V memories */ #define CONFIG_SYS_MATRIX_EBI0CSA_VAL \ - (AT91_MATRIX_EBI0_DBPUC | AT91_MATRIX_EBI0_VDDIOMSEL_3_3V | \ - AT91_MATRIX_EBI0_CS1A_SDRAMC) + (AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_VDDIOMSEL_3_3V | \ + AT91_MATRIX_CSA_EBI_CS1A) /* SDRAM */ /* SDRAMC_MR Mode register */ @@ -135,32 +129,32 @@ /* setup SMC0, CS0 (NOR Flash) - 16-bit, 15 WS */ #define CONFIG_SYS_SMC0_SETUP0_VAL \ - (AT91_SMC_NWESETUP_(10) | AT91_SMC_NCS_WRSETUP_(10) | \ - AT91_SMC_NRDSETUP_(10) | AT91_SMC_NCS_RDSETUP_(10)) + (AT91_SMC_SETUP_NWE(10) | AT91_SMC_SETUP_NCS_WR(10) | \ + AT91_SMC_SETUP_NRD(10) | AT91_SMC_SETUP_NCS_RD(10)) #define CONFIG_SYS_SMC0_PULSE0_VAL \ - (AT91_SMC_NWEPULSE_(11) | AT91_SMC_NCS_WRPULSE_(11) | \ - AT91_SMC_NRDPULSE_(11) | AT91_SMC_NCS_RDPULSE_(11)) + (AT91_SMC_PULSE_NWE(11) | AT91_SMC_PULSE_NCS_WR(11) | \ + AT91_SMC_PULSE_NRD(11) | AT91_SMC_PULSE_NCS_RD(11)) #define CONFIG_SYS_SMC0_CYCLE0_VAL \ - (AT91_SMC_NWECYCLE_(22) | AT91_SMC_NRDCYCLE_(22)) + (AT91_SMC_CYCLE_NWE(22) | AT91_SMC_CYCLE_NRD(22)) #define CONFIG_SYS_SMC0_MODE0_VAL \ - (AT91_SMC_READMODE | AT91_SMC_WRITEMODE | \ - AT91_SMC_DBW_16 | \ - AT91_SMC_TDFMODE | \ - AT91_SMC_TDF_(6)) + (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \ + AT91_SMC_MODE_DBW_16 | \ + AT91_SMC_MODE_TDF | \ + AT91_SMC_MODE_TDF_CYCLE(6)) /* user reset enable */ #define CONFIG_SYS_RSTC_RMR_VAL \ (AT91_RSTC_KEY | \ - AT91_RSTC_PROCRST | \ - AT91_RSTC_RSTTYP_WAKEUP | \ - AT91_RSTC_RSTTYP_WATCHDOG) + AT91_RSTC_CR_PROCRST | \ + AT91_RSTC_MR_ERSTL(1) | \ + AT91_RSTC_MR_ERSTL(2)) /* Disable Watchdog */ #define CONFIG_SYS_WDTC_WDMR_VAL \ - (AT91_WDT_WDIDLEHLT | AT91_WDT_WDDBGHLT | \ - AT91_WDT_WDV | \ - AT91_WDT_WDDIS | \ - AT91_WDT_WDD) + (AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT | \ + AT91_WDT_MR_WDV(0xfff) | \ + AT91_WDT_MR_WDDIS | \ + AT91_WDT_MR_WDD(0xfff)) #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 @@ -196,8 +190,8 @@ /* LED */ #define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIN_PB7 /* this is the power led */ -#define CONFIG_GREEN_LED AT91_PIN_PB8 /* this is the user1 led */ +#define CONFIG_RED_LED AT91_PIO_PORTB, 7 /* this is the power led */ +#define CONFIG_GREEN_LED AT91_PIO_PORTB, 8 /* this is the user1 led */ #define CONFIG_BOOTDELAY 3 @@ -258,8 +252,8 @@ #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* our CLE is AD22 */ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 -#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PB30 +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTB, 30 #endif @@ -273,6 +267,11 @@ /* PSRAM */ #define PHYS_PSRAM 0x70000000 #define PHYS_PSRAM_SIZE 0x00400000 /* 4MB */ +/* Slave EBI1, PSRAM connected */ +#define CONFIG_PSRAM_SCFG (AT91_MATRIX_SCFG_ARBT_FIXED_PRIORITY | \ + AT91_MATRIX_SCFG_FIXED_DEFMSTR(5) | \ + AT91_MATRIX_SCFG_DEFMSTR_TYPE_FIXED | \ + AT91_MATRIX_SCFG_SLOT_CYCLE(255)) /* Ethernet */ #define CONFIG_MACB 1 From e0531f975ce124f4ebdd9c7b7b107673c5628f68 Mon Sep 17 00:00:00 2001 From: Tom Date: Sun, 9 May 2010 16:58:11 -0500 Subject: [PATCH 76/76] ARM Update mach-types Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 257dab81413b31b8648becfe11586b3a41e5c29a Signed-off-by: Tom --- arch/arm/include/asm/mach-types.h | 667 +++++++++++++++++++++++++++++- 1 file changed, 665 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h index b33e97b5fa..513c6356e7 100644 --- a/arch/arm/include/asm/mach-types.h +++ b/arch/arm/include/asm/mach-types.h @@ -2773,6 +2773,57 @@ extern unsigned int __machine_arch_type; #define MACH_TYPE_SKAT91_S3E 2790 #define MACH_TYPE_OMAP4_PANDA 2791 #define MACH_TYPE_DF7220 2792 +#define MACH_TYPE_NEMINI 2793 +#define MACH_TYPE_T8200 2794 +#define MACH_TYPE_APF51 2795 +#define MACH_TYPE_DR_RC_UNIT 2796 +#define MACH_TYPE_BORDEAUX 2797 +#define MACH_TYPE_CATANIA_B 2798 +#define MACH_TYPE_MX51_OCEAN 2799 +#define MACH_TYPE_TI8168EVM 2800 +#define MACH_TYPE_NEOCOREOMAP 2801 +#define MACH_TYPE_WITHINGS_WBP 2802 +#define MACH_TYPE_DBPS 2803 +#define MACH_TYPE_SBC9261 2804 +#define MACH_TYPE_PCBFP0001 2805 +#define MACH_TYPE_SPEEDY 2806 +#define MACH_TYPE_CHRYSAOR 2807 +#define MACH_TYPE_TANGO 2808 +#define MACH_TYPE_SYNOLOGY_DSX11 2809 +#define MACH_TYPE_HANLIN_V3EXT 2810 +#define MACH_TYPE_HANLIN_V5 2811 +#define MACH_TYPE_HANLIN_V3PLUS 2812 +#define MACH_TYPE_IRIVER_STORY 2813 +#define MACH_TYPE_IREX_ILIAD 2814 +#define MACH_TYPE_IREX_DR1000 2815 +#define MACH_TYPE_TETON_BGA 2816 +#define MACH_TYPE_SNAPPER9G45 2817 +#define MACH_TYPE_TAM3517 2818 +#define MACH_TYPE_PDC100 2819 +#define MACH_TYPE_EUKREA_CPUIMX25 2820 +#define MACH_TYPE_EUKREA_CPUIMX35 2821 +#define MACH_TYPE_EUKREA_CPUIMX51SD 2822 +#define MACH_TYPE_EUKREA_CPUIMX51 2823 +#define MACH_TYPE_P565 2824 +#define MACH_TYPE_ACER_A4 2825 +#define MACH_TYPE_DAVINCI_DM368_BIP 2826 +#define MACH_TYPE_ESHARE 2827 +#define MACH_TYPE_HW_OMAPL138_EUROPA 2828 +#define MACH_TYPE_WLBARGN 2829 +#define MACH_TYPE_BM170 2830 +#define MACH_TYPE_NETSPACE_MINI_V2 2831 +#define MACH_TYPE_NETSPACE_PLUG_V2 2832 +#define MACH_TYPE_SIEMENS_L1 2833 +#define MACH_TYPE_ELV_LCU1 2834 +#define MACH_TYPE_MCU1 2835 +#define MACH_TYPE_OMAP3_TAO3530 2836 +#define MACH_TYPE_OMAP3_PCUTOUCH 2837 +#define MACH_TYPE_SMDKC210 2838 +#define MACH_TYPE_OMAP3_BRAILLO 2839 +#define MACH_TYPE_SPYPLUG 2840 +#define MACH_TYPE_GINGER 2841 +#define MACH_TYPE_TNY_T3530 2842 +#define MACH_TYPE_PCA102 2843 #ifdef CONFIG_ARCH_EBSA110 # ifdef machine_arch_type @@ -33573,9 +33624,9 @@ extern unsigned int __machine_arch_type; # else # define machine_arch_type MACH_TYPE_DAVINCI_CIO # endif -# define machine_is_davinci_cio() (machine_arch_type == MACH_TYPE_DAVINCI_CIO) +# define machine_is_davinci_dm6467_cio() (machine_arch_type == MACH_TYPE_DAVINCI_CIO) #else -# define machine_is_davinci_cio() (0) +# define machine_is_davinci_dm6467_cio() (0) #endif #ifdef CONFIG_MACH_SMARTMETER_DL @@ -35906,6 +35957,618 @@ extern unsigned int __machine_arch_type; # define machine_is_df7220() (0) #endif +#ifdef CONFIG_MACH_NEMINI +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NEMINI +# endif +# define machine_is_nemini() (machine_arch_type == MACH_TYPE_NEMINI) +#else +# define machine_is_nemini() (0) +#endif + +#ifdef CONFIG_MACH_T8200 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_T8200 +# endif +# define machine_is_t8200() (machine_arch_type == MACH_TYPE_T8200) +#else +# define machine_is_t8200() (0) +#endif + +#ifdef CONFIG_MACH_APF51 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_APF51 +# endif +# define machine_is_apf51() (machine_arch_type == MACH_TYPE_APF51) +#else +# define machine_is_apf51() (0) +#endif + +#ifdef CONFIG_MACH_DR_RC_UNIT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DR_RC_UNIT +# endif +# define machine_is_dr_rc_unit() (machine_arch_type == MACH_TYPE_DR_RC_UNIT) +#else +# define machine_is_dr_rc_unit() (0) +#endif + +#ifdef CONFIG_MACH_BORDEAUX +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BORDEAUX +# endif +# define machine_is_bordeaux() (machine_arch_type == MACH_TYPE_BORDEAUX) +#else +# define machine_is_bordeaux() (0) +#endif + +#ifdef CONFIG_MACH_CATANIA_B +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CATANIA_B +# endif +# define machine_is_catania_b() (machine_arch_type == MACH_TYPE_CATANIA_B) +#else +# define machine_is_catania_b() (0) +#endif + +#ifdef CONFIG_MACH_MX51_OCEAN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MX51_OCEAN +# endif +# define machine_is_mx51_ocean() (machine_arch_type == MACH_TYPE_MX51_OCEAN) +#else +# define machine_is_mx51_ocean() (0) +#endif + +#ifdef CONFIG_MACH_TI8168EVM +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TI8168EVM +# endif +# define machine_is_ti8168evm() (machine_arch_type == MACH_TYPE_TI8168EVM) +#else +# define machine_is_ti8168evm() (0) +#endif + +#ifdef CONFIG_MACH_NEOCOREOMAP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NEOCOREOMAP +# endif +# define machine_is_neocoreomap() (machine_arch_type == MACH_TYPE_NEOCOREOMAP) +#else +# define machine_is_neocoreomap() (0) +#endif + +#ifdef CONFIG_MACH_WITHINGS_WBP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_WITHINGS_WBP +# endif +# define machine_is_withings_wbp() (machine_arch_type == MACH_TYPE_WITHINGS_WBP) +#else +# define machine_is_withings_wbp() (0) +#endif + +#ifdef CONFIG_MACH_DBPS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DBPS +# endif +# define machine_is_dbps() (machine_arch_type == MACH_TYPE_DBPS) +#else +# define machine_is_dbps() (0) +#endif + +#ifdef CONFIG_MACH_SBC9261 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SBC9261 +# endif +# define machine_is_at91sam9261() (machine_arch_type == MACH_TYPE_SBC9261) +#else +# define machine_is_at91sam9261() (0) +#endif + +#ifdef CONFIG_MACH_PCBFP0001 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PCBFP0001 +# endif +# define machine_is_pcbfp0001() (machine_arch_type == MACH_TYPE_PCBFP0001) +#else +# define machine_is_pcbfp0001() (0) +#endif + +#ifdef CONFIG_MACH_SPEEDY +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SPEEDY +# endif +# define machine_is_speedy() (machine_arch_type == MACH_TYPE_SPEEDY) +#else +# define machine_is_speedy() (0) +#endif + +#ifdef CONFIG_MACH_CHRYSAOR +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_CHRYSAOR +# endif +# define machine_is_chrysaor() (machine_arch_type == MACH_TYPE_CHRYSAOR) +#else +# define machine_is_chrysaor() (0) +#endif + +#ifdef CONFIG_MACH_TANGO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TANGO +# endif +# define machine_is_tango() (machine_arch_type == MACH_TYPE_TANGO) +#else +# define machine_is_tango() (0) +#endif + +#ifdef CONFIG_MACH_SYNOLOGY_DSX11 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SYNOLOGY_DSX11 +# endif +# define machine_is_synology_dsx11() (machine_arch_type == MACH_TYPE_SYNOLOGY_DSX11) +#else +# define machine_is_synology_dsx11() (0) +#endif + +#ifdef CONFIG_MACH_HANLIN_V3EXT +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HANLIN_V3EXT +# endif +# define machine_is_hanlin_v3ext() (machine_arch_type == MACH_TYPE_HANLIN_V3EXT) +#else +# define machine_is_hanlin_v3ext() (0) +#endif + +#ifdef CONFIG_MACH_HANLIN_V5 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HANLIN_V5 +# endif +# define machine_is_hanlin_v5() (machine_arch_type == MACH_TYPE_HANLIN_V5) +#else +# define machine_is_hanlin_v5() (0) +#endif + +#ifdef CONFIG_MACH_HANLIN_V3PLUS +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HANLIN_V3PLUS +# endif +# define machine_is_hanlin_v3plus() (machine_arch_type == MACH_TYPE_HANLIN_V3PLUS) +#else +# define machine_is_hanlin_v3plus() (0) +#endif + +#ifdef CONFIG_MACH_IRIVER_STORY +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_IRIVER_STORY +# endif +# define machine_is_iriver_story() (machine_arch_type == MACH_TYPE_IRIVER_STORY) +#else +# define machine_is_iriver_story() (0) +#endif + +#ifdef CONFIG_MACH_IREX_ILIAD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_IREX_ILIAD +# endif +# define machine_is_irex_iliad() (machine_arch_type == MACH_TYPE_IREX_ILIAD) +#else +# define machine_is_irex_iliad() (0) +#endif + +#ifdef CONFIG_MACH_IREX_DR1000 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_IREX_DR1000 +# endif +# define machine_is_irex_dr1000() (machine_arch_type == MACH_TYPE_IREX_DR1000) +#else +# define machine_is_irex_dr1000() (0) +#endif + +#ifdef CONFIG_MACH_TETON_BGA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TETON_BGA +# endif +# define machine_is_teton_bga() (machine_arch_type == MACH_TYPE_TETON_BGA) +#else +# define machine_is_teton_bga() (0) +#endif + +#ifdef CONFIG_MACH_SNAPPER9G45 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SNAPPER9G45 +# endif +# define machine_is_snapper9g45() (machine_arch_type == MACH_TYPE_SNAPPER9G45) +#else +# define machine_is_snapper9g45() (0) +#endif + +#ifdef CONFIG_MACH_TAM3517 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TAM3517 +# endif +# define machine_is_tam3517() (machine_arch_type == MACH_TYPE_TAM3517) +#else +# define machine_is_tam3517() (0) +#endif + +#ifdef CONFIG_MACH_PDC100 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PDC100 +# endif +# define machine_is_pdc100() (machine_arch_type == MACH_TYPE_PDC100) +#else +# define machine_is_pdc100() (0) +#endif + +#ifdef CONFIG_MACH_EUKREA_CPUIMX25 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EUKREA_CPUIMX25 +# endif +# define machine_is_eukrea_cpuimx25sd() (machine_arch_type == MACH_TYPE_EUKREA_CPUIMX25) +#else +# define machine_is_eukrea_cpuimx25sd() (0) +#endif + +#ifdef CONFIG_MACH_EUKREA_CPUIMX35 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EUKREA_CPUIMX35 +# endif +# define machine_is_eukrea_cpuimx35sd() (machine_arch_type == MACH_TYPE_EUKREA_CPUIMX35) +#else +# define machine_is_eukrea_cpuimx35sd() (0) +#endif + +#ifdef CONFIG_MACH_EUKREA_CPUIMX51SD +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EUKREA_CPUIMX51SD +# endif +# define machine_is_eukrea_cpuimx51sd() (machine_arch_type == MACH_TYPE_EUKREA_CPUIMX51SD) +#else +# define machine_is_eukrea_cpuimx51sd() (0) +#endif + +#ifdef CONFIG_MACH_EUKREA_CPUIMX51 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_EUKREA_CPUIMX51 +# endif +# define machine_is_eukrea_cpuimx51() (machine_arch_type == MACH_TYPE_EUKREA_CPUIMX51) +#else +# define machine_is_eukrea_cpuimx51() (0) +#endif + +#ifdef CONFIG_MACH_P565 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_P565 +# endif +# define machine_is_p565() (machine_arch_type == MACH_TYPE_P565) +#else +# define machine_is_p565() (0) +#endif + +#ifdef CONFIG_MACH_ACER_A4 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ACER_A4 +# endif +# define machine_is_acer_a4() (machine_arch_type == MACH_TYPE_ACER_A4) +#else +# define machine_is_acer_a4() (0) +#endif + +#ifdef CONFIG_MACH_DAVINCI_DM368_BIP +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_DAVINCI_DM368_BIP +# endif +# define machine_is_davinci_dm368_bip() (machine_arch_type == MACH_TYPE_DAVINCI_DM368_BIP) +#else +# define machine_is_davinci_dm368_bip() (0) +#endif + +#ifdef CONFIG_MACH_ESHARE +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ESHARE +# endif +# define machine_is_eshare() (machine_arch_type == MACH_TYPE_ESHARE) +#else +# define machine_is_eshare() (0) +#endif + +#ifdef CONFIG_MACH_HW_OMAPL138_EUROPA +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_HW_OMAPL138_EUROPA +# endif +# define machine_is_hw_omapl138_europa() (machine_arch_type == MACH_TYPE_HW_OMAPL138_EUROPA) +#else +# define machine_is_hw_omapl138_europa() (0) +#endif + +#ifdef CONFIG_MACH_WLBARGN +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_WLBARGN +# endif +# define machine_is_wlbargn() (machine_arch_type == MACH_TYPE_WLBARGN) +#else +# define machine_is_wlbargn() (0) +#endif + +#ifdef CONFIG_MACH_BM170 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_BM170 +# endif +# define machine_is_bm170() (machine_arch_type == MACH_TYPE_BM170) +#else +# define machine_is_bm170() (0) +#endif + +#ifdef CONFIG_MACH_NETSPACE_MINI_V2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NETSPACE_MINI_V2 +# endif +# define machine_is_netspace_mini_v2() (machine_arch_type == MACH_TYPE_NETSPACE_MINI_V2) +#else +# define machine_is_netspace_mini_v2() (0) +#endif + +#ifdef CONFIG_MACH_NETSPACE_PLUG_V2 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_NETSPACE_PLUG_V2 +# endif +# define machine_is_netspace_plug_v2() (machine_arch_type == MACH_TYPE_NETSPACE_PLUG_V2) +#else +# define machine_is_netspace_plug_v2() (0) +#endif + +#ifdef CONFIG_MACH_SIEMENS_L1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SIEMENS_L1 +# endif +# define machine_is_siemens_l1() (machine_arch_type == MACH_TYPE_SIEMENS_L1) +#else +# define machine_is_siemens_l1() (0) +#endif + +#ifdef CONFIG_MACH_ELV_LCU1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_ELV_LCU1 +# endif +# define machine_is_elv_lcu1() (machine_arch_type == MACH_TYPE_ELV_LCU1) +#else +# define machine_is_elv_lcu1() (0) +#endif + +#ifdef CONFIG_MACH_MCU1 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_MCU1 +# endif +# define machine_is_mcu1() (machine_arch_type == MACH_TYPE_MCU1) +#else +# define machine_is_mcu1() (0) +#endif + +#ifdef CONFIG_MACH_OMAP3_TAO3530 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP3_TAO3530 +# endif +# define machine_is_omap3_tao3530() (machine_arch_type == MACH_TYPE_OMAP3_TAO3530) +#else +# define machine_is_omap3_tao3530() (0) +#endif + +#ifdef CONFIG_MACH_OMAP3_PCUTOUCH +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP3_PCUTOUCH +# endif +# define machine_is_omap3_pcutouch() (machine_arch_type == MACH_TYPE_OMAP3_PCUTOUCH) +#else +# define machine_is_omap3_pcutouch() (0) +#endif + +#ifdef CONFIG_MACH_SMDKC210 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SMDKC210 +# endif +# define machine_is_smdkc210() (machine_arch_type == MACH_TYPE_SMDKC210) +#else +# define machine_is_smdkc210() (0) +#endif + +#ifdef CONFIG_MACH_OMAP3_BRAILLO +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_OMAP3_BRAILLO +# endif +# define machine_is_omap3_braillo() (machine_arch_type == MACH_TYPE_OMAP3_BRAILLO) +#else +# define machine_is_omap3_braillo() (0) +#endif + +#ifdef CONFIG_MACH_SPYPLUG +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_SPYPLUG +# endif +# define machine_is_spyplug() (machine_arch_type == MACH_TYPE_SPYPLUG) +#else +# define machine_is_spyplug() (0) +#endif + +#ifdef CONFIG_MACH_GINGER +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_GINGER +# endif +# define machine_is_ginger() (machine_arch_type == MACH_TYPE_GINGER) +#else +# define machine_is_ginger() (0) +#endif + +#ifdef CONFIG_MACH_TNY_T3530 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_TNY_T3530 +# endif +# define machine_is_tny_t3530() (machine_arch_type == MACH_TYPE_TNY_T3530) +#else +# define machine_is_tny_t3530() (0) +#endif + +#ifdef CONFIG_MACH_PCA102 +# ifdef machine_arch_type +# undef machine_arch_type +# define machine_arch_type __machine_arch_type +# else +# define machine_arch_type MACH_TYPE_PCA102 +# endif +# define machine_is_pca102() (machine_arch_type == MACH_TYPE_PCA102) +#else +# define machine_is_pca102() (0) +#endif + /* * These have not yet been registered */