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Makefile: socfpga: Add target to generate hex output for combined spl and dtb

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Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel
SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex"
is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It
combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to
generate the final configuration bitstream for Intel SOCFPGA SOC64
devices.

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
This commit is contained in:
Dalon Westergreen
2021-03-01 20:04:16 +08:00
committed by Ley Foon Tan
parent 8a3244d0ba
commit 9773ebcfbc
3 changed files with 14 additions and 6 deletions
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2
include/configs/socfpga_soc64_common.h
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@@ -194,7 +194,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
* 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
*
*/
#define CONFIG_SPL_TARGET "spl/u-boot-spl.hex"
#define CONFIG_SPL_TARGET "spl/u-boot-spl-dtb.hex"
#define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE
#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */