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nxp: Migrate a number of DDR related symbols to Kconfig

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- Guard most of the options in drivers/ddr/fsl/Kconfig with
  SYS_FSL_DDR || SYS_FSL_MMDC.
- Migrate FSL_DMA, DDR_ECC, DDR_ECC_CMD, and ECC_INIT_VIA_DDRCONTROLLER
  to Kconfig.
- Clean up the logic for including the DDR_ECC_CMD code.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2021-08-21 13:50:18 -04:00
parent efb5dab7ba
commit 95372165ae
159 changed files with 262 additions and 91 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
include/configs/MPC8349EMDS.h
View File

@@ -22,8 +22,6 @@
/*
* DDR Setup
*/
#define CONFIG_DDR_ECC /* support DDR ECC function */
#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
/*
@@ -35,7 +33,6 @@
#define SPD_EEPROM_ADDRESS2 0x51
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/

3
include/configs/MPC8349EMDS_SDRAM.h
View File

@@ -22,8 +22,6 @@
/*
* DDR Setup
*/
#define CONFIG_DDR_ECC /* support DDR ECC function */
#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
/*
@@ -35,7 +33,6 @@
#define SPD_EEPROM_ADDRESS2 0x51
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/

3
include/configs/MPC837XERDB.h
View File

@@ -66,9 +66,6 @@
#define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN)
#undef CONFIG_DDR_ECC /* support DDR ECC function */
#undef CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
#undef CONFIG_NEVER_ASSERT_ODT_TO_CPU /* Never assert ODT to internal IOs */
/*

1
include/configs/MPC8540ADS.h
View File

@@ -62,7 +62,6 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
#define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef

3
include/configs/MPC8548CDS.h
View File

@@ -45,10 +45,7 @@ extern unsigned long get_clock_freq(void);
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
#define CONFIG_DDR_SPD
#define CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/

1
include/configs/MPC8560ADS.h
View File

@@ -62,7 +62,6 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
#define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef

1
include/configs/P1010RDB.h
View File

@@ -167,7 +167,6 @@
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS 0x52

2
include/configs/P2041RDB.h
View File

@@ -101,8 +101,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x52
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */

3
include/configs/T102xRDB.h
View File

@@ -145,9 +145,7 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -180,7 +178,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#if defined(CONFIG_TARGET_T1024RDB)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */

4
include/configs/T104xRDB.h
View File

@@ -172,9 +172,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -210,8 +208,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51

3
include/configs/T208xQDS.h
View File

@@ -101,9 +101,7 @@
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -139,7 +137,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */
#define SPD_EEPROM_ADDRESS1 0x51

3
include/configs/T208xRDB.h
View File

@@ -90,9 +90,7 @@
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -128,7 +126,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */
#define SPD_EEPROM_ADDRESS1 0x51

5
include/configs/T4240RDB.h
View File

@@ -50,8 +50,6 @@
#endif
#endif /* CONFIG_RAMBOOT_PBL */
#define CONFIG_DDR_ECC
/* High Level Configuration Options */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
@@ -72,7 +70,6 @@
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -102,8 +99,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_DDR_SPD
/*
* IFC Definitions
*/

4
include/configs/corenet_ds.h
View File

@@ -73,9 +73,7 @@
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -114,8 +112,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52

2
include/configs/k2e_evm.h
View File

@@ -47,6 +47,4 @@
#define CONFIG_KSNET_CPSW_NUM_PORTS 9
#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
#define CONFIG_DDR_SPD
#endif /* __CONFIG_K2E_EVM_H */

2
include/configs/k2hk_evm.h
View File

@@ -46,6 +46,4 @@
#define CONFIG_KSNET_NETCP_V1_0
#define CONFIG_KSNET_CPSW_NUM_PORTS 5
#define CONFIG_DDR_SPD
#endif /* __CONFIG_K2HK_EVM_H */

2
include/configs/km/pg-wcom-ls102xa.h
View File

@@ -36,8 +36,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x54

2
include/configs/kmcent2.h
View File

@@ -181,8 +181,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x54
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */

2
include/configs/kontron_sl28.h
View File

@@ -16,8 +16,6 @@
#endif
/* DDR */
#define CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define CONFIG_VERY_BIG_RAM

3
include/configs/ls1021aqds.h
View File

@@ -79,7 +79,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_MONITOR_LEN 0x80000
#endif
#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
@@ -92,9 +91,7 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif

3
include/configs/ls1043aqds.h
View File

@@ -22,13 +22,10 @@ unsigned long get_board_sys_clk(void);
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif

1
include/configs/ls1043ardb.h
View File

@@ -20,7 +20,6 @@
#ifndef CONFIG_SPL
#define CONFIG_SYS_DDR_RAW_TIMING
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif

3
include/configs/ls1046aqds.h
View File

@@ -22,13 +22,10 @@ unsigned long get_board_sys_clk(void);
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif

3
include/configs/ls1046ardb.h
View File

@@ -17,12 +17,9 @@
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#ifdef CONFIG_SD_BOOT

3
include/configs/ls1088aqds.h
View File

@@ -32,9 +32,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_DDR_SPD
#define CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0

3
include/configs/ls1088ardb.h
View File

@@ -20,12 +20,9 @@
#define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
#define CONFIG_DDR_SPD
#ifdef CONFIG_EMU
#define CONFIG_SYS_FSL_DDR_EMU
#else
#define CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#define SPD_EEPROM_ADDRESS 0x51

3
include/configs/ls2080aqds.h
View File

@@ -22,9 +22,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
#define CONFIG_DDR_SPD
#define CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52

3
include/configs/ls2080ardb.h
View File

@@ -38,9 +38,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
#define CONFIG_DDR_SPD
#define CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52

3
include/configs/lx2160a_common.h
View File

@@ -29,9 +29,6 @@
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL
#define CONFIG_DDR_SPD
#define CONFIG_DDR_ECC
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51

1
include/configs/p1_p2_rdb_pc.h
View File

@@ -178,7 +178,6 @@
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS 0x52

2
include/configs/socrates.h
View File

@@ -57,9 +57,7 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#define CONFIG_DDR_SPD
#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000