From df3d5f9e410cb7a4936fd8d78b9f7f751b7e130a Mon Sep 17 00:00:00 2001 From: JaimeLiao Date: Mon, 4 Jul 2022 14:12:39 +0800 Subject: [PATCH 1/8] mtd: spi-nor: add support for Macronix Octal flash Follow patch (Allow using Micron mt35xu512aba in Octal DTR mode). Enable Octal DTR mode with 20 dummy cycles to allow running at the maximum supported frequency for adding Macronix flash in Octal DTR mode. -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf Signed-off-by: JaimeLiao Reviewed-by: Jagan Teki --- drivers/mtd/spi/spi-nor-core.c | 82 ++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 10 +++++ 2 files changed, 92 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 3b7c817c02..5d319e4c0f 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3526,6 +3526,84 @@ static struct spi_nor_fixups mt35xu512aba_fixups = { }; #endif /* CONFIG_SPI_FLASH_MT35XU */ +#if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX) +/** + * spi_nor_macronix_octal_dtr_enable() - Enable octal DTR on Macronix flashes. + * @nor: pointer to a 'struct spi_nor' + * + * Set Macronix max dummy cycles 20 to allow the flash to run at fastest frequency. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_macronix_octal_dtr_enable(struct spi_nor *nor) +{ + struct spi_mem_op op; + int ret; + u8 buf; + + ret = write_enable(nor); + if (ret) + return ret; + + buf = SPINOR_REG_MXIC_DC_20; + op = (struct spi_mem_op) + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_CR2, 1), + SPI_MEM_OP_ADDR(4, SPINOR_REG_MXIC_CR2_DC, 1), + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_OUT(1, &buf, 1)); + + ret = spi_mem_exec_op(nor->spi, &op); + if (ret) + return ret; + + ret = spi_nor_wait_till_ready(nor); + if (ret) + return ret; + + nor->read_dummy = MXIC_MAX_DC; + ret = write_enable(nor); + if (ret) + return ret; + + buf = SPINOR_REG_MXIC_OPI_DTR_EN; + op = (struct spi_mem_op) + SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_CR2, 1), + SPI_MEM_OP_ADDR(4, SPINOR_REG_MXIC_CR2_MODE, 1), + SPI_MEM_OP_NO_DUMMY, + SPI_MEM_OP_DATA_OUT(1, &buf, 1)); + + ret = spi_mem_exec_op(nor->spi, &op); + if (ret) { + dev_err(nor->dev, "Failed to enable octal DTR mode\n"); + return ret; + } + nor->reg_proto = SNOR_PROTO_8_8_8_DTR; + + return 0; +} + +static void macronix_octal_default_init(struct spi_nor *nor) +{ + nor->octal_dtr_enable = spi_nor_macronix_octal_dtr_enable; +} + +static void macronix_octal_post_sfdp_fixup(struct spi_nor *nor, + struct spi_nor_flash_parameter *params) +{ + /* + * Adding SNOR_HWCAPS_PP_8_8_8_DTR in hwcaps.mask when + * SPI_NOR_OCTAL_DTR_READ flag exists. + */ + if (params->hwcaps.mask & SNOR_HWCAPS_READ_8_8_8_DTR) + params->hwcaps.mask |= SNOR_HWCAPS_PP_8_8_8_DTR; +} + +static struct spi_nor_fixups macronix_octal_fixups = { + .default_init = macronix_octal_default_init, + .post_sfdp = macronix_octal_post_sfdp_fixup, +}; +#endif /* CONFIG_SPI_FLASH_MACRONIX */ + /** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed * @nor: pointer to a 'struct spi_nor' * @@ -3696,6 +3774,10 @@ void spi_nor_set_fixups(struct spi_nor *nor) if (!strcmp(nor->info->name, "mt35xu512aba")) nor->fixups = &mt35xu512aba_fixups; #endif + +#if CONFIG_IS_ENABLED(SPI_FLASH_MACRONIX) + nor->fixups = ¯onix_octal_fixups; +#endif /* SPI_FLASH_MACRONIX */ } int spi_nor_scan(struct spi_nor *nor) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 4ceeae623d..c76235d701 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -119,6 +119,16 @@ /* Used for Macronix and Winbond flashes. */ #define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */ #define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */ +#define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */ +#define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */ +#define SPINOR_OP_RD_CR2 0x71 /* Read configuration register 2 */ +#define SPINOR_OP_WR_CR2 0x72 /* Write configuration register 2 */ +#define SPINOR_OP_MXIC_DTR_RD 0xee /* Fast Read opcode in DTR mode */ +#define SPINOR_REG_MXIC_CR2_MODE 0x00000000 /* For setting octal DTR mode */ +#define SPINOR_REG_MXIC_OPI_DTR_EN 0x2 /* Enable Octal DTR */ +#define SPINOR_REG_MXIC_CR2_DC 0x00000300 /* For setting dummy cycles */ +#define SPINOR_REG_MXIC_DC_20 0x0 /* Setting dummy cycles to 20 */ +#define MXIC_MAX_DC 20 /* Maximum value of dummy cycles */ /* Used for Spansion flashes only. */ #define SPINOR_OP_BRWR 0x17 /* Bank register write */ From 68ad73b70c7c8f792a2f3a75da49dee343051bf8 Mon Sep 17 00:00:00 2001 From: JaimeLiao Date: Mon, 4 Jul 2022 14:12:40 +0800 Subject: [PATCH 2/8] mtd: spi-nor-core: Adding different type of command extension in Soft Reset Power-on-Reset is a method to restore flash back to 1S-1S-1S mode from 8D-8D-8D in the begging of probe. Command extension type is not standardized across flash vendors in DTR mode. For suiting different vendor flash devices, adding a flag to seperate types for soft reset on boot. Signed-off-by: JaimeLiao Reviewed-by: Jagan Teki --- drivers/mtd/spi/Kconfig | 7 +++++++ drivers/mtd/spi/spi-nor-core.c | 7 ++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index f83876c576..096338f27b 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -97,6 +97,13 @@ config SPI_FLASH_SMART_HWCAPS can support a type of operation in a much more refined way compared to using flags like SPI_RX_DUAL, SPI_TX_QUAD, etc. +config SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT + bool "Command extension type is INVERT for Software Reset on boot" + default n + help + Because of SFDP information can not be get before boot. + So define command extension type is INVERT when Software Reset on boot only. + config SPI_FLASH_SOFT_RESET bool "Software Reset support for SPI NOR flashes" help diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 5d319e4c0f..50460feaf8 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3697,7 +3697,12 @@ static int spi_nor_soft_reset(struct spi_nor *nor) enum spi_nor_cmd_ext ext; ext = nor->cmd_ext_type; - nor->cmd_ext_type = SPI_NOR_EXT_REPEAT; + if (nor->cmd_ext_type == SPI_NOR_EXT_NONE) { + nor->cmd_ext_type = SPI_NOR_EXT_REPEAT; +#if CONFIG_IS_ENABLED(SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT) + nor->cmd_ext_type = SPI_NOR_EXT_INVERT; +#endif /* SPI_NOR_BOOT_SOFT_RESET_EXT_INVERT */ + } op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), SPI_MEM_OP_NO_DUMMY, From bebdc237507caa177dee9bfa9af4105d91ddc670 Mon Sep 17 00:00:00 2001 From: JaimeLiao Date: Mon, 4 Jul 2022 14:12:41 +0800 Subject: [PATCH 3/8] mtd: spi-nor: Parse SFDP SCCR Map Parse SCCR 22nd dword and check DTR Octal Mode Enable Volatile bit for Octal DTR enable Signed-off-by: JaimeLiao Reviewed-by: Jagan Teki --- drivers/mtd/spi/spi-nor-core.c | 52 ++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h | 1 + 2 files changed, 53 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 50460feaf8..1ff34cc317 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -65,6 +65,10 @@ struct sfdp_parameter_header { #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */ #define SFDP_SST_ID 0x01bf /* Manufacturer specific Table */ #define SFDP_PROFILE1_ID 0xff05 /* xSPI Profile 1.0 Table */ +#define SFDP_SCCR_MAP_ID 0xff87 /* + * Status, Control and Configuration + * Register Map. + */ #define SFDP_SIGNATURE 0x50444653U #define SFDP_JESD216_MAJOR 1 @@ -174,6 +178,9 @@ struct sfdp_header { #define PROFILE1_DWORD5_DUMMY_100MHZ GENMASK(11, 7) #define PROFILE1_DUMMY_DEFAULT 20 +/* Status, Control and Configuration Register Map(SCCR) */ +#define SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE BIT(31) + struct sfdp_bfpt { u32 dwords[BFPT_DWORD_MAX]; }; @@ -2456,6 +2463,44 @@ out: return ret; } +/** + * spi_nor_parse_sccr() - Parse the Status, Control and Configuration Register + * Map. + * @nor: pointer to a 'struct spi_nor' + * @sccr_header: pointer to the 'struct sfdp_parameter_header' describing + * the SCCR Map table length and version. + * + * Return: 0 on success, -errno otherwise. + */ +static int spi_nor_parse_sccr(struct spi_nor *nor, + const struct sfdp_parameter_header *sccr_header) +{ + u32 *table, addr; + size_t len; + int ret, i; + + len = sccr_header->length * sizeof(*table); + table = kmalloc(len, GFP_KERNEL); + if (!table) + return -ENOMEM; + + addr = SFDP_PARAM_HEADER_PTP(sccr_header); + ret = spi_nor_read_sfdp(nor, addr, len, table); + if (ret) + goto out; + + /* Fix endianness of the table DWORDs. */ + for (i = 0; i < sccr_header->length; i++) + table[i] = le32_to_cpu(table[i]); + + if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE, table[22])) + nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE; + +out: + kfree(table); + return ret; +} + /** * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters. * @nor: pointer to a 'struct spi_nor' @@ -2562,6 +2607,10 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor, err = spi_nor_parse_profile1(nor, param_header, params); break; + case SFDP_SCCR_MAP_ID: + err = spi_nor_parse_sccr(nor, param_header); + break; + default: break; } @@ -3620,6 +3669,9 @@ static int spi_nor_octal_dtr_enable(struct spi_nor *nor) nor->write_proto == SNOR_PROTO_8_8_8_DTR)) return 0; + if (!(nor->flags & SNOR_F_IO_MODE_EN_VOLATILE)) + return 0; + ret = nor->octal_dtr_enable(nor); if (ret) return ret; diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index c76235d701..ba98ad467f 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -290,6 +290,7 @@ enum spi_nor_option_flags { SNOR_F_USE_CLSR = BIT(5), SNOR_F_BROKEN_RESET = BIT(6), SNOR_F_SOFT_RESET = BIT(7), + SNOR_F_IO_MODE_EN_VOLATILE = BIT(8), }; struct spi_nor; From cd2f9031e492ca03d2baddce0f7506036e9f2124 Mon Sep 17 00:00:00 2001 From: Vaishnav Achath Date: Mon, 9 May 2022 14:03:32 +0530 Subject: [PATCH 4/8] spl: spl_spi: add spi_nor_remove() to soft reset flash On probe, the SPI NOR core will put a flash in 8D mode if it supports it. But Linux as of now expects to get the flash in 1S mode. Handing the flash to Linux in Octal DTR mode means the kernel will fail to detect the flash. This commit adds an option to soft reset the flash after spl_spi_load_image() so that the flash can be reset to 1S mode and subsequent spi-nor probe in Linux does not fail, since spl_spi_load_image() performs spi_flash_probe() the remove is added after completion loading images in spi_flash_probe() itself. Tested on J721E EVM with 5.10 Linux kernel. Linux spi-nor probe without the fix: root@j7-evm:~# dmesg | grep spi-nor [ 4.928023] spi-nor spi0.0: unrecognized JEDEC id bytes: ff ff ff ff ff ff [ 4.934938] spi-nor: probe of spi0.0 failed with error -2 Linux spi-nor probe with the fix: root@j7-evm:~# dmesg | grep spi-nor [ 4.904484] spi-nor spi0.0: mt35xu512aba (65536 Kbytes) Signed-off-by: Vaishnav Achath Acked-by: Jagan Teki --- common/spl/spl_spi.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index 3eef2f8d68..d959ad1145 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -172,6 +172,11 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, spl_image->size, (void *)spl_image->load_addr); } + if (IS_ENABLED(CONFIG_SPI_FLASH_SOFT_RESET)) { + err = spi_nor_remove(flash); + if (err) + return err; + } } return err; From 513c6071ce73d026bb87a4db009e4bfc28e93df3 Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Wed, 2 Mar 2022 15:01:55 +0100 Subject: [PATCH 5/8] mtd: spi: Convert is_locked callback to is_unlocked There was no user of this callback after 5b66fdb29dc3 anymore, and its semantic as now inconsistent between stm and sst26. What we need for the upcoming new usecase is a "completely unlocked" semantic. So consolidate over this. Signed-off-by: Jan Kiszka Acked-by: Jagan Teki --- drivers/mtd/spi/spi-nor-core.c | 26 +++++++++++++------------- include/linux/mtd/spi-nor.h | 6 +++--- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 1ff34cc317..8a226a7af5 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1315,13 +1315,13 @@ static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) } /* - * Check if a region of the flash is (completely) locked. See stm_lock() for + * Check if a region of the flash is (completely) unlocked. See stm_lock() for * more info. * - * Returns 1 if entire region is locked, 0 if any portion is unlocked, and + * Returns 1 if entire region is unlocked, 0 if any portion is locked, and * negative on errors. */ -static int stm_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) +static int stm_is_unlocked(struct spi_nor *nor, loff_t ofs, uint64_t len) { int status; @@ -1329,7 +1329,7 @@ static int stm_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) if (status < 0) return status; - return stm_is_locked_sr(nor, ofs, len, status); + return stm_is_unlocked_sr(nor, ofs, len, status); } #endif /* CONFIG_SPI_FLASH_STMICRO */ @@ -1562,16 +1562,16 @@ static int sst26_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) } /* - * Returns EACCES (positive value) if region is locked, 0 if region is unlocked, - * and negative on errors. + * Returns EACCES (positive value) if region is (partially) locked, 0 if region + * is completely unlocked, and negative on errors. */ -static int sst26_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) +static int sst26_is_unlocked(struct spi_nor *nor, loff_t ofs, uint64_t len) { /* - * is_locked function is used for check before reading or erasing flash - * region, so offset and length might be not 64k allighned, so adjust - * them to be 64k allighned as sst26_lock_ctl works only with 64k - * allighned regions. + * is_unlocked function is used for check before reading or erasing + * flash region, so offset and length might be not 64k aligned, so + * adjust them to be 64k aligned as sst26_lock_ctl works only with 64k + * aligned regions. */ ofs -= ofs & (SZ_64K - 1); len = len & (SZ_64K - 1) ? (len & ~(SZ_64K - 1)) + SZ_64K : len; @@ -3924,7 +3924,7 @@ int spi_nor_scan(struct spi_nor *nor) info->flags & SPI_NOR_HAS_LOCK) { nor->flash_lock = stm_lock; nor->flash_unlock = stm_unlock; - nor->flash_is_locked = stm_is_locked; + nor->flash_is_unlocked = stm_is_unlocked; } #endif @@ -3936,7 +3936,7 @@ int spi_nor_scan(struct spi_nor *nor) if (info->flags & SPI_NOR_HAS_SST26LOCK) { nor->flash_lock = sst26_lock; nor->flash_unlock = sst26_unlock; - nor->flash_is_locked = sst26_is_locked; + nor->flash_is_unlocked = sst26_is_unlocked; } #endif diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index ba98ad467f..2595bad9df 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -517,8 +517,8 @@ struct spi_flash { * spi-nor will send the erase opcode via write_reg() * @flash_lock: [FLASH-SPECIFIC] lock a region of the SPI NOR * @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR - * @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is - * completely locked + * @flash_is_unlocked: [FLASH-SPECIFIC] check if a region of the SPI NOR is + * completely unlocked * @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode * @octal_dtr_enable: [FLASH-SPECIFIC] enables SPI NOR octal DTR mode. * @ready: [FLASH-SPECIFIC] check if the flash is ready @@ -567,7 +567,7 @@ struct spi_nor { int (*flash_lock)(struct spi_nor *nor, loff_t ofs, uint64_t len); int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len); - int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len); + int (*flash_is_unlocked)(struct spi_nor *nor, loff_t ofs, uint64_t len); int (*quad_enable)(struct spi_nor *nor); int (*octal_dtr_enable)(struct spi_nor *nor); int (*ready)(struct spi_nor *nor); From f3a56dda880af44dac87b1a60c44ebb7c079c329 Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Wed, 2 Mar 2022 15:01:56 +0100 Subject: [PATCH 6/8] sf: Query write-protection status before operating the flash Do not suggest successful operation if a flash area to be changed is actually locked, thus will not execute the request. Rather report an error and bail out. That's way more user-friendly than asking them to manually check for this case. Derived from original patch by Chao Zeng. Signed-off-by: Jan Kiszka Acked-by: Jagan Teki --- cmd/sf.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/cmd/sf.c b/cmd/sf.c index 8713736b2a..cd50b38081 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -294,6 +294,12 @@ static int do_spi_flash_read_write(int argc, char *const argv[]) return 1; } + if (strncmp(argv[0], "read", 4) != 0 && flash->flash_is_unlocked && + !flash->flash_is_unlocked(flash, offset, len)) { + printf("ERROR: flash area is locked\n"); + return 1; + } + buf = map_physmem(addr, len, MAP_WRBACK); if (!buf && addr) { puts("Failed to map physical memory\n"); @@ -350,6 +356,12 @@ static int do_spi_flash_erase(int argc, char *const argv[]) return 1; } + if (flash->flash_is_unlocked && + !flash->flash_is_unlocked(flash, offset, len)) { + printf("ERROR: flash area is locked\n"); + return 1; + } + ret = spi_flash_erase(flash, offset, size); printf("SF: %zu bytes @ %#x Erased: ", (size_t)size, (u32)offset); if (ret) From 4290ed7835e0a76792b8e554ae79e3f6d52ac800 Mon Sep 17 00:00:00 2001 From: JaimeLiao Date: Mon, 18 Jul 2022 14:49:22 +0800 Subject: [PATCH 7/8] mtd: spi-nor-core: Add support for Macronix Octal flash Adding Macronix Octal flash for Octal DTR support. The octaflash series can be divided into the following types: MX25 series : Serial NOR Flash. MX66 series : Serial NOR Flash with stacked die.(Size larger than 1Gb) LM/UM series : Up to 250MHz clock frequency with both DTR/STR operation. LW/UW series : Support simultaneous Read-while-Write operation in multiple bank architecture. Read-while-write feature which means read data one bank while another bank is programing or erasing. MX25LM : 3.0V Octal I/O -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7841/MX25LM51245G,%203V,%20512Mb,%20v1.1.pdf MX25UM : 1.8V Octal I/O -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7525/MX25UM51245G%20Extreme%20Speed,%201.8V,%20512Mb,%20v1.0.pdf MX66LM : 3.0V Octal I/O with stacked die -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7929/MX66LM1G45G,%203V,%201Gb,%20v1.1.pdf MX66UM : 1.8V Octal I/O with stacked die -https://www.mxic.com.tw/Lists/Datasheet/Attachments/7721/MX66UM1G45G,%201.8V,%201Gb,%20v1.1.pdf MX25LW : 3.0V Octal I/O with Read-while-Write MX25UW : 1.8V Octal I/O with Read-while-Write MX66LW : 3.0V Octal I/O with Read-while-Write and stack die MX66UW : 1.8V Octal I/O with Read-while-Write and stack die About LW/UW series, please contact us freely if you have any questions. For adding Octal NOR Flash IDs, we have validated each Flash on plateform zynq-picozed. As below are the SFDP table dump. zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2943c zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66uw2g345gx0 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66uw2g345gx0 zynq> hexdump mx66uw2g345gx0 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 7fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7987 0001 1284 e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 001f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2853b zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66lm1g45g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66lm1g45g zynq> hexdump mx66lm1g45g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 3fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 6987 0001 1282 e200 02cc 3867 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 6666 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 3514 001c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2853a zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25lm51245g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25lm51245g zynq> hexdump mx25lm51245g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7989 0001 128d e200 02cc 4467 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 6666 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 3514 001c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2863a zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25lw51245g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25lw51245g zynq> hexdump mx25lw51245g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 0000 0000 0000 0000 0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 6666 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 3514 001c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28539 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25lm25645g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25lm25645g zynq> hexdump mx25lm25645g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 6987 0001 1282 d200 02cc 3867 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 6666 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 3514 001c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2843c zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66uw2g345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66uw2g345g zynq> hexdump mx66uw2g345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 7fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7987 0001 1284 e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 001f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2803b zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66um1g45g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66um1g45g zynq> hexdump mx66um1g45g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 3fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7989 0001 128d e200 02cc 4467 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 3514 809c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2813b zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx66uw1g45g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx66uw1g45g zynq> hexdump mx66uw1g45g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 3fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2813a zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw51245g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw51245g zynq> hexdump mx25uw51245g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 7777 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0000 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c2843a zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw51345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw51345g zynq> hexdump mx25uw51345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 1fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f e200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28039 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25um25645g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25um25645g zynq> random: fast init done zynq> hexdump mx25um25645g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7987 0001 1284 d200 02cc 3867 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 3514 809c 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28139 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw25645g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw25645g zynq> hexdump mx25uw25645g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7989 0001 128d d200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28339 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25um25345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25um25345g zynq> hexdump mx25um25345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 6987 0001 1282 d200 02cc 3867 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0904 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28439 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw25345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw25345g zynq> hexdump mx25uw25345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 0fff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7987 0001 1284 d200 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28138 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw12845g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw12845g zynq> hexdump mx25uw12845g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 0000 0000 0000 0000 0000040 20e5 ff8a ffff 07ff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f c900 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28438 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw12345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw12345g zynq> hexdump mx25uw12345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 07ff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f c900 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28137 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw6445g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw6445g zynq> hexdump mx25uw6445g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 03ff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 7989 0001 128d c400 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 a37c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c28437 zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer macronix zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/partname mx25uw6345g zynq> cat /sys/bus/spi/devices/spi0.0/spi-nor/sfdp > mx25uw6345g zynq> hexdump mx25uw6345g 0000000 4653 5044 0108 fd04 0700 1401 0040 ff00 0000010 0187 1c01 0090 ff00 000a 0801 0100 ff00 0000020 0005 0501 0120 ff00 0084 0201 0134 ff00 0000030 0000 0000 0000 0000 ffff ffff ffff ffff 0000040 20e5 ff8a ffff 03ff ff00 ff00 ff00 ff00 0000050 ffee ffff ffff ff00 ffff ff00 200c d810 0000060 ff00 ff00 798b 0001 128f c400 04cc 4667 0000070 b030 b030 bdf4 5cd5 0000 ff00 1010 2000 0000080 0000 0000 0000 237c 0048 0000 0000 8888 0000090 0000 0000 0000 4000 d10f f3ff d10f f3ff 00000a0 0500 9000 0500 b100 2b00 9500 2b00 9600 00000b0 7172 b803 7172 b803 0000 0000 a390 8218 00000c0 c000 9669 0000 0000 0000 0000 7172 9800 00000d0 7172 b800 7172 9900 0000 0000 7172 9800 00000e0 7172 f800 7172 9900 7172 f900 0000 0000 00000f0 0000 0000 1501 d001 7172 d806 0000 5086 0000100 0000 0106 0000 0000 0002 0301 0200 0000 0000110 0000 0106 0000 0000 0000 0672 0200 0000 0000120 ee00 69c0 7272 7171 d800 f6f7 0a00 0000 0000130 4514 8098 0643 000f dc21 ffff ffff ffff 0000140 ffff ffff ffff ffff ffff ffff ffff ffff Signed-off-by: JaimeLiao Reviewed-by: Jagan Teki --- drivers/mtd/spi/spi-nor-ids.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 67278c40e3..760019672a 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -198,7 +198,24 @@ const struct flash_info spi_nor_ids[] = { { INFO("mx66l2g45g", 0xc2201c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, { INFO("mx25l1633e", 0xc22415, 0, 64 * 1024, 32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) }, { INFO("mx25r6435f", 0xc22817, 0, 64 * 1024, 128, SECT_4K) }, - { INFO("mx66uw2g345g", 0xc2943c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx66uw2g345gx0", 0xc2943c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx66lm1g45g", 0xc2853b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25lm51245g", 0xc2853a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25lw51245g", 0xc2863a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25lm25645g", 0xc28539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx66uw2g345g", 0xc2843c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx66um1g45g", 0xc2803b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx66uw1g45g", 0xc2813b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25uw51245g", 0xc2813a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25uw51345g", 0xc2843a, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25um25645g", 0xc28039, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25uw25645g", 0xc28139, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25um25345g", 0xc28339, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25uw25345g", 0xc28439, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25uw12845g", 0xc28138, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25uw12345g", 0xc28438, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25uw6445g", 0xc28137, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, + { INFO("mx25uw6345g", 0xc28437, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_OCTAL_DTR_READ | SPI_NOR_4B_OPCODES) }, #endif #ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ From 47ed8b22fd561b65e8541919becc76ab3d86f7a3 Mon Sep 17 00:00:00 2001 From: Jae Hyun Yoo Date: Fri, 8 Jul 2022 12:03:19 -0700 Subject: [PATCH 8/8] mtd: spi-nor-ids: add winbond w25q512nw family support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add Winbond w25q512nwq/n and w25q512nwm support. datasheet: https://www.winbond.com/resource-files/W25Q512NW%20RevB%2007192021.pdf Signed-off-by: Jae Hyun Yoo Reviewed-by: Cédric Le Goater Reviewed-by: Jagan Teki --- drivers/mtd/spi/spi-nor-ids.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c index 760019672a..4fe8b0d92c 100644 --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c @@ -414,6 +414,16 @@ const struct flash_info spi_nor_ids[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, + { + INFO("w25q512nwq", 0xef6020, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, + { + INFO("w25q512nwm", 0xef8020, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) + }, { INFO("w25q01jv", 0xef4021, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |