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ARM: Migrate errata to Kconfig

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This moves all of the current ARM errata from various header files and in to
Kconfig.  This allows for a minor amount of cleanup as we had some instances
where both a general common header file was enabling errata as well as the
board config.  We now just select these once at the higher level in Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2017-03-07 07:13:42 -05:00
parent 0f12f10117
commit 8dda2e2f9e
25 changed files with 85 additions and 122 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
include/configs/am3517_crane.h
View File

@@ -18,10 +18,6 @@
*/
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP3_AM3517CRANE 1 /* working with CRANEBOARD */
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_EMIF4 /* The chip has EMIF4 controller */

5
include/configs/am3517_evm.h
View File

@@ -19,11 +19,6 @@
#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
/*

4
include/configs/arndale.h
View File

@@ -47,10 +47,6 @@
/* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */
#define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000
/* CPU Errata */
#define CONFIG_ARM_ERRATA_773022
#define CONFIG_ARM_ERRATA_774769
/* Power */
#define CONFIG_POWER
#define CONFIG_POWER_I2C

4
include/configs/cm_t35.h
View File

@@ -25,10 +25,6 @@
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP_GPIO
#define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_SDRC /* The chip has SDRC controller */

4
include/configs/cm_t3517.h
View File

@@ -15,10 +15,6 @@
*/
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_CM_T3517 /* working with CM-T3517 */
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_SYS_TEXT_BASE 0x80008000

4
include/configs/mcx.h
View File

@@ -15,10 +15,6 @@
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP3_MCX /* working with mcx */
#define CONFIG_OMAP_GPIO
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_MACH_TYPE MACH_TYPE_MCX

5
include/configs/mx6_common.h
View File

@@ -8,11 +8,6 @@
#define __MX6_COMMON_H
#ifndef CONFIG_MX6UL
#define CONFIG_ARM_ERRATA_743622
#define CONFIG_ARM_ERRATA_751472
#define CONFIG_ARM_ERRATA_794072
#define CONFIG_ARM_ERRATA_761320
#ifndef CONFIG_SYS_L2CACHE_OFF
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE L2_PL310_BASE

4
include/configs/nokia_rx51.h
View File

@@ -27,10 +27,6 @@
#define CONFIG_OMAP3430 /* which is in a 3430 */
#define CONFIG_OMAP3_RX51 /* working with RX51 */
#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51

4
include/configs/omap3_evm.h
View File

@@ -85,10 +85,6 @@
*/
#define CONFIG_OMAP /* This is TI OMAP core */
#define CONFIG_OMAP_GPIO
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_SDRC /* The chip has SDRC controller */

3
include/configs/sniper.h
View File

@@ -17,9 +17,6 @@
*/
#define CONFIG_ARM_ARCH_CP15_ERRATA
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
/*
* Platform

4
include/configs/tam3517-common.h
View File

@@ -15,10 +15,6 @@
*/
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP_GPIO
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_SYS_TEXT_BASE 0x80008000

4
include/configs/tao3530.h
View File

@@ -19,10 +19,6 @@
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP_GPIO
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_SDRC /* Has an SDRC controller */

7
include/configs/tegra20-common.h
View File

@@ -9,13 +9,6 @@
#define _TEGRA20_COMMON_H_
#include "tegra-common.h"
/*
* Errata configuration
*/
#define CONFIG_ARM_ERRATA_716044
#define CONFIG_ARM_ERRATA_742230
#define CONFIG_ARM_ERRATA_751472
/*
* NS16550 Configuration
*/

6
include/configs/tegra30-common.h
View File

@@ -9,12 +9,6 @@
#define _TEGRA30_COMMON_H_
#include "tegra-common.h"
/*
* Errata configuration
*/
#define CONFIG_ARM_ERRATA_743622
#define CONFIG_ARM_ERRATA_751472
/*
* NS16550 Configuration
*/

5
include/configs/ti_omap3_common.h
View File

@@ -21,11 +21,6 @@
#include <asm/arch/cpu.h>
#include <asm/arch/omap.h>
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
/* The chip has SDRC controller */
#define CONFIG_SDRC

3
include/configs/ti_omap5_common.h
View File

@@ -17,9 +17,6 @@
#ifndef __CONFIG_TI_OMAP5_COMMON_H
#define __CONFIG_TI_OMAP5_COMMON_H
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_798870
/* Use General purpose timer 1 */
#define CONFIG_SYS_TIMERBASE GPT2_BASE

4
include/configs/tricorder.h
View File

@@ -19,10 +19,6 @@
/* High Level Configuration Options */
#define CONFIG_SYS_THUMB_BUILD
#define CONFIG_OMAP /* in a TI OMAP core */
/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766
#define CONFIG_MACH_TYPE MACH_TYPE_TRICORDER
/*