u-boot-imx-20211022
-------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/10887

- imx8 : Toradex Verdin MX8M Plus
	 Kontron pitx-imx8m
- imx8ulp: several fixes and improvements
- imx6ull fixes
- switching to binman
This commit is contained in:
Tom Rini
2022-02-07 12:13:53 -05:00
154 changed files with 16023 additions and 541 deletions

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@@ -108,10 +108,6 @@
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
"bootcmd=run distro_bootcmd ; " \
"usb start ; " \
"setenv stdout serial,vidconsole; " \
"setenv stdin serial,usbkbd\0" \
"boot_file=zImage\0" \
"console=ttymxc0\0" \
"defargs=enable_wait_mode=off vmalloc=400M\0" \

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@@ -92,10 +92,6 @@
#define FDT_FILE "imx6dl-colibri-eval-v3.dtb"
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
"bootcmd=run distro_bootcmd; " \
"usb start ; " \
"setenv stdout serial,vidconsole; " \
"setenv stdin serial,usbkbd\0" \
"boot_file=zImage\0" \
"console=ttymxc0\0" \
"defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \

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@@ -180,6 +180,11 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* environment organization */
#if defined(CONFIG_ENV_IS_IN_NAND)
#define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE)
#endif
#ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1

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@@ -32,9 +32,9 @@
/* FEC ethernet */
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_FEC_MXC_PHYADDR 7
#define CONFIG_ARP_TIMEOUT 200UL
/* MMC Configs */
@@ -75,6 +75,10 @@
"ramdisk_addr_r=0x18000000\0" \
"scriptaddr=0x14000000\0" \
"fdtfile=imx6q-dhcom-pdk2.dtb\0"\
"update_sf=" /* Erase SPI NOR and install U-Boot from SD */ \
"load mmc 0:1 ${loadaddr} /boot/u-boot-with-spl.imx && "\
"sf probe && sf erase 0x0 0xa0000 && " \
"sf write ${loadaddr} 0x400 ${filesize}\0" \
BOOTENV
#define BOOT_TARGET_DEVICES(func) \

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@@ -104,7 +104,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
"splashpos=m,m\0" \
"splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"usb_pgood_delay=2000\0" \
"console=ttymxc1\0" \
"bootdevs=usb mmc sata flash\0" \

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@@ -72,8 +72,7 @@
"fdt_addr=0x43000000\0" \
"fdt_addr_r=0x43000000\0" \
"boot_fit=no\0" \
"dfu_alt_info=mmc 2=flash-bin raw 0x42 0x250 mmcpart 1;" \
"u-boot-itb raw 0x300 0x1B00 mmcpart 1\0" \
"dfu_alt_info=mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1\0" \
"fdt_file=sb-iotgimx8.dtb\0" \
"fdtfile=sb-iotgimx8.dtb\0" \
"initrd_addr=0x43800000\0" \

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@@ -0,0 +1,90 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2021 Collabora Ltd.
*/
#ifndef __IMX8MN_VAR_SOM_H
#define __IMX8MN_VAR_SOM_H
#include <linux/sizes.h>
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>
#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
#define CONFIG_SYS_MONITOR_LEN SZ_512K
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
#define CONFIG_SYS_UBOOT_BASE \
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#define CONFIG_SPL_STACK 0x980000
#define CONFIG_SPL_BSS_START_ADDR 0x950000
#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 2) \
func(MMC, mmc, 0) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na) \
#include <config_distro_bootcmd.h>
/* ENET */
#if defined(CONFIG_FEC_MXC)
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
#endif /* CONFIG_FEC_MXC */
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"ramdisk_addr_r=0x43800000\0" \
"fdt_addr_r=0x43000000\0" \
"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
"fastboot_partition_alias_all=" \
__stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) ".0:0\0" \
"fastboot_partition_alias_bootloader=" \
__stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) ".1:0\0" \
"emmc_dev=" __stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) "\0" \
"emmc_ack=1\0" \
"pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
MEM_LAYOUT_ENV_SETTINGS \
BOOTENV
/* Link Definitions */
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */
#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* I2C */
#define CONFIG_SYS_I2C_SPEED 400000
#endif /* __IMX8MN_VAR_SOM_H */

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@@ -61,13 +61,13 @@
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
"scriptaddr=0x43500000\0" \
"kernel_addr_r=0x40880000\0" \
"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"image=Image\0" \
"console=ttymxc0,115200\0" \
"fdt_addr=0x43000000\0" \
"fdt_addr_r=0x43000000\0" \
"boot_fdt=try\0" \
"fdt_file=imx8mq-evk.dtb\0" \
"fdtfile=imx8mq-evk.dtb\0" \
"initrd_addr=0x43800000\0" \
"bootm_size=0x10000000\0" \
"mmcpart=1\0" \

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@@ -21,6 +21,8 @@
#define USDHC2_BASE_ADDR 0x5B020000
#define USDHC3_BASE_ADDR 0x5B030000
#define CONFIG_SYS_BOOTM_LEN SZ_64M
/* FUSE command */
/* Boot M4 */
@@ -59,7 +61,7 @@
"image=Image\0" \
"panel=NULL\0" \
"console=ttyLP0\0" \
"fdt_addr=0x83000000\0" \
"fdt_addr=0x84000000\0" \
"boot_fdt=try\0" \
"fdt_file=imx8qm-rom7720-a1.dtb\0" \
"initrd_addr=0x83800000\0" \

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@@ -0,0 +1,97 @@
/* SPDX-License-Identifier: GPL-2.0+ */
#ifndef __KONTRON_PITX_IMX8M_H
#define __KONTRON_PITX_IMX8M_H
#include <linux/sizes.h>
#include <linux/stringify.h>
#include <asm/arch/imx-regs.h>
#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
#define CONFIG_SPL_MAX_SIZE (124 * SZ_1K)
#define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K)
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x187FF0
#define CONFIG_SPL_BSS_START_ADDR 0x00180000
#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CONFIG_MALLOC_F_ADDR 0x182000
/* For RAW image gives a error info not panic */
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#define CONFIG_POWER_PFUZE100
#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
#endif
#define CONFIG_REMAKE_ELF
/* ENET1 Config */
#if defined(CONFIG_CMD_NET)
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define IMX_FEC_BASE 0x30BE0000
#define PHY_ANEG_TIMEOUT 20000
#endif
#define ENV_MEM_LAYOUT_SETTINGS \
"kernel_addr_r=0x40880000\0" \
"fdt_addr_r=0x43000000\0" \
"scriptaddr=0x43500000\0" \
"initrd_addr=0x43800000\0" \
"pxefile_addr_r=0x43500000\0" \
"bootm_size=0x10000000\0" \
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
func(USB, usb, 0) \
func(DHCP, dhcp, na) \
func(PXE, pxe, 0)
#include <config_distro_bootcmd.h>
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"image=Image\0" \
"console=ttymxc2,115200\0" \
"boot_fdt=try\0" \
"fdtfile=freescale/imx8mq-kontron-pitx-imx8m.dtb\0" \
"dfu_alt_info=mmc 0=flash-bin raw 0x42 0x1000 mmcpart 1\0"\
ENV_MEM_LAYOUT_SETTINGS \
BOOTENV
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_OF_SYSTEM_SETUP
#endif

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@@ -11,6 +11,10 @@
#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL
#include "imx7ulp_spl.h"
#endif
#define CONFIG_BOARD_POSTCLK_INIT
#define CONFIG_SYS_BOOTM_LEN 0x1000000
@@ -67,5 +71,7 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_ARMV7_SECURE_BASE 0x2F000000
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* __CONFIG_H */

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@@ -0,0 +1,131 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2022 Toradex
*/
#ifndef __VERDIN_IMX8MP_H
#define __VERDIN_IMX8MP_H
#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
#define CONFIG_SPL_MAX_SIZE (152 * 1024)
#define CONFIG_SYS_MONITOR_LEN SZ_512K
#define CONFIG_SYS_UBOOT_BASE \
(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
#define CONFIG_SPL_STACK 0x960000
#define CONFIG_SPL_BSS_START_ADDR 0x0098fc00
#define CONFIG_SPL_BSS_MAX_SIZE SZ_1K
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CONFIG_MALLOC_F_ADDR 0x184000
/* For RAW image gives a error info not panic */
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
#define CONFIG_POWER_PCA9450
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#endif /* CONFIG_SPL_BUILD */
#define CONFIG_REMAKE_ELF
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
#define CONFIG_ETHPRIME "eth0" /* eqos is aliased on-module Ethernet interface */
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 7
#define FEC_QUIRK_ENET_MAC
#define PHY_ANEG_TIMEOUT 20000
#endif /* CONFIG_CMD_NET */
#define MEM_LAYOUT_ENV_SETTINGS \
"fdt_addr_r=0x43000000\0" \
"kernel_addr_r=0x40000000\0" \
"ramdisk_addr_r=0x46400000\0" \
"scriptaddr=0x46000000\0"
/* Enable Distro Boot */
#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 2) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
#undef CONFIG_ISO_PARTITION
#else
#define BOOTENV
#endif
#if defined(CONFIG_TDX_EASY_INSTALLER)
# define BOOT_SCRIPT "boot-tezi.scr"
#else
# define BOOT_SCRIPT "boot.scr"
#endif
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
MEM_LAYOUT_ENV_SETTINGS \
"bootcmd_mfg=fastboot 0\0" \
"boot_file=Image\0" \
"boot_scripts=" BOOT_SCRIPT "\0" \
"boot_script_dhcp=" BOOT_SCRIPT "\0" \
"console=ttymxc2\0" \
"fdt_board=dev\0" \
"initrd_addr=0x43800000\0" \
"initrd_high=0xffffffffffffffff\0" \
"netargs=setenv bootargs console=${console},${baudrate} " \
"root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
"\0" \
"nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \
"tftp ${fdt_addr} verdin/${fdtfile}; " \
"booti ${loadaddr} - ${fdt_addr}\0" \
"setup=setenv setupargs console=${console},${baudrate} console=tty1 " \
"consoleblank=0 earlycon\0" \
"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
"if test \"$confirm\" = \"y\"; then " \
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
"${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
"${blkcnt}; fi\0"
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
#define CONFIG_SYS_INIT_SP_OFFSET \
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
#define PHYS_SDRAM_2 0x100000000
#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
/* UART */
#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#endif /* __VERDIN_IMX8MP_H */

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@@ -0,0 +1,48 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Interconnect framework driver for i.MX SoC
*
* Copyright (c) 2019-2020, NXP
*/
#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MQ_H
#define __DT_BINDINGS_INTERCONNECT_IMX8MQ_H
#define IMX8MQ_ICN_NOC 1
#define IMX8MQ_ICS_DRAM 2
#define IMX8MQ_ICS_OCRAM 3
#define IMX8MQ_ICM_A53 4
#define IMX8MQ_ICM_VPU 5
#define IMX8MQ_ICN_VIDEO 6
#define IMX8MQ_ICM_GPU 7
#define IMX8MQ_ICN_GPU 8
#define IMX8MQ_ICM_DCSS 9
#define IMX8MQ_ICN_DCSS 10
#define IMX8MQ_ICM_USB1 11
#define IMX8MQ_ICM_USB2 12
#define IMX8MQ_ICN_USB 13
#define IMX8MQ_ICM_CSI1 14
#define IMX8MQ_ICM_CSI2 15
#define IMX8MQ_ICM_LCDIF 16
#define IMX8MQ_ICN_DISPLAY 17
#define IMX8MQ_ICM_SDMA2 18
#define IMX8MQ_ICN_AUDIO 19
#define IMX8MQ_ICN_ENET 20
#define IMX8MQ_ICM_ENET 21
#define IMX8MQ_ICM_SDMA1 22
#define IMX8MQ_ICM_NAND 23
#define IMX8MQ_ICM_USDHC1 24
#define IMX8MQ_ICM_USDHC2 25
#define IMX8MQ_ICM_PCIE1 26
#define IMX8MQ_ICM_PCIE2 27
#define IMX8MQ_ICN_MAIN 28
#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MQ_H */

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@@ -0,0 +1,14 @@
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
* This header provides constants for i.MX8 PCIe.
*/
#ifndef _DT_BINDINGS_IMX8_PCIE_H
#define _DT_BINDINGS_IMX8_PCIE_H
/* Reference clock PAD mode */
#define IMX8_PCIE_REFCLK_PAD_UNUSED 0
#define IMX8_PCIE_REFCLK_PAD_INPUT 1
#define IMX8_PCIE_REFCLK_PAD_OUTPUT 2
#endif /* _DT_BINDINGS_IMX8_PCIE_H */