Merge tag 'u-boot-imx-20220207' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-20211022 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/10887 - imx8 : Toradex Verdin MX8M Plus Kontron pitx-imx8m - imx8ulp: several fixes and improvements - imx6ull fixes - switching to binman
This commit is contained in:
@@ -108,10 +108,6 @@
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#endif
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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"bootcmd=run distro_bootcmd ; " \
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"usb start ; " \
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"setenv stdout serial,vidconsole; " \
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"setenv stdin serial,usbkbd\0" \
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"boot_file=zImage\0" \
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"console=ttymxc0\0" \
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"defargs=enable_wait_mode=off vmalloc=400M\0" \
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@@ -92,10 +92,6 @@
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#define FDT_FILE "imx6dl-colibri-eval-v3.dtb"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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"bootcmd=run distro_bootcmd; " \
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"usb start ; " \
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"setenv stdout serial,vidconsole; " \
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"setenv stdin serial,usbkbd\0" \
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"boot_file=zImage\0" \
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"console=ttymxc0\0" \
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"defargs=enable_wait_mode=off galcore.contiguousSize=50331648\0" \
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@@ -180,6 +180,11 @@
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* environment organization */
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#if defined(CONFIG_ENV_IS_IN_NAND)
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#define CONFIG_ENV_RANGE (4 * CONFIG_ENV_SIZE)
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#endif
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#ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND
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/* NAND stuff */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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@@ -32,9 +32,9 @@
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/* FEC ethernet */
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_FEC_MXC_PHYADDR 7
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#define CONFIG_ARP_TIMEOUT 200UL
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/* MMC Configs */
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@@ -75,6 +75,10 @@
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"ramdisk_addr_r=0x18000000\0" \
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"scriptaddr=0x14000000\0" \
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"fdtfile=imx6q-dhcom-pdk2.dtb\0"\
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"update_sf=" /* Erase SPI NOR and install U-Boot from SD */ \
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"load mmc 0:1 ${loadaddr} /boot/u-boot-with-spl.imx && "\
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"sf probe && sf erase 0x0 0xa0000 && " \
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"sf write ${loadaddr} 0x400 ${filesize}\0" \
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BOOTENV
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#define BOOT_TARGET_DEVICES(func) \
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@@ -104,7 +104,7 @@
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#define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
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"splashpos=m,m\0" \
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"splashimage=" __stringify(CONFIG_LOADADDR) "\0" \
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"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"usb_pgood_delay=2000\0" \
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"console=ttymxc1\0" \
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"bootdevs=usb mmc sata flash\0" \
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@@ -72,8 +72,7 @@
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"fdt_addr=0x43000000\0" \
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"fdt_addr_r=0x43000000\0" \
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"boot_fit=no\0" \
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"dfu_alt_info=mmc 2=flash-bin raw 0x42 0x250 mmcpart 1;" \
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"u-boot-itb raw 0x300 0x1B00 mmcpart 1\0" \
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"dfu_alt_info=mmc 2=flash-bin raw 0x42 0x1D00 mmcpart 1\0" \
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"fdt_file=sb-iotgimx8.dtb\0" \
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"fdtfile=sb-iotgimx8.dtb\0" \
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"initrd_addr=0x43800000\0" \
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90
include/configs/imx8mn_var_som.h
Normal file
90
include/configs/imx8mn_var_som.h
Normal file
@@ -0,0 +1,90 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2021 Collabora Ltd.
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*/
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#ifndef __IMX8MN_VAR_SOM_H
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#define __IMX8MN_VAR_SOM_H
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#include <linux/sizes.h>
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#include <linux/stringify.h>
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#include <asm/arch/imx-regs.h>
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#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
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#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
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#define CONFIG_SYS_MONITOR_LEN SZ_512K
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
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#define CONFIG_SYS_UBOOT_BASE \
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#define CONFIG_SPL_STACK 0x980000
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#define CONFIG_SPL_BSS_START_ADDR 0x950000
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#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
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#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
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#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 2) \
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func(MMC, mmc, 0) \
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func(PXE, pxe, na) \
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func(DHCP, dhcp, na) \
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#include <config_distro_bootcmd.h>
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/* ENET */
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#if defined(CONFIG_FEC_MXC)
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_XCV_TYPE RGMII
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#endif /* CONFIG_FEC_MXC */
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#define MEM_LAYOUT_ENV_SETTINGS \
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"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"ramdisk_addr_r=0x43800000\0" \
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"fdt_addr_r=0x43000000\0" \
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"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
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"fastboot_partition_alias_all=" \
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__stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) ".0:0\0" \
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"fastboot_partition_alias_bootloader=" \
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__stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) ".1:0\0" \
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"emmc_dev=" __stringify(CONFIG_FASTBOOT_FLASH_MMC_DEV) "\0" \
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"emmc_ack=1\0" \
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"pxefile_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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MEM_LAYOUT_ENV_SETTINGS \
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BOOTENV
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/* Link Definitions */
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#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
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#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */
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#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
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/* Monitor Command Prompt */
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#define CONFIG_SYS_CBSIZE SZ_2K
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* USDHC */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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/* I2C */
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#define CONFIG_SYS_I2C_SPEED 400000
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#endif /* __IMX8MN_VAR_SOM_H */
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@@ -61,13 +61,13 @@
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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BOOTENV \
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"scriptaddr=0x43500000\0" \
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"kernel_addr_r=0x40880000\0" \
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"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"image=Image\0" \
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"console=ttymxc0,115200\0" \
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"fdt_addr=0x43000000\0" \
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"fdt_addr_r=0x43000000\0" \
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"boot_fdt=try\0" \
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"fdt_file=imx8mq-evk.dtb\0" \
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"fdtfile=imx8mq-evk.dtb\0" \
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"initrd_addr=0x43800000\0" \
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"bootm_size=0x10000000\0" \
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"mmcpart=1\0" \
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@@ -21,6 +21,8 @@
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#define USDHC2_BASE_ADDR 0x5B020000
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#define USDHC3_BASE_ADDR 0x5B030000
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#define CONFIG_SYS_BOOTM_LEN SZ_64M
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/* FUSE command */
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/* Boot M4 */
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@@ -59,7 +61,7 @@
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"image=Image\0" \
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"panel=NULL\0" \
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"console=ttyLP0\0" \
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"fdt_addr=0x83000000\0" \
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"fdt_addr=0x84000000\0" \
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"boot_fdt=try\0" \
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"fdt_file=imx8qm-rom7720-a1.dtb\0" \
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"initrd_addr=0x83800000\0" \
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97
include/configs/kontron_pitx_imx8m.h
Normal file
97
include/configs/kontron_pitx_imx8m.h
Normal file
@@ -0,0 +1,97 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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#ifndef __KONTRON_PITX_IMX8M_H
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#define __KONTRON_PITX_IMX8M_H
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#include <linux/sizes.h>
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#include <linux/stringify.h>
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#include <asm/arch/imx-regs.h>
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#define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M)
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#define CONFIG_SPL_MAX_SIZE (124 * SZ_1K)
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#define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K)
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
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#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
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#ifdef CONFIG_SPL_BUILD
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#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
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#define CONFIG_SPL_STACK 0x187FF0
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#define CONFIG_SPL_BSS_START_ADDR 0x00180000
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#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K
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#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
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#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
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#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
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/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
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#define CONFIG_MALLOC_F_ADDR 0x182000
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/* For RAW image gives a error info not panic */
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#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
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#define CONFIG_POWER_PFUZE100
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#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
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#endif
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#define CONFIG_REMAKE_ELF
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/* ENET1 Config */
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#if defined(CONFIG_CMD_NET)
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define FEC_QUIRK_ENET_MAC
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#define IMX_FEC_BASE 0x30BE0000
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#define PHY_ANEG_TIMEOUT 20000
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#endif
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#define ENV_MEM_LAYOUT_SETTINGS \
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"kernel_addr_r=0x40880000\0" \
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"fdt_addr_r=0x43000000\0" \
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"scriptaddr=0x43500000\0" \
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"initrd_addr=0x43800000\0" \
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"pxefile_addr_r=0x43500000\0" \
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"bootm_size=0x10000000\0" \
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 0) \
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func(MMC, mmc, 1) \
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func(USB, usb, 0) \
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func(DHCP, dhcp, na) \
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func(PXE, pxe, 0)
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#include <config_distro_bootcmd.h>
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/* Initial environment variables */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"image=Image\0" \
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"console=ttymxc2,115200\0" \
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"boot_fdt=try\0" \
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"fdtfile=freescale/imx8mq-kontron-pitx-imx8m.dtb\0" \
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"dfu_alt_info=mmc 0=flash-bin raw 0x42 0x1000 mmcpart 1\0"\
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ENV_MEM_LAYOUT_SETTINGS \
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BOOTENV
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|
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#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
|
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#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
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#define CONFIG_SYS_INIT_SP_OFFSET \
|
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM 0x40000000
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#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
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|
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#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
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#define CONFIG_SYS_FSL_USDHC_NUM 2
|
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
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|
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#define CONFIG_OF_SYSTEM_SETUP
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#endif
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@@ -11,6 +11,10 @@
|
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#include <linux/sizes.h>
|
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#include <asm/arch/imx-regs.h>
|
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|
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#ifdef CONFIG_SPL
|
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#include "imx7ulp_spl.h"
|
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#endif
|
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|
||||
#define CONFIG_BOARD_POSTCLK_INIT
|
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#define CONFIG_SYS_BOOTM_LEN 0x1000000
|
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|
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@@ -67,5 +71,7 @@
|
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#define CONFIG_SYS_INIT_SP_ADDR \
|
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
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|
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#define CONFIG_ARMV7_SECURE_BASE 0x2F000000
|
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|
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
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#endif /* __CONFIG_H */
|
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|
||||
131
include/configs/verdin-imx8mp.h
Normal file
131
include/configs/verdin-imx8mp.h
Normal file
@@ -0,0 +1,131 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
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/*
|
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* Copyright 2022 Toradex
|
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*/
|
||||
|
||||
#ifndef __VERDIN_IMX8MP_H
|
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#define __VERDIN_IMX8MP_H
|
||||
|
||||
#include <asm/arch/imx-regs.h>
|
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#include <linux/sizes.h>
|
||||
|
||||
#define CONFIG_SPL_MAX_SIZE (152 * 1024)
|
||||
#define CONFIG_SYS_MONITOR_LEN SZ_512K
|
||||
#define CONFIG_SYS_UBOOT_BASE \
|
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
|
||||
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
|
||||
#define CONFIG_SPL_STACK 0x960000
|
||||
#define CONFIG_SPL_BSS_START_ADDR 0x0098fc00
|
||||
#define CONFIG_SPL_BSS_MAX_SIZE SZ_1K
|
||||
#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
|
||||
#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
|
||||
|
||||
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
|
||||
#define CONFIG_MALLOC_F_ADDR 0x184000
|
||||
/* For RAW image gives a error info not panic */
|
||||
#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
|
||||
|
||||
#define CONFIG_POWER_PCA9450
|
||||
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 100000
|
||||
#endif /* CONFIG_SPL_BUILD */
|
||||
|
||||
#define CONFIG_REMAKE_ELF
|
||||
|
||||
/* ENET Config */
|
||||
/* ENET1 */
|
||||
#if defined(CONFIG_CMD_NET)
|
||||
#define CONFIG_ETHPRIME "eth0" /* eqos is aliased on-module Ethernet interface */
|
||||
|
||||
#define CONFIG_FEC_XCV_TYPE RGMII
|
||||
#define CONFIG_FEC_MXC_PHYADDR 7
|
||||
#define FEC_QUIRK_ENET_MAC
|
||||
|
||||
#define PHY_ANEG_TIMEOUT 20000
|
||||
#endif /* CONFIG_CMD_NET */
|
||||
|
||||
#define MEM_LAYOUT_ENV_SETTINGS \
|
||||
"fdt_addr_r=0x43000000\0" \
|
||||
"kernel_addr_r=0x40000000\0" \
|
||||
"ramdisk_addr_r=0x46400000\0" \
|
||||
"scriptaddr=0x46000000\0"
|
||||
|
||||
/* Enable Distro Boot */
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define BOOT_TARGET_DEVICES(func) \
|
||||
func(MMC, mmc, 1) \
|
||||
func(MMC, mmc, 2) \
|
||||
func(DHCP, dhcp, na)
|
||||
#include <config_distro_bootcmd.h>
|
||||
#undef CONFIG_ISO_PARTITION
|
||||
#else
|
||||
#define BOOTENV
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_TDX_EASY_INSTALLER)
|
||||
# define BOOT_SCRIPT "boot-tezi.scr"
|
||||
#else
|
||||
# define BOOT_SCRIPT "boot.scr"
|
||||
#endif
|
||||
|
||||
/* Initial environment variables */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
BOOTENV \
|
||||
MEM_LAYOUT_ENV_SETTINGS \
|
||||
"bootcmd_mfg=fastboot 0\0" \
|
||||
"boot_file=Image\0" \
|
||||
"boot_scripts=" BOOT_SCRIPT "\0" \
|
||||
"boot_script_dhcp=" BOOT_SCRIPT "\0" \
|
||||
"console=ttymxc2\0" \
|
||||
"fdt_board=dev\0" \
|
||||
"initrd_addr=0x43800000\0" \
|
||||
"initrd_high=0xffffffffffffffff\0" \
|
||||
"netargs=setenv bootargs console=${console},${baudrate} " \
|
||||
"root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
|
||||
"\0" \
|
||||
"nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \
|
||||
"tftp ${fdt_addr} verdin/${fdtfile}; " \
|
||||
"booti ${loadaddr} - ${fdt_addr}\0" \
|
||||
"setup=setenv setupargs console=${console},${baudrate} console=tty1 " \
|
||||
"consoleblank=0 earlycon\0" \
|
||||
"update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
|
||||
"if test \"$confirm\" = \"y\"; then " \
|
||||
"setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
|
||||
"${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
|
||||
"${blkcnt}; fi\0"
|
||||
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET \
|
||||
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR \
|
||||
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
||||
|
||||
#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
|
||||
|
||||
/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x40000000
|
||||
#define PHYS_SDRAM 0x40000000
|
||||
#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
|
||||
#define PHYS_SDRAM_2 0x100000000
|
||||
#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
|
||||
|
||||
/* UART */
|
||||
#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
|
||||
|
||||
/* Monitor Command Prompt */
|
||||
#define CONFIG_SYS_CBSIZE SZ_2K
|
||||
#define CONFIG_SYS_MAXARGS 64
|
||||
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
|
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
|
||||
sizeof(CONFIG_SYS_PROMPT) + 16)
|
||||
|
||||
/* USDHC */
|
||||
#define CONFIG_SYS_FSL_USDHC_NUM 2
|
||||
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
||||
|
||||
#endif /* __VERDIN_IMX8MP_H */
|
||||
48
include/dt-bindings/interconnect/imx8mq.h
Normal file
48
include/dt-bindings/interconnect/imx8mq.h
Normal file
@@ -0,0 +1,48 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Interconnect framework driver for i.MX SoC
|
||||
*
|
||||
* Copyright (c) 2019-2020, NXP
|
||||
*/
|
||||
|
||||
#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MQ_H
|
||||
#define __DT_BINDINGS_INTERCONNECT_IMX8MQ_H
|
||||
|
||||
#define IMX8MQ_ICN_NOC 1
|
||||
#define IMX8MQ_ICS_DRAM 2
|
||||
#define IMX8MQ_ICS_OCRAM 3
|
||||
#define IMX8MQ_ICM_A53 4
|
||||
|
||||
#define IMX8MQ_ICM_VPU 5
|
||||
#define IMX8MQ_ICN_VIDEO 6
|
||||
|
||||
#define IMX8MQ_ICM_GPU 7
|
||||
#define IMX8MQ_ICN_GPU 8
|
||||
|
||||
#define IMX8MQ_ICM_DCSS 9
|
||||
#define IMX8MQ_ICN_DCSS 10
|
||||
|
||||
#define IMX8MQ_ICM_USB1 11
|
||||
#define IMX8MQ_ICM_USB2 12
|
||||
#define IMX8MQ_ICN_USB 13
|
||||
|
||||
#define IMX8MQ_ICM_CSI1 14
|
||||
#define IMX8MQ_ICM_CSI2 15
|
||||
#define IMX8MQ_ICM_LCDIF 16
|
||||
#define IMX8MQ_ICN_DISPLAY 17
|
||||
|
||||
#define IMX8MQ_ICM_SDMA2 18
|
||||
#define IMX8MQ_ICN_AUDIO 19
|
||||
|
||||
#define IMX8MQ_ICN_ENET 20
|
||||
#define IMX8MQ_ICM_ENET 21
|
||||
|
||||
#define IMX8MQ_ICM_SDMA1 22
|
||||
#define IMX8MQ_ICM_NAND 23
|
||||
#define IMX8MQ_ICM_USDHC1 24
|
||||
#define IMX8MQ_ICM_USDHC2 25
|
||||
#define IMX8MQ_ICM_PCIE1 26
|
||||
#define IMX8MQ_ICM_PCIE2 27
|
||||
#define IMX8MQ_ICN_MAIN 28
|
||||
|
||||
#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MQ_H */
|
||||
14
include/dt-bindings/phy/phy-imx8-pcie.h
Normal file
14
include/dt-bindings/phy/phy-imx8-pcie.h
Normal file
@@ -0,0 +1,14 @@
|
||||
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
|
||||
/*
|
||||
* This header provides constants for i.MX8 PCIe.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_IMX8_PCIE_H
|
||||
#define _DT_BINDINGS_IMX8_PCIE_H
|
||||
|
||||
/* Reference clock PAD mode */
|
||||
#define IMX8_PCIE_REFCLK_PAD_UNUSED 0
|
||||
#define IMX8_PCIE_REFCLK_PAD_INPUT 1
|
||||
#define IMX8_PCIE_REFCLK_PAD_OUTPUT 2
|
||||
|
||||
#endif /* _DT_BINDINGS_IMX8_PCIE_H */
|
||||
Reference in New Issue
Block a user