Convert CONFIG_SYS_I2C_EEPROM_ADDR et al to Kconfig

- Rename usages of CONFIG_SYS_DEF_EEPROM_ADDR to CONFIG_SYS_I2C_EEPROM_ADDR
  based on current usage.
- Convert CONFIG_SYS_I2C_EEPROM_ADDR, CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
  CONFIG_SYS_I2C_EEPROM_BUS, CONFIG_CONFIG_SYS_EEPROM_SIZE
  CONFIG_SYS_EEPROM_PAGE_WRITE_BITS and CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS
  to Kconfig.  We move these symbols around a bit and add appropriate
  dependencies to them.  In some cases, we now add a correct default value
  as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
2021-08-17 17:59:45 -04:00
parent c18afbe0ab
commit 88cd7d0ea9
316 changed files with 616 additions and 305 deletions

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@@ -309,8 +309,6 @@ extern unsigned long get_clock_freq(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_CCID
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* General PCI

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@@ -519,15 +519,10 @@ extern unsigned long get_sdram_size(void);
#ifdef CONFIG_ID_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#endif
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define MAX_NUM_PORTS 9 /* for 128Bytes EEPROM */
#endif
/* enable read and write access to EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* RTC */
#define CONFIG_RTC_PT7C4338

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@@ -90,8 +90,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* DDR Setup

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@@ -172,10 +172,6 @@ unsigned long get_board_ddr_clk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/*
* DDR Setup

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@@ -132,8 +132,6 @@ unsigned long get_board_ddr_clk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
/*
* DDR Setup

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@@ -121,8 +121,6 @@ unsigned long get_board_ddr_clk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* DDR Setup

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@@ -168,9 +168,6 @@
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* PMIC support */
#define CONFIG_POWER_TPS65217
#define CONFIG_POWER_TPS65910

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@@ -225,7 +225,6 @@
#define CONFIG_NET_RETRY_COUNT 10
/* I2C configuration */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 1
#endif /* ! __CONFIG_AM335X_SHC_H */

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@@ -55,9 +55,6 @@
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* PMIC support */
#define CONFIG_POWER_TPS65217
#define CONFIG_POWER_TPS65910

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@@ -21,8 +21,6 @@
#endif
/* I2C Configuration */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* Power */
#if !CONFIG_IS_ENABLED(DM_I2C)

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@@ -22,9 +22,6 @@
#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_OMAP_ABE_SYSCK
#ifndef CONFIG_SPL_BUILD

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@@ -204,9 +204,6 @@
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* PMIC support */
#define CONFIG_POWER_TPS65910

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@@ -35,11 +35,6 @@
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C2 /* Enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
#define SYS_I2C_BUS_SOM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS SYS_I2C_BUS_SOM
#define CONFIG_PCA953X
#define CONFIG_SYS_I2C_PCA953X_ADDR 0x20

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@@ -174,10 +174,6 @@
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_MXC_I2C3_SPEED 400000
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 2
/* SATA */
#define CONFIG_SYS_SATA_MAX_DEVICE 1
#define CONFIG_LBA48
@@ -201,9 +197,5 @@
#define CONFIG_VIDEO_BMP_LOGO
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_SYS_EEPROM_SIZE 256
#endif /* __CONFIG_CM_FX6_H */

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@@ -83,9 +83,6 @@
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
/* I2C Configuration */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_I2C_EEPROM_BUS 0
/* SPL */
@@ -128,10 +125,6 @@
/* Status LED polarity is inversed, so init it in the "off" state */
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_SYS_EEPROM_SIZE 256
#ifndef CONFIG_SPL_BUILD
/*

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@@ -114,9 +114,5 @@
#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_SYS_EEPROM_SIZE 256
#endif /* __CONFIG_CM_T43_H */

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@@ -103,8 +103,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
/*
* DDR Setup

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@@ -31,9 +31,6 @@
#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_OMAP_ABE_SYSCK
#ifndef CONFIG_SPL_BUILD

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@@ -89,7 +89,6 @@
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define EEPROM_ADDR_DDR3 0x90
#define EEPROM_ADDR_CHIP 0x120

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@@ -123,7 +123,6 @@
#define CONFIG_SYS_KMBEC_FPGA_SIZE 128
/* EEprom support */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
/* ethernet port connected to piggy (UEC2) */
#define CONFIG_HAS_ETH1

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@@ -72,5 +72,4 @@
#define CONFIG_SYS_KMBEC_FPGA_SIZE 128
/* EEprom support */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1

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@@ -67,7 +67,6 @@
#define CONFIG_SYS_DDR_TIMING_3 0x00000000
/* EEprom support */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* PAXE on the local bus CS3

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@@ -11,8 +11,6 @@
/* EEprom support 24C08, 24C16, 24C64 */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 8 Byte write page */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */

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@@ -130,11 +130,6 @@ extern void __set_direction(unsigned pin, int high);
/* EEprom support 24C128, 24C256 valid for environment eeprom */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* Environment variables configurations
@@ -142,7 +137,6 @@ extern void __set_direction(unsigned pin, int high);
#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
#define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */
#else
#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
#define CONFIG_SYS_EEPROM_WREN
#define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */
#endif
@@ -164,9 +158,9 @@ extern void __set_direction(unsigned pin, int high);
"newenv=setenv addr 0x100000 && " \
"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \
"mw.b ${addr} 0 4 && " \
"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
"eeprom write " __stringify(CONFIG_SYS_I2C_EEPROM_ADDR) \
" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \
"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \
"eeprom write " __stringify(CONFIG_SYS_I2C_EEPROM_ADDR) \
" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
#endif

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@@ -189,7 +189,6 @@
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/******************************************************************************
* (PRAM usage)

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@@ -99,9 +99,6 @@
*/
#ifdef CONFIG_CMD_I2C
/* I2C EEPROM HT24LC04 (512B - 32 pages of 16 Bytes) */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 /* 16-byte page size */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 8-bit device address */
#if defined(CONFIG_NET2BIG_V2)
#define CONFIG_SYS_I2C_G762_ADDR 0x3e
#endif

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@@ -56,10 +56,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Voltage monitor on channel 2*/

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@@ -112,8 +112,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* MMC

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@@ -351,10 +351,6 @@ unsigned long get_board_ddr_clk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/*
* I2C bus multiplexer

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@@ -118,8 +118,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/* QSPI */
#define FSL_QSPI_FLASH_SIZE (1 << 24)

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@@ -229,10 +229,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 1
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/*
* MMC

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@@ -105,10 +105,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* DisplayPort */
#define DP_PWD_EN_DEFAULT_MASK 0x8

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@@ -81,10 +81,6 @@ unsigned long get_board_ddr_clk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_SYS_SATA AHCI_BASE_ADDR

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@@ -230,10 +230,6 @@
#ifndef SPL_NO_EEPROM
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#endif
/*

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@@ -76,10 +76,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define I2C_RETIMER_ADDR 0x18
/* I2C bus multiplexer */

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@@ -105,10 +105,6 @@ unsigned long get_board_ddr_clk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/*
* IFC Definitions

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@@ -137,10 +137,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define I2C_RETIMER_ADDR 0x18
/* PMIC */

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@@ -337,10 +337,6 @@ unsigned long get_board_ddr_clk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#ifdef CONFIG_FSL_DSPI
#define CONFIG_SPI_FLASH_STMICRO

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@@ -243,10 +243,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE

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@@ -306,10 +306,6 @@ unsigned long get_board_ddr_clk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_FSL_MEMAC

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@@ -288,10 +288,6 @@ unsigned long get_board_sys_clk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#define CONFIG_FSL_MEMAC

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@@ -112,10 +112,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Qixis */
#define CONFIG_FSL_QIXIS

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@@ -36,10 +36,6 @@ u8 qixis_esdhc_detect_quirk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \

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@@ -32,10 +32,6 @@
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \

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@@ -40,10 +40,6 @@ u8 qixis_esdhc_detect_quirk(void);
/* EEPROM */
#define CONFIG_SYS_I2C_EEPROM_NXID
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \

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@@ -62,10 +62,6 @@
#define CONFIG_SYS_SPD_BUS_NUM 0
/* I2C EEPROM */
#ifdef CONFIG_CMD_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_EEPROM_BUS 2
#endif
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0

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@@ -28,7 +28,6 @@
/* Hardware drivers */
/* I2C */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_USB_EHCI_OMAP

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@@ -478,7 +478,6 @@
#endif
#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
#define CONFIG_SYS_SPD_BUS_NUM 1 /* For rom_loc and flash bank */
/*
@@ -490,9 +489,6 @@
#define CONFIG_SYS_I2C_PCA9557_ADDR 0x18
/* enable read and write access to EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
#if defined(CONFIG_PCI)
/*

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@@ -34,7 +34,6 @@
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_FACTORYSET

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@@ -37,7 +37,6 @@
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define EEPROM_ADDR_DDR3 0x90
#define EEPROM_ADDR_CHIP 0x120

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@@ -26,11 +26,6 @@
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 byte pages */
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* take up to 10 msec */
#define CONFIG_FACTORYSET
/* Watchdog */

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@@ -82,7 +82,5 @@
#endif /* CONFIG_SPL_BUILD */
#define CONFIG_SYS_EEPROM_BUS_NUM 0
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 0x1
#endif /* __SIFIVE_UNMATCHED_H */

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@@ -146,8 +146,6 @@
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
/*
* General PCI
* Memory space is mapped 1-1.

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@@ -57,8 +57,6 @@
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
#define CONFIG_SYS_I2C_LEGACY
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
/*

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@@ -30,7 +30,6 @@
/* I2C Configuration */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define EEPROM_ADDR_DDR3 0x90
#define EEPROM_ADDR_CHIP 0x120

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@@ -120,10 +120,6 @@
#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
/* EEPROM definitions */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
/* NAND Configuration */
#define CONFIG_KEYSTONE_RBL_NAND

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@@ -39,8 +39,6 @@
#define CONFIG_SYS_I2C_SPEED 100000
/* I2C EEPROM (M24C64) */
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_BITS 5 /* 32 Bytes */
#define CONFIG_SYS_I2C_EEPROM_PAGE_WRITE_DELAY_MS 20

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@@ -54,9 +54,6 @@
* I2C EEPROM
*/
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x56
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
/*
* I2C RTC
*/

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@@ -21,8 +21,4 @@ int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt);
#define eeprom_write(dev_addr, offset, buffer, cnt) (-ENOSYS)
#endif
#if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
# define CONFIG_SYS_DEF_EEPROM_ADDR CONFIG_SYS_I2C_EEPROM_ADDR
#endif
#endif