Implement hard SPI driver on MPC8349EMDS
This patch implements the fsl_spi driver on the MPC8349EMDS evaluation board. This board has an ST M25P40 4Mbit EEPROM on its SPI bus Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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@@ -355,6 +355,16 @@
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#define CFG_I2C_OFFSET 0x3000
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#define CFG_I2C2_OFFSET 0x3100
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/* SPI */
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#define CONFIG_HARD_SPI /* SPI with hardware support*/
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#undef CONFIG_SOFT_SPI /* SPI bit-banged */
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#define CONFIG_FSL_SPI
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/* GPIOs. Used as SPI chip selects */
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#define CFG_GPIO1_PRELIM
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#define CFG_GPIO1_DIR 0xC0000000 /* SPI CS on 0, LED on 1 */
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#define CFG_GPIO1_DAT 0xC0000000 /* Both are active LOW */
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/* TSEC */
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#define CFG_TSEC1_OFFSET 0x24000
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#define CFG_TSEC1 (CFG_IMMR+CFG_TSEC1_OFFSET)
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