Merge git://git.denx.de/u-boot-rockchip

This commit is contained in:
Tom Rini
2016-11-02 09:41:20 -04:00
33 changed files with 421 additions and 182 deletions

View File

@@ -19,11 +19,6 @@
DECLARE_GLOBAL_DATA_PTR;
struct rk3036_clk_priv {
struct rk3036_cru *cru;
ulong rate;
};
enum {
VCO_MAX_HZ = 2400U * 1000000,
VCO_MIN_HZ = 600 * 1000000,
@@ -49,23 +44,6 @@ enum {
static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 3, 1);
static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2, 1);
void *rockchip_get_cru(void)
{
struct udevice *dev;
fdt_addr_t addr;
int ret;
ret = uclass_get_device(UCLASS_CLK, 0, &dev);
if (ret)
return ERR_PTR(ret);
addr = dev_get_addr(dev);
if (addr == FDT_ADDR_T_NONE)
return ERR_PTR(-EINVAL);
return (void *)addr;
}
static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,
const struct pll_div *div)
{
@@ -371,7 +349,7 @@ static const struct udevice_id rk3036_clk_ids[] = {
{ }
};
U_BOOT_DRIVER(clk_rk3036) = {
U_BOOT_DRIVER(rockchip_rk3036_cru) = {
.name = "clk_rk3036",
.id = UCLASS_CLK,
.of_match = rk3036_clk_ids,

View File

@@ -30,12 +30,6 @@ struct rk3288_clk_plat {
#endif
};
struct rk3288_clk_priv {
struct rk3288_grf *grf;
struct rk3288_cru *cru;
ulong rate;
};
struct pll_div {
u32 nr;
u32 nf;
@@ -140,21 +134,6 @@ static const struct pll_div apll_init_cfg = PLL_DIVISORS(APLL_HZ, 1, 1);
static const struct pll_div gpll_init_cfg = PLL_DIVISORS(GPLL_HZ, 2, 2);
static const struct pll_div cpll_init_cfg = PLL_DIVISORS(CPLL_HZ, 1, 2);
void *rockchip_get_cru(void)
{
struct rk3288_clk_priv *priv;
struct udevice *dev;
int ret;
ret = rockchip_get_clk(&dev);
if (ret)
return ERR_PTR(ret);
priv = dev_get_priv(dev);
return priv->cru;
}
static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
const struct pll_div *div)
{

View File

@@ -18,11 +18,6 @@
DECLARE_GLOBAL_DATA_PTR;
struct rk3399_clk_priv {
struct rk3399_cru *cru;
ulong rate;
};
struct rk3399_pmuclk_priv {
struct rk3399_pmucru *pmucru;
};
@@ -780,23 +775,6 @@ static struct clk_ops rk3399_clk_ops = {
.set_rate = rk3399_clk_set_rate,
};
void *rockchip_get_cru(void)
{
struct udevice *dev;
fdt_addr_t *addr;
int ret;
ret = uclass_get_device_by_name(UCLASS_CLK, "clk_rk3399", &dev);
if (ret)
return ERR_PTR(ret);
addr = dev_get_addr_ptr(dev);
if ((fdt_addr_t)addr == FDT_ADDR_T_NONE)
return ERR_PTR(-EINVAL);
return addr;
}
static int rk3399_clk_probe(struct udevice *dev)
{
struct rk3399_clk_priv *priv = dev_get_priv(dev);
@@ -990,7 +968,7 @@ static const struct udevice_id rk3399_pmuclk_ids[] = {
{ }
};
U_BOOT_DRIVER(pmuclk_rk3399) = {
U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
.name = "pmuclk_rk3399",
.id = UCLASS_CLK,
.of_match = rk3399_pmuclk_ids,