ARM change name of defines for AT91 arm926ejs
Configuration defines should be preceeded with CONFIG_SYS_. Renamed some at91 specific defines to conform to this naming convention: AT91_CPU_NAME to CONFIG_SYS_AT91_CPU_NAME AT91_MAIN_CLOCK to CONFIG_SYS_AT91_MAIN_CLOCK Signed-off-by: Achim Ehrlich <aehrlich@taskit.de>
This commit is contained in:
@@ -145,6 +145,6 @@
|
||||
/*
|
||||
* Cpu Name
|
||||
*/
|
||||
#define AT91_CPU_NAME "AT91CAP9"
|
||||
#define CONFIG_SYS_AT91_CPU_NAME "AT91CAP9"
|
||||
|
||||
#endif
|
||||
|
||||
@@ -130,6 +130,6 @@
|
||||
#define AT91_PMX_CA_NCS7 0x00002000
|
||||
#define AT91_PMX_CA_D16_31 0xFFFF0000
|
||||
|
||||
#define AT91_CPU_NAME "AT91RM9200"
|
||||
#define CONFIG_SYS_AT91_CPU_NAME "AT91RM9200"
|
||||
|
||||
#endif
|
||||
|
||||
@@ -139,9 +139,9 @@
|
||||
* Cpu Name
|
||||
*/
|
||||
#if defined(CONFIG_AT91SAM9260)
|
||||
#define AT91_CPU_NAME "AT91SAM9260"
|
||||
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9260"
|
||||
#elif defined(CONFIG_AT91SAM9G20)
|
||||
#define AT91_CPU_NAME "AT91SAM9G20"
|
||||
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G20"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -114,6 +114,6 @@
|
||||
/*
|
||||
* Cpu Name
|
||||
*/
|
||||
#define AT91_CPU_NAME "AT91SAM9261"
|
||||
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261"
|
||||
|
||||
#endif
|
||||
|
||||
@@ -147,6 +147,6 @@
|
||||
/*
|
||||
* Cpu Name
|
||||
*/
|
||||
#define AT91_CPU_NAME "AT91SAM9263"
|
||||
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9263"
|
||||
|
||||
#endif
|
||||
|
||||
@@ -147,6 +147,6 @@
|
||||
/*
|
||||
* Cpu Name
|
||||
*/
|
||||
#define AT91_CPU_NAME "AT91SAM9G45"
|
||||
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9G45"
|
||||
|
||||
#endif
|
||||
|
||||
@@ -125,6 +125,6 @@
|
||||
/*
|
||||
* Cpu Name
|
||||
*/
|
||||
#define AT91_CPU_NAME "AT91SAM9RL"
|
||||
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9RL"
|
||||
|
||||
#endif
|
||||
|
||||
@@ -29,7 +29,7 @@
|
||||
#define CONFIG_AT91_LEGACY
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
#define CONFIG_AT91_LEGACY
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
#define CONFIG_AT91_LEGACY
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
#define CONFIG_AT91_LEGACY
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
|
||||
@@ -28,7 +28,7 @@
|
||||
#define __CONFIG_H
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
#define CONFIG_AT91_LEGACY
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
|
||||
@@ -30,7 +30,7 @@
|
||||
#define CONFIG_AT91_LEGACY
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
|
||||
@@ -35,7 +35,7 @@
|
||||
|
||||
#define CONFIG_DISPLAY_CPUINFO 1
|
||||
|
||||
#define AT91_MAIN_CLOCK 18432000
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARM926EJS 1
|
||||
|
||||
@@ -31,14 +31,14 @@
|
||||
#define CONFIG_AT91_LEGACY
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_CPU_NAME "AT91SAM9261"
|
||||
#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261"
|
||||
|
||||
#define CONFIG_DISPLAY_BOARDINFO
|
||||
|
||||
#define MASTER_PLL_DIV 15
|
||||
#define MASTER_PLL_MUL 162
|
||||
#define MAIN_PLL_DIV 2
|
||||
#define AT91_MAIN_CLOCK 18432000
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
|
||||
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
|
||||
@@ -37,7 +37,7 @@
|
||||
#define MASTER_PLL_DIV 6
|
||||
#define MASTER_PLL_MUL 65
|
||||
#define MAIN_PLL_DIV 2 /* 2 or 4 */
|
||||
#define AT91_MAIN_CLOCK 18432000
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
|
||||
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
|
||||
@@ -41,7 +41,7 @@
|
||||
#endif
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
|
||||
@@ -51,7 +51,7 @@
|
||||
#endif
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
|
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
|
||||
#define CONFIG_SYS_HZ 1000
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
|
||||
Reference in New Issue
Block a user