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Add support for Freescale M5271: Merge with /work/u-boot.mcf5271

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This commit is contained in:
Marian Balakowicz
2006-04-27 19:12:19 +02:00
parent 76544f80e4 f8c3b4f310
commit 7a635e004e
22 changed files with 872 additions and 11 deletions
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98
include/asm-m68k/immap_5271.h Normal file
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/*
* MCF5272 Internal Memory Map
*
* Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
* 2006 Zachary P. Landau <zachary.landau@labxtechnologies.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __IMMAP_5271__
#define __IMMAP_5271__
/* Interrupt module registers
*/
typedef struct int_ctrl {
uint int_icr1;
uint int_icr2;
uint int_icr3;
uint int_icr4;
uint int_isr;
uint int_pitr;
uint int_piwr;
uchar res1[3];
uchar int_pivr;
} intctrl_t;
/* Timer module registers
*/
typedef struct timer_ctrl {
ushort timer_tmr;
ushort res1;
ushort timer_trr;
ushort res2;
ushort timer_tcap;
ushort res3;
ushort timer_tcn;
ushort res4;
ushort timer_ter;
uchar res5[14];
} timer_t;
/* Fast ethernet controller registers
*/
typedef struct fec {
uint res1;
uint fec_ievent;
uint fec_imask;
uint res2;
uint fec_r_des_active;
uint fec_x_des_active;
uint res3[3];
uint fec_ecntrl;
uint res4[6];
uint fec_mii_data;
uint fec_mii_speed;
uint res5[7];
uint fec_mibc;
uint res6[7];
uint fec_r_cntrl;
uint res7[15];
uint fec_x_cntrl;
uint res8[7];
uint fec_addr_low;
uint fec_addr_high;
uint fec_opd;
uint res9[10];
uint fec_ihash_table_high;
uint fec_ihash_table_low;
uint fec_ghash_table_high;
uint fec_ghash_table_low;
uint res10[7];
uint fec_tfwr;
uint res11;
uint fec_r_bound;
uint fec_r_fstart;
uint res12[11];
uint fec_r_des_start;
uint fec_x_des_start;
uint fec_r_buff_size;
} fec_t;
#endif /* __IMMAP_5271__ */

93
include/asm-m68k/m5271.h Normal file
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/*
* mcf5271.h -- Definitions for Motorola Coldfire 5271
*
* (C) Copyright 2006, Lab X Technologies <zachary.landau@labxtechnologies.com>
* Based on mcf5272sim.h of uCLinux distribution:
* (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com)
* (C) Copyright 2000, Lineo Inc. (www.lineo.com)
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _MCF5271_H_
#define _MCF5271_H_
#define mbar_readLong(x) *((volatile unsigned long *) (CFG_MBAR + x))
#define mbar_readShort(x) *((volatile unsigned short *) (CFG_MBAR + x))
#define mbar_readByte(x) *((volatile unsigned char *) (CFG_MBAR + x))
#define mbar_writeLong(x,y) *((volatile unsigned long *) (CFG_MBAR + x)) = y
#define mbar_writeShort(x,y) *((volatile unsigned short *) (CFG_MBAR + x)) = y
#define mbar_writeByte(x,y) *((volatile unsigned char *) (CFG_MBAR + x)) = y
#define MCF_FMPLL_SYNCR 0x120000
#define MCF_FMPLL_SYNSR 0x120004
#define MCF_FMPLL_SYNCR_MFD(x) ((x&0x7)<<24)
#define MCF_FMPLL_SYNCR_RFD(x) ((x&0x7)<<19)
#define MCF_FMPLL_SYNSR_LOCK 0x8
#define MCF_WTM_WCR 0x140000
#define MCF_WTM_WCNTR 0x140004
#define MCF_WTM_WSR 0x140006
#define MCF_WTM_WCR_EN 0x0001
#define MCF_RCM_RCR 0x110000
#define MCF_RCM_RCR_FRCRSTOUT 0x40
#define MCF_RCM_RCR_SOFTRST 0x80
#define MCF_GPIO_PAR_CS 0x100045
#define MCF_GPIO_PAR_SDRAM 0x100046
#define MCF_GPIO_PAR_FECI2C 0x100047
#define MCF_GPIO_PAR_UART 0x100048
#define MCF_GPIO_PAR_CS_PAR_CS2 (0x04)
#define MCF_GPIO_PAR_UART_U0RTS (0x0001)
#define MCF_GPIO_PAR_UART_U0CTS (0x0002)
#define MCF_GPIO_PAR_UART_U0TXD (0x0004)
#define MCF_GPIO_PAR_UART_U0RXD (0x0008)
#define MCF_GPIO_PAR_UART_U1RXD_UART1 (0x0C00)
#define MCF_GPIO_PAR_UART_U1TXD_UART1 (0x0300)
#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6)
#define MCF_SDRAMC_DCR 0x000040
#define MCF_SDRAMC_DACR0 0x000048
#define MCF_SDRAMC_DMR0 0x00004C
#define MCF_SDRAMC_DCR_RC(x) (((x)&0x01FF)<<0)
#define MCF_SDRAMC_DCR_RTIM(x) (((x)&0x0003)<<9)
#define MCF_SDRAMC_DCR_IS (0x0800)
#define MCF_SDRAMC_DCR_COC (0x1000)
#define MCF_SDRAMC_DCR_NAM (0x2000)
#define MCF_SDRAMC_DACRn_IP (0x00000008)
#define MCF_SDRAMC_DACRn_PS(x) (((x)&0x00000003)<<4)
#define MCF_SDRAMC_DACRn_MRS (0x00000040)
#define MCF_SDRAMC_DACRn_CBM(x) (((x)&0x00000007)<<8)
#define MCF_SDRAMC_DACRn_CASL(x) (((x)&0x00000003)<<12)
#define MCF_SDRAMC_DACRn_RE (0x00008000)
#define MCF_SDRAMC_DACRn_BA(x) (((x)&0x00003FFF)<<18)
#define MCF_SDRAMC_DMRn_BAM_8M (0x007C0000)
#define MCF_SDRAMC_DMRn_V (0x00000001)
#define MCFSIM_ICR1 (0x000C41)
#endif /* _MCF5271_H_ */

2
include/asm-m68k/mcftimer.h
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@@ -45,7 +45,7 @@
#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
#elif defined(CONFIG_M5282)
#elif defined(CONFIG_M5282) | defined(CONFIG_M5271)
#define MCFTIMER_BASE1 0x150000 /* Base address of TIMER1 */
#define MCFTIMER_BASE2 0x160000 /* Base address of TIMER2 */
#define MCFTIMER_BASE3 0x170000 /* Base address of TIMER4 */

2
include/asm-m68k/mcfuart.h
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@@ -46,7 +46,7 @@
#define MCFUART_BASE1 0x140 /* Base address of UART1 */
#define MCFUART_BASE2 0x180 /* Base address of UART2 */
#endif
#elif defined(CONFIG_M5282)
#elif defined(CONFIG_M5282) || defined(CONFIG_M5271)
#define MCFUART_BASE1 0x200 /* Base address of UART1 */
#define MCFUART_BASE2 0x240 /* Base address of UART2 */
#define MCFUART_BASE3 0x280 /* Base address of UART3 */

2
include/asm-m68k/ptrace.h
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@@ -43,7 +43,7 @@ struct pt_regs {
ulong a4;
ulong a5;
ulong a6;
#if defined(CONFIG_M5272) || defined(CONFIG_M5282) || defined(CONFIG_M5249)
#if defined(CONFIG_M5272) || defined(CONFIG_M5282) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
unsigned short sr;

168
include/configs/r5200.h Normal file
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/*
* Configuation settings for the R5200 board
*
* (C) Copyright 2006 Lab X Technologies <zachary.landau@labxtechnologies.com>
* Based on Motorola MC5272C3 board config
* (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* board/config.h - configuration options, board specific
*/
#ifndef _R5200_H
#define _R5200_H
/*
* High Level Configuration Options
* (easy to change)
*/
#define CONFIG_MCF52x2 /* define processor family */
#define CONFIG_M5271 /* define processor type */
#define FEC_ENET
#define CONFIG_NET_RETRY_COUNT 5
#define CONFIG_IPADDR 192.168.0.172
#define CONFIG_SERVERIP 192.168.0.148
#define CONFIG_ETHADDR 00:06:3b:00:44:55
#define CONFIG_BAUDRATE 19200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#define CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 0xFFFF /* clock modulus */
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
*/
#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CFG_ENV_OFFSET 0x20000
#define CFG_ENV_SECT_SIZE 0x20000
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_IS_EMBEDDED 1
#else
#define CFG_ENV_ADDR 0xf0020000
#define CFG_ENV_SECT_SIZE 0x2000
#define CFG_ENV_IS_IN_FLASH 1
#endif
#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB))
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
/* Note: We only copy one sectors worth of application code from location
* 10200000 for speed purposes. Increase the size if necessary */
#define CONFIG_BOOTCOMMAND "cp.b 10200000 0 20000; go 400"
#define CONFIG_BOOTDELAY 1
#define CFG_PROMPT "u-boot> "
#define CFG_LONGHELP /* undef to save memory */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_LOAD_ADDR 0x00002000
#define CFG_MEMTEST_START 0x400
#define CFG_MEMTEST_END 0x380000
#define CFG_HZ 1000000
#define CFG_CLK 100000000
/*
* Low Level Configuration Settings
* (address mappings, register initial values, etc.)
* You should know what you are doing if you make changes here.
*/
#define CFG_MBAR 0x40000000 /* Register Base Addrs */
#define CFG_ENET_BD_BASE 0x480000
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CFG_INIT_RAM_ADDR 0x20000000
#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */
#define CFG_FLASH_BASE 0x10000000
#ifdef CONFIG_MONITOR_IS_IN_RAM
#define CFG_MONITOR_BASE 0x20000
#else
#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
#endif
#define CFG_MONITOR_LEN 0x20001
#define CFG_MALLOC_LEN (256 << 10)
#define CFG_BOOTPARAMS_LEN 64*1024
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
* FLASH organization
*/
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 1024 /* max number of sectors on one chip */
#define CFG_FLASH_ERASE_TOUT 1000
#define CFG_FLASH_CFI 1
#define CFG_FLASH_CFI_DRIVER 1
#define CFG_FLASH_SIZE 0x800000
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16
/*-----------------------------------------------------------------------
* Memory bank definitions
*/
/*-----------------------------------------------------------------------
* Port configuration
*/
#define CFG_FECI2C 0xF0
#endif /* _R5200_H */